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1117 | serge | 1 | /* |
2 | * Copyright 2008 Advanced Micro Devices, Inc. |
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3 | * Copyright 2008 Red Hat Inc. |
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4 | * Copyright 2009 Jerome Glisse. |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the "Software"), |
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8 | * to deal in the Software without restriction, including without limitation |
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9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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10 | * and/or sell copies of the Software, and to permit persons to whom the |
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11 | * Software is furnished to do so, subject to the following conditions: |
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12 | * |
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13 | * The above copyright notice and this permission notice shall be included in |
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14 | * all copies or substantial portions of the Software. |
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15 | * |
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16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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22 | * OTHER DEALINGS IN THE SOFTWARE. |
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23 | * |
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24 | * Authors: Dave Airlie |
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25 | * Alex Deucher |
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26 | * Jerome Glisse |
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27 | */ |
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28 | #ifndef __RADEON_H__ |
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29 | #define __RADEON_H__ |
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30 | |||
31 | /* TODO: Here are things that needs to be done : |
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32 | * - surface allocator & initializer : (bit like scratch reg) should |
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33 | * initialize HDP_ stuff on RS600, R600, R700 hw, well anythings |
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34 | * related to surface |
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35 | * - WB : write back stuff (do it bit like scratch reg things) |
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36 | * - Vblank : look at Jesse's rework and what we should do |
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37 | * - r600/r700: gart & cp |
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38 | * - cs : clean cs ioctl use bitmap & things like that. |
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39 | * - power management stuff |
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40 | * - Barrier in gart code |
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41 | * - Unmappabled vram ? |
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42 | * - TESTING, TESTING, TESTING |
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43 | */ |
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44 | |||
1221 | serge | 45 | /* Initialization path: |
46 | * We expect that acceleration initialization might fail for various |
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47 | * reasons even thought we work hard to make it works on most |
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48 | * configurations. In order to still have a working userspace in such |
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49 | * situation the init path must succeed up to the memory controller |
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50 | * initialization point. Failure before this point are considered as |
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51 | * fatal error. Here is the init callchain : |
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52 | * radeon_device_init perform common structure, mutex initialization |
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53 | * asic_init setup the GPU memory layout and perform all |
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54 | * one time initialization (failure in this |
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55 | * function are considered fatal) |
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56 | * asic_startup setup the GPU acceleration, in order to |
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57 | * follow guideline the first thing this |
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58 | * function should do is setting the GPU |
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59 | * memory controller (only MC setup failure |
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60 | * are considered as fatal) |
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61 | */ |
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62 | |||
1321 | serge | 63 | #include |
1221 | serge | 64 | |
1321 | serge | 65 | #include |
66 | #include |
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1221 | serge | 67 | |
1321 | serge | 68 | #include |
69 | #include |
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70 | #include |
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71 | #include |
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1221 | serge | 72 | |
1117 | serge | 73 | |
1120 | serge | 74 | #include |
1117 | serge | 75 | |
1120 | serge | 76 | #include |
1123 | serge | 77 | #include "drm_edid.h" |
1179 | serge | 78 | |
79 | #include "radeon_family.h" |
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1117 | serge | 80 | #include "radeon_mode.h" |
81 | #include "radeon_reg.h" |
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82 | |||
83 | #include |
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84 | |||
1179 | serge | 85 | /* |
86 | * Modules parameters. |
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87 | */ |
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88 | extern int radeon_no_wb; |
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1123 | serge | 89 | extern int radeon_modeset; |
1117 | serge | 90 | extern int radeon_dynclks; |
1123 | serge | 91 | extern int radeon_r4xx_atom; |
1128 | serge | 92 | extern int radeon_agpmode; |
93 | extern int radeon_vram_limit; |
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1117 | serge | 94 | extern int radeon_gart_size; |
1128 | serge | 95 | extern int radeon_benchmarking; |
1179 | serge | 96 | extern int radeon_testing; |
1123 | serge | 97 | extern int radeon_connector_table; |
1179 | serge | 98 | extern int radeon_tv; |
1321 | serge | 99 | extern int radeon_new_pll; |
1403 | serge | 100 | extern int radeon_audio; |
1117 | serge | 101 | |
1233 | serge | 102 | typedef struct |
103 | { |
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104 | int width; |
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105 | int height; |
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106 | int bpp; |
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107 | int freq; |
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1321 | serge | 108 | }videomode_t; |
1179 | serge | 109 | |
110 | static inline uint8_t __raw_readb(const volatile void __iomem *addr) |
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111 | { |
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112 | return *(const volatile uint8_t __force *) addr; |
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113 | } |
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114 | |||
115 | static inline uint16_t __raw_readw(const volatile void __iomem *addr) |
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116 | { |
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117 | return *(const volatile uint16_t __force *) addr; |
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118 | } |
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119 | |||
120 | static inline uint32_t __raw_readl(const volatile void __iomem *addr) |
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121 | { |
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122 | return *(const volatile uint32_t __force *) addr; |
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123 | } |
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124 | |||
125 | #define readb __raw_readb |
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126 | #define readw __raw_readw |
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127 | #define readl __raw_readl |
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128 | |||
129 | |||
130 | |||
131 | static inline void __raw_writeb(uint8_t b, volatile void __iomem *addr) |
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132 | { |
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133 | *(volatile uint8_t __force *) addr = b; |
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134 | } |
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135 | |||
136 | static inline void __raw_writew(uint16_t b, volatile void __iomem *addr) |
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137 | { |
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138 | *(volatile uint16_t __force *) addr = b; |
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139 | } |
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140 | |||
141 | static inline void __raw_writel(uint32_t b, volatile void __iomem *addr) |
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142 | { |
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143 | *(volatile uint32_t __force *) addr = b; |
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144 | } |
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145 | |||
146 | static inline void __raw_writeq(__u64 b, volatile void __iomem *addr) |
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147 | { |
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148 | *(volatile __u64 *)addr = b; |
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149 | } |
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150 | |||
151 | #define writeb __raw_writeb |
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152 | #define writew __raw_writew |
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153 | #define writel __raw_writel |
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154 | #define writeq __raw_writeq |
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155 | |||
156 | |||
1117 | serge | 157 | /* |
158 | * Copy from radeon_drv.h so we don't have to include both and have conflicting |
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159 | * symbol; |
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160 | */ |
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1120 | serge | 161 | #define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */ |
162 | #define RADEON_IB_POOL_SIZE 16 |
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1117 | serge | 163 | #define RADEON_DEBUGFS_MAX_NUM_FILES 32 |
1120 | serge | 164 | #define RADEONFB_CONN_LIMIT 4 |
1179 | serge | 165 | #define RADEON_BIOS_NUM_SCRATCH 8 |
1117 | serge | 166 | |
167 | /* |
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168 | * Errata workarounds. |
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169 | */ |
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170 | enum radeon_pll_errata { |
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171 | CHIP_ERRATA_R300_CG = 0x00000001, |
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172 | CHIP_ERRATA_PLL_DUMMYREADS = 0x00000002, |
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173 | CHIP_ERRATA_PLL_DELAY = 0x00000004 |
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174 | }; |
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175 | |||
176 | |||
177 | struct radeon_device; |
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178 | |||
179 | |||
180 | /* |
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181 | * BIOS. |
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182 | */ |
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183 | bool radeon_get_bios(struct radeon_device *rdev); |
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184 | |||
1179 | serge | 185 | |
1117 | serge | 186 | /* |
1179 | serge | 187 | * Dummy page |
188 | */ |
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189 | struct radeon_dummy_page { |
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190 | struct page *page; |
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191 | dma_addr_t addr; |
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192 | }; |
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193 | int radeon_dummy_page_init(struct radeon_device *rdev); |
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194 | void radeon_dummy_page_fini(struct radeon_device *rdev); |
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195 | |||
196 | |||
197 | /* |
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1117 | serge | 198 | * Clocks |
199 | */ |
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200 | struct radeon_clock { |
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201 | struct radeon_pll p1pll; |
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202 | struct radeon_pll p2pll; |
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203 | struct radeon_pll spll; |
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204 | struct radeon_pll mpll; |
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205 | /* 10 Khz units */ |
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206 | uint32_t default_mclk; |
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207 | uint32_t default_sclk; |
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208 | }; |
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209 | |||
1268 | serge | 210 | /* |
211 | * Power management |
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212 | */ |
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213 | int radeon_pm_init(struct radeon_device *rdev); |
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1179 | serge | 214 | |
1117 | serge | 215 | /* |
216 | * Fences. |
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217 | */ |
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218 | struct radeon_fence_driver { |
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219 | uint32_t scratch_reg; |
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1321 | serge | 220 | atomic_t seq; |
1117 | serge | 221 | uint32_t last_seq; |
222 | unsigned long count_timeout; |
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223 | // wait_queue_head_t queue; |
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1321 | serge | 224 | rwlock_t lock; |
1120 | serge | 225 | struct list_head created; |
226 | struct list_head emited; |
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227 | struct list_head signaled; |
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1403 | serge | 228 | bool initialized; |
1117 | serge | 229 | }; |
230 | |||
231 |