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Rev | Author | Line No. | Line |
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5078 | serge | 1 | #include |
2 | #include |
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3 | #include |
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4 | #include "radeon_reg.h" |
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5 | #include "radeon.h" |
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6 | #include "bitmap.h" |
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7 | |||
8 | #define KMS_DEV_CLOSE 0 |
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9 | #define KMS_DEV_INIT 1 |
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10 | #define KMS_DEV_READY 2 |
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11 | |||
12 | struct pci_device { |
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13 | uint16_t domain; |
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14 | uint8_t bus; |
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15 | uint8_t dev; |
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16 | uint8_t func; |
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17 | uint16_t vendor_id; |
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18 | uint16_t device_id; |
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19 | uint16_t subvendor_id; |
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20 | uint16_t subdevice_id; |
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21 | uint32_t device_class; |
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22 | uint8_t revision; |
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23 | }; |
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24 | |||
25 | struct drm_device *main_device; |
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26 | struct drm_file *drm_file_handlers[256]; |
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27 | |||
28 | videomode_t usermode; |
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29 | |||
30 | void cpu_detect(); |
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31 | |||
32 | int _stdcall display_handler(ioctl_t *io); |
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33 | static char log[256]; |
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34 | |||
35 | unsigned long volatile jiffies; |
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36 | u64 jiffies_64; |
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37 | |||
38 | struct workqueue_struct *system_wq; |
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39 | int driver_wq_state; |
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40 | |||
41 | int x86_clflush_size; |
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42 | |||
43 | void ati_driver_thread() |
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44 | { |
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45 | struct radeon_device *rdev = NULL; |
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46 | struct workqueue_struct *cwq = NULL; |
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47 | // static int dpms = 1; |
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48 | // static int dpms_lock = 0; |
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49 | // oskey_t key; |
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50 | unsigned long irqflags; |
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51 | int tmp; |
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52 | |||
53 | printf("%s\n",__FUNCTION__); |
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54 | |||
55 | while(driver_wq_state == KMS_DEV_INIT) |
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56 | { |
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57 | jiffies = GetTimerTicks(); |
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58 | jiffies_64 = jiffies; |
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59 | delay(1); |
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60 | }; |
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61 | |||
62 | rdev = main_device->dev_private; |
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63 | // cwq = rdev->wq; |
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64 | |||
65 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1)); |
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66 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330)); |
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67 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330)); |
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68 | |||
69 | while(driver_wq_state != KMS_DEV_CLOSE) |
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70 | { |
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71 | jiffies = GetTimerTicks(); |
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72 | #if 0 |
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73 | key = get_key(); |
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74 | |||
75 | if( (key.val != 1) && (key.state == 0x02)) |
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76 | { |
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77 | if(key.code == 0x46 && dpms_lock == 0) |
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78 | { |
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79 | dpms_lock = 1; |
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80 | if(dpms == 1) |
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81 | { |
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82 | i915_dpms(main_device, DRM_MODE_DPMS_OFF); |
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83 | printf("dpms off\n"); |
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84 | } |
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85 | else |
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86 | { |
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87 | i915_dpms(main_device, DRM_MODE_DPMS_ON); |
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88 | printf("dpms on\n"); |
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89 | }; |
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90 | dpms ^= 1; |
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91 | } |
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92 | else if(key.code == 0xC6) |
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93 | dpms_lock = 0; |
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94 | }; |
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95 | spin_lock_irqsave(&cwq->lock, irqflags); |
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96 | |||
97 | while (!list_empty(&cwq->worklist)) |
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98 | { |
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99 | struct work_struct *work = list_entry(cwq->worklist.next, |
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100 | struct work_struct, entry); |
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101 | work_func_t f = work->func; |
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102 | list_del_init(cwq->worklist.next); |
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103 | |||
104 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
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105 | f(work); |
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106 | spin_lock_irqsave(&cwq->lock, irqflags); |
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107 | } |
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108 | |||
109 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
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110 | #endif |
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111 | |||
112 | delay(1); |
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113 | }; |
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114 | |||
115 | asm volatile ("int $0x40"::"a"(-1)); |
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116 | } |
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117 | |||
118 | u32_t __attribute__((externally_visible)) drvEntry(int action, char *cmdline) |
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119 | { |
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120 | struct radeon_device *rdev = NULL; |
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121 | |||
122 | const struct pci_device_id *ent; |
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123 | |||
124 | int err = 0; |
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125 | |||
126 | if(action != 1) |
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127 | { |
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128 | driver_wq_state = KMS_DEV_CLOSE; |
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129 | return 0; |
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130 | }; |
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131 | |||
132 | if( GetService("DISPLAY") != 0 ) |
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133 | return 0; |
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134 | |||
135 | printf("Radeon v3.17-rc3 cmdline %s\n", cmdline); |
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136 | |||
137 | if( cmdline && *cmdline ) |
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138 | parse_cmdline(cmdline, &usermode, log, &radeon_modeset); |
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139 | |||
140 | if( *log && !dbg_open(log)) |
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141 | { |
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142 | printf("Can't open %s\nExit\n", log); |
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143 | return 0; |
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144 | } |
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145 | |||
146 | cpu_detect(); |
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147 | |||
148 | err = enum_pci_devices(); |
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149 | if( unlikely(err != 0) ) |
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150 | { |
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151 | dbgprintf("Device enumeration failed\n"); |
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152 | return 0; |
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153 | } |
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154 | |||
155 | driver_wq_state = KMS_DEV_INIT; |
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156 | CreateKernelThread(ati_driver_thread); |
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157 | |||
158 | err = ati_init(); |
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159 | if(unlikely(err!= 0)) |
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160 | { |
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161 | driver_wq_state = KMS_DEV_CLOSE; |
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162 | dbgprintf("Epic Fail :(\n"); |
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163 | return 0; |
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164 | }; |
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165 | |||
166 | driver_wq_state = KMS_DEV_READY; |
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167 | |||
168 | rdev = main_device->dev_private; |
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169 | printf("current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); |
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170 | printf("current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); |
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171 | |||
172 | err = RegService("DISPLAY", display_handler); |
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173 | |||
174 | if( err != 0) |
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175 | dbgprintf("DISPLAY service installed\n"); |
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176 | |||
177 | |||
178 | return err; |
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179 | }; |
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180 | |||
181 | |||
182 | |||
183 | #define CURRENT_API 0x0200 /* 2.00 */ |
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184 | #define COMPATIBLE_API 0x0100 /* 1.00 */ |
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185 | |||
186 | #define API_VERSION (COMPATIBLE_API << 16) | CURRENT_API |
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187 | |||
188 | #define SRV_GETVERSION 0 |
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189 | #define SRV_ENUM_MODES 1 |
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190 | #define SRV_SET_MODE 2 |
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191 | #define SRV_GET_CAPS 3 |
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192 | |||
193 | #define SRV_CREATE_SURFACE 10 |
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194 | #define SRV_DESTROY_SURFACE 11 |
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195 | #define SRV_LOCK_SURFACE 12 |
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196 | #define SRV_UNLOCK_SURFACE 13 |
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197 | #define SRV_RESIZE_SURFACE 14 |
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198 | #define SRV_BLIT_BITMAP 15 |
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199 | #define SRV_BLIT_TEXTURE 16 |
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200 | #define SRV_BLIT_VIDEO 17 |
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201 | |||
202 | |||
203 | |||
204 | int r600_video_blit(uint64_t src_offset, int x, int y, |
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205 | int w, int h, int pitch); |
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206 | |||
207 | #define check_input(size) \ |
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208 | if( unlikely((inp==NULL)||(io->inp_size != (size))) ) \ |
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209 | break; |
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210 | |||
211 | #define check_output(size) \ |
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212 | if( unlikely((outp==NULL)||(io->out_size != (size))) ) \ |
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213 | break; |
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214 | |||
215 | int _stdcall display_handler(ioctl_t *io) |
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216 | { |
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217 | int retval = -1; |
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218 | u32_t *inp; |
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219 | u32_t *outp; |
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220 | |||
221 | inp = io->input; |
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222 | outp = io->output; |
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223 | |||
224 | switch(io->io_code) |
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225 | { |
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226 | case SRV_GETVERSION: |
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227 | check_output(4); |
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228 | *outp = API_VERSION; |
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229 | retval = 0; |
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230 | break; |
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231 | |||
232 | case SRV_ENUM_MODES: |
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233 | // dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n", |
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234 | // inp, io->inp_size, io->out_size ); |
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235 | check_output(4); |
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236 | if( radeon_modeset) |
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237 | retval = get_videomodes((videomode_t*)inp, outp); |
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238 | break; |
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239 | |||
240 | case SRV_SET_MODE: |
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241 | // dbgprintf("SRV_SET_MODE inp %x inp_size %x\n", |
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242 | // inp, io->inp_size); |
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243 | check_input(sizeof(videomode_t)); |
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244 | if( radeon_modeset ) |
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245 | retval = set_user_mode((videomode_t*)inp); |
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246 | break; |
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247 | /* |
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248 | case SRV_GET_CAPS: |
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249 | retval = get_driver_caps((hwcaps_t*)inp); |
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250 | break; |
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251 | |||
252 | case SRV_CREATE_SURFACE: |
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253 | // check_input(8); |
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254 | retval = create_surface(main_drm_device, (struct io_call_10*)inp); |
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255 | break; |
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256 | |||
257 | case SRV_LOCK_SURFACE: |
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258 | retval = lock_surface((struct io_call_12*)inp); |
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259 | break; |
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260 | |||
261 | case SRV_BLIT_BITMAP: |
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262 | srv_blit_bitmap( inp[0], inp[1], inp[2], |
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263 | inp[3], inp[4], inp[5], inp[6]); |
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264 | */ |
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265 | }; |
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266 | |||
267 | return retval; |
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268 | } |
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269 | |||
270 | |||
271 | #define PCI_CLASS_REVISION 0x08 |
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272 | #define PCI_CLASS_DISPLAY_VGA 0x0300 |
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273 | |||
274 | int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn) |
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275 | { |
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276 | u16_t vendor, device; |
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277 | u32_t class; |
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278 | int ret = 0; |
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279 | |||
280 | vendor = id & 0xffff; |
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281 | device = (id >> 16) & 0xffff; |
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282 | |||
283 | if(vendor == 0x1002) |
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284 | { |
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285 | class = PciRead32(busnr, devfn, PCI_CLASS_REVISION); |
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286 | class >>= 16; |
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287 | |||
288 | if( class == PCI_CLASS_DISPLAY_VGA) |
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289 | ret = 1; |
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290 | } |
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291 | return ret; |
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292 | } |
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293 | |||
294 | |||
295 | int seq_printf(struct seq_file *m, const char *f, ...) |
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296 | { |
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297 | // int ret; |
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298 | // va_list args; |
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299 | |||
300 | // va_start(args, f); |
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301 | // ret = seq_vprintf(m, f, args); |
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302 | // va_end(args); |
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303 | |||
304 | // return ret; |
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305 | return 0; |
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306 | } |
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307 | |||
308 | s64 div64_s64(s64 dividend, s64 divisor) |
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309 | { |
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310 | s64 quot, t; |
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311 | |||
312 | quot = div64_u64(abs64(dividend), abs64(divisor)); |
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313 | t = (dividend ^ divisor) >> 63; |
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314 | |||
315 | return (quot ^ t) - t; |
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316 | }><> |
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317 |