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Rev | Author | Line No. | Line |
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2997 | Serge | 1 | /* |
2 | * Copyright 2011 Advanced Micro Devices, Inc. |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice shall be included in |
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12 | * all copies or substantial portions of the Software. |
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13 | * |
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14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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20 | * OTHER DEALINGS IN THE SOFTWARE. |
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21 | * |
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22 | * Authors: Alex Deucher |
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23 | * |
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24 | */ |
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25 | #include |
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26 | #include |
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27 | #include "radeon.h" |
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28 | #include "atom.h" |
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29 | |||
30 | #define TARGET_HW_I2C_CLOCK 50 |
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31 | |||
32 | /* these are a limitation of ProcessI2cChannelTransaction not the hw */ |
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5078 | serge | 33 | #define ATOM_MAX_HW_I2C_WRITE 3 |
2997 | Serge | 34 | #define ATOM_MAX_HW_I2C_READ 255 |
35 | |||
36 | static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, |
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37 | u8 slave_addr, u8 flags, |
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38 | u8 *buf, u8 num) |
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39 | { |
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40 | struct drm_device *dev = chan->dev; |
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41 | struct radeon_device *rdev = dev->dev_private; |
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42 | PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args; |
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43 | int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction); |
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44 | unsigned char *base; |
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5078 | serge | 45 | u16 out = cpu_to_le16(0); |
46 | int r = 0; |
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2997 | Serge | 47 | |
48 | memset(&args, 0, sizeof(args)); |
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49 | |||
5078 | serge | 50 | mutex_lock(&chan->mutex); |
51 | |||
2997 | Serge | 52 | base = (unsigned char *)rdev->mode_info.atom_context->scratch; |
53 | |||
54 | if (flags & HW_I2C_WRITE) { |
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55 | if (num > ATOM_MAX_HW_I2C_WRITE) { |
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5078 | serge | 56 | DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num); |
57 | r = -EINVAL; |
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58 | goto done; |
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2997 | Serge | 59 | } |
5078 | serge | 60 | if (buf == NULL) |
61 | args.ucRegIndex = 0; |
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62 | else |
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63 | args.ucRegIndex = buf[0]; |
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64 | if (num) |
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65 | num--; |
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66 | if (num) |
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67 | memcpy(&out, &buf[1], num); |
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2997 | Serge | 68 | args.lpI2CDataOut = cpu_to_le16(out); |
69 | } else { |
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70 | if (num > ATOM_MAX_HW_I2C_READ) { |
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71 | DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num); |
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5078 | serge | 72 | r = -EINVAL; |
73 | goto done; |
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2997 | Serge | 74 | } |
5078 | serge | 75 | args.ucRegIndex = 0; |
76 | args.lpI2CDataOut = 0; |
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2997 | Serge | 77 | } |
78 | |||
5078 | serge | 79 | args.ucFlag = flags; |
2997 | Serge | 80 | args.ucI2CSpeed = TARGET_HW_I2C_CLOCK; |
81 | args.ucTransBytes = num; |
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82 | args.ucSlaveAddr = slave_addr << 1; |
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83 | args.ucLineNumber = chan->rec.i2c_id; |
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84 | |||
85 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
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86 | |||
87 | /* error */ |
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88 | if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) { |
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89 | DRM_DEBUG_KMS("hw_i2c error\n"); |
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5078 | serge | 90 | r = -EIO; |
91 | goto done; |
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2997 | Serge | 92 | } |
93 | |||
94 | if (!(flags & HW_I2C_WRITE)) |
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5078 | serge | 95 | radeon_atom_copy_swap(buf, base, num, false); |
2997 | Serge | 96 | |
5078 | serge | 97 | done: |
98 | mutex_unlock(&chan->mutex); |
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99 | |||
100 | return r; |
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2997 | Serge | 101 | } |
102 | |||
103 | int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap, |
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104 | struct i2c_msg *msgs, int num) |
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105 | { |
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106 | struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap); |
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107 | struct i2c_msg *p; |
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108 | int i, remaining, current_count, buffer_offset, max_bytes, ret; |
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5078 | serge | 109 | u8 flags; |
2997 | Serge | 110 | |
111 | /* check for bus probe */ |
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112 | p = &msgs[0]; |
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113 | if ((num == 1) && (p->len == 0)) { |
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114 | ret = radeon_process_i2c_ch(i2c, |
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115 | p->addr, HW_I2C_WRITE, |
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5078 | serge | 116 | NULL, 0); |
2997 | Serge | 117 | if (ret) |
118 | return ret; |
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119 | else |
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120 | return num; |
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121 | } |
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122 | |||
123 | for (i = 0; i < num; i++) { |
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124 | p = &msgs[i]; |
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125 | remaining = p->len; |
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126 | buffer_offset = 0; |
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127 | /* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */ |
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128 | if (p->flags & I2C_M_RD) { |
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129 | max_bytes = ATOM_MAX_HW_I2C_READ; |
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130 | flags = HW_I2C_READ; |
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131 | } else { |
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132 | max_bytes = ATOM_MAX_HW_I2C_WRITE; |
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133 | flags = HW_I2C_WRITE; |
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134 | } |
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135 | while (remaining) { |
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136 | if (remaining > max_bytes) |
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137 | current_count = max_bytes; |
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138 | else |
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139 | current_count = remaining; |
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140 | ret = radeon_process_i2c_ch(i2c, |
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141 | p->addr, flags, |
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142 | &p->buf[buffer_offset], current_count); |
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143 | if (ret) |
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144 | return ret; |
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145 | remaining -= current_count; |
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146 | buffer_offset += current_count; |
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147 | } |
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148 | } |
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149 | |||
150 | return num; |
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151 | } |
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152 | |||
153 | u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap) |
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154 | { |
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155 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; |
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156 | }>><> |
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157 |