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/* ------------------------------------------------------------------------- */

/*									     */

/* i2c.h - definitions for the i2c-bus interface			     */

/*									     */

/* ------------------------------------------------------------------------- */

/*   Copyright (C) 1995-2000 Simon G. Vogl

    This program is free software; you can redistribute it and/or modify

    it under the terms of the GNU General Public License as published by

    the Free Software Foundation; either version 2 of the License, or

    (at your option) any later version.

    This program is distributed in the hope that it will be useful,

    but WITHOUT ANY WARRANTY; without even the implied warranty of

    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License

    along with this program; if not, write to the Free Software

    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.		     */

/* ------------------------------------------------------------------------- */

/* With some changes from Kyösti Mälkki  and

   Frodo Looijaard  */

#ifndef _LINUX_I2C_H

#define _LINUX_I2C_H

#include 

#include 

#define I2C_NAME_SIZE   20

struct i2c_msg;

struct i2c_algorithm;

struct i2c_adapter;

struct i2c_client;

union i2c_smbus_data;

/* Transfer num messages.

 */

extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs,

			int num);

/**

 * struct i2c_client - represent an I2C slave device

 * @flags: I2C_CLIENT_TEN indicates the device uses a ten bit chip address;

 *	I2C_CLIENT_PEC indicates it uses SMBus Packet Error Checking

 * @addr: Address used on the I2C bus connected to the parent adapter.

 * @name: Indicates the type of the device, usually a chip name that's

 *	generic enough to hide second-sourcing and compatible revisions.

 * @adapter: manages the bus segment hosting this I2C device

 * @driver: device's driver, hence pointer to access routines

 * @dev: Driver model device node for the slave.

 * @irq: indicates the IRQ generated by this device (if any)

 * @detected: member of an i2c_driver.clients list or i2c-core's

 *	userspace_devices list

 *

 * An i2c_client identifies a single device (i.e. chip) connected to an

 * i2c bus. The behaviour exposed to Linux is defined by the driver

 * managing the device.

 */

struct i2c_client {

	unsigned short flags;		/* div., see below		*/

	unsigned short addr;		/* chip address - NOTE: 7bit	*/

					/* addresses are stored in the	*/

					/* _LOWER_ 7 bits		*/

	char name[I2C_NAME_SIZE];

	struct i2c_adapter *adapter;	/* the adapter we sit on	*/

//        struct i2c_driver *driver;      /* and our access routines      */

//        struct device dev;              /* the device structure         */

        int irq;                        /* irq issued by device (or -1) */

	struct list_head detected;

};

#define to_i2c_client(d) container_of(d, struct i2c_client, dev)

/*

 * The following structs are for those who like to implement new bus drivers:

 * i2c_algorithm is the interface to a class of hardware solutions which can

 * be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584

 * to name two of the most common.

 */

struct i2c_algorithm {

	/* If an adapter algorithm can't do I2C-level access, set master_xfer

	   to NULL. If an adapter algorithm can do SMBus access, set

	   smbus_xfer. If set to NULL, the SMBus protocol is simulated

	   using common I2C messages */

	/* master_xfer should return the number of messages successfully

	   processed, or a negative value on error */

	int (*master_xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs,

			   int num);

	int (*smbus_xfer) (struct i2c_adapter *adap, u16 addr,

			   unsigned short flags, char read_write,

			   u8 command, int size, union i2c_smbus_data *data);

	/* To determine what the adapter supports */

	u32 (*functionality) (struct i2c_adapter *);

};

/*

 * i2c_adapter is the structure used to identify a physical i2c bus along

 * with the access algorithms necessary to access it.

 */

struct i2c_adapter {

	unsigned int id;

	unsigned int class;		  /* classes to allow probing for */

	const struct i2c_algorithm *algo; /* the algorithm to access the bus */

	void *algo_data;

        /* data fields that are valid for all devices   */

	u8 level; 			/* nesting level for lockdep */

	int timeout;			/* in jiffies */

    int retries;

 //  struct device dev;      /* the adapter device */

    int nr;

    char name[48];

};

#define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev)

/*flags for the client struct: */

#define I2C_CLIENT_PEC	0x04		/* Use Packet Error Checking */

#define I2C_CLIENT_TEN	0x10		/* we have a ten bit chip address */

					/* Must equal I2C_M_TEN below */

#define I2C_CLIENT_WAKE	0x80		/* for board_info; true iff can wake */

/* i2c adapter classes (bitmask) */

#define I2C_CLASS_HWMON		(1<<0)	/* lm_sensors, ... */

#define I2C_CLASS_TV_ANALOG	(1<<1)	/* bttv + friends */

#define I2C_CLASS_TV_DIGITAL	(1<<2)	/* dvb cards */

#define I2C_CLASS_DDC		(1<<3)	/* DDC bus on graphics adapters */

#define I2C_CLASS_SPD		(1<<7)	/* SPD EEPROMs and similar */

/* i2c_client_address_data is the struct for holding default client

 * addresses for a driver and for the parameters supplied on the

 * command line

 */

struct i2c_client_address_data {

	const unsigned short *normal_i2c;

	const unsigned short *probe;

	const unsigned short *ignore;

	const unsigned short * const *forces;

};

/* Internal numbers to terminate lists */

#define I2C_CLIENT_END		0xfffeU

/* The numbers to use to set I2C bus address */

#define ANY_I2C_BUS		0xffff

/* Construct an I2C_CLIENT_END-terminated array of i2c addresses */

#define I2C_ADDRS(addr, addrs...) \

	((const unsigned short []){ addr, ## addrs, I2C_CLIENT_END })

/**

 * struct i2c_msg - an I2C transaction segment beginning with START

 * @addr: Slave address, either seven or ten bits.  When this is a ten

 *	bit address, I2C_M_TEN must be set in @flags and the adapter

 *	must support I2C_FUNC_10BIT_ADDR.

 * @flags: I2C_M_RD is handled by all adapters.  No other flags may be

 *	provided unless the adapter exported the relevant I2C_FUNC_*

 *	flags through i2c_check_functionality().

 * @len: Number of data bytes in @buf being read from or written to the

 *	I2C slave address.  For read transactions where I2C_M_RECV_LEN

 *	is set, the caller guarantees that this buffer can hold up to

 *	32 bytes in addition to the initial length byte sent by the

 *	slave (plus, if used, the SMBus PEC); and this value will be

 *	incremented by the number of block data bytes received.

 * @buf: The buffer into which data is read, or from which it's written.

 *

 * An i2c_msg is the low level representation of one segment of an I2C

 * transaction.  It is visible to drivers in the @i2c_transfer() procedure,

 * to userspace from i2c-dev, and to I2C adapter drivers through the

 * @i2c_adapter.@master_xfer() method.

 *

 * Except when I2C "protocol mangling" is used, all I2C adapters implement

 * the standard rules for I2C transactions.  Each transaction begins with a

 * START.  That is followed by the slave address, and a bit encoding read

 * versus write.  Then follow all the data bytes, possibly including a byte

 * with SMBus PEC.  The transfer terminates with a NAK, or when all those

 * bytes have been transferred and ACKed.  If this is the last message in a

 * group, it is followed by a STOP.  Otherwise it is followed by the next

 * @i2c_msg transaction segment, beginning with a (repeated) START.

 *

 * Alternatively, when the adapter supports I2C_FUNC_PROTOCOL_MANGLING then

 * passing certain @flags may have changed those standard protocol behaviors.

 * Those flags are only for use with broken/nonconforming slaves, and with

 * adapters which are known to support the specific mangling options they

 * need (one or more of IGNORE_NAK, NO_RD_ACK, NOSTART, and REV_DIR_ADDR).

 */

struct i2c_msg {

        u16 addr;     /* slave address                        */

        u16 flags;

#define I2C_M_TEN               0x0010  /* this is a ten bit chip address */

#define I2C_M_RD                0x0001  /* read data, from slave to master */

#define I2C_M_NOSTART           0x4000  /* if I2C_FUNC_PROTOCOL_MANGLING */

#define I2C_M_REV_DIR_ADDR      0x2000  /* if I2C_FUNC_PROTOCOL_MANGLING */

#define I2C_M_IGNORE_NAK        0x1000  /* if I2C_FUNC_PROTOCOL_MANGLING */

#define I2C_M_NO_RD_ACK         0x0800  /* if I2C_FUNC_PROTOCOL_MANGLING */

#define I2C_M_RECV_LEN          0x0400  /* length will be first received byte */

        u16 len;              /* msg length                           */

        u8 *buf;              /* pointer to msg data                  */

};

/* To determine what functionality is present */

#define I2C_FUNC_I2C			0x00000001

#define I2C_FUNC_10BIT_ADDR		0x00000002

#define I2C_FUNC_PROTOCOL_MANGLING	0x00000004 /* I2C_M_NOSTART etc. */

#define I2C_FUNC_SMBUS_PEC		0x00000008

#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL	0x00008000 /* SMBus 2.0 */

#define I2C_FUNC_SMBUS_QUICK		0x00010000

#define I2C_FUNC_SMBUS_READ_BYTE	0x00020000

#define I2C_FUNC_SMBUS_WRITE_BYTE	0x00040000

#define I2C_FUNC_SMBUS_READ_BYTE_DATA	0x00080000

#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA	0x00100000

#define I2C_FUNC_SMBUS_READ_WORD_DATA	0x00200000

#define I2C_FUNC_SMBUS_WRITE_WORD_DATA	0x00400000

#define I2C_FUNC_SMBUS_PROC_CALL	0x00800000

#define I2C_FUNC_SMBUS_READ_BLOCK_DATA	0x01000000

#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000

#define I2C_FUNC_SMBUS_READ_I2C_BLOCK	0x04000000 /* I2C-like block xfer  */

#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK	0x08000000 /* w/ 1-byte reg. addr. */

#define I2C_FUNC_SMBUS_BYTE		(I2C_FUNC_SMBUS_READ_BYTE | \

					 I2C_FUNC_SMBUS_WRITE_BYTE)

#define I2C_FUNC_SMBUS_BYTE_DATA	(I2C_FUNC_SMBUS_READ_BYTE_DATA | \

					 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)

#define I2C_FUNC_SMBUS_WORD_DATA	(I2C_FUNC_SMBUS_READ_WORD_DATA | \

					 I2C_FUNC_SMBUS_WRITE_WORD_DATA)

#define I2C_FUNC_SMBUS_BLOCK_DATA	(I2C_FUNC_SMBUS_READ_BLOCK_DATA | \

					 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)

#define I2C_FUNC_SMBUS_I2C_BLOCK	(I2C_FUNC_SMBUS_READ_I2C_BLOCK | \

					 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)

#define I2C_FUNC_SMBUS_EMUL		(I2C_FUNC_SMBUS_QUICK | \

					 I2C_FUNC_SMBUS_BYTE | \

					 I2C_FUNC_SMBUS_BYTE_DATA | \

					 I2C_FUNC_SMBUS_WORD_DATA | \

					 I2C_FUNC_SMBUS_PROC_CALL | \

					 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \

					 I2C_FUNC_SMBUS_I2C_BLOCK | \

					 I2C_FUNC_SMBUS_PEC)

/*

 * Data for SMBus Messages

 */

#define I2C_SMBUS_BLOCK_MAX	32	/* As specified in SMBus standard */

union i2c_smbus_data {

	__u8 byte;

	__u16 word;

	__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */

			       /* and one more for user-space compatibility */

};

/* i2c_smbus_xfer read or write markers */

#define I2C_SMBUS_READ	1

#define I2C_SMBUS_WRITE	0

/* SMBus transaction types (size parameter in the above functions)

   Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */

#define I2C_SMBUS_QUICK		    0

#define I2C_SMBUS_BYTE		    1

#define I2C_SMBUS_BYTE_DATA	    2

#define I2C_SMBUS_WORD_DATA	    3

#define I2C_SMBUS_PROC_CALL	    4

#define I2C_SMBUS_BLOCK_DATA	    5

#define I2C_SMBUS_I2C_BLOCK_BROKEN  6

#define I2C_SMBUS_BLOCK_PROC_CALL   7		/* SMBus 2.0 */

#define I2C_SMBUS_I2C_BLOCK_DATA    8

#endif /* _LINUX_I2C_H */