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3031 serge 1
#include 
2
#include 
3
#include 
2338 Serge 4
#include "i915_drv.h"
3031 serge 5
//#include "intel_drv.h"
2338 Serge 6
 
2325 Serge 7
#include 
8
#include 
9
#include 
10
#include 
11
#include 
12
#include 
13
 
2342 Serge 14
#include "bitmap.h"
2340 Serge 15
 
3255 Serge 16
struct pci_device {
17
    uint16_t    domain;
18
    uint8_t     bus;
19
    uint8_t     dev;
20
    uint8_t     func;
21
    uint16_t    vendor_id;
22
    uint16_t    device_id;
23
    uint16_t    subvendor_id;
24
    uint16_t    subdevice_id;
25
    uint32_t    device_class;
26
    uint8_t     revision;
27
};
28
 
4104 Serge 29
struct drm_device *main_device;
30
struct drm_file   *drm_file_handlers[256];
4280 Serge 31
videomode_t usermode;
3033 serge 32
 
2344 Serge 33
void cpu_detect();
34
 
2338 Serge 35
int _stdcall display_handler(ioctl_t *io);
2325 Serge 36
int init_agp(void);
37
 
3120 serge 38
int srv_blit_bitmap(u32 hbitmap, int  dst_x, int dst_y,
2351 Serge 39
               int src_x, int src_y, u32 w, u32 h);
2340 Serge 40
 
2351 Serge 41
int blit_textured(u32 hbitmap, int  dst_x, int dst_y,
42
               int src_x, int src_y, u32 w, u32 h);
43
 
2361 Serge 44
int blit_tex(u32 hbitmap, int  dst_x, int dst_y,
45
             int src_x, int src_y, u32 w, u32 h);
46
 
3255 Serge 47
void get_pci_info(struct pci_device *dev);
4246 Serge 48
int i915_getparam(struct drm_device *dev, void *data,
49
             struct drm_file *file_priv);
3255 Serge 50
 
3277 Serge 51
int i915_mask_update(struct drm_device *dev, void *data,
52
            struct drm_file *file);
3255 Serge 53
 
4280 Serge 54
struct cmdtable cmdtable[]= {
55
    CMDENTRY("-pm=", i915_powersave),
56
    CMDENTRY("-rc6=", i915_enable_rc6),
57
    CMDENTRY("-fbc=", i915_enable_fbc),
58
    CMDENTRY("-ppgt=", i915_enable_ppgtt),
59
    CMDENTRY("-pc8=", i915_enable_pc8),
60
    {NULL, 0}
61
};
3277 Serge 62
 
4280 Serge 63
 
2325 Serge 64
static char  log[256];
65
 
3482 Serge 66
struct workqueue_struct *system_wq;
3764 Serge 67
int driver_wq_state;
3482 Serge 68
 
2344 Serge 69
int x86_clflush_size;
3482 Serge 70
unsigned int tsc_khz;
2344 Serge 71
 
2338 Serge 72
int i915_modeset = 1;
73
 
4126 Serge 74
typedef union __attribute__((packed))
75
{
76
    uint32_t val;
77
    struct
78
    {
79
        uint8_t   state;
80
        uint8_t   code;
81
        uint16_t  ctrl_key;
82
    };
83
}oskey_t;
84
 
85
static inline oskey_t get_key(void)
86
{
87
    oskey_t val;
88
    asm volatile("int $0x40":"=a"(val):"a"(2));
89
    return val;
90
};
91
 
92
void i915_dpms(struct drm_device *dev, int mode);
93
 
94
void i915_driver_thread()
95
{
96
    struct drm_i915_private *dev_priv = main_device->dev_private;
97
    struct workqueue_struct *cwq = dev_priv->wq;
98
    static int dpms = 1;
99
    static int dpms_lock = 0;
100
    oskey_t   key;
101
    unsigned long irqflags;
102
    int tmp;
103
 
104
    printf("%s\n",__FUNCTION__);
105
 
106
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1));
107
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330));
108
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330));
109
 
110
    while(driver_wq_state != 0)
111
    {
112
        key = get_key();
113
 
114
        if( (key.val != 1) && (key.state == 0x02))
115
        {
116
            if(key.code == 0x46 && dpms_lock == 0)
117
            {
118
                dpms_lock = 1;
119
                if(dpms == 1)
120
                {
121
                    i915_dpms(main_device, DRM_MODE_DPMS_OFF);
122
                    printf("dpms off\n");
123
                }
124
                else
125
                {
126
                    i915_dpms(main_device, DRM_MODE_DPMS_ON);
127
                    printf("dpms on\n");
128
                };
129
                dpms ^= 1;
130
                }
131
            else if(key.code == 0xC6)
132
                dpms_lock = 0;
133
        };
134
 
135
        spin_lock_irqsave(&cwq->lock, irqflags);
136
 
137
        while (!list_empty(&cwq->worklist))
138
        {
139
            struct work_struct *work = list_entry(cwq->worklist.next,
140
                                        struct work_struct, entry);
141
            work_func_t f = work->func;
142
            list_del_init(cwq->worklist.next);
143
 
144
            spin_unlock_irqrestore(&cwq->lock, irqflags);
145
            f(work);
146
            spin_lock_irqsave(&cwq->lock, irqflags);
147
        }
148
 
149
        spin_unlock_irqrestore(&cwq->lock, irqflags);
150
 
151
        delay(1);
152
    };
153
 
154
    asm volatile ("int $0x40"::"a"(-1));
155
}
156
 
3480 Serge 157
u32_t  __attribute__((externally_visible)) drvEntry(int action, char *cmdline)
2325 Serge 158
{
4104 Serge 159
    int err = 0;
2325 Serge 160
 
161
    if(action != 1)
3764 Serge 162
    {
163
        driver_wq_state = 0;
2325 Serge 164
        return 0;
3764 Serge 165
    };
2325 Serge 166
 
167
    if( GetService("DISPLAY") != 0 )
168
        return 0;
169
 
4560 Serge 170
    printf("\ni915 v3.14-rc1 build %s %s\nusage: i915 [options]\n"
171
           "-pm=<0,1>     Enable powersavings, fbc, downclocking, etc. (default: 1 - true)\n",
4398 Serge 172
           __DATE__, __TIME__);
4280 Serge 173
    printf("-rc6=<-1,0-7> Enable power-saving render C-state 6.\n"
174
           "              Different stages can be selected via bitmask values\n"
175
           "              (0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6).\n"
176
           "              For example, 3 would enable rc6 and deep rc6, and 7 would enable everything.\n"
177
           "              default: -1 (use per-chip default)\n");
178
    printf("-fbc=<-1,0,1> Enable frame buffer compression for power savings\n"
4560 Serge 179
           "              (default: -1 (use per-chip default))\n");
180
    printf("-ppgt=<0,1>   Enable PPGTT (default: true)\n");
4280 Serge 181
    printf("-pc8=<0,1>    Enable support for low power package C states (PC8+) (default: 0 - false)\n");
182
    printf("-l      path to log file\n");
183
    printf("-m    set videomode\n");
184
 
2340 Serge 185
    if( cmdline && *cmdline )
4280 Serge 186
        parse_cmdline(cmdline, cmdtable, log, &usermode);
2325 Serge 187
 
4293 Serge 188
    if( *log && !dbg_open(log))
2325 Serge 189
        {
190
            printf("Can't open %s\nExit\n", log);
191
            return 0;
192
    }
193
 
2351 Serge 194
    cpu_detect();
3480 Serge 195
//    dbgprintf("\ncache line size %d\n", x86_clflush_size);
2351 Serge 196
 
2325 Serge 197
    enum_pci_devices();
198
 
199
    err = i915_init();
2338 Serge 200
    if(err)
201
    {
3298 Serge 202
        dbgprintf("Epic Fail :(\n");
203
        return 0;
2338 Serge 204
    };
2325 Serge 205
 
4280 Serge 206
    init_display_kms(main_device, &usermode);
207
 
2338 Serge 208
    err = RegService("DISPLAY", display_handler);
2325 Serge 209
 
2338 Serge 210
    if( err != 0)
211
        dbgprintf("Set DISPLAY handler\n");
212
 
3764 Serge 213
    driver_wq_state = 1;
4104 Serge 214
 
4126 Serge 215
    CreateKernelThread(i915_driver_thread);
3482 Serge 216
 
2325 Serge 217
    return err;
218
};
219
 
3480 Serge 220
 
2344 Serge 221
#define CURRENT_API     0x0200      /*      2.00     */
222
#define COMPATIBLE_API  0x0100      /*      1.00     */
2338 Serge 223
 
2344 Serge 224
#define API_VERSION     (COMPATIBLE_API << 16) | CURRENT_API
2351 Serge 225
#define DISPLAY_VERSION  API_VERSION
2338 Serge 226
 
227
 
2352 Serge 228
#define SRV_GETVERSION          0
229
#define SRV_ENUM_MODES          1
230
#define SRV_SET_MODE            2
231
#define SRV_GET_CAPS            3
2342 Serge 232
 
2352 Serge 233
#define SRV_CREATE_SURFACE      10
234
#define SRV_DESTROY_SURFACE     11
235
#define SRV_LOCK_SURFACE        12
236
#define SRV_UNLOCK_SURFACE      13
3039 serge 237
#define SRV_RESIZE_SURFACE      14
3120 serge 238
#define SRV_BLIT_BITMAP         15
239
#define SRV_BLIT_TEXTURE        16
240
#define SRV_BLIT_VIDEO          17
2344 Serge 241
 
3290 Serge 242
 
3260 Serge 243
#define SRV_GET_PCI_INFO            20
4246 Serge 244
#define SRV_I915_GET_PARAM              21
4104 Serge 245
#define SRV_I915_GEM_CREATE         22
246
#define SRV_DRM_GEM_CLOSE           23
4246 Serge 247
#define SRV_DRM_GEM_FLINK               24
248
#define SRV_DRM_GEM_OPEN                25
249
#define SRV_I915_GEM_PIN                26
250
#define SRV_I915_GEM_UNPIN              27
251
#define SRV_I915_GEM_SET_CACHING        28
252
#define SRV_I915_GEM_PWRITE             29
253
#define SRV_I915_GEM_BUSY               30
254
#define SRV_I915_GEM_SET_DOMAIN         31
255
#define SRV_I915_GEM_MMAP               32
256
#define SRV_I915_GEM_SET_TILING         33
257
#define SRV_I915_GEM_GET_TILING         34
258
#define SRV_I915_GEM_GET_APERTURE       35
259
#define SRV_I915_GEM_MMAP_GTT           36
260
#define SRV_I915_GEM_THROTTLE           37
261
#define SRV_I915_GEM_EXECBUFFER2        38
262
#define SRV_I915_GEM_WAIT               39
263
#define SRV_I915_GEM_CONTEXT_CREATE     40
264
#define SRV_I915_GEM_CONTEXT_DESTROY    41
265
#define SRV_I915_REG_READ               42
3260 Serge 266
 
4246 Serge 267
#define SRV_FBINFO                      43
268
#define SRV_MASK_UPDATE                 44
4539 Serge 269
#define SRV_MASK_UPDATE_EX              45
3263 Serge 270
 
2338 Serge 271
#define check_input(size) \
272
    if( unlikely((inp==NULL)||(io->inp_size != (size))) )   \
273
        break;
274
 
275
#define check_output(size) \
276
    if( unlikely((outp==NULL)||(io->out_size != (size))) )   \
277
        break;
278
 
279
int _stdcall display_handler(ioctl_t *io)
280
{
3255 Serge 281
    struct drm_file *file;
282
 
2338 Serge 283
    int    retval = -1;
284
    u32_t *inp;
285
    u32_t *outp;
286
 
287
    inp = io->input;
288
    outp = io->output;
289
 
3255 Serge 290
    file = drm_file_handlers[0];
291
 
2338 Serge 292
    switch(io->io_code)
293
    {
294
        case SRV_GETVERSION:
295
            check_output(4);
2344 Serge 296
            *outp  = DISPLAY_VERSION;
2338 Serge 297
            retval = 0;
298
            break;
299
 
300
        case SRV_ENUM_MODES:
3031 serge 301
//            dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",
302
//                       inp, io->inp_size, io->out_size );
2340 Serge 303
            check_output(4);
2338 Serge 304
//            check_input(*outp * sizeof(videomode_t));
305
            if( i915_modeset)
306
                retval = get_videomodes((videomode_t*)inp, outp);
307
            break;
308
 
309
        case SRV_SET_MODE:
3031 serge 310
//            dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",
311
//                       inp, io->inp_size);
2338 Serge 312
            check_input(sizeof(videomode_t));
313
            if( i915_modeset )
314
                retval = set_user_mode((videomode_t*)inp);
315
            break;
3033 serge 316
 
2351 Serge 317
        case SRV_GET_CAPS:
318
            retval = get_driver_caps((hwcaps_t*)inp);
319
            break;
320
 
2344 Serge 321
        case SRV_CREATE_SURFACE:
322
//            check_input(8);
3243 Serge 323
//            retval = create_surface(main_device, (struct io_call_10*)inp);
2338 Serge 324
            break;
325
 
2352 Serge 326
        case SRV_LOCK_SURFACE:
3243 Serge 327
//            retval = lock_surface((struct io_call_12*)inp);
2352 Serge 328
            break;
2342 Serge 329
 
3039 serge 330
        case SRV_RESIZE_SURFACE:
3243 Serge 331
//            retval = resize_surface((struct io_call_14*)inp);
3039 serge 332
            break;
333
 
3255 Serge 334
        case SRV_BLIT_BITMAP:
3243 Serge 335
//            srv_blit_bitmap( inp[0], inp[1], inp[2],
336
//                        inp[3], inp[4], inp[5], inp[6]);
3033 serge 337
 
338
//            blit_tex( inp[0], inp[1], inp[2],
2351 Serge 339
//                    inp[3], inp[4], inp[5], inp[6]);
340
 
3255 Serge 341
            break;
2338 Serge 342
 
3260 Serge 343
        case SRV_GET_PCI_INFO:
3255 Serge 344
            get_pci_info((struct pci_device *)inp);
2338 Serge 345
            retval = 0;
346
            break;
3031 serge 347
 
4246 Serge 348
        case SRV_I915_GET_PARAM:
349
            retval = i915_getparam(main_device, inp, file);
3255 Serge 350
            break;
351
 
352
        case SRV_I915_GEM_CREATE:
353
            retval = i915_gem_create_ioctl(main_device, inp, file);
354
            break;
355
 
356
        case SRV_DRM_GEM_CLOSE:
357
            retval = drm_gem_close_ioctl(main_device, inp, file);
358
            break;
359
 
4246 Serge 360
        case SRV_DRM_GEM_FLINK:
361
            retval = drm_gem_flink_ioctl(main_device, inp, file);
362
            break;
363
 
364
        case SRV_DRM_GEM_OPEN:
365
            retval = drm_gem_open_ioctl(main_device, inp, file);
366
            break;
367
 
3255 Serge 368
        case SRV_I915_GEM_PIN:
369
            retval = i915_gem_pin_ioctl(main_device, inp, file);
370
            break;
3260 Serge 371
 
4246 Serge 372
        case SRV_I915_GEM_UNPIN:
373
            retval = i915_gem_unpin_ioctl(main_device, inp, file);
3260 Serge 374
            break;
375
 
4246 Serge 376
        case SRV_I915_GEM_SET_CACHING:
377
            retval = i915_gem_set_caching_ioctl(main_device, inp, file);
3260 Serge 378
            break;
379
 
380
        case SRV_I915_GEM_PWRITE:
381
            retval = i915_gem_pwrite_ioctl(main_device, inp, file);
382
            break;
383
 
384
        case SRV_I915_GEM_BUSY:
385
            retval = i915_gem_busy_ioctl(main_device, inp, file);
386
            break;
387
 
388
        case SRV_I915_GEM_SET_DOMAIN:
389
            retval = i915_gem_set_domain_ioctl(main_device, inp, file);
390
            break;
391
 
3263 Serge 392
        case SRV_I915_GEM_MMAP:
393
            retval = i915_gem_mmap_ioctl(main_device, inp, file);
394
            break;
395
 
4246 Serge 396
        case SRV_I915_GEM_SET_TILING:
397
            retval = i915_gem_set_tiling(main_device, inp, file);
398
            break;
399
 
400
        case SRV_I915_GEM_GET_TILING:
401
            retval = i915_gem_get_tiling(main_device, inp, file);
402
            break;
403
 
404
        case SRV_I915_GEM_GET_APERTURE:
405
//            printf("SRV_I915_GEM_GET_APERTURE ");
406
            retval = i915_gem_get_aperture_ioctl(main_device, inp, file);
407
//            printf(" retval=%d\n", retval);
408
            break;
409
 
3480 Serge 410
        case SRV_I915_GEM_MMAP_GTT:
411
            retval = i915_gem_mmap_gtt_ioctl(main_device, inp, file);
412
            break;
413
 
4246 Serge 414
        case SRV_I915_GEM_THROTTLE:
415
            retval = i915_gem_throttle_ioctl(main_device, inp, file);
3263 Serge 416
            break;
417
 
418
        case SRV_I915_GEM_EXECBUFFER2:
4246 Serge 419
//            printf("SRV_I915_GEM_EXECBUFFER2\n");
3263 Serge 420
            retval = i915_gem_execbuffer2(main_device, inp, file);
421
            break;
422
 
4246 Serge 423
        case SRV_I915_GEM_WAIT:
424
            retval = i915_gem_wait_ioctl(main_device, inp, file);
425
            break;
426
 
427
        case SRV_I915_GEM_CONTEXT_CREATE:
428
            retval = i915_gem_context_create_ioctl(main_device, inp, file);
429
            break;
430
 
431
        case SRV_I915_GEM_CONTEXT_DESTROY:
432
            retval = i915_gem_context_destroy_ioctl(main_device, inp, file);
433
            break;
434
 
435
        case SRV_I915_REG_READ:
436
            retval = i915_reg_read_ioctl(main_device, inp, file);
437
            break;
438
 
439
        case SRV_FBINFO:
440
            retval = i915_fbinfo(inp);
441
            break;
442
 
3290 Serge 443
        case SRV_MASK_UPDATE:
444
            retval = i915_mask_update(main_device, inp, file);
445
            break;
4539 Serge 446
 
447
        case SRV_MASK_UPDATE_EX:
448
            retval = i915_mask_update_ex(main_device, inp, file);
449
            break;
2338 Serge 450
    };
451
 
452
    return retval;
453
}
454
 
455
 
2325 Serge 456
#define PCI_CLASS_REVISION      0x08
457
#define PCI_CLASS_DISPLAY_VGA   0x0300
458
#define PCI_CLASS_BRIDGE_HOST   0x0600
2326 Serge 459
#define PCI_CLASS_BRIDGE_ISA    0x0601
2325 Serge 460
 
461
int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn)
462
{
463
    u16_t vendor, device;
464
    u32_t class;
465
    int   ret = 0;
466
 
467
    vendor   = id & 0xffff;
468
    device   = (id >> 16) & 0xffff;
469
 
470
    if(vendor == 0x8086)
471
    {
472
        class = PciRead32(busnr, devfn, PCI_CLASS_REVISION);
473
        class >>= 16;
474
 
475
        if( (class == PCI_CLASS_DISPLAY_VGA) ||
2326 Serge 476
            (class == PCI_CLASS_BRIDGE_HOST) ||
477
            (class == PCI_CLASS_BRIDGE_ISA))
2325 Serge 478
            ret = 1;
479
    }
480
    return ret;
481
};
2340 Serge 482
 
483
 
484
 
485
 
2344 Serge 486
static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
2351 Serge 487
                unsigned int *ecx, unsigned int *edx)
2344 Serge 488
{
489
    /* ecx is often an input as well as an output. */
2351 Serge 490
    asm volatile("cpuid"
2344 Serge 491
        : "=a" (*eax),
492
          "=b" (*ebx),
493
          "=c" (*ecx),
494
          "=d" (*edx)
2351 Serge 495
        : "0" (*eax), "2" (*ecx)
496
        : "memory");
2344 Serge 497
}
498
 
2351 Serge 499
 
500
 
2344 Serge 501
static inline void cpuid(unsigned int op,
502
                         unsigned int *eax, unsigned int *ebx,
503
                         unsigned int *ecx, unsigned int *edx)
504
{
505
        *eax = op;
506
        *ecx = 0;
507
        __cpuid(eax, ebx, ecx, edx);
508
}
509
 
510
void cpu_detect()
511
{
512
    u32 junk, tfms, cap0, misc;
513
 
514
    cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
515
 
516
    if (cap0 & (1<<19))
517
    {
518
        x86_clflush_size = ((misc >> 8) & 0xff) * 8;
519
    }
3482 Serge 520
 
521
    tsc_khz = (unsigned int)(GetCpuFreq()/1000);
2344 Serge 522
}
523
 
3243 Serge 524
 
525
int get_driver_caps(hwcaps_t *caps)
526
{
527
    int ret = 0;
528
 
529
    switch(caps->idx)
530
    {
531
        case 0:
532
            caps->opt[0] = 0;
533
            caps->opt[1] = 0;
534
            break;
535
 
536
        case 1:
537
            caps->cap1.max_tex_width  = 4096;
538
            caps->cap1.max_tex_height = 4096;
539
            break;
540
        default:
541
            ret = 1;
542
    };
543
    caps->idx = 1;
544
    return ret;
545
}
546
 
3255 Serge 547
 
548
void get_pci_info(struct pci_device *dev)
549
{
550
    struct pci_dev *pdev = main_device->pdev;
551
 
552
    memset(dev, sizeof(*dev), 0);
553
 
554
    dev->domain     = 0;
555
    dev->bus        = pdev->busnr;
556
    dev->dev        = pdev->devfn >> 3;
557
    dev->func       = pdev->devfn & 7;
558
    dev->vendor_id  = pdev->vendor;
559
    dev->device_id  = pdev->device;
560
    dev->revision   = pdev->revision;
561
};
4246 Serge 562
 
563
 
564
 
4280 Serge 565
char *strstr(const char *cs, const char *ct);
566
 
567
static int my_atoi(char **cmd)
568
{
569
    char* p = *cmd;
570
    int val = 0;
571
    int sign = 1;
572
 
573
    if(*p == '-')
574
    {
575
        sign = -1;
576
        p++;
577
    };
578
 
579
    for (;; *p++) {
580
        switch (*p) {
581
        case '0' ... '9':
582
            val = 10*val+(*p-'0');
583
            break;
584
        default:
585
            *cmd = p;
586
            return val*sign;
587
        }
588
    }
589
}
590
 
591
char* parse_mode(char *p, videomode_t *mode)
592
{
593
    char c;
594
 
595
    while( (c = *p++) == ' ');
596
 
597
    if( c )
598
    {
599
        p--;
600
 
601
        mode->width = my_atoi(&p);
602
        if(*p == 'x') p++;
603
 
604
        mode->height = my_atoi(&p);
605
        if(*p == 'x') p++;
606
 
607
        mode->bpp = 32;
608
 
609
        mode->freq = my_atoi(&p);
610
 
611
        if( mode->freq == 0 )
612
            mode->freq = 60;
613
    }
614
 
615
    return p;
616
};
617
 
618
 
619
static char* parse_path(char *p, char *log)
620
{
621
    char  c;
622
 
623
    while( (c = *p++) == ' ');
624
        p--;
4293 Serge 625
    while((c = *p++) && (c != ' '))
626
        *log++ = c;
627
 
4280 Serge 628
    *log = 0;
629
 
630
    return p;
631
};
632
 
633
void parse_cmdline(char *cmdline, struct cmdtable *table, char *log, videomode_t *mode)
634
{
635
    char *p = cmdline;
636
    char *p1;
637
    int val;
638
    char c = *p++;
639
 
640
    if( table )
641
    {
642
        while(table->key)
643
        {
644
            if(p1 = strstr(cmdline, table->key))
645
            {
646
                p1+= table->size;
647
                *table->val = my_atoi(&p1);
648
            }
649
            table++;
650
        }
651
    }
652
 
653
    while( c )
654
    {
655
        if( c == '-')
656
        {
657
            switch(*p++)
658
            {
659
                case 'l':
660
                    p = parse_path(p, log);
661
                    break;
662
 
663
                case 'm':
664
                    p = parse_mode(p, mode);
665
                    break;
666
            };
667
        };
668
        c = *p++;
669
    };
670
};
671
 
672
char *strstr(const char *cs, const char *ct)
673
{
674
int d0, d1;
675
register char *__res;
676
__asm__ __volatile__(
677
    "movl %6,%%edi\n\t"
678
    "repne\n\t"
679
    "scasb\n\t"
680
    "notl %%ecx\n\t"
681
    "decl %%ecx\n\t"    /* NOTE! This also sets Z if searchstring='' */
682
    "movl %%ecx,%%edx\n"
683
    "1:\tmovl %6,%%edi\n\t"
684
    "movl %%esi,%%eax\n\t"
685
    "movl %%edx,%%ecx\n\t"
686
    "repe\n\t"
687
    "cmpsb\n\t"
688
    "je 2f\n\t"     /* also works for empty string, see above */
689
    "xchgl %%eax,%%esi\n\t"
690
    "incl %%esi\n\t"
691
    "cmpb $0,-1(%%eax)\n\t"
692
    "jne 1b\n\t"
693
    "xorl %%eax,%%eax\n\t"
694
    "2:"
695
    : "=a" (__res), "=&c" (d0), "=&S" (d1)
696
    : "0" (0), "1" (0xffffffff), "2" (cs), "g" (ct)
697
    : "dx", "di");
698
return __res;
699
}
4293 Serge 700
 
701