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3031 serge 1
#include 
2
#include 
3
#include 
2338 Serge 4
#include "i915_drv.h"
3031 serge 5
//#include "intel_drv.h"
2338 Serge 6
 
2325 Serge 7
#include 
8
#include 
9
#include 
10
#include 
11
#include 
12
#include 
13
 
2342 Serge 14
#include "bitmap.h"
2340 Serge 15
 
3255 Serge 16
struct pci_device {
17
    uint16_t    domain;
18
    uint8_t     bus;
19
    uint8_t     dev;
20
    uint8_t     func;
21
    uint16_t    vendor_id;
22
    uint16_t    device_id;
23
    uint16_t    subvendor_id;
24
    uint16_t    subdevice_id;
25
    uint32_t    device_class;
26
    uint8_t     revision;
27
};
28
 
4104 Serge 29
struct drm_device *main_device;
30
struct drm_file   *drm_file_handlers[256];
4280 Serge 31
videomode_t usermode;
3033 serge 32
 
2344 Serge 33
void cpu_detect();
34
 
2338 Serge 35
int _stdcall display_handler(ioctl_t *io);
2325 Serge 36
int init_agp(void);
37
 
3120 serge 38
int srv_blit_bitmap(u32 hbitmap, int  dst_x, int dst_y,
2351 Serge 39
               int src_x, int src_y, u32 w, u32 h);
2340 Serge 40
 
2351 Serge 41
int blit_textured(u32 hbitmap, int  dst_x, int dst_y,
42
               int src_x, int src_y, u32 w, u32 h);
43
 
2361 Serge 44
int blit_tex(u32 hbitmap, int  dst_x, int dst_y,
45
             int src_x, int src_y, u32 w, u32 h);
46
 
3255 Serge 47
void get_pci_info(struct pci_device *dev);
4246 Serge 48
int i915_getparam(struct drm_device *dev, void *data,
49
             struct drm_file *file_priv);
3255 Serge 50
 
3277 Serge 51
int i915_mask_update(struct drm_device *dev, void *data,
52
            struct drm_file *file);
3255 Serge 53
 
4280 Serge 54
struct cmdtable cmdtable[]= {
55
    CMDENTRY("-pm=", i915_powersave),
56
    CMDENTRY("-rc6=", i915_enable_rc6),
57
    CMDENTRY("-fbc=", i915_enable_fbc),
58
    CMDENTRY("-ppgt=", i915_enable_ppgtt),
59
    CMDENTRY("-pc8=", i915_enable_pc8),
60
    {NULL, 0}
61
};
3277 Serge 62
 
4280 Serge 63
 
2325 Serge 64
static char  log[256];
65
 
3482 Serge 66
struct workqueue_struct *system_wq;
3764 Serge 67
int driver_wq_state;
3482 Serge 68
 
2344 Serge 69
int x86_clflush_size;
3482 Serge 70
unsigned int tsc_khz;
2344 Serge 71
 
2338 Serge 72
int i915_modeset = 1;
73
 
4126 Serge 74
typedef union __attribute__((packed))
75
{
76
    uint32_t val;
77
    struct
78
    {
79
        uint8_t   state;
80
        uint8_t   code;
81
        uint16_t  ctrl_key;
82
    };
83
}oskey_t;
84
 
85
static inline oskey_t get_key(void)
86
{
87
    oskey_t val;
88
    asm volatile("int $0x40":"=a"(val):"a"(2));
89
    return val;
90
};
91
 
92
void i915_dpms(struct drm_device *dev, int mode);
93
 
94
void i915_driver_thread()
95
{
96
    struct drm_i915_private *dev_priv = main_device->dev_private;
97
    struct workqueue_struct *cwq = dev_priv->wq;
98
    static int dpms = 1;
99
    static int dpms_lock = 0;
100
    oskey_t   key;
101
    unsigned long irqflags;
102
    int tmp;
103
 
104
    printf("%s\n",__FUNCTION__);
105
 
106
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1));
107
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330));
108
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330));
109
 
110
    while(driver_wq_state != 0)
111
    {
112
        key = get_key();
113
 
114
        if( (key.val != 1) && (key.state == 0x02))
115
        {
116
            if(key.code == 0x46 && dpms_lock == 0)
117
            {
118
                dpms_lock = 1;
119
                if(dpms == 1)
120
                {
121
                    i915_dpms(main_device, DRM_MODE_DPMS_OFF);
122
                    printf("dpms off\n");
123
                }
124
                else
125
                {
126
                    i915_dpms(main_device, DRM_MODE_DPMS_ON);
127
                    printf("dpms on\n");
128
                };
129
                dpms ^= 1;
130
                }
131
            else if(key.code == 0xC6)
132
                dpms_lock = 0;
133
        };
134
 
135
        spin_lock_irqsave(&cwq->lock, irqflags);
136
 
137
        while (!list_empty(&cwq->worklist))
138
        {
139
            struct work_struct *work = list_entry(cwq->worklist.next,
140
                                        struct work_struct, entry);
141
            work_func_t f = work->func;
142
            list_del_init(cwq->worklist.next);
143
 
144
            spin_unlock_irqrestore(&cwq->lock, irqflags);
145
            f(work);
146
            spin_lock_irqsave(&cwq->lock, irqflags);
147
        }
148
 
149
        spin_unlock_irqrestore(&cwq->lock, irqflags);
150
 
151
        delay(1);
152
    };
153
 
154
    asm volatile ("int $0x40"::"a"(-1));
155
}
156
 
3480 Serge 157
u32_t  __attribute__((externally_visible)) drvEntry(int action, char *cmdline)
2325 Serge 158
{
4104 Serge 159
    int err = 0;
2325 Serge 160
 
161
    if(action != 1)
3764 Serge 162
    {
163
        driver_wq_state = 0;
2325 Serge 164
        return 0;
3764 Serge 165
    };
2325 Serge 166
 
167
    if( GetService("DISPLAY") != 0 )
168
        return 0;
169
 
4280 Serge 170
    printf("i915 v3.12\n\nusage: i915 [options]\n"
171
           "-pm=<0,1>     Enable powersavings, fbc, downclocking, etc. (default: 0 - false)\n");
172
    printf("-rc6=<-1,0-7> Enable power-saving render C-state 6.\n"
173
           "              Different stages can be selected via bitmask values\n"
174
           "              (0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6).\n"
175
           "              For example, 3 would enable rc6 and deep rc6, and 7 would enable everything.\n"
176
           "              default: -1 (use per-chip default)\n");
177
    printf("-fbc=<-1,0,1> Enable frame buffer compression for power savings\n"
178
           "              (default: 0 - false)\n");
179
    printf("-ppgt=<0,1>   Enable PPGTT (default: 0 - false)\n");
180
    printf("-pc8=<0,1>    Enable support for low power package C states (PC8+) (default: 0 - false)\n");
181
    printf("-l      path to log file\n");
182
    printf("-m    set videomode\n");
183
 
2340 Serge 184
    if( cmdline && *cmdline )
4280 Serge 185
        parse_cmdline(cmdline, cmdtable, log, &usermode);
2325 Serge 186
 
4293 Serge 187
    if( *log && !dbg_open(log))
2325 Serge 188
        {
189
            printf("Can't open %s\nExit\n", log);
190
            return 0;
191
    }
192
 
2351 Serge 193
    cpu_detect();
3480 Serge 194
//    dbgprintf("\ncache line size %d\n", x86_clflush_size);
2351 Serge 195
 
2325 Serge 196
    enum_pci_devices();
197
 
198
    err = i915_init();
2338 Serge 199
    if(err)
200
    {
3298 Serge 201
        dbgprintf("Epic Fail :(\n");
202
        return 0;
2338 Serge 203
    };
2325 Serge 204
 
4280 Serge 205
    init_display_kms(main_device, &usermode);
206
 
2338 Serge 207
    err = RegService("DISPLAY", display_handler);
2325 Serge 208
 
2338 Serge 209
    if( err != 0)
210
        dbgprintf("Set DISPLAY handler\n");
211
 
3764 Serge 212
    driver_wq_state = 1;
4104 Serge 213
 
4126 Serge 214
    CreateKernelThread(i915_driver_thread);
3482 Serge 215
 
2325 Serge 216
    return err;
217
};
218
 
3480 Serge 219
 
2344 Serge 220
#define CURRENT_API     0x0200      /*      2.00     */
221
#define COMPATIBLE_API  0x0100      /*      1.00     */
2338 Serge 222
 
2344 Serge 223
#define API_VERSION     (COMPATIBLE_API << 16) | CURRENT_API
2351 Serge 224
#define DISPLAY_VERSION  API_VERSION
2338 Serge 225
 
226
 
2352 Serge 227
#define SRV_GETVERSION          0
228
#define SRV_ENUM_MODES          1
229
#define SRV_SET_MODE            2
230
#define SRV_GET_CAPS            3
2342 Serge 231
 
2352 Serge 232
#define SRV_CREATE_SURFACE      10
233
#define SRV_DESTROY_SURFACE     11
234
#define SRV_LOCK_SURFACE        12
235
#define SRV_UNLOCK_SURFACE      13
3039 serge 236
#define SRV_RESIZE_SURFACE      14
3120 serge 237
#define SRV_BLIT_BITMAP         15
238
#define SRV_BLIT_TEXTURE        16
239
#define SRV_BLIT_VIDEO          17
2344 Serge 240
 
3290 Serge 241
 
3260 Serge 242
#define SRV_GET_PCI_INFO            20
4246 Serge 243
#define SRV_I915_GET_PARAM              21
4104 Serge 244
#define SRV_I915_GEM_CREATE         22
245
#define SRV_DRM_GEM_CLOSE           23
4246 Serge 246
#define SRV_DRM_GEM_FLINK               24
247
#define SRV_DRM_GEM_OPEN                25
248
#define SRV_I915_GEM_PIN                26
249
#define SRV_I915_GEM_UNPIN              27
250
#define SRV_I915_GEM_SET_CACHING        28
251
#define SRV_I915_GEM_PWRITE             29
252
#define SRV_I915_GEM_BUSY               30
253
#define SRV_I915_GEM_SET_DOMAIN         31
254
#define SRV_I915_GEM_MMAP               32
255
#define SRV_I915_GEM_SET_TILING         33
256
#define SRV_I915_GEM_GET_TILING         34
257
#define SRV_I915_GEM_GET_APERTURE       35
258
#define SRV_I915_GEM_MMAP_GTT           36
259
#define SRV_I915_GEM_THROTTLE           37
260
#define SRV_I915_GEM_EXECBUFFER2        38
261
#define SRV_I915_GEM_WAIT               39
262
#define SRV_I915_GEM_CONTEXT_CREATE     40
263
#define SRV_I915_GEM_CONTEXT_DESTROY    41
264
#define SRV_I915_REG_READ               42
3260 Serge 265
 
4246 Serge 266
#define SRV_FBINFO                      43
267
#define SRV_MASK_UPDATE                 44
3263 Serge 268
 
269
 
2338 Serge 270
#define check_input(size) \
271
    if( unlikely((inp==NULL)||(io->inp_size != (size))) )   \
272
        break;
273
 
274
#define check_output(size) \
275
    if( unlikely((outp==NULL)||(io->out_size != (size))) )   \
276
        break;
277
 
278
int _stdcall display_handler(ioctl_t *io)
279
{
3255 Serge 280
    struct drm_file *file;
281
 
2338 Serge 282
    int    retval = -1;
283
    u32_t *inp;
284
    u32_t *outp;
285
 
286
    inp = io->input;
287
    outp = io->output;
288
 
3255 Serge 289
    file = drm_file_handlers[0];
290
 
2338 Serge 291
    switch(io->io_code)
292
    {
293
        case SRV_GETVERSION:
294
            check_output(4);
2344 Serge 295
            *outp  = DISPLAY_VERSION;
2338 Serge 296
            retval = 0;
297
            break;
298
 
299
        case SRV_ENUM_MODES:
3031 serge 300
//            dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",
301
//                       inp, io->inp_size, io->out_size );
2340 Serge 302
            check_output(4);
2338 Serge 303
//            check_input(*outp * sizeof(videomode_t));
304
            if( i915_modeset)
305
                retval = get_videomodes((videomode_t*)inp, outp);
306
            break;
307
 
308
        case SRV_SET_MODE:
3031 serge 309
//            dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",
310
//                       inp, io->inp_size);
2338 Serge 311
            check_input(sizeof(videomode_t));
312
            if( i915_modeset )
313
                retval = set_user_mode((videomode_t*)inp);
314
            break;
3033 serge 315
 
2351 Serge 316
        case SRV_GET_CAPS:
317
            retval = get_driver_caps((hwcaps_t*)inp);
318
            break;
319
 
2344 Serge 320
        case SRV_CREATE_SURFACE:
321
//            check_input(8);
3243 Serge 322
//            retval = create_surface(main_device, (struct io_call_10*)inp);
2338 Serge 323
            break;
324
 
2352 Serge 325
        case SRV_LOCK_SURFACE:
3243 Serge 326
//            retval = lock_surface((struct io_call_12*)inp);
2352 Serge 327
            break;
2342 Serge 328
 
3039 serge 329
        case SRV_RESIZE_SURFACE:
3243 Serge 330
//            retval = resize_surface((struct io_call_14*)inp);
3039 serge 331
            break;
332
 
3255 Serge 333
        case SRV_BLIT_BITMAP:
3243 Serge 334
//            srv_blit_bitmap( inp[0], inp[1], inp[2],
335
//                        inp[3], inp[4], inp[5], inp[6]);
3033 serge 336
 
337
//            blit_tex( inp[0], inp[1], inp[2],
2351 Serge 338
//                    inp[3], inp[4], inp[5], inp[6]);
339
 
3255 Serge 340
            break;
2338 Serge 341
 
3260 Serge 342
        case SRV_GET_PCI_INFO:
3255 Serge 343
            get_pci_info((struct pci_device *)inp);
2338 Serge 344
            retval = 0;
345
            break;
3031 serge 346
 
4246 Serge 347
        case SRV_I915_GET_PARAM:
348
            retval = i915_getparam(main_device, inp, file);
3255 Serge 349
            break;
350
 
351
        case SRV_I915_GEM_CREATE:
352
            retval = i915_gem_create_ioctl(main_device, inp, file);
353
            break;
354
 
355
        case SRV_DRM_GEM_CLOSE:
356
            retval = drm_gem_close_ioctl(main_device, inp, file);
357
            break;
358
 
4246 Serge 359
        case SRV_DRM_GEM_FLINK:
360
            retval = drm_gem_flink_ioctl(main_device, inp, file);
361
            break;
362
 
363
        case SRV_DRM_GEM_OPEN:
364
            retval = drm_gem_open_ioctl(main_device, inp, file);
365
            break;
366
 
3255 Serge 367
        case SRV_I915_GEM_PIN:
368
            retval = i915_gem_pin_ioctl(main_device, inp, file);
369
            break;
3260 Serge 370
 
4246 Serge 371
        case SRV_I915_GEM_UNPIN:
372
            retval = i915_gem_unpin_ioctl(main_device, inp, file);
3260 Serge 373
            break;
374
 
4246 Serge 375
        case SRV_I915_GEM_SET_CACHING:
376
            retval = i915_gem_set_caching_ioctl(main_device, inp, file);
3260 Serge 377
            break;
378
 
379
        case SRV_I915_GEM_PWRITE:
380
            retval = i915_gem_pwrite_ioctl(main_device, inp, file);
381
            break;
382
 
383
        case SRV_I915_GEM_BUSY:
384
            retval = i915_gem_busy_ioctl(main_device, inp, file);
385
            break;
386
 
387
        case SRV_I915_GEM_SET_DOMAIN:
388
            retval = i915_gem_set_domain_ioctl(main_device, inp, file);
389
            break;
390
 
3263 Serge 391
        case SRV_I915_GEM_MMAP:
392
            retval = i915_gem_mmap_ioctl(main_device, inp, file);
393
            break;
394
 
4246 Serge 395
        case SRV_I915_GEM_SET_TILING:
396
            retval = i915_gem_set_tiling(main_device, inp, file);
397
            break;
398
 
399
        case SRV_I915_GEM_GET_TILING:
400
            retval = i915_gem_get_tiling(main_device, inp, file);
401
            break;
402
 
403
        case SRV_I915_GEM_GET_APERTURE:
404
//            printf("SRV_I915_GEM_GET_APERTURE ");
405
            retval = i915_gem_get_aperture_ioctl(main_device, inp, file);
406
//            printf(" retval=%d\n", retval);
407
            break;
408
 
3480 Serge 409
        case SRV_I915_GEM_MMAP_GTT:
410
            retval = i915_gem_mmap_gtt_ioctl(main_device, inp, file);
411
            break;
412
 
4246 Serge 413
        case SRV_I915_GEM_THROTTLE:
414
            retval = i915_gem_throttle_ioctl(main_device, inp, file);
3263 Serge 415
            break;
416
 
417
        case SRV_I915_GEM_EXECBUFFER2:
4246 Serge 418
//            printf("SRV_I915_GEM_EXECBUFFER2\n");
3263 Serge 419
            retval = i915_gem_execbuffer2(main_device, inp, file);
420
            break;
421
 
4246 Serge 422
        case SRV_I915_GEM_WAIT:
423
            retval = i915_gem_wait_ioctl(main_device, inp, file);
424
            break;
425
 
426
        case SRV_I915_GEM_CONTEXT_CREATE:
427
            retval = i915_gem_context_create_ioctl(main_device, inp, file);
428
            break;
429
 
430
        case SRV_I915_GEM_CONTEXT_DESTROY:
431
            retval = i915_gem_context_destroy_ioctl(main_device, inp, file);
432
            break;
433
 
434
        case SRV_I915_REG_READ:
435
            retval = i915_reg_read_ioctl(main_device, inp, file);
436
            break;
437
 
438
        case SRV_FBINFO:
439
            retval = i915_fbinfo(inp);
440
            break;
441
 
3290 Serge 442
        case SRV_MASK_UPDATE:
443
            retval = i915_mask_update(main_device, inp, file);
444
            break;
2338 Serge 445
    };
446
 
447
    return retval;
448
}
449
 
450
 
2325 Serge 451
#define PCI_CLASS_REVISION      0x08
452
#define PCI_CLASS_DISPLAY_VGA   0x0300
453
#define PCI_CLASS_BRIDGE_HOST   0x0600
2326 Serge 454
#define PCI_CLASS_BRIDGE_ISA    0x0601
2325 Serge 455
 
456
int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn)
457
{
458
    u16_t vendor, device;
459
    u32_t class;
460
    int   ret = 0;
461
 
462
    vendor   = id & 0xffff;
463
    device   = (id >> 16) & 0xffff;
464
 
465
    if(vendor == 0x8086)
466
    {
467
        class = PciRead32(busnr, devfn, PCI_CLASS_REVISION);
468
        class >>= 16;
469
 
470
        if( (class == PCI_CLASS_DISPLAY_VGA) ||
2326 Serge 471
            (class == PCI_CLASS_BRIDGE_HOST) ||
472
            (class == PCI_CLASS_BRIDGE_ISA))
2325 Serge 473
            ret = 1;
474
    }
475
    return ret;
476
};
2340 Serge 477
 
478
 
479
 
480
 
2344 Serge 481
static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
2351 Serge 482
                unsigned int *ecx, unsigned int *edx)
2344 Serge 483
{
484
    /* ecx is often an input as well as an output. */
2351 Serge 485
    asm volatile("cpuid"
2344 Serge 486
        : "=a" (*eax),
487
          "=b" (*ebx),
488
          "=c" (*ecx),
489
          "=d" (*edx)
2351 Serge 490
        : "0" (*eax), "2" (*ecx)
491
        : "memory");
2344 Serge 492
}
493
 
2351 Serge 494
 
495
 
2344 Serge 496
static inline void cpuid(unsigned int op,
497
                         unsigned int *eax, unsigned int *ebx,
498
                         unsigned int *ecx, unsigned int *edx)
499
{
500
        *eax = op;
501
        *ecx = 0;
502
        __cpuid(eax, ebx, ecx, edx);
503
}
504
 
505
void cpu_detect()
506
{
507
    u32 junk, tfms, cap0, misc;
508
 
509
    cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
510
 
511
    if (cap0 & (1<<19))
512
    {
513
        x86_clflush_size = ((misc >> 8) & 0xff) * 8;
514
    }
3482 Serge 515
 
516
    tsc_khz = (unsigned int)(GetCpuFreq()/1000);
2344 Serge 517
}
518
 
3243 Serge 519
 
520
int get_driver_caps(hwcaps_t *caps)
521
{
522
    int ret = 0;
523
 
524
    switch(caps->idx)
525
    {
526
        case 0:
527
            caps->opt[0] = 0;
528
            caps->opt[1] = 0;
529
            break;
530
 
531
        case 1:
532
            caps->cap1.max_tex_width  = 4096;
533
            caps->cap1.max_tex_height = 4096;
534
            break;
535
        default:
536
            ret = 1;
537
    };
538
    caps->idx = 1;
539
    return ret;
540
}
541
 
3255 Serge 542
 
543
void get_pci_info(struct pci_device *dev)
544
{
545
    struct pci_dev *pdev = main_device->pdev;
546
 
547
    memset(dev, sizeof(*dev), 0);
548
 
549
    dev->domain     = 0;
550
    dev->bus        = pdev->busnr;
551
    dev->dev        = pdev->devfn >> 3;
552
    dev->func       = pdev->devfn & 7;
553
    dev->vendor_id  = pdev->vendor;
554
    dev->device_id  = pdev->device;
555
    dev->revision   = pdev->revision;
556
};
4246 Serge 557
 
558
 
559
 
4280 Serge 560
char *strstr(const char *cs, const char *ct);
561
 
562
static int my_atoi(char **cmd)
563
{
564
    char* p = *cmd;
565
    int val = 0;
566
    int sign = 1;
567
 
568
    if(*p == '-')
569
    {
570
        sign = -1;
571
        p++;
572
    };
573
 
574
    for (;; *p++) {
575
        switch (*p) {
576
        case '0' ... '9':
577
            val = 10*val+(*p-'0');
578
            break;
579
        default:
580
            *cmd = p;
581
            return val*sign;
582
        }
583
    }
584
}
585
 
586
char* parse_mode(char *p, videomode_t *mode)
587
{
588
    char c;
589
 
590
    while( (c = *p++) == ' ');
591
 
592
    if( c )
593
    {
594
        p--;
595
 
596
        mode->width = my_atoi(&p);
597
        if(*p == 'x') p++;
598
 
599
        mode->height = my_atoi(&p);
600
        if(*p == 'x') p++;
601
 
602
        mode->bpp = 32;
603
 
604
        mode->freq = my_atoi(&p);
605
 
606
        if( mode->freq == 0 )
607
            mode->freq = 60;
608
    }
609
 
610
    return p;
611
};
612
 
613
 
614
static char* parse_path(char *p, char *log)
615
{
616
    char  c;
617
 
618
    while( (c = *p++) == ' ');
619
        p--;
4293 Serge 620
    while((c = *p++) && (c != ' '))
621
        *log++ = c;
622
 
4280 Serge 623
    *log = 0;
624
 
625
    return p;
626
};
627
 
628
void parse_cmdline(char *cmdline, struct cmdtable *table, char *log, videomode_t *mode)
629
{
630
    char *p = cmdline;
631
    char *p1;
632
    int val;
633
    char c = *p++;
634
 
635
    if( table )
636
    {
637
        while(table->key)
638
        {
639
            if(p1 = strstr(cmdline, table->key))
640
            {
641
                p1+= table->size;
642
                *table->val = my_atoi(&p1);
643
            }
644
            table++;
645
        }
646
    }
647
 
648
    while( c )
649
    {
650
        if( c == '-')
651
        {
652
            switch(*p++)
653
            {
654
                case 'l':
655
                    p = parse_path(p, log);
656
                    break;
657
 
658
                case 'm':
659
                    p = parse_mode(p, mode);
660
                    break;
661
            };
662
        };
663
        c = *p++;
664
    };
665
};
666
 
667
char *strstr(const char *cs, const char *ct)
668
{
669
int d0, d1;
670
register char *__res;
671
__asm__ __volatile__(
672
    "movl %6,%%edi\n\t"
673
    "repne\n\t"
674
    "scasb\n\t"
675
    "notl %%ecx\n\t"
676
    "decl %%ecx\n\t"    /* NOTE! This also sets Z if searchstring='' */
677
    "movl %%ecx,%%edx\n"
678
    "1:\tmovl %6,%%edi\n\t"
679
    "movl %%esi,%%eax\n\t"
680
    "movl %%edx,%%ecx\n\t"
681
    "repe\n\t"
682
    "cmpsb\n\t"
683
    "je 2f\n\t"     /* also works for empty string, see above */
684
    "xchgl %%eax,%%esi\n\t"
685
    "incl %%esi\n\t"
686
    "cmpb $0,-1(%%eax)\n\t"
687
    "jne 1b\n\t"
688
    "xorl %%eax,%%eax\n\t"
689
    "2:"
690
    : "=a" (__res), "=&c" (d0), "=&S" (d1)
691
    : "0" (0), "1" (0xffffffff), "2" (cs), "g" (ct)
692
    : "dx", "di");
693
return __res;
694
}
4293 Serge 695
 
696