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3031 serge 1
#include 
2
#include 
3
#include 
2338 Serge 4
#include "i915_drv.h"
3031 serge 5
//#include "intel_drv.h"
2338 Serge 6
 
2325 Serge 7
#include 
8
#include 
9
#include 
10
#include 
11
#include 
12
#include 
13
 
2342 Serge 14
#include "bitmap.h"
2340 Serge 15
 
3255 Serge 16
struct pci_device {
17
    uint16_t    domain;
18
    uint8_t     bus;
19
    uint8_t     dev;
20
    uint8_t     func;
21
    uint16_t    vendor_id;
22
    uint16_t    device_id;
23
    uint16_t    subvendor_id;
24
    uint16_t    subdevice_id;
25
    uint32_t    device_class;
26
    uint8_t     revision;
27
};
28
 
4104 Serge 29
struct drm_device *main_device;
30
struct drm_file   *drm_file_handlers[256];
3033 serge 31
 
2344 Serge 32
void cpu_detect();
33
 
2340 Serge 34
void parse_cmdline(char *cmdline, char *log);
2338 Serge 35
int _stdcall display_handler(ioctl_t *io);
2325 Serge 36
int init_agp(void);
37
 
3120 serge 38
int srv_blit_bitmap(u32 hbitmap, int  dst_x, int dst_y,
2351 Serge 39
               int src_x, int src_y, u32 w, u32 h);
2340 Serge 40
 
2351 Serge 41
int blit_textured(u32 hbitmap, int  dst_x, int dst_y,
42
               int src_x, int src_y, u32 w, u32 h);
43
 
2361 Serge 44
int blit_tex(u32 hbitmap, int  dst_x, int dst_y,
45
             int src_x, int src_y, u32 w, u32 h);
46
 
3255 Serge 47
void get_pci_info(struct pci_device *dev);
4246 Serge 48
int i915_getparam(struct drm_device *dev, void *data,
49
             struct drm_file *file_priv);
3255 Serge 50
 
3277 Serge 51
int i915_mask_update(struct drm_device *dev, void *data,
52
            struct drm_file *file);
3255 Serge 53
 
3277 Serge 54
 
2325 Serge 55
static char  log[256];
56
 
3482 Serge 57
struct workqueue_struct *system_wq;
3764 Serge 58
int driver_wq_state;
3482 Serge 59
 
2344 Serge 60
int x86_clflush_size;
3482 Serge 61
unsigned int tsc_khz;
2344 Serge 62
 
2338 Serge 63
int i915_modeset = 1;
64
 
4126 Serge 65
typedef union __attribute__((packed))
66
{
67
    uint32_t val;
68
    struct
69
    {
70
        uint8_t   state;
71
        uint8_t   code;
72
        uint16_t  ctrl_key;
73
    };
74
}oskey_t;
75
 
76
static inline oskey_t get_key(void)
77
{
78
    oskey_t val;
79
    asm volatile("int $0x40":"=a"(val):"a"(2));
80
    return val;
81
};
82
 
83
void i915_dpms(struct drm_device *dev, int mode);
84
 
85
void i915_driver_thread()
86
{
87
    struct drm_i915_private *dev_priv = main_device->dev_private;
88
    struct workqueue_struct *cwq = dev_priv->wq;
89
    static int dpms = 1;
90
    static int dpms_lock = 0;
91
    oskey_t   key;
92
    unsigned long irqflags;
93
    int tmp;
94
 
95
    printf("%s\n",__FUNCTION__);
96
 
97
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1));
98
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330));
99
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330));
100
 
101
    while(driver_wq_state != 0)
102
    {
103
        key = get_key();
104
 
105
        if( (key.val != 1) && (key.state == 0x02))
106
        {
107
            if(key.code == 0x46 && dpms_lock == 0)
108
            {
109
                dpms_lock = 1;
110
                if(dpms == 1)
111
                {
112
                    i915_dpms(main_device, DRM_MODE_DPMS_OFF);
113
                    printf("dpms off\n");
114
                }
115
                else
116
                {
117
                    i915_dpms(main_device, DRM_MODE_DPMS_ON);
118
                    printf("dpms on\n");
119
                };
120
                dpms ^= 1;
121
                }
122
            else if(key.code == 0xC6)
123
                dpms_lock = 0;
124
        };
125
 
126
        spin_lock_irqsave(&cwq->lock, irqflags);
127
 
128
        while (!list_empty(&cwq->worklist))
129
        {
130
            struct work_struct *work = list_entry(cwq->worklist.next,
131
                                        struct work_struct, entry);
132
            work_func_t f = work->func;
133
            list_del_init(cwq->worklist.next);
134
 
135
            spin_unlock_irqrestore(&cwq->lock, irqflags);
136
            f(work);
137
            spin_lock_irqsave(&cwq->lock, irqflags);
138
        }
139
 
140
        spin_unlock_irqrestore(&cwq->lock, irqflags);
141
 
142
        delay(1);
143
    };
144
 
145
    asm volatile ("int $0x40"::"a"(-1));
146
}
147
 
3480 Serge 148
u32_t  __attribute__((externally_visible)) drvEntry(int action, char *cmdline)
2325 Serge 149
{
4104 Serge 150
    int err = 0;
2325 Serge 151
 
152
    if(action != 1)
3764 Serge 153
    {
154
        driver_wq_state = 0;
2325 Serge 155
        return 0;
3764 Serge 156
    };
2325 Serge 157
 
158
    if( GetService("DISPLAY") != 0 )
159
        return 0;
160
 
2340 Serge 161
    if( cmdline && *cmdline )
162
        parse_cmdline(cmdline, log);
2325 Serge 163
 
164
    if(!dbg_open(log))
165
    {
4126 Serge 166
        strcpy(log, "/tmp1/1/i915.log");
2325 Serge 167
 
168
        if(!dbg_open(log))
169
        {
170
            printf("Can't open %s\nExit\n", log);
171
            return 0;
172
        };
173
    }
4104 Serge 174
    dbgprintf(" i915 v3.12-6\n cmdline: %s\n", cmdline);
2325 Serge 175
 
2351 Serge 176
    cpu_detect();
3480 Serge 177
//    dbgprintf("\ncache line size %d\n", x86_clflush_size);
2351 Serge 178
 
2325 Serge 179
    enum_pci_devices();
180
 
181
    err = i915_init();
2338 Serge 182
    if(err)
183
    {
3298 Serge 184
        dbgprintf("Epic Fail :(\n");
185
        return 0;
2338 Serge 186
    };
4104 Serge 187
    init_display_kms(main_device);
2325 Serge 188
 
2338 Serge 189
    err = RegService("DISPLAY", display_handler);
2325 Serge 190
 
2338 Serge 191
    if( err != 0)
192
        dbgprintf("Set DISPLAY handler\n");
193
 
3764 Serge 194
    driver_wq_state = 1;
4104 Serge 195
 
4126 Serge 196
    CreateKernelThread(i915_driver_thread);
3482 Serge 197
 
2325 Serge 198
    return err;
199
};
200
 
3480 Serge 201
 
2344 Serge 202
#define CURRENT_API     0x0200      /*      2.00     */
203
#define COMPATIBLE_API  0x0100      /*      1.00     */
2338 Serge 204
 
2344 Serge 205
#define API_VERSION     (COMPATIBLE_API << 16) | CURRENT_API
2351 Serge 206
#define DISPLAY_VERSION  API_VERSION
2338 Serge 207
 
208
 
2352 Serge 209
#define SRV_GETVERSION          0
210
#define SRV_ENUM_MODES          1
211
#define SRV_SET_MODE            2
212
#define SRV_GET_CAPS            3
2342 Serge 213
 
2352 Serge 214
#define SRV_CREATE_SURFACE      10
215
#define SRV_DESTROY_SURFACE     11
216
#define SRV_LOCK_SURFACE        12
217
#define SRV_UNLOCK_SURFACE      13
3039 serge 218
#define SRV_RESIZE_SURFACE      14
3120 serge 219
#define SRV_BLIT_BITMAP         15
220
#define SRV_BLIT_TEXTURE        16
221
#define SRV_BLIT_VIDEO          17
2344 Serge 222
 
3290 Serge 223
 
3260 Serge 224
#define SRV_GET_PCI_INFO            20
4246 Serge 225
#define SRV_I915_GET_PARAM              21
4104 Serge 226
#define SRV_I915_GEM_CREATE         22
227
#define SRV_DRM_GEM_CLOSE           23
4246 Serge 228
#define SRV_DRM_GEM_FLINK               24
229
#define SRV_DRM_GEM_OPEN                25
230
#define SRV_I915_GEM_PIN                26
231
#define SRV_I915_GEM_UNPIN              27
232
#define SRV_I915_GEM_SET_CACHING        28
233
#define SRV_I915_GEM_PWRITE             29
234
#define SRV_I915_GEM_BUSY               30
235
#define SRV_I915_GEM_SET_DOMAIN         31
236
#define SRV_I915_GEM_MMAP               32
237
#define SRV_I915_GEM_SET_TILING         33
238
#define SRV_I915_GEM_GET_TILING         34
239
#define SRV_I915_GEM_GET_APERTURE       35
240
#define SRV_I915_GEM_MMAP_GTT           36
241
#define SRV_I915_GEM_THROTTLE           37
242
#define SRV_I915_GEM_EXECBUFFER2        38
243
#define SRV_I915_GEM_WAIT               39
244
#define SRV_I915_GEM_CONTEXT_CREATE     40
245
#define SRV_I915_GEM_CONTEXT_DESTROY    41
246
#define SRV_I915_REG_READ               42
3260 Serge 247
 
4246 Serge 248
#define SRV_FBINFO                      43
249
#define SRV_MASK_UPDATE                 44
3263 Serge 250
 
251
 
2338 Serge 252
#define check_input(size) \
253
    if( unlikely((inp==NULL)||(io->inp_size != (size))) )   \
254
        break;
255
 
256
#define check_output(size) \
257
    if( unlikely((outp==NULL)||(io->out_size != (size))) )   \
258
        break;
259
 
260
int _stdcall display_handler(ioctl_t *io)
261
{
3255 Serge 262
    struct drm_file *file;
263
 
2338 Serge 264
    int    retval = -1;
265
    u32_t *inp;
266
    u32_t *outp;
267
 
268
    inp = io->input;
269
    outp = io->output;
270
 
3255 Serge 271
    file = drm_file_handlers[0];
272
 
2338 Serge 273
    switch(io->io_code)
274
    {
275
        case SRV_GETVERSION:
276
            check_output(4);
2344 Serge 277
            *outp  = DISPLAY_VERSION;
2338 Serge 278
            retval = 0;
279
            break;
280
 
281
        case SRV_ENUM_MODES:
3031 serge 282
//            dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",
283
//                       inp, io->inp_size, io->out_size );
2340 Serge 284
            check_output(4);
2338 Serge 285
//            check_input(*outp * sizeof(videomode_t));
286
            if( i915_modeset)
287
                retval = get_videomodes((videomode_t*)inp, outp);
288
            break;
289
 
290
        case SRV_SET_MODE:
3031 serge 291
//            dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",
292
//                       inp, io->inp_size);
2338 Serge 293
            check_input(sizeof(videomode_t));
294
            if( i915_modeset )
295
                retval = set_user_mode((videomode_t*)inp);
296
            break;
3033 serge 297
 
2351 Serge 298
        case SRV_GET_CAPS:
299
            retval = get_driver_caps((hwcaps_t*)inp);
300
            break;
301
 
2344 Serge 302
        case SRV_CREATE_SURFACE:
303
//            check_input(8);
3243 Serge 304
//            retval = create_surface(main_device, (struct io_call_10*)inp);
2338 Serge 305
            break;
306
 
2352 Serge 307
        case SRV_LOCK_SURFACE:
3243 Serge 308
//            retval = lock_surface((struct io_call_12*)inp);
2352 Serge 309
            break;
2342 Serge 310
 
3039 serge 311
        case SRV_RESIZE_SURFACE:
3243 Serge 312
//            retval = resize_surface((struct io_call_14*)inp);
3039 serge 313
            break;
314
 
3255 Serge 315
        case SRV_BLIT_BITMAP:
3243 Serge 316
//            srv_blit_bitmap( inp[0], inp[1], inp[2],
317
//                        inp[3], inp[4], inp[5], inp[6]);
3033 serge 318
 
319
//            blit_tex( inp[0], inp[1], inp[2],
2351 Serge 320
//                    inp[3], inp[4], inp[5], inp[6]);
321
 
3255 Serge 322
            break;
2338 Serge 323
 
3260 Serge 324
        case SRV_GET_PCI_INFO:
3255 Serge 325
            get_pci_info((struct pci_device *)inp);
2338 Serge 326
            retval = 0;
327
            break;
3031 serge 328
 
4246 Serge 329
        case SRV_I915_GET_PARAM:
330
            retval = i915_getparam(main_device, inp, file);
3255 Serge 331
            break;
332
 
333
        case SRV_I915_GEM_CREATE:
334
            retval = i915_gem_create_ioctl(main_device, inp, file);
335
            break;
336
 
337
        case SRV_DRM_GEM_CLOSE:
338
            retval = drm_gem_close_ioctl(main_device, inp, file);
339
            break;
340
 
4246 Serge 341
        case SRV_DRM_GEM_FLINK:
342
            retval = drm_gem_flink_ioctl(main_device, inp, file);
343
            break;
344
 
345
        case SRV_DRM_GEM_OPEN:
346
            retval = drm_gem_open_ioctl(main_device, inp, file);
347
            break;
348
 
3255 Serge 349
        case SRV_I915_GEM_PIN:
350
            retval = i915_gem_pin_ioctl(main_device, inp, file);
351
            break;
3260 Serge 352
 
4246 Serge 353
        case SRV_I915_GEM_UNPIN:
354
            retval = i915_gem_unpin_ioctl(main_device, inp, file);
3260 Serge 355
            break;
356
 
4246 Serge 357
        case SRV_I915_GEM_SET_CACHING:
358
            retval = i915_gem_set_caching_ioctl(main_device, inp, file);
3260 Serge 359
            break;
360
 
361
        case SRV_I915_GEM_PWRITE:
362
            retval = i915_gem_pwrite_ioctl(main_device, inp, file);
363
            break;
364
 
365
        case SRV_I915_GEM_BUSY:
366
            retval = i915_gem_busy_ioctl(main_device, inp, file);
367
            break;
368
 
369
        case SRV_I915_GEM_SET_DOMAIN:
370
            retval = i915_gem_set_domain_ioctl(main_device, inp, file);
371
            break;
372
 
3263 Serge 373
        case SRV_I915_GEM_MMAP:
374
            retval = i915_gem_mmap_ioctl(main_device, inp, file);
375
            break;
376
 
4246 Serge 377
        case SRV_I915_GEM_SET_TILING:
378
            retval = i915_gem_set_tiling(main_device, inp, file);
379
            break;
380
 
381
        case SRV_I915_GEM_GET_TILING:
382
            retval = i915_gem_get_tiling(main_device, inp, file);
383
            break;
384
 
385
        case SRV_I915_GEM_GET_APERTURE:
386
//            printf("SRV_I915_GEM_GET_APERTURE ");
387
            retval = i915_gem_get_aperture_ioctl(main_device, inp, file);
388
//            printf(" retval=%d\n", retval);
389
            break;
390
 
3480 Serge 391
        case SRV_I915_GEM_MMAP_GTT:
392
            retval = i915_gem_mmap_gtt_ioctl(main_device, inp, file);
393
            break;
394
 
4246 Serge 395
        case SRV_I915_GEM_THROTTLE:
396
            retval = i915_gem_throttle_ioctl(main_device, inp, file);
3263 Serge 397
            break;
398
 
399
        case SRV_I915_GEM_EXECBUFFER2:
4246 Serge 400
//            printf("SRV_I915_GEM_EXECBUFFER2\n");
3263 Serge 401
            retval = i915_gem_execbuffer2(main_device, inp, file);
402
            break;
403
 
4246 Serge 404
        case SRV_I915_GEM_WAIT:
405
            retval = i915_gem_wait_ioctl(main_device, inp, file);
406
            break;
407
 
408
        case SRV_I915_GEM_CONTEXT_CREATE:
409
            retval = i915_gem_context_create_ioctl(main_device, inp, file);
410
            break;
411
 
412
        case SRV_I915_GEM_CONTEXT_DESTROY:
413
            retval = i915_gem_context_destroy_ioctl(main_device, inp, file);
414
            break;
415
 
416
        case SRV_I915_REG_READ:
417
            retval = i915_reg_read_ioctl(main_device, inp, file);
418
            break;
419
 
420
        case SRV_FBINFO:
421
            retval = i915_fbinfo(inp);
422
            break;
423
 
3290 Serge 424
        case SRV_MASK_UPDATE:
425
            retval = i915_mask_update(main_device, inp, file);
426
            break;
2338 Serge 427
    };
428
 
429
    return retval;
430
}
431
 
432
 
2325 Serge 433
#define PCI_CLASS_REVISION      0x08
434
#define PCI_CLASS_DISPLAY_VGA   0x0300
435
#define PCI_CLASS_BRIDGE_HOST   0x0600
2326 Serge 436
#define PCI_CLASS_BRIDGE_ISA    0x0601
2325 Serge 437
 
438
int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn)
439
{
440
    u16_t vendor, device;
441
    u32_t class;
442
    int   ret = 0;
443
 
444
    vendor   = id & 0xffff;
445
    device   = (id >> 16) & 0xffff;
446
 
447
    if(vendor == 0x8086)
448
    {
449
        class = PciRead32(busnr, devfn, PCI_CLASS_REVISION);
450
        class >>= 16;
451
 
452
        if( (class == PCI_CLASS_DISPLAY_VGA) ||
2326 Serge 453
            (class == PCI_CLASS_BRIDGE_HOST) ||
454
            (class == PCI_CLASS_BRIDGE_ISA))
2325 Serge 455
            ret = 1;
456
    }
457
    return ret;
458
};
2340 Serge 459
 
460
 
461
static char* parse_path(char *p, char *log)
462
{
463
    char  c;
464
 
465
    while( (c = *p++) == ' ');
466
        p--;
467
    while( (c = *log++ = *p++) && (c != ' '));
468
    *log = 0;
469
 
470
    return p;
471
};
472
 
473
void parse_cmdline(char *cmdline, char *log)
474
{
475
    char *p = cmdline;
476
 
477
    char c = *p++;
478
 
479
    while( c )
480
    {
481
        if( c == '-')
482
        {
483
            switch(*p++)
484
            {
485
                case 'l':
486
                    p = parse_path(p, log);
487
                    break;
488
            };
489
        };
490
        c = *p++;
491
    };
492
};
493
 
2351 Serge 494
 
2344 Serge 495
static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
2351 Serge 496
                unsigned int *ecx, unsigned int *edx)
2344 Serge 497
{
498
    /* ecx is often an input as well as an output. */
2351 Serge 499
    asm volatile("cpuid"
2344 Serge 500
        : "=a" (*eax),
501
          "=b" (*ebx),
502
          "=c" (*ecx),
503
          "=d" (*edx)
2351 Serge 504
        : "0" (*eax), "2" (*ecx)
505
        : "memory");
2344 Serge 506
}
507
 
2351 Serge 508
 
509
 
2344 Serge 510
static inline void cpuid(unsigned int op,
511
                         unsigned int *eax, unsigned int *ebx,
512
                         unsigned int *ecx, unsigned int *edx)
513
{
514
        *eax = op;
515
        *ecx = 0;
516
        __cpuid(eax, ebx, ecx, edx);
517
}
518
 
519
void cpu_detect()
520
{
521
    u32 junk, tfms, cap0, misc;
522
 
523
    cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
524
 
525
    if (cap0 & (1<<19))
526
    {
527
        x86_clflush_size = ((misc >> 8) & 0xff) * 8;
528
    }
3482 Serge 529
 
530
    tsc_khz = (unsigned int)(GetCpuFreq()/1000);
2344 Serge 531
}
532
 
3243 Serge 533
 
534
int get_driver_caps(hwcaps_t *caps)
535
{
536
    int ret = 0;
537
 
538
    switch(caps->idx)
539
    {
540
        case 0:
541
            caps->opt[0] = 0;
542
            caps->opt[1] = 0;
543
            break;
544
 
545
        case 1:
546
            caps->cap1.max_tex_width  = 4096;
547
            caps->cap1.max_tex_height = 4096;
548
            break;
549
        default:
550
            ret = 1;
551
    };
552
    caps->idx = 1;
553
    return ret;
554
}
555
 
3255 Serge 556
 
557
void get_pci_info(struct pci_device *dev)
558
{
559
    struct pci_dev *pdev = main_device->pdev;
560
 
561
    memset(dev, sizeof(*dev), 0);
562
 
563
    dev->domain     = 0;
564
    dev->bus        = pdev->busnr;
565
    dev->dev        = pdev->devfn >> 3;
566
    dev->func       = pdev->devfn & 7;
567
    dev->vendor_id  = pdev->vendor;
568
    dev->device_id  = pdev->device;
569
    dev->revision   = pdev->revision;
570
};
4246 Serge 571
 
572
 
573