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Rev | Author | Line No. | Line |
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3031 | serge | 1 | #include |
2 | #include |
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3 | #include |
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2338 | Serge | 4 | #include "i915_drv.h" |
3031 | serge | 5 | //#include "intel_drv.h" |
2338 | Serge | 6 | |
2325 | Serge | 7 | #include |
8 | #include |
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9 | #include |
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10 | #include |
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11 | #include |
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12 | #include |
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13 | |||
2342 | Serge | 14 | #include "bitmap.h" |
2340 | Serge | 15 | |
3255 | Serge | 16 | struct pci_device { |
17 | uint16_t domain; |
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18 | uint8_t bus; |
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19 | uint8_t dev; |
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20 | uint8_t func; |
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21 | uint16_t vendor_id; |
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22 | uint16_t device_id; |
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23 | uint16_t subvendor_id; |
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24 | uint16_t subdevice_id; |
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25 | uint32_t device_class; |
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26 | uint8_t revision; |
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27 | }; |
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28 | |||
4104 | Serge | 29 | struct drm_device *main_device; |
30 | struct drm_file *drm_file_handlers[256]; |
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3033 | serge | 31 | |
2344 | Serge | 32 | void cpu_detect(); |
33 | |||
2340 | Serge | 34 | void parse_cmdline(char *cmdline, char *log); |
2338 | Serge | 35 | int _stdcall display_handler(ioctl_t *io); |
2325 | Serge | 36 | int init_agp(void); |
37 | |||
3120 | serge | 38 | int srv_blit_bitmap(u32 hbitmap, int dst_x, int dst_y, |
2351 | Serge | 39 | int src_x, int src_y, u32 w, u32 h); |
2340 | Serge | 40 | |
2351 | Serge | 41 | int blit_textured(u32 hbitmap, int dst_x, int dst_y, |
42 | int src_x, int src_y, u32 w, u32 h); |
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43 | |||
2361 | Serge | 44 | int blit_tex(u32 hbitmap, int dst_x, int dst_y, |
45 | int src_x, int src_y, u32 w, u32 h); |
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46 | |||
3255 | Serge | 47 | void get_pci_info(struct pci_device *dev); |
48 | int gem_getparam(struct drm_device *dev, void *data); |
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49 | |||
3277 | Serge | 50 | int i915_mask_update(struct drm_device *dev, void *data, |
51 | struct drm_file *file); |
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3255 | Serge | 52 | |
3277 | Serge | 53 | |
2325 | Serge | 54 | static char log[256]; |
55 | |||
3482 | Serge | 56 | struct workqueue_struct *system_wq; |
3764 | Serge | 57 | int driver_wq_state; |
3482 | Serge | 58 | |
2344 | Serge | 59 | int x86_clflush_size; |
3482 | Serge | 60 | unsigned int tsc_khz; |
2344 | Serge | 61 | |
2338 | Serge | 62 | int i915_modeset = 1; |
63 | |||
4126 | Serge | 64 | typedef union __attribute__((packed)) |
65 | { |
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66 | uint32_t val; |
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67 | struct |
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68 | { |
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69 | uint8_t state; |
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70 | uint8_t code; |
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71 | uint16_t ctrl_key; |
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72 | }; |
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73 | }oskey_t; |
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74 | |||
75 | static inline oskey_t get_key(void) |
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76 | { |
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77 | oskey_t val; |
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78 | asm volatile("int $0x40":"=a"(val):"a"(2)); |
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79 | return val; |
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80 | }; |
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81 | |||
82 | void i915_dpms(struct drm_device *dev, int mode); |
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83 | |||
84 | void i915_driver_thread() |
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85 | { |
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86 | struct drm_i915_private *dev_priv = main_device->dev_private; |
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87 | struct workqueue_struct *cwq = dev_priv->wq; |
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88 | static int dpms = 1; |
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89 | static int dpms_lock = 0; |
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90 | oskey_t key; |
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91 | unsigned long irqflags; |
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92 | int tmp; |
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93 | |||
94 | printf("%s\n",__FUNCTION__); |
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95 | |||
96 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1)); |
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97 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330)); |
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98 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330)); |
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99 | |||
100 | while(driver_wq_state != 0) |
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101 | { |
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102 | key = get_key(); |
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103 | |||
104 | if( (key.val != 1) && (key.state == 0x02)) |
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105 | { |
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106 | if(key.code == 0x46 && dpms_lock == 0) |
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107 | { |
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108 | dpms_lock = 1; |
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109 | if(dpms == 1) |
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110 | { |
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111 | i915_dpms(main_device, DRM_MODE_DPMS_OFF); |
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112 | printf("dpms off\n"); |
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113 | } |
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114 | else |
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115 | { |
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116 | i915_dpms(main_device, DRM_MODE_DPMS_ON); |
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117 | printf("dpms on\n"); |
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118 | }; |
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119 | dpms ^= 1; |
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120 | } |
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121 | else if(key.code == 0xC6) |
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122 | dpms_lock = 0; |
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123 | }; |
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124 | |||
125 | spin_lock_irqsave(&cwq->lock, irqflags); |
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126 | |||
127 | while (!list_empty(&cwq->worklist)) |
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128 | { |
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129 | struct work_struct *work = list_entry(cwq->worklist.next, |
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130 | struct work_struct, entry); |
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131 | work_func_t f = work->func; |
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132 | list_del_init(cwq->worklist.next); |
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133 | |||
134 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
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135 | f(work); |
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136 | spin_lock_irqsave(&cwq->lock, irqflags); |
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137 | } |
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138 | |||
139 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
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140 | |||
141 | delay(1); |
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142 | }; |
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143 | |||
144 | asm volatile ("int $0x40"::"a"(-1)); |
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145 | } |
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146 | |||
3480 | Serge | 147 | u32_t __attribute__((externally_visible)) drvEntry(int action, char *cmdline) |
2325 | Serge | 148 | { |
4104 | Serge | 149 | int err = 0; |
2325 | Serge | 150 | |
151 | if(action != 1) |
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3764 | Serge | 152 | { |
153 | driver_wq_state = 0; |
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2325 | Serge | 154 | return 0; |
3764 | Serge | 155 | }; |
2325 | Serge | 156 | |
157 | if( GetService("DISPLAY") != 0 ) |
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158 | return 0; |
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159 | |||
2340 | Serge | 160 | if( cmdline && *cmdline ) |
161 | parse_cmdline(cmdline, log); |
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2325 | Serge | 162 | |
163 | if(!dbg_open(log)) |
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164 | { |
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4126 | Serge | 165 | strcpy(log, "/tmp1/1/i915.log"); |
2325 | Serge | 166 | |
167 | if(!dbg_open(log)) |
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168 | { |
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169 | printf("Can't open %s\nExit\n", log); |
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170 | return 0; |
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171 | }; |
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172 | } |
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4104 | Serge | 173 | dbgprintf(" i915 v3.12-6\n cmdline: %s\n", cmdline); |
2325 | Serge | 174 | |
2351 | Serge | 175 | cpu_detect(); |
3480 | Serge | 176 | // dbgprintf("\ncache line size %d\n", x86_clflush_size); |
2351 | Serge | 177 | |
2325 | Serge | 178 | enum_pci_devices(); |
179 | |||
180 | err = i915_init(); |
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2338 | Serge | 181 | if(err) |
182 | { |
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3298 | Serge | 183 | dbgprintf("Epic Fail :(\n"); |
184 | return 0; |
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2338 | Serge | 185 | }; |
4104 | Serge | 186 | init_display_kms(main_device); |
2325 | Serge | 187 | |
2338 | Serge | 188 | err = RegService("DISPLAY", display_handler); |
2325 | Serge | 189 | |
2338 | Serge | 190 | if( err != 0) |
191 | dbgprintf("Set DISPLAY handler\n"); |
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192 | |||
3764 | Serge | 193 | driver_wq_state = 1; |
4104 | Serge | 194 | |
4126 | Serge | 195 | CreateKernelThread(i915_driver_thread); |
3482 | Serge | 196 | |
2325 | Serge | 197 | return err; |
198 | }; |
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199 | |||
3480 | Serge | 200 | |
2344 | Serge | 201 | #define CURRENT_API 0x0200 /* 2.00 */ |
202 | #define COMPATIBLE_API 0x0100 /* 1.00 */ |
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2338 | Serge | 203 | |
2344 | Serge | 204 | #define API_VERSION (COMPATIBLE_API << 16) | CURRENT_API |
2351 | Serge | 205 | #define DISPLAY_VERSION API_VERSION |
2338 | Serge | 206 | |
207 | |||
2352 | Serge | 208 | #define SRV_GETVERSION 0 |
209 | #define SRV_ENUM_MODES 1 |
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210 | #define SRV_SET_MODE 2 |
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211 | #define SRV_GET_CAPS 3 |
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2342 | Serge | 212 | |
2352 | Serge | 213 | #define SRV_CREATE_SURFACE 10 |
214 | #define SRV_DESTROY_SURFACE 11 |
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215 | #define SRV_LOCK_SURFACE 12 |
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216 | #define SRV_UNLOCK_SURFACE 13 |
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3039 | serge | 217 | #define SRV_RESIZE_SURFACE 14 |
3120 | serge | 218 | #define SRV_BLIT_BITMAP 15 |
219 | #define SRV_BLIT_TEXTURE 16 |
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220 | #define SRV_BLIT_VIDEO 17 |
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2344 | Serge | 221 | |
3290 | Serge | 222 | |
3260 | Serge | 223 | #define SRV_GET_PCI_INFO 20 |
4104 | Serge | 224 | #define SRV_GET_PARAM 21 |
225 | #define SRV_I915_GEM_CREATE 22 |
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226 | #define SRV_DRM_GEM_CLOSE 23 |
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227 | #define SRV_I915_GEM_PIN 24 |
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3260 | Serge | 228 | #define SRV_I915_GEM_SET_CACHEING 25 |
229 | #define SRV_I915_GEM_GET_APERTURE 26 |
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230 | #define SRV_I915_GEM_PWRITE 27 |
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231 | #define SRV_I915_GEM_BUSY 28 |
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232 | #define SRV_I915_GEM_SET_DOMAIN 29 |
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3263 | Serge | 233 | #define SRV_I915_GEM_MMAP 30 |
3480 | Serge | 234 | #define SRV_I915_GEM_MMAP_GTT 31 |
3263 | Serge | 235 | #define SRV_I915_GEM_THROTTLE 32 |
236 | #define SRV_FBINFO 33 |
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237 | #define SRV_I915_GEM_EXECBUFFER2 34 |
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3290 | Serge | 238 | #define SRV_MASK_UPDATE 35 |
3260 | Serge | 239 | |
3263 | Serge | 240 | |
241 | |||
2338 | Serge | 242 | #define check_input(size) \ |
243 | if( unlikely((inp==NULL)||(io->inp_size != (size))) ) \ |
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244 | break; |
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245 | |||
246 | #define check_output(size) \ |
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247 | if( unlikely((outp==NULL)||(io->out_size != (size))) ) \ |
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248 | break; |
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249 | |||
250 | int _stdcall display_handler(ioctl_t *io) |
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251 | { |
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3255 | Serge | 252 | struct drm_file *file; |
253 | |||
2338 | Serge | 254 | int retval = -1; |
255 | u32_t *inp; |
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256 | u32_t *outp; |
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257 | |||
258 | inp = io->input; |
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259 | outp = io->output; |
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260 | |||
3255 | Serge | 261 | file = drm_file_handlers[0]; |
262 | |||
2338 | Serge | 263 | switch(io->io_code) |
264 | { |
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265 | case SRV_GETVERSION: |
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266 | check_output(4); |
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2344 | Serge | 267 | *outp = DISPLAY_VERSION; |
2338 | Serge | 268 | retval = 0; |
269 | break; |
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270 | |||
271 | case SRV_ENUM_MODES: |
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3031 | serge | 272 | // dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n", |
273 | // inp, io->inp_size, io->out_size ); |
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2340 | Serge | 274 | check_output(4); |
2338 | Serge | 275 | // check_input(*outp * sizeof(videomode_t)); |
276 | if( i915_modeset) |
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277 | retval = get_videomodes((videomode_t*)inp, outp); |
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278 | break; |
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279 | |||
280 | case SRV_SET_MODE: |
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3031 | serge | 281 | // dbgprintf("SRV_SET_MODE inp %x inp_size %x\n", |
282 | // inp, io->inp_size); |
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2338 | Serge | 283 | check_input(sizeof(videomode_t)); |
284 | if( i915_modeset ) |
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285 | retval = set_user_mode((videomode_t*)inp); |
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286 | break; |
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3033 | serge | 287 | |
2351 | Serge | 288 | case SRV_GET_CAPS: |
289 | retval = get_driver_caps((hwcaps_t*)inp); |
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290 | break; |
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291 | |||
2344 | Serge | 292 | case SRV_CREATE_SURFACE: |
293 | // check_input(8); |
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3243 | Serge | 294 | // retval = create_surface(main_device, (struct io_call_10*)inp); |
2338 | Serge | 295 | break; |
296 | |||
2352 | Serge | 297 | case SRV_LOCK_SURFACE: |
3243 | Serge | 298 | // retval = lock_surface((struct io_call_12*)inp); |
2352 | Serge | 299 | break; |
2342 | Serge | 300 | |
3039 | serge | 301 | case SRV_RESIZE_SURFACE: |
3243 | Serge | 302 | // retval = resize_surface((struct io_call_14*)inp); |
3039 | serge | 303 | break; |
304 | |||
3255 | Serge | 305 | case SRV_BLIT_BITMAP: |
3243 | Serge | 306 | // srv_blit_bitmap( inp[0], inp[1], inp[2], |
307 | // inp[3], inp[4], inp[5], inp[6]); |
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3033 | serge | 308 | |
309 | // blit_tex( inp[0], inp[1], inp[2], |
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2351 | Serge | 310 | // inp[3], inp[4], inp[5], inp[6]); |
311 | |||
3255 | Serge | 312 | break; |
2338 | Serge | 313 | |
3260 | Serge | 314 | case SRV_GET_PCI_INFO: |
3255 | Serge | 315 | get_pci_info((struct pci_device *)inp); |
2338 | Serge | 316 | retval = 0; |
317 | break; |
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3031 | serge | 318 | |
3255 | Serge | 319 | case SRV_GET_PARAM: |
320 | retval = gem_getparam(main_device, inp); |
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321 | break; |
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322 | |||
323 | case SRV_I915_GEM_CREATE: |
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324 | retval = i915_gem_create_ioctl(main_device, inp, file); |
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325 | break; |
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326 | |||
327 | case SRV_DRM_GEM_CLOSE: |
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328 | retval = drm_gem_close_ioctl(main_device, inp, file); |
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329 | break; |
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330 | |||
331 | case SRV_I915_GEM_PIN: |
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332 | retval = i915_gem_pin_ioctl(main_device, inp, file); |
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333 | break; |
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3260 | Serge | 334 | |
335 | case SRV_I915_GEM_SET_CACHEING: |
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336 | retval = i915_gem_set_caching_ioctl(main_device, inp, file); |
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337 | break; |
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338 | |||
339 | case SRV_I915_GEM_GET_APERTURE: |
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340 | retval = i915_gem_get_aperture_ioctl(main_device, inp, file); |
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341 | break; |
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342 | |||
343 | case SRV_I915_GEM_PWRITE: |
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344 | retval = i915_gem_pwrite_ioctl(main_device, inp, file); |
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345 | break; |
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346 | |||
347 | case SRV_I915_GEM_BUSY: |
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348 | retval = i915_gem_busy_ioctl(main_device, inp, file); |
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349 | break; |
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350 | |||
351 | case SRV_I915_GEM_SET_DOMAIN: |
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352 | retval = i915_gem_set_domain_ioctl(main_device, inp, file); |
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353 | break; |
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354 | |||
3263 | Serge | 355 | case SRV_I915_GEM_THROTTLE: |
356 | retval = i915_gem_throttle_ioctl(main_device, inp, file); |
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357 | break; |
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358 | |||
359 | case SRV_I915_GEM_MMAP: |
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360 | retval = i915_gem_mmap_ioctl(main_device, inp, file); |
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361 | break; |
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362 | |||
3480 | Serge | 363 | case SRV_I915_GEM_MMAP_GTT: |
364 | retval = i915_gem_mmap_gtt_ioctl(main_device, inp, file); |
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365 | break; |
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366 | |||
367 | |||
3263 | Serge | 368 | case SRV_FBINFO: |
369 | retval = i915_fbinfo(inp); |
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370 | break; |
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371 | |||
372 | case SRV_I915_GEM_EXECBUFFER2: |
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373 | retval = i915_gem_execbuffer2(main_device, inp, file); |
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374 | break; |
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375 | |||
3290 | Serge | 376 | case SRV_MASK_UPDATE: |
377 | retval = i915_mask_update(main_device, inp, file); |
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378 | break; |
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379 | |||
2338 | Serge | 380 | }; |
381 | |||
382 | return retval; |
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383 | } |
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384 | |||
385 | |||
2325 | Serge | 386 | #define PCI_CLASS_REVISION 0x08 |
387 | #define PCI_CLASS_DISPLAY_VGA 0x0300 |
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388 | #define PCI_CLASS_BRIDGE_HOST 0x0600 |
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2326 | Serge | 389 | #define PCI_CLASS_BRIDGE_ISA 0x0601 |
2325 | Serge | 390 | |
391 | int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn) |
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392 | { |
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393 | u16_t vendor, device; |
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394 | u32_t class; |
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395 | int ret = 0; |
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396 | |||
397 | vendor = id & 0xffff; |
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398 | device = (id >> 16) & 0xffff; |
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399 | |||
400 | if(vendor == 0x8086) |
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401 | { |
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402 | class = PciRead32(busnr, devfn, PCI_CLASS_REVISION); |
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403 | class >>= 16; |
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404 | |||
405 | if( (class == PCI_CLASS_DISPLAY_VGA) || |
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2326 | Serge | 406 | (class == PCI_CLASS_BRIDGE_HOST) || |
407 | (class == PCI_CLASS_BRIDGE_ISA)) |
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2325 | Serge | 408 | ret = 1; |
409 | } |
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410 | return ret; |
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411 | }; |
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2340 | Serge | 412 | |
413 | |||
414 | static char* parse_path(char *p, char *log) |
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415 | { |
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416 | char c; |
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417 | |||
418 | while( (c = *p++) == ' '); |
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419 | p--; |
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420 | while( (c = *log++ = *p++) && (c != ' ')); |
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421 | *log = 0; |
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422 | |||
423 | return p; |
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424 | }; |
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425 | |||
426 | void parse_cmdline(char *cmdline, char *log) |
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427 | { |
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428 | char *p = cmdline; |
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429 | |||
430 | char c = *p++; |
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431 | |||
432 | while( c ) |
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433 | { |
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434 | if( c == '-') |
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435 | { |
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436 | switch(*p++) |
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437 | { |
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438 | case 'l': |
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439 | p = parse_path(p, log); |
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440 | break; |
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441 | }; |
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442 | }; |
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443 | c = *p++; |
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444 | }; |
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445 | }; |
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446 | |||
2351 | Serge | 447 | |
2344 | Serge | 448 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, |
2351 | Serge | 449 | unsigned int *ecx, unsigned int *edx) |
2344 | Serge | 450 | { |
451 | /* ecx is often an input as well as an output. */ |
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2351 | Serge | 452 | asm volatile("cpuid" |
2344 | Serge | 453 | : "=a" (*eax), |
454 | "=b" (*ebx), |
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455 | "=c" (*ecx), |
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456 | "=d" (*edx) |
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2351 | Serge | 457 | : "0" (*eax), "2" (*ecx) |
458 | : "memory"); |
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2344 | Serge | 459 | } |
460 | |||
2351 | Serge | 461 | |
462 | |||
2344 | Serge | 463 | static inline void cpuid(unsigned int op, |
464 | unsigned int *eax, unsigned int *ebx, |
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465 | unsigned int *ecx, unsigned int *edx) |
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466 | { |
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467 | *eax = op; |
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468 | *ecx = 0; |
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469 | __cpuid(eax, ebx, ecx, edx); |
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470 | } |
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471 | |||
472 | void cpu_detect() |
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473 | { |
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474 | u32 junk, tfms, cap0, misc; |
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475 | |||
476 | cpuid(0x00000001, &tfms, &misc, &junk, &cap0); |
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477 | |||
478 | if (cap0 & (1<<19)) |
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479 | { |
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480 | x86_clflush_size = ((misc >> 8) & 0xff) * 8; |
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481 | } |
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3482 | Serge | 482 | |
483 | tsc_khz = (unsigned int)(GetCpuFreq()/1000); |
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2344 | Serge | 484 | } |
485 | |||
3243 | Serge | 486 | |
487 | int get_driver_caps(hwcaps_t *caps) |
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488 | { |
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489 | int ret = 0; |
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490 | |||
491 | switch(caps->idx) |
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492 | { |
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493 | case 0: |
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494 | caps->opt[0] = 0; |
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495 | caps->opt[1] = 0; |
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496 | break; |
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497 | |||
498 | case 1: |
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499 | caps->cap1.max_tex_width = 4096; |
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500 | caps->cap1.max_tex_height = 4096; |
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501 | break; |
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502 | default: |
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503 | ret = 1; |
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504 | }; |
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505 | caps->idx = 1; |
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506 | return ret; |
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507 | } |
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508 | |||
3255 | Serge | 509 | |
510 | void get_pci_info(struct pci_device *dev) |
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511 | { |
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512 | struct pci_dev *pdev = main_device->pdev; |
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513 | |||
514 | memset(dev, sizeof(*dev), 0); |
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515 | |||
516 | dev->domain = 0; |
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517 | dev->bus = pdev->busnr; |
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518 | dev->dev = pdev->devfn >> 3; |
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519 | dev->func = pdev->devfn & 7; |
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520 | dev->vendor_id = pdev->vendor; |
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521 | dev->device_id = pdev->device; |
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522 | dev->revision = pdev->revision; |
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523 | };19)) |