WebSVN – Kolibri OS – Blame – /drivers/video/drm/i915/main.c

Rev	Author	Line No.	Line
3031	serge	1	#include
		2	#include
		3	#include
2338	Serge	4	#include "i915_drv.h"
3031	serge	5	//#include "intel_drv.h"
2338	Serge	6
2325	Serge	7	#include
		8	#include
		9	#include
		10	#include
		11	#include
		12	#include
		13
2342	Serge	14	#include "bitmap.h"
2340	Serge	15
3255	Serge	16	struct pci_device {
		17	uint16_t domain;
		18	uint8_t bus;
		19	uint8_t dev;
		20	uint8_t func;
		21	uint16_t vendor_id;
		22	uint16_t device_id;
		23	uint16_t subvendor_id;
		24	uint16_t subdevice_id;
		25	uint32_t device_class;
		26	uint8_t revision;
		27	};
		28
3033	serge	29	extern struct drm_device *main_device;
3255	Serge	30	extern struct drm_file *drm_file_handlers[256];
3033	serge	31
2344	Serge	32	void cpu_detect();
		33
2340	Serge	34	void parse_cmdline(char cmdline, char log);
2338	Serge	35	int _stdcall display_handler(ioctl_t *io);
2325	Serge	36	int init_agp(void);
		37
3120	serge	38	int srv_blit_bitmap(u32 hbitmap, int dst_x, int dst_y,
2351	Serge	39	int src_x, int src_y, u32 w, u32 h);
2340	Serge	40
2351	Serge	41	int blit_textured(u32 hbitmap, int dst_x, int dst_y,
		42	int src_x, int src_y, u32 w, u32 h);
		43
2361	Serge	44	int blit_tex(u32 hbitmap, int dst_x, int dst_y,
		45	int src_x, int src_y, u32 w, u32 h);
		46
3255	Serge	47	void get_pci_info(struct pci_device *dev);
		48	int gem_getparam(struct drm_device dev, void data);
		49
		50
2325	Serge	51	static char log[256];
		52
2344	Serge	53	int x86_clflush_size;
		54
2338	Serge	55	int i915_modeset = 1;
		56
2325	Serge	57	u32_t drvEntry(int action, char *cmdline)
		58	{
		59
		60	int err = 0;
		61
		62	if(action != 1)
		63	return 0;
		64
		65	if( GetService("DISPLAY") != 0 )
		66	return 0;
		67
2340	Serge	68	if( cmdline && *cmdline )
		69	parse_cmdline(cmdline, log);
2325	Serge	70
		71	if(!dbg_open(log))
		72	{
3263	Serge	73	strcpy(log, "/tmp1/1/i915.log");
		74	// strcpy(log, "/RD/1/DRIVERS/i915.log");
2325	Serge	75
		76	if(!dbg_open(log))
		77	{
		78	printf("Can't open %s\nExit\n", log);
		79	return 0;
		80	};
		81	}
3243	Serge	82	dbgprintf("i915 RC 10\n cmdline: %s\n", cmdline);
2325	Serge	83
2351	Serge	84	cpu_detect();
		85	dbgprintf("\ncache line size %d\n", x86_clflush_size);
		86
2325	Serge	87	enum_pci_devices();
		88
		89	err = i915_init();
		90
2338	Serge	91	if(err)
		92	{
		93	dbgprintf("Epic Fail :(/n");
		94	};
2325	Serge	95
2338	Serge	96	err = RegService("DISPLAY", display_handler);
2325	Serge	97
2338	Serge	98	if( err != 0)
		99	dbgprintf("Set DISPLAY handler\n");
		100
2325	Serge	101	return err;
		102	};
		103
2344	Serge	104	#define CURRENT_API 0x0200 /* 2.00 */
		105	#define COMPATIBLE_API 0x0100 /* 1.00 */
2338	Serge	106
2344	Serge	107	#define API_VERSION (COMPATIBLE_API << 16) \| CURRENT_API
2351	Serge	108	#define DISPLAY_VERSION API_VERSION
2338	Serge	109
		110
2352	Serge	111	#define SRV_GETVERSION 0
		112	#define SRV_ENUM_MODES 1
		113	#define SRV_SET_MODE 2
		114	#define SRV_GET_CAPS 3
2342	Serge	115
2352	Serge	116	#define SRV_CREATE_SURFACE 10
		117	#define SRV_DESTROY_SURFACE 11
		118	#define SRV_LOCK_SURFACE 12
		119	#define SRV_UNLOCK_SURFACE 13
3039	serge	120	#define SRV_RESIZE_SURFACE 14
3120	serge	121	#define SRV_BLIT_BITMAP 15
		122	#define SRV_BLIT_TEXTURE 16
		123	#define SRV_BLIT_VIDEO 17
2344	Serge	124
3260	Serge	125	#define SRV_GET_PCI_INFO 20
3255	Serge	126	#define SRV_GET_PARAM 21
		127	#define SRV_I915_GEM_CREATE 22
		128	#define SRV_DRM_GEM_CLOSE 23
		129	#define SRV_I915_GEM_PIN 24
3260	Serge	130	#define SRV_I915_GEM_SET_CACHEING 25
		131	#define SRV_I915_GEM_GET_APERTURE 26
		132	#define SRV_I915_GEM_PWRITE 27
		133	#define SRV_I915_GEM_BUSY 28
		134	#define SRV_I915_GEM_SET_DOMAIN 29
3263	Serge	135	#define SRV_I915_GEM_MMAP 30
3255	Serge	136
3263	Serge	137	#define SRV_I915_GEM_THROTTLE 32
		138	#define SRV_FBINFO 33
		139	#define SRV_I915_GEM_EXECBUFFER2 34
3260	Serge	140
3263	Serge	141
		142
2338	Serge	143	#define check_input(size) \
		144	if( unlikely((inp==NULL)\|\|(io->inp_size != (size))) ) \
		145	break;
		146
		147	#define check_output(size) \
		148	if( unlikely((outp==NULL)\|\|(io->out_size != (size))) ) \
		149	break;
		150
		151	int _stdcall display_handler(ioctl_t *io)
		152	{
3255	Serge	153	struct drm_file *file;
		154
2338	Serge	155	int retval = -1;
		156	u32_t *inp;
		157	u32_t *outp;
		158
		159	inp = io->input;
		160	outp = io->output;
		161
3255	Serge	162	file = drm_file_handlers[0];
		163
2338	Serge	164	switch(io->io_code)
		165	{
		166	case SRV_GETVERSION:
		167	check_output(4);
2344	Serge	168	*outp = DISPLAY_VERSION;
2338	Serge	169	retval = 0;
		170	break;
		171
		172	case SRV_ENUM_MODES:
3031	serge	173	// dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",
		174	// inp, io->inp_size, io->out_size );
2340	Serge	175	check_output(4);
2338	Serge	176	// check_input(outp sizeof(videomode_t));
		177	if( i915_modeset)
		178	retval = get_videomodes((videomode_t*)inp, outp);
		179	break;
		180
		181	case SRV_SET_MODE:
3031	serge	182	// dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",
		183	// inp, io->inp_size);
2338	Serge	184	check_input(sizeof(videomode_t));
		185	if( i915_modeset )
		186	retval = set_user_mode((videomode_t*)inp);
		187	break;
3033	serge	188
2351	Serge	189	case SRV_GET_CAPS:
		190	retval = get_driver_caps((hwcaps_t*)inp);
		191	break;
		192
2344	Serge	193	case SRV_CREATE_SURFACE:
		194	// check_input(8);
3243	Serge	195	// retval = create_surface(main_device, (struct io_call_10*)inp);
2338	Serge	196	break;
		197
2352	Serge	198	case SRV_LOCK_SURFACE:
3243	Serge	199	// retval = lock_surface((struct io_call_12*)inp);
2352	Serge	200	break;
2342	Serge	201
3039	serge	202	case SRV_RESIZE_SURFACE:
3243	Serge	203	// retval = resize_surface((struct io_call_14*)inp);
3039	serge	204	break;
		205
3255	Serge	206	case SRV_BLIT_BITMAP:
3243	Serge	207	// srv_blit_bitmap( inp[0], inp[1], inp[2],
		208	// inp[3], inp[4], inp[5], inp[6]);
3033	serge	209
		210	// blit_tex( inp[0], inp[1], inp[2],
2351	Serge	211	// inp[3], inp[4], inp[5], inp[6]);
		212
3255	Serge	213	break;
2338	Serge	214
3260	Serge	215	case SRV_GET_PCI_INFO:
3255	Serge	216	get_pci_info((struct pci_device *)inp);
2338	Serge	217	retval = 0;
		218	break;
3031	serge	219
3255	Serge	220	case SRV_GET_PARAM:
		221	retval = gem_getparam(main_device, inp);
		222	break;
		223
		224	case SRV_I915_GEM_CREATE:
		225	retval = i915_gem_create_ioctl(main_device, inp, file);
		226	break;
		227
		228	case SRV_DRM_GEM_CLOSE:
		229	retval = drm_gem_close_ioctl(main_device, inp, file);
		230	break;
		231
		232	case SRV_I915_GEM_PIN:
		233	retval = i915_gem_pin_ioctl(main_device, inp, file);
		234	break;
3260	Serge	235
		236	case SRV_I915_GEM_SET_CACHEING:
		237	retval = i915_gem_set_caching_ioctl(main_device, inp, file);
		238	break;
		239
		240	case SRV_I915_GEM_GET_APERTURE:
		241	retval = i915_gem_get_aperture_ioctl(main_device, inp, file);
		242	break;
		243
		244	case SRV_I915_GEM_PWRITE:
		245	retval = i915_gem_pwrite_ioctl(main_device, inp, file);
		246	break;
		247
		248	case SRV_I915_GEM_BUSY:
		249	retval = i915_gem_busy_ioctl(main_device, inp, file);
		250	break;
		251
		252	case SRV_I915_GEM_SET_DOMAIN:
		253	retval = i915_gem_set_domain_ioctl(main_device, inp, file);
		254	break;
		255
3263	Serge	256	case SRV_I915_GEM_THROTTLE:
		257	retval = i915_gem_throttle_ioctl(main_device, inp, file);
		258	break;
		259
		260	case SRV_I915_GEM_MMAP:
		261	retval = i915_gem_mmap_ioctl(main_device, inp, file);
		262	break;
		263
		264	case SRV_FBINFO:
		265	retval = i915_fbinfo(inp);
		266	break;
		267
		268	case SRV_I915_GEM_EXECBUFFER2:
		269	retval = i915_gem_execbuffer2(main_device, inp, file);
		270	break;
		271
2338	Serge	272	};
		273
		274	return retval;
		275	}
		276
		277
2325	Serge	278	#define PCI_CLASS_REVISION 0x08
		279	#define PCI_CLASS_DISPLAY_VGA 0x0300
		280	#define PCI_CLASS_BRIDGE_HOST 0x0600
2326	Serge	281	#define PCI_CLASS_BRIDGE_ISA 0x0601
2325	Serge	282
		283	int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn)
		284	{
		285	u16_t vendor, device;
		286	u32_t class;
		287	int ret = 0;
		288
		289	vendor = id & 0xffff;
		290	device = (id >> 16) & 0xffff;
		291
		292	if(vendor == 0x8086)
		293	{
		294	class = PciRead32(busnr, devfn, PCI_CLASS_REVISION);
		295	class >>= 16;
		296
		297	if( (class == PCI_CLASS_DISPLAY_VGA) \|\|
2326	Serge	298	(class == PCI_CLASS_BRIDGE_HOST) \|\|
		299	(class == PCI_CLASS_BRIDGE_ISA))
2325	Serge	300	ret = 1;
		301	}
		302	return ret;
		303	};
2340	Serge	304
		305
		306	static char* parse_path(char p, char log)
		307	{
		308	char c;
		309
		310	while( (c = *p++) == ' ');
		311	p--;
		312	while( (c = log++ = p++) && (c != ' '));
		313	*log = 0;
		314
		315	return p;
		316	};
		317
		318	void parse_cmdline(char cmdline, char log)
		319	{
		320	char *p = cmdline;
		321
		322	char c = *p++;
		323
		324	while( c )
		325	{
		326	if( c == '-')
		327	{
		328	switch(*p++)
		329	{
		330	case 'l':
		331	p = parse_path(p, log);
		332	break;
		333	};
		334	};
		335	c = *p++;
		336	};
		337	};
		338
2351	Serge	339
2344	Serge	340	static inline void __cpuid(unsigned int eax, unsigned int ebx,
2351	Serge	341	unsigned int ecx, unsigned int edx)
2344	Serge	342	{
		343	/* ecx is often an input as well as an output. */
2351	Serge	344	asm volatile("cpuid"
2344	Serge	345	: "=a" (*eax),
		346	"=b" (*ebx),
		347	"=c" (*ecx),
		348	"=d" (*edx)
2351	Serge	349	: "0" (eax), "2" (ecx)
		350	: "memory");
2344	Serge	351	}
		352
2351	Serge	353
		354
2344	Serge	355	static inline void cpuid(unsigned int op,
		356	unsigned int eax, unsigned int ebx,
		357	unsigned int ecx, unsigned int edx)
		358	{
		359	*eax = op;
		360	*ecx = 0;
		361	__cpuid(eax, ebx, ecx, edx);
		362	}
		363
		364	void cpu_detect()
		365	{
		366	u32 junk, tfms, cap0, misc;
		367
		368	cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
		369
		370	if (cap0 & (1<<19))
		371	{
		372	x86_clflush_size = ((misc >> 8) & 0xff) * 8;
		373	}
		374	}
		375
3243	Serge	376
		377	int get_driver_caps(hwcaps_t *caps)
		378	{
		379	int ret = 0;
		380
		381	switch(caps->idx)
		382	{
		383	case 0:
		384	caps->opt[0] = 0;
		385	caps->opt[1] = 0;
		386	break;
		387
		388	case 1:
		389	caps->cap1.max_tex_width = 4096;
		390	caps->cap1.max_tex_height = 4096;
		391	break;
		392	default:
		393	ret = 1;
		394	};
		395	caps->idx = 1;
		396	return ret;
		397	}
		398
3255	Serge	399
		400	void get_pci_info(struct pci_device *dev)
		401	{
		402	struct pci_dev *pdev = main_device->pdev;
		403
		404	memset(dev, sizeof(*dev), 0);
		405
		406	dev->domain = 0;
		407	dev->bus = pdev->busnr;
		408	dev->dev = pdev->devfn >> 3;
		409	dev->func = pdev->devfn & 7;
		410	dev->vendor_id = pdev->vendor;
		411	dev->device_id = pdev->device;
		412	dev->revision = pdev->revision;
		413	};

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(root)/drivers/video/drm/i915/main.c – Rev 3263