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Rev | Author | Line No. | Line |
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2340 | Serge | 1 | |
2 | |||
3 | |||
2338 | Serge | 4 | #include "drm.h" |
5 | #include "i915_drm.h" |
||
6 | #include "i915_drv.h" |
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7 | #include "intel_drv.h" |
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8 | |||
9 | |||
10 | #include |
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11 | #include |
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12 | #include |
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13 | #include |
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14 | |||
15 | |||
16 | |||
17 | |||
3033 | serge | 18 | #include "bitmap.h" |
2340 | Serge | 19 | |
2338 | Serge | 20 | |
2351 | Serge | 21 | |
2338 | Serge | 22 | |
2351 | Serge | 23 | |
2338 | Serge | 24 | { |
25 | kobj_t header; |
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26 | |||
27 | |||
28 | uint32_t hot_x; |
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29 | uint32_t hot_y; |
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30 | |||
31 | |||
32 | struct drm_i915_gem_object *cobj; |
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33 | }cursor_t; |
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34 | |||
35 | |||
36 | #define CURSOR_HEIGHT 64 |
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37 | |||
38 | |||
39 | |||
40 | { |
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41 | int x; |
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42 | int y; |
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43 | int width; |
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44 | int height; |
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45 | int bpp; |
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46 | int vrefresh; |
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47 | int pitch; |
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48 | int lfb; |
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49 | |||
50 | |||
51 | struct drm_device *ddev; |
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52 | struct drm_connector *connector; |
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53 | struct drm_crtc *crtc; |
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54 | |||
55 | |||
56 | |||
57 | |||
58 | int (*init_cursor)(cursor_t*); |
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59 | cursor_t* (__stdcall *select_cursor)(cursor_t*); |
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60 | void (*show_cursor)(int show); |
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61 | void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y); |
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62 | void (__stdcall *restore_cursor)(int x, int y); |
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63 | void (*disable_mouse)(void); |
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64 | u32 mask_seqno; |
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2361 | Serge | 65 | u32 check_mouse; |
3031 | serge | 66 | u32 check_m_pixel; |
67 | |||
68 | |||
2338 | Serge | 69 | |
70 | |||
71 | |||
72 | |||
73 | |||
2340 | Serge | 74 | u32_t cmd_offset; |
75 | |||
76 | |||
2351 | Serge | 77 | int sna_init(); |
78 | |||
79 | |||
2338 | Serge | 80 | static cursor_t* __stdcall select_cursor_kms(cursor_t *cursor); |
81 | static void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y); |
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82 | |||
83 | |||
84 | {}; |
||
85 | |||
86 | |||
87 | {}; |
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88 | |||
89 | |||
3031 | serge | 90 | { |
91 | static char name[4]; |
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92 | |||
93 | |||
94 | name[1] = ((x[0] & 0x03) << 3) + ((x[1] & 0xE0) >> 5) + '@'; |
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95 | name[2] = (x[1] & 0x1F) + '@'; |
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96 | name[3] = 0; |
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97 | |||
98 | |||
99 | } |
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100 | |||
101 | |||
102 | videomode_t *reqmode, bool strict) |
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103 | { |
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104 | drm_i915_private_t *dev_priv = dev->dev_private; |
||
105 | struct drm_fb_helper *fb_helper = &dev_priv->fbdev->helper; |
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106 | |||
107 | |||
108 | struct drm_display_mode *mode = NULL, *tmpmode; |
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109 | struct drm_framebuffer *fb = NULL; |
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110 | struct drm_crtc *crtc; |
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111 | struct drm_encoder *encoder; |
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112 | struct drm_mode_set set; |
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113 | char *con_name; |
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114 | char *enc_name; |
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115 | unsigned hdisplay, vdisplay; |
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116 | int ret; |
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117 | |||
118 | |||
119 | |||
120 | |||
121 | { |
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122 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
||
123 | (drm_mode_height(tmpmode) == reqmode->height) && |
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124 | (drm_mode_vrefresh(tmpmode) == reqmode->freq) ) |
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125 | { |
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126 | mode = tmpmode; |
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127 | goto do_set; |
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128 | } |
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129 | }; |
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130 | |||
131 | |||
132 | { |
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133 | list_for_each_entry(tmpmode, &connector->modes, head) |
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134 | { |
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135 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
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136 | (drm_mode_height(tmpmode) == reqmode->height) ) |
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137 | { |
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138 | mode = tmpmode; |
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139 | goto do_set; |
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140 | } |
||
141 | }; |
||
142 | }; |
||
143 | |||
144 | |||
3037 | serge | 145 | |
3031 | serge | 146 | |
147 | |||
148 | |||
149 | |||
150 | |||
151 | |||
152 | crtc = encoder->crtc; |
||
153 | |||
154 | |||
155 | enc_name = drm_get_encoder_name(encoder); |
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156 | |||
157 | |||
158 | reqmode->width, reqmode->height, crtc->base.id, |
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159 | con_name, enc_name); |
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160 | |||
161 | |||
162 | |||
163 | |||
164 | vdisplay = mode->vdisplay; |
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165 | |||
166 | |||
167 | swap(hdisplay, vdisplay); |
||
168 | |||
169 | |||
170 | |||
171 | |||
172 | fb->height = reqmode->height; |
||
173 | fb->pitches[0] = ALIGN(reqmode->width * 4, 64); |
||
174 | fb->pitches[1] = ALIGN(reqmode->width * 4, 64); |
||
175 | fb->pitches[2] = ALIGN(reqmode->width * 4, 64); |
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176 | fb->pitches[3] = ALIGN(reqmode->width * 4, 64); |
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177 | |||
178 | |||
179 | fb->depth = 24; |
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180 | |||
181 | |||
182 | crtc->enabled = true; |
||
183 | os_display->crtc = crtc; |
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184 | |||
185 | |||
186 | set.x = 0; |
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187 | set.y = 0; |
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188 | set.mode = mode; |
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189 | set.connectors = &connector; |
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190 | set.num_connectors = 1; |
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191 | set.fb = fb; |
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192 | ret = crtc->funcs->set_config(&set); |
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193 | mutex_unlock(&dev->mode_config.mutex); |
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194 | |||
195 | |||
196 | { |
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197 | os_display->width = fb->width; |
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198 | os_display->height = fb->height; |
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199 | os_display->pitch = fb->pitches[0]; |
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200 | os_display->vrefresh = drm_mode_vrefresh(mode); |
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201 | |||
202 | |||
203 | |||
204 | |||
3037 | serge | 205 | fb->width, fb->height, fb->pitches[0]); |
3031 | serge | 206 | } |
207 | else |
||
208 | DRM_ERROR("failed to set mode %d_%d on crtc %p\n", |
||
209 | fb->width, fb->height, crtc); |
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210 | |||
211 | |||
212 | |||
213 | } |
||
214 | |||
215 | |||
2338 | Serge | 216 | { |
217 | struct drm_display_mode *mode; |
||
218 | int count = 0; |
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219 | |||
220 | |||
221 | { |
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222 | count++; |
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223 | }; |
||
224 | return count; |
||
225 | }; |
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226 | |||
227 | |||
3031 | serge | 228 | { |
229 | struct drm_connector *connector; |
||
230 | struct drm_connector_helper_funcs *connector_funcs; |
||
231 | |||
232 | |||
233 | |||
234 | |||
235 | { |
||
236 | struct drm_encoder *encoder; |
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237 | struct drm_crtc *crtc; |
||
238 | |||
239 | |||
240 | continue; |
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241 | |||
242 | |||
243 | encoder = connector_funcs->best_encoder(connector); |
||
244 | if( encoder == NULL) |
||
245 | continue; |
||
246 | |||
247 | |||
248 | |||
249 | |||
250 | |||
251 | |||
3037 | serge | 252 | connector, connector->base.id, |
3031 | serge | 253 | connector->status, connector->encoder, |
254 | crtc); |
||
255 | |||
256 | |||
257 | // continue; |
||
258 | |||
259 | |||
260 | |||
261 | |||
262 | }; |
||
263 | |||
264 | |||
265 | }; |
||
266 | |||
267 | |||
268 | |||
2338 | Serge | 269 | { |
270 | struct drm_connector *connector; |
||
271 | struct drm_connector_helper_funcs *connector_funcs; |
||
272 | struct drm_encoder *encoder; |
||
273 | struct drm_crtc *crtc = NULL; |
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274 | struct drm_framebuffer *fb; |
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275 | |||
276 | |||
277 | u32_t ifl; |
||
278 | int err; |
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3033 | serge | 279 | |
2338 | Serge | 280 | |
281 | { |
||
282 | if( connector->status != connector_status_connected) |
||
283 | continue; |
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284 | |||
285 | |||
286 | encoder = connector_funcs->best_encoder(connector); |
||
287 | if( encoder == NULL) |
||
288 | { |
||
289 | DRM_DEBUG_KMS("CONNECTOR %x ID: %d no active encoders\n", |
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3037 | serge | 290 | connector, connector->base.id); |
2338 | Serge | 291 | continue; |
292 | } |
||
293 | connector->encoder = encoder; |
||
294 | crtc = encoder->crtc; |
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3031 | serge | 295 | |
2338 | Serge | 296 | |
3037 | serge | 297 | connector, connector->base.id, |
2338 | Serge | 298 | connector->status, connector->encoder, |
299 | crtc, crtc->base.id ); |
||
3031 | serge | 300 | |
2338 | Serge | 301 | |
302 | }; |
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303 | |||
304 | |||
305 | { |
||
306 | DRM_ERROR("No active connectors!\n"); |
||
3037 | serge | 307 | return -1; |
2338 | Serge | 308 | }; |
309 | |||
310 | |||
311 | { |
||
312 | struct drm_crtc *tmp_crtc; |
||
313 | int crtc_mask = 1; |
||
314 | |||
315 | |||
316 | { |
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317 | if (encoder->possible_crtcs & crtc_mask) |
||
318 | { |
||
319 | crtc = tmp_crtc; |
||
320 | encoder->crtc = crtc; |
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321 | break; |
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322 | }; |
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323 | crtc_mask <<= 1; |
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324 | }; |
||
325 | }; |
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326 | |||
327 | |||
328 | { |
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329 | DRM_ERROR("No CRTC for encoder %d\n", encoder->base.id); |
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3037 | serge | 330 | return -1; |
2338 | Serge | 331 | }; |
332 | |||
333 | |||
334 | |||
335 | |||
336 | |||
337 | os_display->ddev = dev; |
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338 | os_display->connector = connector; |
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339 | os_display->crtc = crtc; |
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340 | |||
341 | |||
342 | |||
343 | |||
344 | |||
345 | { |
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346 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
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347 | |||
348 | |||
349 | { |
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350 | init_cursor(cursor); |
||
351 | }; |
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352 | |||
353 | |||
354 | os_display->init_cursor = init_cursor; |
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355 | os_display->select_cursor = select_cursor_kms; |
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356 | os_display->show_cursor = NULL; |
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357 | os_display->move_cursor = move_cursor_kms; |
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358 | os_display->restore_cursor = restore_cursor; |
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359 | os_display->disable_mouse = disable_mouse; |
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360 | |||
361 | |||
362 | intel_crtc->cursor_y = os_display->height/2; |
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363 | |||
364 | |||
365 | }; |
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366 | safe_sti(ifl); |
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367 | |||
368 | |||
2351 | Serge | 369 | |
370 | |||
3243 | Serge | 371 | err = init_bitmaps(); |
2342 | Serge | 372 | #endif |
3243 | Serge | 373 | |
2340 | Serge | 374 | |
2338 | Serge | 375 | }; |
376 | |||
377 | |||
378 | |||
379 | { |
||
380 | int err = -1; |
||
381 | |||
382 | |||
3031 | serge | 383 | |
2338 | Serge | 384 | |
385 | { |
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386 | *count = os_display->supported_modes; |
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387 | err = 0; |
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388 | } |
||
389 | else if( mode != NULL ) |
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390 | { |
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391 | struct drm_display_mode *drmmode; |
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392 | int i = 0; |
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393 | |||
394 | |||
395 | *count = os_display->supported_modes; |
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396 | |||
397 | |||
398 | { |
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399 | if( i < *count) |
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400 | { |
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401 | mode->width = drm_mode_width(drmmode); |
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402 | mode->height = drm_mode_height(drmmode); |
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403 | mode->bpp = 32; |
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404 | mode->freq = drm_mode_vrefresh(drmmode); |
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405 | i++; |
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406 | mode++; |
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407 | } |
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408 | else break; |
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409 | }; |
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410 | *count = i; |
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411 | err = 0; |
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412 | }; |
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413 | return err; |
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414 | }; |
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415 | |||
416 | |||
417 | { |
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418 | int err = -1; |
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419 | |||
420 | |||
3031 | serge | 421 | // mode->width, mode->height, mode->freq); |
422 | |||
2338 | Serge | 423 | |
424 | (mode->height != 0) && |
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425 | (mode->freq != 0 ) && |
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426 | ( (mode->width != os_display->width) || |
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427 | (mode->height != os_display->height) || |
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428 | (mode->freq != os_display->vrefresh) ) ) |
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429 | { |
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430 | if( set_mode(os_display->ddev, os_display->connector, mode, true) ) |
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431 | err = 0; |
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432 | }; |
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433 | |||
434 | |||
435 | }; |
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436 | |||
437 | |||
438 | { |
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439 | list_del(&cursor->list); |
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3037 | serge | 440 | |
2342 | Serge | 441 | |
3037 | serge | 442 | |
443 | |||
444 | drm_gem_object_unreference(&cursor->cobj->base); |
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445 | mutex_unlock(&main_device->struct_mutex); |
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446 | |||
447 | |||
2338 | Serge | 448 | }; |
449 | |||
450 | |||
451 | { |
||
452 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
||
453 | struct drm_i915_gem_object *obj; |
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454 | uint32_t *bits; |
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455 | uint32_t *src; |
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456 | void *mapped; |
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3037 | serge | 457 | |
2338 | Serge | 458 | |
459 | int ret; |
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460 | |||
461 | |||
462 | { |
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463 | bits = (uint32_t*)KernelAlloc(CURSOR_WIDTH*CURSOR_HEIGHT*4); |
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464 | if (unlikely(bits == NULL)) |
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465 | return ENOMEM; |
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466 | cursor->cobj = (struct drm_i915_gem_object *)GetPgAddr(bits); |
||
467 | } |
||
468 | else |
||
469 | { |
||
470 | obj = i915_gem_alloc_object(os_display->ddev, CURSOR_WIDTH*CURSOR_HEIGHT*4); |
||
471 | if (unlikely(obj == NULL)) |
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472 | return -ENOMEM; |
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473 | |||
474 | |||
3031 | serge | 475 | if (ret) { |
2338 | Serge | 476 | drm_gem_object_unreference(&obj->base); |
2344 | Serge | 477 | return ret; |
2338 | Serge | 478 | } |
479 | |||
480 | |||
481 | * GTT space is continuous. I guarantee it. */ |
||
482 | |||
483 | |||
3037 | serge | 484 | CURSOR_WIDTH*CURSOR_HEIGHT*4, PG_SW); |
2338 | Serge | 485 | |
486 | |||
487 | { |
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488 | i915_gem_object_unpin(obj); |
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2344 | Serge | 489 | drm_gem_object_unreference(&obj->base); |
490 | return -ENOMEM; |
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2338 | Serge | 491 | }; |
492 | cursor->cobj = obj; |
||
493 | }; |
||
494 | |||
495 | |||
496 | |||
497 | |||
498 | { |
||
499 | for(j = 0; j < 32; j++) |
||
500 | *bits++ = *src++; |
||
501 | for(j = 32; j < CURSOR_WIDTH; j++) |
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502 | *bits++ = 0; |
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503 | } |
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504 | for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++) |
||
505 | *bits++ = 0; |
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506 | |||
507 | |||
3037 | serge | 508 | |
509 | |||
2338 | Serge | 510 | |
511 | |||
2340 | Serge | 512 | |
2338 | Serge | 513 | |
514 | |||
515 | |||
516 | |||
517 | |||
518 | } |
||
519 | |||
520 | |||
521 | |||
522 | { |
||
523 | struct drm_device *dev = crtc->dev; |
||
524 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
525 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
||
526 | int pipe = intel_crtc->pipe; |
||
527 | bool visible = base != 0; |
||
528 | |||
529 | |||
530 | uint32_t cntl = I915_READ(CURCNTR(pipe)); |
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531 | if (base) { |
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532 | cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); |
||
533 | cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; |
||
534 | cntl |= pipe << 28; /* Connect to correct pipe */ |
||
535 | } else { |
||
536 | cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE); |
||
537 | cntl |= CURSOR_MODE_DISABLE; |
||
538 | } |
||
539 | I915_WRITE(CURCNTR(pipe), cntl); |
||
540 | |||
541 | |||
542 | } |
||
543 | /* and commit changes on next vblank */ |
||
544 | I915_WRITE(CURBASE(pipe), base); |
||
545 | } |
||
546 | |||
547 | |||
548 | { |
||
549 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
||
550 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
||
551 | u32 base, pos; |
||
552 | bool visible; |
||
553 | |||
554 | |||
555 | |||
556 | |||
557 | intel_crtc->cursor_y = y; |
||
558 | |||
559 | |||
560 | y = y - cursor->hot_y; |
||
561 | |||
562 | |||
563 | |||
564 | |||
565 | |||
566 | if (x >= os_display->width) |
||
567 | base = 0; |
||
568 | |||
569 | |||
570 | base = 0; |
||
571 | |||
572 | |||
573 | { |
||
574 | if (x + intel_crtc->cursor_width < 0) |
||
575 | base = 0; |
||
576 | |||
577 | |||
578 | x = -x; |
||
579 | } |
||
580 | pos |= x << CURSOR_X_SHIFT; |
||
581 | |||
582 | |||
583 | { |
||
584 | if (y + intel_crtc->cursor_height < 0) |
||
585 | base = 0; |
||
586 | |||
587 | |||
588 | y = -y; |
||
589 | } |
||
590 | pos |= y << CURSOR_Y_SHIFT; |
||
591 | |||
592 | |||
593 | if (!visible && !intel_crtc->cursor_visible) |
||
594 | return; |
||
595 | |||
596 | |||
597 | // if (IS_845G(dev) || IS_I865G(dev)) |
||
598 | // i845_update_cursor(crtc, base); |
||
599 | // else |
||
600 | i9xx_update_cursor(os_display->crtc, base); |
||
601 | |||
602 | |||
603 | |||
604 | |||
605 | |||
606 | { |
||
607 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
||
608 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
||
609 | cursor_t *old; |
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610 | |||
611 | |||
612 | os_display->cursor = cursor; |
||
613 | |||
614 | |||
615 | intel_crtc->cursor_addr = cursor->cobj->gtt_offset; |
||
616 | else |
||
617 | intel_crtc->cursor_addr = (addr_t)cursor->cobj; |
||
2352 | Serge | 618 | |
2338 | Serge | 619 | |
620 | intel_crtc->cursor_height = 32; |
||
621 | |||
622 | |||
623 | return old; |
||
624 | }; |
||
625 | |||
626 | |||
3263 | Serge | 627 | { |
628 | uint32_t width; |
||
629 | uint32_t height; |
||
630 | uint32_t pitch; |
||
631 | uint32_t tiling; |
||
632 | }; |
||
633 | |||
2340 | Serge | 634 | |
3263 | Serge | 635 | { |
636 | fb->width = os_display->width; |
||
637 | fb->height = os_display->height; |
||
638 | fb->pitch = os_display->pitch; |
||
639 | fb->tiling = 0; |
||
640 | |||
2340 | Serge | 641 | |
3263 | Serge | 642 | }; |
643 | |||
644 | |||
645 | |||
3243 | Serge | 646 | |
2342 | Serge | 647 | |
3033 | serge | 648 | |
649 | |||
650 | |||
2342 | Serge | 651 | { |
2338 | Serge | 652 | int left; |
2342 | Serge | 653 | int top; |
654 | int right; |
||
655 | int bottom; |
||
656 | }rect_t; |
||
657 | |||
2338 | Serge | 658 | |
2342 | Serge | 659 | |
660 | |||
661 | |||
662 | |||
663 | |||
664 | |||
665 | |||
666 | { |
||
667 | u32_t addr; |
||
668 | |||
669 | |||
670 | addr+= sizeof(display_t); /* shoot me */ |
||
671 | return *(u32_t*)addr; |
||
672 | } |
||
673 | |||
674 | |||
3033 | serge | 675 | #define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) |
676 | #define XY_SRC_COPY_CHROMA_CMD ((2<<29)|(0x73<<22)|8) |
||
3243 | Serge | 677 | #define ROP_COPY_SRC 0xCC |
678 | #define FORMAT8888 3 |
||
679 | |||
2342 | Serge | 680 | |
3033 | serge | 681 | #define BLT_WRITE_RGB (1<<20) |
682 | |||
683 | |||
684 | |||
685 | |||
2342 | Serge | 686 | |
687 | |||
688 | |||
3037 | serge | 689 | |
3033 | serge | 690 | i915_gem_execbuffer_retire_commands(struct drm_device *dev, |
691 | struct drm_file *file, |
||
3037 | serge | 692 | struct intel_ring_buffer *ring) |
3033 | serge | 693 | { |
694 | /* Unconditionally force add_request to emit a full flush. */ |
||
3037 | serge | 695 | ring->gpu_caches_dirty = true; |
696 | |||
3033 | serge | 697 | |
698 | (void)i915_add_request(ring, file, NULL); |
||
3037 | serge | 699 | } |
3033 | serge | 700 | |
701 | |||
3120 | serge | 702 | int src_x, int src_y, u32 w, u32 h) |
2342 | Serge | 703 | { |
704 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
2340 | Serge | 705 | struct intel_ring_buffer *ring; |
706 | struct context *context; |
||
3033 | serge | 707 | |
2338 | Serge | 708 | |
2342 | Serge | 709 | rect_t winrc; |
710 | clip_t dst_clip; |
||
711 | clip_t src_clip; |
||
712 | u32_t width; |
||
713 | u32_t height; |
||
714 | |||
2338 | Serge | 715 | |
2342 | Serge | 716 | u32_t offset; |
717 | u8 slot; |
||
718 | int n=0; |
||
3243 | Serge | 719 | int ret; |
3037 | serge | 720 | |
2338 | Serge | 721 | |
2342 | Serge | 722 | return -1; |
723 | |||
2338 | Serge | 724 | |
3033 | serge | 725 | |
2338 | Serge | 726 | |
2342 | Serge | 727 | return -1; |
728 | |||
2338 | Serge | 729 | |
3033 | serge | 730 | if(unlikely(context == NULL)) |
731 | return -1; |
||
732 | |||
2338 | Serge | 733 | |
2342 | Serge | 734 | { |
3120 | serge | 735 | static warn_count; |
736 | |||
2338 | Serge | 737 | |
3120 | serge | 738 | { |
739 | printf("left %d top %d right %d bottom %d\n", |
||
740 | winrc.left, winrc.top, winrc.right, winrc.bottom); |
||
741 | printf("bitmap width %d height %d\n", w, h); |
||
742 | warn_count++; |
||
743 | }; |
||
744 | }; |
||
745 | |||
746 | |||
747 | |||
2342 | Serge | 748 | dst_clip.ymin = 0; |
749 | dst_clip.xmax = winrc.right-winrc.left; |
||
3039 | serge | 750 | dst_clip.ymax = winrc.bottom -winrc.top; |
751 | |||
2338 | Serge | 752 | |
2342 | Serge | 753 | src_clip.ymin = 0; |
754 | src_clip.xmax = bitmap->width - 1; |
||
755 | src_clip.ymax = bitmap->height - 1; |
||
756 | |||
2338 | Serge | 757 | |
2342 | Serge | 758 | height = h; |
759 | |||
2338 | Serge | 760 | |
2342 | Serge | 761 | &src_clip, &src_x, &src_y, |
762 | &width, &height) ) |
||
763 | return 0; |
||
764 | |||
2340 | Serge | 765 | |
2342 | Serge | 766 | dst_y+= winrc.top; |
767 | |||
2340 | Serge | 768 | |
2342 | Serge | 769 | |
2340 | Serge | 770 | |
2342 | Serge | 771 | |
2340 | Serge | 772 | |
2342 | Serge | 773 | #if 0 |
774 | static v4si write_mask = {0xFF000000, 0xFF000000, |
||
775 | 0xFF000000, 0xFF000000}; |
||
776 | |||
2340 | Serge | 777 | |
2342 | Serge | 778 | u8* dst_offset; |
779 | |||
2340 | Serge | 780 | |
2342 | Serge | 781 | src_offset += (u32)bitmap->uaddr; |
782 | |||
2340 | Serge | 783 | |
2342 | Serge | 784 | dst_offset+= get_display_map(); |
785 | |||
2340 | Serge | 786 | |
2342 | Serge | 787 | |
2340 | Serge | 788 | |
2342 | Serge | 789 | "movdqa %[write_mask], %%xmm7 \n" |
790 | "movd %[slot_mask], %%xmm6 \n" |
||
791 | "punpckldq %%xmm6, %%xmm6 \n" |
||
792 | "punpcklqdq %%xmm6, %%xmm6 \n" |
||
793 | :: [write_mask] "m" (write_mask), |
||
794 | [slot_mask] "g" (slot_mask) |
||
795 | :"xmm7", "xmm6"); |
||
796 | |||
2340 | Serge | 797 | |
2342 | Serge | 798 | { |
799 | u32_t tmp_w = width; |
||
800 | |||
2340 | Serge | 801 | |
2342 | Serge | 802 | u8* tmp_dst = dst_offset; |
803 | |||
2340 | Serge | 804 | |
2342 | Serge | 805 | dst_offset+= os_display->width; |
806 | |||
2340 | Serge | 807 | |
2342 | Serge | 808 | { |
809 | __asm__ __volatile__ ( |
||
810 | "movq (%0), %%xmm0 \n" |
||
811 | "punpcklbw %%xmm0, %%xmm0 \n" |
||
812 | "movdqa %%xmm0, %%xmm1 \n" |
||
813 | "punpcklwd %%xmm0, %%xmm0 \n" |
||
814 | "punpckhwd %%xmm1, %%xmm1 \n" |
||
815 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
816 | "pcmpeqb %%xmm6, %%xmm1 \n" |
||
817 | "maskmovdqu %%xmm7, %%xmm0 \n" |
||
818 | "addl $16, %%edi \n" |
||
819 | "maskmovdqu %%xmm7, %%xmm1 \n" |
||
820 | :: "r" (tmp_dst), "D" (tmp_src) |
||
821 | :"xmm0", "xmm1"); |
||
822 | __asm__ __volatile__ ("":::"edi"); |
||
823 | tmp_w -= 8; |
||
824 | tmp_src += 32; |
||
825 | tmp_dst += 8; |
||
826 | }; |
||
827 | |||
2340 | Serge | 828 | |
2342 | Serge | 829 | { |
830 | __asm__ __volatile__ ( |
||
831 | "movd (%0), %%xmm0 \n" |
||
832 | "punpcklbw %%xmm0, %%xmm0 \n" |
||
833 | "punpcklwd %%xmm0, %%xmm0 \n" |
||
834 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
835 | "maskmovdqu %%xmm7, %%xmm0 \n" |
||
836 | :: "r" (tmp_dst), "D" (tmp_src) |
||
837 | :"xmm0"); |
||
838 | tmp_w -= 4; |
||
839 | tmp_src += 16; |
||
840 | tmp_dst += 4; |
||
841 | }; |
||
842 | |||
2340 | Serge | 843 | |
2342 | Serge | 844 | { |
845 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
||
846 | tmp_src+=4; |
||
847 | tmp_dst++; |
||
848 | }; |
||
849 | }; |
||
850 | #else |
||
851 | u8* src_offset; |
||
852 | u8* dst_offset; |
||
853 | u32 ifl; |
||
2351 | Serge | 854 | |
2340 | Serge | 855 | |
2342 | Serge | 856 | src_offset += (u32)bitmap->uaddr; |
857 | |||
2340 | Serge | 858 | |
2342 | Serge | 859 | dst_offset+= get_display_map(); |
860 | |||
861 | |||
862 | |||
863 | |||
2351 | Serge | 864 | while( tmp_h--) |
2342 | Serge | 865 | { |
866 | u32_t tmp_w = width; |
||
867 | |||
868 | |||
869 | u8* tmp_dst = dst_offset; |
||
870 | |||
871 | |||
872 | dst_offset+= os_display->width; |
||
873 | |||
874 | |||
875 | { |
||
876 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
||
877 | tmp_src+=4; |
||
878 | tmp_dst++; |
||
879 | }; |
||
880 | }; |
||
881 | safe_sti(ifl); |
||
2351 | Serge | 882 | } |
2342 | Serge | 883 | #endif |
884 | |||
885 | |||
3120 | serge | 886 | static warn_count; |
887 | |||
888 | |||
889 | { |
||
890 | printf("blit width %d height %d\n", |
||
891 | width, height); |
||
892 | warn_count++; |
||
893 | }; |
||
894 | }; |
||
895 | |||
896 | |||
897 | |||
3033 | serge | 898 | context->cmd_buffer&= 0xFFFFF000; |
899 | |||
2342 | Serge | 900 | |
3033 | serge | 901 | |
2342 | Serge | 902 | |
3033 | serge | 903 | |
2342 | Serge | 904 | |
905 | cmd |= 3 << 17; |
||
906 | |||
907 | |||
2340 | Serge | 908 | br13|= ROP_COPY_SRC << 16; |
2342 | Serge | 909 | br13|= FORMAT8888 << 24; |
910 | |||
2340 | Serge | 911 | |
912 | b[n++] = br13; |
||
913 | b[n++] = (dst_y << 16) | dst_x; // left, top |
||
2342 | Serge | 914 | b[n++] = ((dst_y+height)<< 16)|(dst_x+width); // bottom, right |
3039 | serge | 915 | b[n++] = 0; // destination |
2342 | Serge | 916 | b[n++] = (src_y << 16) | src_x; // source left & top |
917 | b[n++] = bitmap->pitch; // source pitch |
||
918 | b[n++] = bitmap->gaddr; // source |
||
919 | |||
2340 | Serge | 920 | |
2342 | Serge | 921 | b[n++] = 0x00FFFFFF; // Transparency Color High |
922 | |||
2340 | Serge | 923 | |
924 | if( n & 1) |
||
925 | b[n++] = MI_NOOP; |
||
926 | |||
927 | |||
3033 | serge | 928 | |
2340 | Serge | 929 | |
3037 | serge | 930 | |
3033 | serge | 931 | |
3037 | serge | 932 | |
933 | |||
934 | |||
935 | |||
936 | |||
2342 | Serge | 937 | { |
2351 | Serge | 938 | u32 seqno; |
3037 | serge | 939 | int i; |
940 | |||
2351 | Serge | 941 | |
2342 | Serge | 942 | // printf("dispatch... "); |
3033 | serge | 943 | |
3037 | serge | 944 | |
945 | intel_ring_invalidate_all_caches(ring); |
||
946 | |||
947 | |||
948 | // printf("seqno = %d\n", seqno); |
||
949 | |||
950 | |||
951 | if (seqno < ring->sync_seqno[i]) { |
||
952 | /* The GPU can not handle its semaphore value wrapping, |
||
953 | * so every billion or so execbuffers, we need to stall |
||
954 | * the GPU in order to reset the counters. |
||
955 | */ |
||
956 | DRM_DEBUG("wrap seqno\n"); |
||
957 | |||
958 | |||
959 | if (ret) |
||
960 | goto fail; |
||
961 | i915_gem_retire_requests(main_device); |
||
962 | |||
963 | |||
964 | } |
||
965 | } |
||
966 | |||
967 | |||
968 | if (ret) |
||
969 | goto fail; |
||
970 | // printf("done\n"); |
||
3033 | serge | 971 | |
2351 | Serge | 972 | |
3037 | serge | 973 | bitmap->obj->base.write_domain = bitmap->obj->base.pending_write_domain; |
974 | bitmap->obj->fenced_gpu_access = bitmap->obj->pending_fenced_gpu_access; |
||
975 | |||
976 | |||
977 | |||
978 | |||
979 | // printf("retire\n"); |
||
3033 | serge | 980 | } |
2351 | Serge | 981 | else |
2342 | Serge | 982 | { |
2351 | Serge | 983 | ring = &dev_priv->ring[RCS]; |
2342 | Serge | 984 | ring->dispatch_execbuffer(ring, offset, n*4); |
3033 | serge | 985 | ring->flush(ring, 0, I915_GEM_DOMAIN_RENDER); |
2351 | Serge | 986 | }; |
987 | |||
2342 | Serge | 988 | |
3037 | serge | 989 | // bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU; |
990 | |||
2340 | Serge | 991 | |
3037 | serge | 992 | fail: |
2351 | Serge | 993 | return ret; |
3037 | serge | 994 | }; |
2351 | Serge | 995 | |
2340 | Serge | 996 | |
2344 | Serge | 997 | |
3033 | serge | 998 | |
999 | |||
1000 | /* For display hotplug interrupt */ |
||
2351 | Serge | 1001 | static void |
1002 | ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) |
||
1003 | { |
||
1004 | if ((dev_priv->irq_mask & mask) != 0) { |
||
1005 | dev_priv->irq_mask &= ~mask; |
||
1006 | I915_WRITE(DEIMR, dev_priv->irq_mask); |
||
1007 | POSTING_READ(DEIMR); |
||
1008 | } |
||
1009 | } |
||
1010 | |||
2340 | Serge | 1011 | |
2351 | Serge | 1012 | { |
1013 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
||
1014 | unsigned long irqflags; |
||
1015 | |||
1016 | |||
1017 | // return -EINVAL; |
||
1018 | |||
1019 | |||
1020 | ironlake_enable_display_irq(dev_priv, (pipe == 0) ? |
||
1021 | DE_PIPEA_VBLANK : DE_PIPEB_VBLANK); |
||
1022 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); |
||
1023 | |||
1024 | |||
2340 | Serge | 1025 | } |
2351 | Serge | 1026 | |
1027 | |||
1028 | |||
1029 | |||
1030 | { |
||
1031 | drm_i915_private_t *dev_priv = dev->dev_private; |
||
1032 | int ret, i, pipe; |
||
1033 | |||
1034 | |||
1035 | dbgprintf("Interrupt enable: %08x\n", |
||
1036 | I915_READ(IER)); |
||
1037 | dbgprintf("Interrupt identity: %08x\n", |
||
1038 | I915_READ(IIR)); |
||
1039 | dbgprintf("Interrupt mask: %08x\n", |
||
1040 | I915_READ(IMR)); |
||
1041 | for_each_pipe(pipe) |
||
1042 | dbgprintf("Pipe %c stat: %08x\n", |
||
1043 | pipe_name(pipe), |
||
1044 | I915_READ(PIPESTAT(pipe))); |
||
1045 | } else { |
||
1046 | dbgprintf("North Display Interrupt enable: %08x\n", |
||
1047 | I915_READ(DEIER)); |
||
1048 | dbgprintf("North Display Interrupt identity: %08x\n", |
||
1049 | I915_READ(DEIIR)); |
||
1050 | dbgprintf("North Display Interrupt mask: %08x\n", |
||
1051 | I915_READ(DEIMR)); |
||
1052 | dbgprintf("South Display Interrupt enable: %08x\n", |
||
1053 | I915_READ(SDEIER)); |
||
1054 | dbgprintf("South Display Interrupt identity: %08x\n", |
||
1055 | I915_READ(SDEIIR)); |
||
1056 | dbgprintf("South Display Interrupt mask: %08x\n", |
||
1057 | I915_READ(SDEIMR)); |
||
1058 | dbgprintf("Graphics Interrupt enable: %08x\n", |
||
1059 | I915_READ(GTIER)); |
||
1060 | dbgprintf("Graphics Interrupt identity: %08x\n", |
||
1061 | I915_READ(GTIIR)); |
||
1062 | dbgprintf("Graphics Interrupt mask: %08x\n", |
||
1063 | I915_READ(GTIMR)); |
||
1064 | } |
||
1065 | dbgprintf("Interrupts received: %d\n", |
||
1066 | atomic_read(&dev_priv->irq_received)); |
||
1067 | for (i = 0; i < I915_NUM_RINGS; i++) { |
||
1068 | if (IS_GEN6(dev) || IS_GEN7(dev)) { |
||
1069 | printf("Graphics Interrupt mask (%s): %08x\n", |
||
1070 | dev_priv->ring[i].name, |
||
1071 | I915_READ_IMR(&dev_priv->ring[i])); |
||
1072 | } |
||
1073 | // i915_ring_seqno_info(m, &dev_priv->ring[i]); |
||
1074 | } |
||
1075 | |||
1076 | |||
1077 | } |
||
1078 | |||
1079 | |||
1080 | int size) |
||
1081 | { |
||
1082 | struct intel_ring_buffer *ring; |
||
1083 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
1084 | u32 invalidate; |
||
1085 | u32 seqno = 2; |
||
1086 | |||
1087 | |||
1088 | // dbgprintf("execute %x size %d\n", offset, size); |
||
1089 | |||
1090 | |||
1091 | // "mfence \n" |
||
1092 | // "wbinvd \n" |
||
1093 | // "mfence \n" |
||
1094 | // :::"memory"); |
||
1095 | |||
1096 | |||
1097 | ring->dispatch_execbuffer(ring, offset, size); |
||
1098 | |||
1099 | |||
1100 | if (INTEL_INFO(main_device)->gen >= 4) |
||
1101 | invalidate |= I915_GEM_DOMAIN_SAMPLER; |
||
1102 | if (ring->flush(ring, invalidate, 0)) |
||
1103 | i915_gem_next_request_seqno(ring); |
||
1104 | |||
1105 | |||
1106 | |||
1107 | |||
1108 | |||
1109 | |||
1110 | |||
1111 | |||
2340 | Serge | 1112 | |
2351 | Serge | 1113 | |
1114 | |||
1115 | int src_x, int src_y, u32 w, u32 h) |
||
1116 | { |
||
1117 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
1118 | |||
1119 | |||
1120 | bitmap_t screen; |
||
1121 | |||
1122 | |||
1123 | |||
1124 | |||
1125 | // hbitmap, dst_x, dst_y, src_x, src_y, w, h); |
||
1126 | |||
1127 | |||
1128 | return -1; |
||
1129 | |||
1130 | |||
1131 | // dbgprintf("bitmap %x\n", src_bitmap); |
||
1132 | |||
1133 | |||
1134 | return -1; |
||
1135 | |||
1136 | |||
1137 | |||
1138 | |||
1139 | screen.gaddr = 0; |
||
1140 | screen.width = os_display->width; |
||
1141 | screen.height = os_display->height; |
||
1142 | screen.obj = (void*)-1; |
||
1143 | |||
1144 | |||
1145 | |||
1146 | |||
1147 | dst_y+= winrc.top; |
||
1148 | |||
1149 | |||
1150 | |||
1151 | |||
1152 | |||
1153 | |||
2361 | Serge | 1154 | int w, int h, bitmap_t *src_bitmap, int src_x, int src_y, |
1155 | bitmap_t *mask_bitmap); |
||
1156 | |||
2360 | Serge | 1157 | |
2361 | Serge | 1158 | |
1159 | int src_x, int src_y, u32 w, u32 h) |
||
1160 | { |
||
1161 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
1162 | struct context *ctx; |
||
1163 | |||
1164 | |||
1165 | bitmap_t screen; |
||
1166 | int ret; |
||
1167 | |||
1168 | |||
1169 | rect_t winrc; |
||
1170 | |||
1171 | |||
1172 | // hbitmap, dst_x, dst_y, src_x, src_y, w, h); |
||
1173 | |||
1174 | |||
1175 | return -1; |
||
1176 | |||
1177 | |||
1178 | // dbgprintf("bitmap %x\n", src_bitmap); |
||
1179 | |||
1180 | |||
1181 | return -1; |
||
1182 | |||
1183 | |||
1184 | if(unlikely(ctx==NULL)) |
||
1185 | { |
||
1186 | ret = create_context(); |
||
1187 | if(ret!=0) |
||
1188 | return -1; |
||
1189 | |||
1190 | |||
1191 | }; |
||
1192 | |||
1193 | |||
1194 | |||
1195 | |||
1196 | dst_x+= winrc.left; |
||
1197 | dst_y+= winrc.top; |
||
1198 | |||
1199 | |||
1200 | |||
1201 | { |
||
1202 | u8* src_offset; |
||
1203 | u8* dst_offset; |
||
1204 | u32 slot; |
||
3031 | serge | 1205 | u32 ifl; |
2361 | Serge | 1206 | |
1207 | |||
1208 | if(ret !=0 ) |
||
1209 | { |
||
1210 | dbgprintf("%s fail\n", __FUNCTION__); |
||
1211 | return ret; |
||
1212 | }; |
||
1213 | |||
1214 | |||
3031 | serge | 1215 | |
2361 | Serge | 1216 | |
1217 | mask_bitmap->height = winrc.bottom; |
||
1218 | mask_bitmap->pitch = ALIGN(w,64); |
||
1219 | |||
1220 | |||
3031 | serge | 1221 | // slot = 0x01; |
1222 | |||
1223 | |||
2361 | Serge | 1224 | |
1225 | |||
1226 | |||
1227 | "movd %[slot], %%xmm6 \n" |
||
1228 | "punpckldq %%xmm6, %%xmm6 \n" |
||
1229 | "punpcklqdq %%xmm6, %%xmm6 \n" |
||
1230 | :: [slot] "m" (slot) |
||
3031 | serge | 1231 | :"xmm6"); |
2361 | Serge | 1232 | |
1233 | |||
1234 | |||
1235 | |||
1236 | dst_offset+= get_display_map(); |
||
1237 | |||
1238 | |||
1239 | |||
1240 | |||
1241 | while( tmp_h--) |
||
1242 | { |
||
1243 | int tmp_w = mask_bitmap->width; |
||
1244 | |||
1245 | |||
1246 | u8* tmp_dst = dst_offset; |
||
1247 | |||
1248 | |||
1249 | dst_offset+= os_display->width; |
||
1250 | |||
1251 | |||
1252 | // { |
||
1253 | // *(tmp_src) = (*tmp_dst==slot)?0x1:0x00; |
||
1254 | // tmp_src++; |
||
1255 | // tmp_dst++; |
||
1256 | // }; |
||
1257 | while(tmp_w >= 64) |
||
1258 | { |
||
1259 | __asm__ __volatile__ ( |
||
1260 | "movdqu (%0), %%xmm0 \n" |
||
1261 | "movdqu 16(%0), %%xmm1 \n" |
||
1262 | "movdqu 32(%0), %%xmm2 \n" |
||
1263 | "movdqu 48(%0), %%xmm3 \n" |
||
1264 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
1265 | "pcmpeqb %%xmm6, %%xmm1 \n" |
||
1266 | "pcmpeqb %%xmm6, %%xmm2 \n" |
||
1267 | "pcmpeqb %%xmm6, %%xmm3 \n" |
||
1268 | "movdqa %%xmm0, (%%edi) \n" |
||
1269 | "movdqa %%xmm1, 16(%%edi) \n" |
||
1270 | "movdqa %%xmm2, 32(%%edi) \n" |
||
1271 | "movdqa %%xmm3, 48(%%edi) \n" |
||
1272 | |||
1273 | |||
1274 | :"xmm0","xmm1","xmm2","xmm3"); |
||
1275 | tmp_w -= 64; |
||
1276 | tmp_src += 64; |
||
1277 | tmp_dst += 64; |
||
1278 | } |
||
1279 | |||
1280 | |||
1281 | { |
||
1282 | __asm__ __volatile__ ( |
||
1283 | "movdqu (%0), %%xmm0 \n" |
||
1284 | "movdqu 16(%0), %%xmm1 \n" |
||
1285 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
1286 | "pcmpeqb %%xmm6, %%xmm1 \n" |
||
1287 | "movdqa %%xmm0, (%%edi) \n" |
||
1288 | "movdqa %%xmm1, 16(%%edi) \n" |
||
1289 | |||
1290 | |||
1291 | :"xmm0","xmm1"); |
||
1292 | tmp_w -= 32; |
||
1293 | tmp_src += 32; |
||
1294 | tmp_dst += 32; |
||
1295 | } |
||
1296 | |||
1297 | |||
1298 | { |
||
1299 | __asm__ __volatile__ ( |
||
1300 | "movdqu (%0), %%xmm0 \n" |
||
1301 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
1302 | "movdqa %%xmm0, (%%edi) \n" |
||
1303 | :: "r" (tmp_dst), "D" (tmp_src) |
||
1304 | :"xmm0"); |
||
1305 | tmp_w -= 16; |
||
1306 | tmp_src += 16; |
||
1307 | tmp_dst += 16; |
||
1308 | } |
||
1309 | }; |
||
1310 | safe_sti(ifl); |
||
1311 | ctx->seqno = os_display->mask_seqno; |
||
1312 | } |
||
1313 | |||
1314 | |||
1315 | screen.gaddr = 0; |
||
1316 | screen.width = os_display->width; |
||
1317 | screen.height = os_display->height; |
||
1318 | screen.obj = (void*)-1; |
||
1319 | |||
1320 | |||
1321 | |||
1322 | |||
1323 | |||
1324 | mask_bitmap); |
||
1325 | |||
1326 | |||
1327 | }; |
||
1328 | |||
1329 | |||
1330 | |||
3031 | serge | 1331 | |
2361 | Serge | 1332 | |
1333 | |||
3243 | Serge | 1334 | |
2361 | Serge | 1335 | |
1336 | |||
1337 | |||
1338 | |||
1339 | |||
2360 | Serge | 1340 | { |
1341 | unsigned long irqflags; |
||
1342 | |||
1343 | |||
3266 | Serge | 1344 | // cwq, &cwq->worklist, cwq->worklist.next); |
1345 | |||
2360 | Serge | 1346 | |
1347 | |||
1348 | |||
1349 | { |
||
1350 | struct work_struct *work = list_entry(cwq->worklist.next, |
||
1351 | struct work_struct, entry); |
||
1352 | work_func_t f = work->func; |
||
1353 | list_del_init(cwq->worklist.next); |
||
1354 | // dbgprintf("head %x, next %x\n", |
||
3266 | Serge | 1355 | // &cwq->worklist, cwq->worklist.next); |
1356 | |||
2360 | Serge | 1357 | |
1358 | f(work); |
||
1359 | spin_lock_irqsave(&cwq->lock, irqflags); |
||
1360 | } |
||
1361 | |||
1362 | |||
1363 | } |
||
1364 | |||
1365 | |||
1366 | |||
1367 | int __queue_work(struct workqueue_struct *wq, |
||
1368 | struct work_struct *work) |
||
1369 | { |
||
1370 | unsigned long flags; |
||
1371 | |||
1372 | |||
3266 | Serge | 1373 | // wq, work ); |
1374 | |||
2360 | Serge | 1375 | |
1376 | return 0; |
||
1377 | |||
1378 | |||
1379 | |||
1380 | |||
1381 | TimerHs(0,0, run_workqueue, wq); |
||
1382 | |||
1383 | |||
1384 | |||
1385 | |||
1386 | // dbgprintf("wq: %x head %x, next %x\n", |
||
3266 | Serge | 1387 | // wq, &wq->worklist, wq->worklist.next); |
1388 | |||
2360 | Serge | 1389 | |
1390 | }; |
||
1391 | |||
1392 | |||
1393 | { |
||
1394 | struct delayed_work *dwork = (struct delayed_work *)__data; |
||
1395 | struct workqueue_struct *wq = dwork->work.data; |
||
1396 | |||
1397 | |||
3266 | Serge | 1398 | // wq, &dwork->work ); |
1399 | |||
2360 | Serge | 1400 | |
1401 | } |
||
1402 | |||
1403 | |||
1404 | |||
1405 | struct delayed_work *dwork, unsigned long delay) |
||
1406 | { |
||
1407 | struct work_struct *work = &dwork->work; |
||
1408 | |||
1409 | |||
1410 | TimerHs(0,0, delayed_work_timer_fn, dwork); |
||
1411 | return 1; |
||
1412 | } |
||
1413 | |||
1414 | |||
1415 | struct delayed_work *dwork, unsigned long delay) |
||
1416 | { |
||
1417 | u32 flags; |
||
1418 | |||
1419 | |||
3266 | Serge | 1420 | // wq, &dwork->work ); |
1421 | |||
2360 | Serge | 1422 | |
1423 | return __queue_work(wq, &dwork->work); |
||
1424 | |||
1425 | |||
1426 | } |
||
1427 | |||
1428 | |||
1429 | |||
1430 | unsigned int flags, |
||
1431 | int max_active) |
||
1432 | { |
||
1433 | struct workqueue_struct *wq; |
||
1434 | |||
1435 | |||
1436 | if (!wq) |
||
1437 | goto err; |
||
1438 | |||
1439 | |||
1440 | |||
1441 | |||
1442 | err: |
||
1443 | return NULL; |
||
1444 | } |
||
1445 | |||
1446 | |||
3031 | serge | 1447 | |
2360 | Serge | 1448 | |
3031 | serge | 1449 | { |
1450 | u32 tmp = GetTimerTicks(); |
||
1451 | |||
2360 | Serge | 1452 | |
3031 | serge | 1453 | ts->tv_nsec = (tmp - ts->tv_sec*100)*10000000; |
1454 | } |
||
1455 | |||
2360 | Serge | 1456 | |
3031 | serge | 1457 | { |
1458 | while (nsec >= NSEC_PER_SEC) { |
||
1459 | nsec -= NSEC_PER_SEC; |
||
1460 | ++sec; |
||
1461 | } |
||
1462 | while (nsec < 0) { |
||
1463 | nsec += NSEC_PER_SEC; |
||
1464 | --sec; |
||
1465 | } |
||
1466 | ts->tv_sec = sec; |
||
1467 | ts->tv_nsec = nsec; |
||
1468 | }>24); |
||
1469 | |||
2360 | Serge | 1470 | |
3031 | serge | 1471 | |
1472 |