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Rev | Author | Line No. | Line |
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2340 | Serge | 1 | |
2 | |||
3 | |||
2338 | Serge | 4 | #include "drm.h" |
5 | #include "i915_drm.h" |
||
6 | #include "i915_drv.h" |
||
7 | #include "intel_drv.h" |
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8 | |||
9 | |||
10 | #include |
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11 | #include |
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12 | #include |
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13 | #include |
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14 | |||
15 | |||
16 | |||
17 | |||
2340 | Serge | 18 | |
2338 | Serge | 19 | |
2351 | Serge | 20 | |
2338 | Serge | 21 | |
2351 | Serge | 22 | |
2338 | Serge | 23 | { |
24 | kobj_t header; |
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25 | |||
26 | |||
27 | uint32_t hot_x; |
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28 | uint32_t hot_y; |
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29 | |||
30 | |||
31 | struct drm_i915_gem_object *cobj; |
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32 | }cursor_t; |
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33 | |||
34 | |||
35 | #define CURSOR_HEIGHT 64 |
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36 | |||
37 | |||
38 | |||
39 | { |
||
40 | int x; |
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41 | int y; |
||
42 | int width; |
||
43 | int height; |
||
44 | int bpp; |
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45 | int vrefresh; |
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46 | int pitch; |
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47 | int lfb; |
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48 | |||
49 | |||
50 | struct drm_device *ddev; |
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51 | struct drm_connector *connector; |
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52 | struct drm_crtc *crtc; |
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53 | |||
54 | |||
55 | |||
56 | |||
57 | int (*init_cursor)(cursor_t*); |
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58 | cursor_t* (__stdcall *select_cursor)(cursor_t*); |
||
59 | void (*show_cursor)(int show); |
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60 | void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y); |
||
61 | void (__stdcall *restore_cursor)(int x, int y); |
||
62 | void (*disable_mouse)(void); |
||
63 | u32 mask_seqno; |
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2361 | Serge | 64 | }; |
2338 | Serge | 65 | |
66 | |||
67 | |||
68 | |||
69 | |||
2340 | Serge | 70 | u32_t cmd_offset; |
71 | |||
72 | |||
2351 | Serge | 73 | int sna_init(); |
74 | |||
75 | |||
2338 | Serge | 76 | static cursor_t* __stdcall select_cursor_kms(cursor_t *cursor); |
77 | static void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y); |
||
78 | |||
79 | |||
80 | {}; |
||
81 | |||
82 | |||
83 | {}; |
||
84 | |||
85 | |||
86 | { |
||
87 | struct drm_display_mode *mode; |
||
88 | int count = 0; |
||
89 | |||
90 | |||
91 | { |
||
92 | count++; |
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93 | }; |
||
94 | return count; |
||
95 | }; |
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96 | |||
97 | |||
98 | { |
||
99 | struct drm_connector *connector; |
||
100 | struct drm_connector_helper_funcs *connector_funcs; |
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101 | struct drm_encoder *encoder; |
||
102 | struct drm_crtc *crtc = NULL; |
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103 | struct drm_framebuffer *fb; |
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104 | |||
105 | |||
106 | u32_t ifl; |
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107 | |||
108 | |||
109 | |||
110 | |||
111 | { |
||
112 | if( connector->status != connector_status_connected) |
||
113 | continue; |
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114 | |||
115 | |||
116 | encoder = connector_funcs->best_encoder(connector); |
||
117 | if( encoder == NULL) |
||
118 | { |
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119 | dbgprintf("CONNECTOR %x ID: %d no active encoders\n", |
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120 | connector, connector->base.id); |
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121 | continue; |
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122 | } |
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123 | connector->encoder = encoder; |
||
124 | |||
125 | |||
126 | connector, connector->base.id, |
||
127 | connector->status, connector->encoder, |
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128 | encoder->crtc); |
||
129 | |||
130 | |||
131 | break; |
||
132 | }; |
||
133 | |||
134 | |||
135 | { |
||
136 | dbgprintf("No active connectors!\n"); |
||
137 | return -1; |
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138 | }; |
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139 | |||
140 | |||
141 | { |
||
142 | struct drm_crtc *tmp_crtc; |
||
143 | int crtc_mask = 1; |
||
144 | |||
145 | |||
146 | { |
||
147 | if (encoder->possible_crtcs & crtc_mask) |
||
148 | { |
||
149 | crtc = tmp_crtc; |
||
150 | encoder->crtc = crtc; |
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151 | break; |
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152 | }; |
||
153 | crtc_mask <<= 1; |
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154 | }; |
||
155 | }; |
||
156 | |||
157 | |||
158 | { |
||
159 | dbgprintf("No CRTC for encoder %d\n", encoder->base.id); |
||
160 | return -1; |
||
161 | }; |
||
162 | |||
163 | |||
164 | |||
165 | |||
166 | |||
167 | |||
168 | |||
169 | os_display->connector = connector; |
||
170 | os_display->crtc = crtc; |
||
171 | |||
172 | |||
173 | |||
174 | |||
175 | |||
176 | { |
||
177 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
||
178 | |||
179 | |||
180 | { |
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181 | init_cursor(cursor); |
||
182 | }; |
||
183 | |||
184 | |||
185 | os_display->init_cursor = init_cursor; |
||
186 | os_display->select_cursor = select_cursor_kms; |
||
187 | os_display->show_cursor = NULL; |
||
188 | os_display->move_cursor = move_cursor_kms; |
||
189 | os_display->restore_cursor = restore_cursor; |
||
190 | os_display->disable_mouse = disable_mouse; |
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191 | |||
192 | |||
193 | intel_crtc->cursor_y = os_display->height/2; |
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194 | |||
195 | |||
196 | }; |
||
197 | safe_sti(ifl); |
||
198 | |||
199 | |||
2340 | Serge | 200 | #define BLT_WRITE_ALPHA (1<<21) |
201 | #define BLT_WRITE_RGB (1<<20) |
||
202 | |||
2338 | Serge | 203 | |
2342 | Serge | 204 | { |
205 | |||
206 | |||
2340 | Serge | 207 | struct drm_i915_gem_object *obj; |
208 | struct intel_ring_buffer *ring; |
||
209 | |||
210 | |||
211 | i915_gem_object_pin(obj, 4096, true); |
||
212 | |||
213 | |||
2352 | Serge | 214 | cmd_offset = obj->gtt_offset; |
2340 | Serge | 215 | }; |
2342 | Serge | 216 | #endif |
217 | |||
2340 | Serge | 218 | |
2351 | Serge | 219 | |
220 | |||
2342 | Serge | 221 | |
2340 | Serge | 222 | |
2342 | Serge | 223 | if( !err ) |
224 | { |
||
225 | printf("Initialize bitmap manager\n"); |
||
226 | }; |
||
2340 | Serge | 227 | |
228 | |||
2351 | Serge | 229 | |
230 | |||
2338 | Serge | 231 | |
232 | |||
233 | }; |
||
234 | |||
235 | |||
236 | |||
237 | videomode_t *reqmode, bool strict) |
||
238 | { |
||
239 | struct drm_display_mode *mode = NULL, *tmpmode; |
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240 | drm_i915_private_t *dev_priv = dev->dev_private; |
||
241 | struct drm_fb_helper *fb_helper = &dev_priv->fbdev->helper; |
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242 | |||
243 | |||
244 | |||
245 | |||
246 | |||
247 | |||
248 | reqmode->width, reqmode->height, reqmode->freq); |
||
249 | |||
250 | |||
251 | { |
||
252 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
||
253 | (drm_mode_height(tmpmode) == reqmode->height) && |
||
254 | (drm_mode_vrefresh(tmpmode) == reqmode->freq) ) |
||
255 | { |
||
256 | mode = tmpmode; |
||
257 | goto do_set; |
||
258 | } |
||
259 | }; |
||
260 | |||
261 | |||
262 | { |
||
263 | list_for_each_entry(tmpmode, &connector->modes, head) |
||
264 | { |
||
265 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
||
266 | (drm_mode_height(tmpmode) == reqmode->height) ) |
||
267 | { |
||
268 | mode = tmpmode; |
||
269 | goto do_set; |
||
270 | } |
||
271 | }; |
||
272 | }; |
||
273 | |||
274 | |||
275 | |||
276 | |||
277 | { |
||
278 | struct drm_framebuffer *fb; |
||
279 | struct drm_encoder *encoder; |
||
280 | struct drm_crtc *crtc; |
||
281 | |||
282 | |||
283 | char *enc_name; |
||
284 | |||
285 | |||
286 | crtc = encoder->crtc; |
||
287 | |||
288 | |||
289 | enc_name = drm_get_encoder_name(encoder); |
||
290 | |||
291 | |||
292 | reqmode->width, reqmode->height, con_name, enc_name); |
||
293 | |||
294 | |||
295 | |||
296 | |||
297 | fb->height = reqmode->height; |
||
298 | fb->pitches[0] = ALIGN(reqmode->width * 4, 64); |
||
2342 | Serge | 299 | fb->pitches[1] = ALIGN(reqmode->width * 4, 64); |
300 | fb->pitches[2] = ALIGN(reqmode->width * 4, 64); |
||
301 | fb->pitches[3] = ALIGN(reqmode->width * 4, 64); |
||
302 | |||
303 | |||
2338 | Serge | 304 | fb->depth == 24; |
305 | |||
306 | |||
307 | crtc->enabled = true; |
||
308 | os_display->crtc = crtc; |
||
309 | |||
310 | |||
311 | |||
312 | |||
313 | // radeon_show_cursor_kms(crtc); |
||
314 | |||
315 | |||
316 | { |
||
317 | os_display->width = fb->width; |
||
318 | os_display->height = fb->height; |
||
319 | os_display->pitch = fb->pitches[0]; |
||
2342 | Serge | 320 | os_display->vrefresh = drm_mode_vrefresh(mode); |
2338 | Serge | 321 | |
322 | |||
2342 | Serge | 323 | |
2338 | Serge | 324 | |
325 | fb->width, fb->height, fb->pitches[0]); |
||
2342 | Serge | 326 | } |
2338 | Serge | 327 | else |
328 | DRM_ERROR("failed to set mode %d_%d on crtc %p\n", |
||
329 | fb->width, fb->height, crtc); |
||
330 | } |
||
331 | |||
332 | |||
333 | return ret; |
||
334 | }; |
||
335 | |||
336 | |||
337 | |||
338 | |||
339 | { |
||
340 | int err = -1; |
||
341 | |||
342 | |||
343 | |||
344 | |||
345 | |||
346 | |||
347 | { |
||
348 | *count = os_display->supported_modes; |
||
349 | err = 0; |
||
350 | } |
||
351 | else if( mode != NULL ) |
||
352 | { |
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353 | struct drm_display_mode *drmmode; |
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354 | int i = 0; |
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355 | |||
356 | |||
357 | *count = os_display->supported_modes; |
||
358 | |||
359 | |||
360 | { |
||
361 | if( i < *count) |
||
362 | { |
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363 | mode->width = drm_mode_width(drmmode); |
||
364 | mode->height = drm_mode_height(drmmode); |
||
365 | mode->bpp = 32; |
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366 | mode->freq = drm_mode_vrefresh(drmmode); |
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367 | i++; |
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368 | mode++; |
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369 | } |
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370 | else break; |
||
371 | }; |
||
372 | *count = i; |
||
373 | err = 0; |
||
374 | }; |
||
375 | LEAVE(); |
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376 | return err; |
||
377 | }; |
||
378 | |||
379 | |||
380 | { |
||
381 | int err = -1; |
||
382 | |||
383 | |||
384 | |||
385 | |||
386 | mode->width, mode->height, mode->freq); |
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387 | |||
388 | |||
389 | (mode->height != 0) && |
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390 | (mode->freq != 0 ) && |
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391 | ( (mode->width != os_display->width) || |
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392 | (mode->height != os_display->height) || |
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393 | (mode->freq != os_display->vrefresh) ) ) |
||
394 | { |
||
395 | if( set_mode(os_display->ddev, os_display->connector, mode, true) ) |
||
396 | err = 0; |
||
397 | }; |
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398 | |||
399 | |||
400 | return err; |
||
401 | }; |
||
402 | |||
403 | |||
404 | { |
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405 | /* FIXME synchronization */ |
||
2342 | Serge | 406 | |
407 | |||
2338 | Serge | 408 | // radeon_bo_unpin(cursor->robj); |
409 | // KernelFree(cursor->data); |
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410 | __DestroyObject(cursor); |
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411 | }; |
||
412 | |||
413 | |||
414 | { |
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415 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
||
416 | struct drm_i915_gem_object *obj; |
||
417 | uint32_t *bits; |
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418 | uint32_t *src; |
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419 | |||
420 | |||
421 | int ret; |
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422 | |||
423 | |||
424 | |||
425 | |||
426 | { |
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427 | bits = (uint32_t*)KernelAlloc(CURSOR_WIDTH*CURSOR_HEIGHT*4); |
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428 | if (unlikely(bits == NULL)) |
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429 | return ENOMEM; |
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430 | cursor->cobj = (struct drm_i915_gem_object *)GetPgAddr(bits); |
||
431 | } |
||
432 | else |
||
433 | { |
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434 | obj = i915_gem_alloc_object(os_display->ddev, CURSOR_WIDTH*CURSOR_HEIGHT*4); |
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435 | if (unlikely(obj == NULL)) |
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436 | return -ENOMEM; |
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437 | |||
438 | |||
439 | if (ret) { |
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440 | drm_gem_object_unreference(&obj->base); |
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2344 | Serge | 441 | return ret; |
2338 | Serge | 442 | } |
443 | |||
444 | |||
445 | * GTT space is continuous. I guarantee it. */ |
||
446 | |||
447 | |||
448 | CURSOR_WIDTH*CURSOR_HEIGHT*4, PG_SW); |
||
449 | |||
450 | |||
451 | { |
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452 | i915_gem_object_unpin(obj); |
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2344 | Serge | 453 | drm_gem_object_unreference(&obj->base); |
454 | return -ENOMEM; |
||
2338 | Serge | 455 | }; |
456 | cursor->cobj = obj; |
||
457 | }; |
||
458 | |||
459 | |||
460 | |||
461 | |||
462 | { |
||
463 | for(j = 0; j < 32; j++) |
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464 | *bits++ = *src++; |
||
465 | for(j = 32; j < CURSOR_WIDTH; j++) |
||
466 | *bits++ = 0; |
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467 | } |
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468 | for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++) |
||
469 | *bits++ = 0; |
||
470 | |||
471 | |||
472 | |||
473 | |||
2340 | Serge | 474 | |
2338 | Serge | 475 | |
476 | |||
477 | |||
478 | LEAVE(); |
||
479 | |||
480 | |||
481 | } |
||
482 | |||
483 | |||
484 | |||
485 | { |
||
486 | struct drm_device *dev = crtc->dev; |
||
487 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
488 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
||
489 | int pipe = intel_crtc->pipe; |
||
490 | bool visible = base != 0; |
||
491 | |||
492 | |||
493 | uint32_t cntl = I915_READ(CURCNTR(pipe)); |
||
494 | if (base) { |
||
495 | cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); |
||
496 | cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; |
||
497 | cntl |= pipe << 28; /* Connect to correct pipe */ |
||
498 | } else { |
||
499 | cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE); |
||
500 | cntl |= CURSOR_MODE_DISABLE; |
||
501 | } |
||
502 | I915_WRITE(CURCNTR(pipe), cntl); |
||
503 | |||
504 | |||
505 | } |
||
506 | /* and commit changes on next vblank */ |
||
507 | I915_WRITE(CURBASE(pipe), base); |
||
508 | } |
||
509 | |||
510 | |||
511 | { |
||
512 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
||
513 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
||
514 | u32 base, pos; |
||
515 | bool visible; |
||
516 | |||
517 | |||
518 | |||
519 | |||
520 | intel_crtc->cursor_y = y; |
||
521 | |||
522 | |||
523 | y = y - cursor->hot_y; |
||
524 | |||
525 | |||
526 | |||
527 | |||
528 | |||
529 | if (x >= os_display->width) |
||
530 | base = 0; |
||
531 | |||
532 | |||
533 | base = 0; |
||
534 | |||
535 | |||
536 | { |
||
537 | if (x + intel_crtc->cursor_width < 0) |
||
538 | base = 0; |
||
539 | |||
540 | |||
541 | x = -x; |
||
542 | } |
||
543 | pos |= x << CURSOR_X_SHIFT; |
||
544 | |||
545 | |||
546 | { |
||
547 | if (y + intel_crtc->cursor_height < 0) |
||
548 | base = 0; |
||
549 | |||
550 | |||
551 | y = -y; |
||
552 | } |
||
553 | pos |= y << CURSOR_Y_SHIFT; |
||
554 | |||
555 | |||
556 | if (!visible && !intel_crtc->cursor_visible) |
||
557 | return; |
||
558 | |||
559 | |||
560 | // if (IS_845G(dev) || IS_I865G(dev)) |
||
561 | // i845_update_cursor(crtc, base); |
||
562 | // else |
||
563 | i9xx_update_cursor(os_display->crtc, base); |
||
564 | |||
565 | |||
566 | |||
567 | |||
568 | |||
569 | { |
||
570 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
||
571 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
||
572 | cursor_t *old; |
||
573 | |||
574 | |||
575 | os_display->cursor = cursor; |
||
576 | |||
577 | |||
578 | intel_crtc->cursor_addr = cursor->cobj->gtt_offset; |
||
579 | else |
||
580 | intel_crtc->cursor_addr = (addr_t)cursor->cobj; |
||
2352 | Serge | 581 | |
2338 | Serge | 582 | |
583 | intel_crtc->cursor_height = 32; |
||
584 | |||
585 | |||
586 | return old; |
||
587 | }; |
||
588 | |||
589 | |||
2340 | Serge | 590 | |
591 | |||
592 | |||
2342 | Serge | 593 | |
594 | { |
||
2338 | Serge | 595 | int left; |
2342 | Serge | 596 | int top; |
597 | int right; |
||
598 | int bottom; |
||
599 | }rect_t; |
||
600 | |||
2338 | Serge | 601 | |
2342 | Serge | 602 | |
603 | |||
604 | |||
605 | |||
606 | |||
607 | |||
608 | |||
609 | { |
||
610 | u32_t addr; |
||
611 | |||
612 | |||
613 | addr+= sizeof(display_t); /* shoot me */ |
||
614 | return *(u32_t*)addr; |
||
615 | } |
||
616 | |||
617 | |||
618 | #define ROP_COPY_SRC 0xCC |
||
619 | #define FORMAT8888 3 |
||
620 | |||
621 | |||
622 | |||
623 | |||
624 | |||
625 | int src_x, int src_y, u32 w, u32 h) |
||
626 | { |
||
627 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
2340 | Serge | 628 | struct intel_ring_buffer *ring; |
629 | |||
2338 | Serge | 630 | |
2342 | Serge | 631 | rect_t winrc; |
632 | clip_t dst_clip; |
||
633 | clip_t src_clip; |
||
634 | u32_t width; |
||
635 | u32_t height; |
||
636 | |||
2338 | Serge | 637 | |
2342 | Serge | 638 | u32_t offset; |
639 | u8 slot; |
||
640 | int n=0; |
||
2340 | Serge | 641 | |
2338 | Serge | 642 | |
2342 | Serge | 643 | return -1; |
644 | |||
2338 | Serge | 645 | |
2342 | Serge | 646 | |
2338 | Serge | 647 | |
2342 | Serge | 648 | return -1; |
649 | |||
2338 | Serge | 650 | |
651 | |||
2342 | Serge | 652 | |
2338 | Serge | 653 | |
2342 | Serge | 654 | dst_clip.ymin = 0; |
655 | dst_clip.xmax = winrc.right-winrc.left-1; |
||
656 | dst_clip.ymax = winrc.bottom -winrc.top -1; |
||
657 | |||
2338 | Serge | 658 | |
2342 | Serge | 659 | src_clip.ymin = 0; |
660 | src_clip.xmax = bitmap->width - 1; |
||
661 | src_clip.ymax = bitmap->height - 1; |
||
662 | |||
2338 | Serge | 663 | |
2342 | Serge | 664 | height = h; |
665 | |||
2338 | Serge | 666 | |
2342 | Serge | 667 | &src_clip, &src_x, &src_y, |
668 | &width, &height) ) |
||
669 | return 0; |
||
670 | |||
2340 | Serge | 671 | |
2342 | Serge | 672 | dst_y+= winrc.top; |
673 | |||
2340 | Serge | 674 | |
2342 | Serge | 675 | |
2340 | Serge | 676 | |
2342 | Serge | 677 | |
2340 | Serge | 678 | |
2342 | Serge | 679 | #if 0 |
680 | static v4si write_mask = {0xFF000000, 0xFF000000, |
||
681 | 0xFF000000, 0xFF000000}; |
||
682 | |||
2340 | Serge | 683 | |
2342 | Serge | 684 | u8* dst_offset; |
685 | |||
2340 | Serge | 686 | |
2342 | Serge | 687 | src_offset += (u32)bitmap->uaddr; |
688 | |||
2340 | Serge | 689 | |
2342 | Serge | 690 | dst_offset+= get_display_map(); |
691 | |||
2340 | Serge | 692 | |
2342 | Serge | 693 | |
2340 | Serge | 694 | |
2342 | Serge | 695 | "movdqa %[write_mask], %%xmm7 \n" |
696 | "movd %[slot_mask], %%xmm6 \n" |
||
697 | "punpckldq %%xmm6, %%xmm6 \n" |
||
698 | "punpcklqdq %%xmm6, %%xmm6 \n" |
||
699 | :: [write_mask] "m" (write_mask), |
||
700 | [slot_mask] "g" (slot_mask) |
||
701 | :"xmm7", "xmm6"); |
||
702 | |||
2340 | Serge | 703 | |
2342 | Serge | 704 | { |
705 | u32_t tmp_w = width; |
||
706 | |||
2340 | Serge | 707 | |
2342 | Serge | 708 | u8* tmp_dst = dst_offset; |
709 | |||
2340 | Serge | 710 | |
2342 | Serge | 711 | dst_offset+= os_display->width; |
712 | |||
2340 | Serge | 713 | |
2342 | Serge | 714 | { |
715 | __asm__ __volatile__ ( |
||
716 | "movq (%0), %%xmm0 \n" |
||
717 | "punpcklbw %%xmm0, %%xmm0 \n" |
||
718 | "movdqa %%xmm0, %%xmm1 \n" |
||
719 | "punpcklwd %%xmm0, %%xmm0 \n" |
||
720 | "punpckhwd %%xmm1, %%xmm1 \n" |
||
721 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
722 | "pcmpeqb %%xmm6, %%xmm1 \n" |
||
723 | "maskmovdqu %%xmm7, %%xmm0 \n" |
||
724 | "addl $16, %%edi \n" |
||
725 | "maskmovdqu %%xmm7, %%xmm1 \n" |
||
726 | :: "r" (tmp_dst), "D" (tmp_src) |
||
727 | :"xmm0", "xmm1"); |
||
728 | __asm__ __volatile__ ("":::"edi"); |
||
729 | tmp_w -= 8; |
||
730 | tmp_src += 32; |
||
731 | tmp_dst += 8; |
||
732 | }; |
||
733 | |||
2340 | Serge | 734 | |
2342 | Serge | 735 | { |
736 | __asm__ __volatile__ ( |
||
737 | "movd (%0), %%xmm0 \n" |
||
738 | "punpcklbw %%xmm0, %%xmm0 \n" |
||
739 | "punpcklwd %%xmm0, %%xmm0 \n" |
||
740 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
741 | "maskmovdqu %%xmm7, %%xmm0 \n" |
||
742 | :: "r" (tmp_dst), "D" (tmp_src) |
||
743 | :"xmm0"); |
||
744 | tmp_w -= 4; |
||
745 | tmp_src += 16; |
||
746 | tmp_dst += 4; |
||
747 | }; |
||
748 | |||
2340 | Serge | 749 | |
2342 | Serge | 750 | { |
751 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
||
752 | tmp_src+=4; |
||
753 | tmp_dst++; |
||
754 | }; |
||
755 | }; |
||
756 | #else |
||
757 | u8* src_offset; |
||
758 | u8* dst_offset; |
||
759 | u32 ifl; |
||
2351 | Serge | 760 | |
2340 | Serge | 761 | |
2342 | Serge | 762 | src_offset += (u32)bitmap->uaddr; |
763 | |||
2340 | Serge | 764 | |
2342 | Serge | 765 | dst_offset+= get_display_map(); |
766 | |||
767 | |||
768 | |||
769 | |||
2351 | Serge | 770 | while( tmp_h--) |
2342 | Serge | 771 | { |
772 | u32_t tmp_w = width; |
||
773 | |||
774 | |||
775 | u8* tmp_dst = dst_offset; |
||
776 | |||
777 | |||
778 | dst_offset+= os_display->width; |
||
779 | |||
780 | |||
781 | { |
||
782 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
||
783 | tmp_src+=4; |
||
784 | tmp_dst++; |
||
785 | }; |
||
786 | }; |
||
787 | safe_sti(ifl); |
||
2351 | Serge | 788 | } |
2342 | Serge | 789 | #endif |
790 | |||
791 | |||
792 | cmd_buffer&= 0xFFFFF000; |
||
793 | |||
794 | |||
795 | |||
796 | |||
797 | |||
798 | |||
799 | cmd |= 3 << 17; |
||
800 | |||
801 | |||
2340 | Serge | 802 | br13|= ROP_COPY_SRC << 16; |
2342 | Serge | 803 | br13|= FORMAT8888 << 24; |
804 | |||
2340 | Serge | 805 | |
806 | b[n++] = br13; |
||
807 | b[n++] = (dst_y << 16) | dst_x; // left, top |
||
2342 | Serge | 808 | b[n++] = ((dst_y+height-1)<< 16)|(dst_x+width-1); // bottom, right |
809 | b[n++] = 0; // destination |
||
810 | b[n++] = (src_y << 16) | src_x; // source left & top |
||
811 | b[n++] = bitmap->pitch; // source pitch |
||
812 | b[n++] = bitmap->gaddr; // source |
||
813 | |||
2340 | Serge | 814 | |
2342 | Serge | 815 | b[n++] = 0x00FFFFFF; // Transparency Color High |
816 | |||
2340 | Serge | 817 | |
818 | if( n & 1) |
||
819 | b[n++] = MI_NOOP; |
||
820 | |||
821 | |||
2344 | Serge | 822 | |
2340 | Serge | 823 | |
2342 | Serge | 824 | { |
2351 | Serge | 825 | int ret; |
826 | |||
827 | |||
2342 | Serge | 828 | ring->dispatch_execbuffer(ring, cmd_offset, n*4); |
2351 | Serge | 829 | |
830 | |||
831 | if (ret) |
||
832 | return ret; |
||
833 | |||
834 | |||
835 | intel_ring_emit(ring, 0); |
||
836 | intel_ring_emit(ring, 0); |
||
837 | intel_ring_emit(ring, MI_NOOP); |
||
838 | intel_ring_advance(ring); |
||
839 | } |
||
840 | else |
||
2342 | Serge | 841 | { |
2351 | Serge | 842 | ring = &dev_priv->ring[RCS]; |
2342 | Serge | 843 | ring->dispatch_execbuffer(ring, cmd_offset, n*4); |
2351 | Serge | 844 | ring->flush(ring, 0, I915_GEM_DOMAIN_RENDER); |
845 | }; |
||
846 | |||
2342 | Serge | 847 | |
2351 | Serge | 848 | bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU; |
849 | |||
2340 | Serge | 850 | |
2351 | Serge | 851 | fail: |
852 | return -1; |
||
853 | }; |
||
854 | |||
2340 | Serge | 855 | |
2344 | Serge | 856 | |
2351 | Serge | 857 | static void |
858 | ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) |
||
859 | { |
||
860 | if ((dev_priv->irq_mask & mask) != 0) { |
||
861 | dev_priv->irq_mask &= ~mask; |
||
862 | I915_WRITE(DEIMR, dev_priv->irq_mask); |
||
863 | POSTING_READ(DEIMR); |
||
864 | } |
||
865 | } |
||
866 | |||
2340 | Serge | 867 | |
2351 | Serge | 868 | { |
869 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
||
870 | unsigned long irqflags; |
||
871 | |||
872 | |||
873 | // return -EINVAL; |
||
874 | |||
875 | |||
876 | ironlake_enable_display_irq(dev_priv, (pipe == 0) ? |
||
877 | DE_PIPEA_VBLANK : DE_PIPEB_VBLANK); |
||
878 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); |
||
879 | |||
880 | |||
2340 | Serge | 881 | } |
2351 | Serge | 882 | |
883 | |||
884 | |||
885 | |||
886 | { |
||
887 | drm_i915_private_t *dev_priv = dev->dev_private; |
||
888 | int ret, i, pipe; |
||
889 | |||
890 | |||
891 | dbgprintf("Interrupt enable: %08x\n", |
||
892 | I915_READ(IER)); |
||
893 | dbgprintf("Interrupt identity: %08x\n", |
||
894 | I915_READ(IIR)); |
||
895 | dbgprintf("Interrupt mask: %08x\n", |
||
896 | I915_READ(IMR)); |
||
897 | for_each_pipe(pipe) |
||
898 | dbgprintf("Pipe %c stat: %08x\n", |
||
899 | pipe_name(pipe), |
||
900 | I915_READ(PIPESTAT(pipe))); |
||
901 | } else { |
||
902 | dbgprintf("North Display Interrupt enable: %08x\n", |
||
903 | I915_READ(DEIER)); |
||
904 | dbgprintf("North Display Interrupt identity: %08x\n", |
||
905 | I915_READ(DEIIR)); |
||
906 | dbgprintf("North Display Interrupt mask: %08x\n", |
||
907 | I915_READ(DEIMR)); |
||
908 | dbgprintf("South Display Interrupt enable: %08x\n", |
||
909 | I915_READ(SDEIER)); |
||
910 | dbgprintf("South Display Interrupt identity: %08x\n", |
||
911 | I915_READ(SDEIIR)); |
||
912 | dbgprintf("South Display Interrupt mask: %08x\n", |
||
913 | I915_READ(SDEIMR)); |
||
914 | dbgprintf("Graphics Interrupt enable: %08x\n", |
||
915 | I915_READ(GTIER)); |
||
916 | dbgprintf("Graphics Interrupt identity: %08x\n", |
||
917 | I915_READ(GTIIR)); |
||
918 | dbgprintf("Graphics Interrupt mask: %08x\n", |
||
919 | I915_READ(GTIMR)); |
||
920 | } |
||
921 | dbgprintf("Interrupts received: %d\n", |
||
922 | atomic_read(&dev_priv->irq_received)); |
||
923 | for (i = 0; i < I915_NUM_RINGS; i++) { |
||
924 | if (IS_GEN6(dev) || IS_GEN7(dev)) { |
||
925 | printf("Graphics Interrupt mask (%s): %08x\n", |
||
926 | dev_priv->ring[i].name, |
||
927 | I915_READ_IMR(&dev_priv->ring[i])); |
||
928 | } |
||
929 | // i915_ring_seqno_info(m, &dev_priv->ring[i]); |
||
930 | } |
||
931 | |||
932 | |||
933 | } |
||
934 | |||
935 | |||
936 | int size) |
||
937 | { |
||
938 | struct intel_ring_buffer *ring; |
||
939 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
940 | u32 invalidate; |
||
941 | u32 seqno = 2; |
||
942 | |||
943 | |||
944 | // dbgprintf("execute %x size %d\n", offset, size); |
||
945 | |||
946 | |||
947 | // "mfence \n" |
||
948 | // "wbinvd \n" |
||
949 | // "mfence \n" |
||
950 | // :::"memory"); |
||
951 | |||
952 | |||
953 | ring->dispatch_execbuffer(ring, offset, size); |
||
954 | |||
955 | |||
956 | if (INTEL_INFO(main_device)->gen >= 4) |
||
957 | invalidate |= I915_GEM_DOMAIN_SAMPLER; |
||
958 | if (ring->flush(ring, invalidate, 0)) |
||
959 | i915_gem_next_request_seqno(ring); |
||
960 | |||
961 | |||
962 | |||
963 | |||
964 | |||
965 | |||
966 | |||
967 | |||
2340 | Serge | 968 | |
2351 | Serge | 969 | |
970 | |||
971 | int src_x, int src_y, u32 w, u32 h) |
||
972 | { |
||
973 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
974 | |||
975 | |||
976 | bitmap_t screen; |
||
977 | |||
978 | |||
979 | |||
980 | |||
981 | // hbitmap, dst_x, dst_y, src_x, src_y, w, h); |
||
982 | |||
983 | |||
984 | return -1; |
||
985 | |||
986 | |||
987 | // dbgprintf("bitmap %x\n", src_bitmap); |
||
988 | |||
989 | |||
990 | return -1; |
||
991 | |||
992 | |||
993 | |||
994 | |||
995 | screen.gaddr = 0; |
||
996 | screen.width = os_display->width; |
||
997 | screen.height = os_display->height; |
||
998 | screen.obj = (void*)-1; |
||
999 | |||
1000 | |||
1001 | |||
1002 | |||
1003 | dst_y+= winrc.top; |
||
1004 | |||
1005 | |||
1006 | |||
1007 | |||
1008 | |||
1009 | |||
2361 | Serge | 1010 | int w, int h, bitmap_t *src_bitmap, int src_x, int src_y, |
1011 | bitmap_t *mask_bitmap); |
||
1012 | |||
2360 | Serge | 1013 | |
2361 | Serge | 1014 | struct context *get_context(); |
1015 | |||
1016 | |||
1017 | int src_x, int src_y, u32 w, u32 h) |
||
1018 | { |
||
1019 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
1020 | struct context *ctx; |
||
1021 | |||
1022 | |||
1023 | bitmap_t screen; |
||
1024 | int ret; |
||
1025 | |||
1026 | |||
1027 | rect_t winrc; |
||
1028 | |||
1029 | |||
1030 | // hbitmap, dst_x, dst_y, src_x, src_y, w, h); |
||
1031 | |||
1032 | |||
1033 | return -1; |
||
1034 | |||
1035 | |||
1036 | // dbgprintf("bitmap %x\n", src_bitmap); |
||
1037 | |||
1038 | |||
1039 | return -1; |
||
1040 | |||
1041 | |||
1042 | if(unlikely(ctx==NULL)) |
||
1043 | { |
||
1044 | ret = create_context(); |
||
1045 | if(ret!=0) |
||
1046 | return -1; |
||
1047 | |||
1048 | |||
1049 | }; |
||
1050 | |||
1051 | |||
1052 | |||
1053 | |||
1054 | dst_x+= winrc.left; |
||
1055 | dst_y+= winrc.top; |
||
1056 | |||
1057 | |||
1058 | |||
1059 | { |
||
1060 | u8* src_offset; |
||
1061 | u8* dst_offset; |
||
1062 | u32 slot = *((u8*)CURRENT_TASK); |
||
1063 | u32 ifl; |
||
1064 | |||
1065 | |||
1066 | if(ret !=0 ) |
||
1067 | { |
||
1068 | dbgprintf("%s fail\n", __FUNCTION__); |
||
1069 | return ret; |
||
1070 | }; |
||
1071 | |||
1072 | |||
1073 | |||
1074 | |||
1075 | mask_bitmap->height = winrc.bottom; |
||
1076 | mask_bitmap->pitch = ALIGN(w,64); |
||
1077 | |||
1078 | |||
1079 | |||
1080 | |||
1081 | |||
1082 | "movd %[slot], %%xmm6 \n" |
||
1083 | "punpckldq %%xmm6, %%xmm6 \n" |
||
1084 | "punpcklqdq %%xmm6, %%xmm6 \n" |
||
1085 | :: [slot] "g" (slot) |
||
1086 | :"xmm6"); |
||
1087 | |||
1088 | |||
1089 | |||
1090 | |||
1091 | dst_offset+= get_display_map(); |
||
1092 | |||
1093 | |||
1094 | |||
1095 | |||
1096 | while( tmp_h--) |
||
1097 | { |
||
1098 | int tmp_w = mask_bitmap->width; |
||
1099 | |||
1100 | |||
1101 | u8* tmp_dst = dst_offset; |
||
1102 | |||
1103 | |||
1104 | dst_offset+= os_display->width; |
||
1105 | |||
1106 | |||
1107 | // { |
||
1108 | // *(tmp_src) = (*tmp_dst==slot)?0x1:0x00; |
||
1109 | // tmp_src++; |
||
1110 | // tmp_dst++; |
||
1111 | // }; |
||
1112 | while(tmp_w >= 64) |
||
1113 | { |
||
1114 | __asm__ __volatile__ ( |
||
1115 | "movdqu (%0), %%xmm0 \n" |
||
1116 | "movdqu 16(%0), %%xmm1 \n" |
||
1117 | "movdqu 32(%0), %%xmm2 \n" |
||
1118 | "movdqu 48(%0), %%xmm3 \n" |
||
1119 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
1120 | "pcmpeqb %%xmm6, %%xmm1 \n" |
||
1121 | "pcmpeqb %%xmm6, %%xmm2 \n" |
||
1122 | "pcmpeqb %%xmm6, %%xmm3 \n" |
||
1123 | "movdqa %%xmm0, (%%edi) \n" |
||
1124 | "movdqa %%xmm1, 16(%%edi) \n" |
||
1125 | "movdqa %%xmm2, 32(%%edi) \n" |
||
1126 | "movdqa %%xmm3, 48(%%edi) \n" |
||
1127 | |||
1128 | |||
1129 | :"xmm0","xmm1","xmm2","xmm3"); |
||
1130 | tmp_w -= 64; |
||
1131 | tmp_src += 64; |
||
1132 | tmp_dst += 64; |
||
1133 | } |
||
1134 | |||
1135 | |||
1136 | { |
||
1137 | __asm__ __volatile__ ( |
||
1138 | "movdqu (%0), %%xmm0 \n" |
||
1139 | "movdqu 16(%0), %%xmm1 \n" |
||
1140 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
1141 | "pcmpeqb %%xmm6, %%xmm1 \n" |
||
1142 | "movdqa %%xmm0, (%%edi) \n" |
||
1143 | "movdqa %%xmm1, 16(%%edi) \n" |
||
1144 | |||
1145 | |||
1146 | :"xmm0","xmm1"); |
||
1147 | tmp_w -= 32; |
||
1148 | tmp_src += 32; |
||
1149 | tmp_dst += 32; |
||
1150 | } |
||
1151 | |||
1152 | |||
1153 | { |
||
1154 | __asm__ __volatile__ ( |
||
1155 | "movdqu (%0), %%xmm0 \n" |
||
1156 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
1157 | "movdqa %%xmm0, (%%edi) \n" |
||
1158 | :: "r" (tmp_dst), "D" (tmp_src) |
||
1159 | :"xmm0"); |
||
1160 | tmp_w -= 16; |
||
1161 | tmp_src += 16; |
||
1162 | tmp_dst += 16; |
||
1163 | } |
||
1164 | }; |
||
1165 | safe_sti(ifl); |
||
1166 | ctx->seqno = os_display->mask_seqno; |
||
1167 | } |
||
1168 | |||
1169 | |||
1170 | screen.gaddr = 0; |
||
1171 | screen.width = os_display->width; |
||
1172 | screen.height = os_display->height; |
||
1173 | screen.obj = (void*)-1; |
||
1174 | |||
1175 | |||
1176 | |||
1177 | |||
1178 | |||
1179 | mask_bitmap); |
||
1180 | |||
1181 | |||
1182 | }; |
||
1183 | |||
1184 | |||
1185 | |||
1186 | |||
1187 | |||
1188 | { |
||
1189 | printf("destroy context %x\n", context); |
||
1190 | |||
1191 | |||
1192 | __DestroyObject(context); |
||
1193 | }; |
||
1194 | |||
1195 | |||
1196 | |||
1197 | { |
||
1198 | struct context *context; |
||
1199 | |||
1200 | |||
1201 | int slot; |
||
1202 | |||
1203 | |||
1204 | int ret; |
||
1205 | |||
1206 | |||
1207 | |||
1208 | |||
1209 | return 0; |
||
1210 | |||
1211 | |||
1212 | // printf("context %x\n", coontext); |
||
1213 | if( context == NULL) |
||
1214 | goto err1; |
||
1215 | context->header.destroy = destroy_context; |
||
1216 | |||
1217 | |||
1218 | |||
1219 | |||
1220 | io_10.height = os_display->height+1; |
||
1221 | io_10.max_width = os_display->width/4; |
||
1222 | io_10.max_height = os_display->height+1; |
||
1223 | |||
1224 | |||
1225 | if(ret) |
||
1226 | goto err2; |
||
1227 | |||
1228 | |||
1229 | if(unlikely(mask == NULL)) /* something really terrible happend */ |
||
1230 | goto err2; |
||
1231 | dbgprintf("done\n"); |
||
1232 | |||
1233 | |||
1234 | context->seqno = os_display->mask_seqno-1; |
||
1235 | context->slot = slot; |
||
1236 | |||
1237 | |||
1238 | return 0; |
||
1239 | |||
1240 | |||
1241 | __DestroyObject(context); |
||
1242 | err1: |
||
1243 | return -1; |
||
1244 | }; |
||
1245 | |||
1246 | |||
1247 | { |
||
1248 | |||
1249 | |||
1250 | |||
1251 | |||
1252 | } |
||
1253 | |||
1254 | |||
1255 | |||
1256 | |||
1257 | |||
1258 | |||
1259 | |||
1260 | |||
1261 | |||
1262 | |||
1263 | |||
2360 | Serge | 1264 | { |
1265 | unsigned long irqflags; |
||
1266 | |||
1267 | |||
1268 | // cwq, &cwq->worklist, cwq->worklist.next); |
||
1269 | |||
1270 | |||
1271 | |||
1272 | |||
1273 | { |
||
1274 | struct work_struct *work = list_entry(cwq->worklist.next, |
||
1275 | struct work_struct, entry); |
||
1276 | work_func_t f = work->func; |
||
1277 | list_del_init(cwq->worklist.next); |
||
1278 | // dbgprintf("head %x, next %x\n", |
||
1279 | // &cwq->worklist, cwq->worklist.next); |
||
1280 | |||
1281 | |||
1282 | f(work); |
||
1283 | spin_lock_irqsave(&cwq->lock, irqflags); |
||
1284 | } |
||
1285 | |||
1286 | |||
1287 | } |
||
1288 | |||
1289 | |||
1290 | |||
1291 | int __queue_work(struct workqueue_struct *wq, |
||
1292 | struct work_struct *work) |
||
1293 | { |
||
1294 | unsigned long flags; |
||
1295 | // ENTER(); |
||
1296 | |||
1297 | |||
1298 | // wq, work ); |
||
1299 | |||
1300 | |||
1301 | return 0; |
||
1302 | |||
1303 | |||
1304 | |||
1305 | |||
1306 | TimerHs(0,0, run_workqueue, wq); |
||
1307 | |||
1308 | |||
1309 | |||
1310 | |||
1311 | // dbgprintf("wq: %x head %x, next %x\n", |
||
1312 | // wq, &wq->worklist, wq->worklist.next); |
||
1313 | |||
1314 | |||
1315 | return 1; |
||
1316 | }; |
||
1317 | |||
1318 | |||
1319 | { |
||
1320 | // ENTER(); |
||
1321 | struct delayed_work *dwork = (struct delayed_work *)__data; |
||
1322 | struct workqueue_struct *wq = dwork->work.data; |
||
1323 | |||
1324 | |||
1325 | // wq, &dwork->work ); |
||
1326 | |||
1327 | |||
1328 | // LEAVE(); |
||
1329 | } |
||
1330 | |||
1331 | |||
1332 | |||
1333 | struct delayed_work *dwork, unsigned long delay) |
||
1334 | { |
||
1335 | struct work_struct *work = &dwork->work; |
||
1336 | |||
1337 | |||
1338 | TimerHs(0,0, delayed_work_timer_fn, dwork); |
||
1339 | return 1; |
||
1340 | } |
||
1341 | |||
1342 | |||
1343 | struct delayed_work *dwork, unsigned long delay) |
||
1344 | { |
||
1345 | u32 flags; |
||
1346 | // ENTER(); |
||
1347 | |||
1348 | |||
1349 | // wq, &dwork->work ); |
||
1350 | |||
1351 | |||
1352 | return __queue_work(wq, &dwork->work); |
||
1353 | |||
1354 | |||
1355 | } |
||
1356 | |||
1357 | |||
1358 | |||
1359 | unsigned int flags, |
||
1360 | int max_active) |
||
1361 | { |
||
1362 | struct workqueue_struct *wq; |
||
1363 | |||
1364 | |||
1365 | if (!wq) |
||
1366 | goto err; |
||
1367 | |||
1368 | |||
1369 | |||
1370 | |||
1371 | err: |
||
1372 | return NULL; |
||
1373 | }24); |
||
1374 | |||
1375 | |||
1376 | |||
1377 | |||
1378 | |||
1379 |