WebSVN – Kolibri OS – Blame – /drivers/video/drm/i915/intel_sdvo.c

Rev	Author	Line No.	Line
2330	Serge	1	/*
		2	* Copyright 2006 Dave Airlie
		3	* Copyright © 2006-2007 Intel Corporation
		4	* Jesse Barnes
		5	*
		6	* Permission is hereby granted, free of charge, to any person obtaining a
		7	* copy of this software and associated documentation files (the "Software"),
		8	* to deal in the Software without restriction, including without limitation
		9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
		10	* and/or sell copies of the Software, and to permit persons to whom the
		11	* Software is furnished to do so, subject to the following conditions:
		12	*
		13	* The above copyright notice and this permission notice (including the next
		14	* paragraph) shall be included in all copies or substantial portions of the
		15	* Software.
		16	*
		17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
		18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
		19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
		20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
		21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		22	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
		23	* DEALINGS IN THE SOFTWARE.
		24	*
		25	* Authors:
		26	* Eric Anholt
		27	*/
		28	#include
		29	#include
		30	//#include
		31	#include "drmP.h"
		32	#include "drm.h"
		33	#include "drm_crtc.h"
		34	#include "drm_edid.h"
		35	#include "intel_drv.h"
		36	#include "i915_drm.h"
		37	#include "i915_drv.h"
		38	#include "intel_sdvo_regs.h"
		39
		40	unsigned int hweight16(unsigned int w)
		41	{
		42	unsigned int res = w - ((w >> 1) & 0x5555);
		43	res = (res & 0x3333) + ((res >> 2) & 0x3333);
		44	res = (res + (res >> 4)) & 0x0F0F;
		45	return (res + (res >> 8)) & 0x00FF;
		46	}
		47
		48
		49	#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 \| SDVO_OUTPUT_TMDS1)
		50	#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 \| SDVO_OUTPUT_RGB1)
		51	#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 \| SDVO_OUTPUT_LVDS1)
		52	#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 \| SDVO_OUTPUT_SVID0)
		53
		54	#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK \| SDVO_RGB_MASK \| SDVO_LVDS_MASK \|\
		55	SDVO_TV_MASK)
		56
		57	#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
		58	#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
		59	#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
		60	#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK \| SDVO_LVDS_MASK))
		61
		62
		63	static const char *tv_format_names[] = {
		64	"NTSC_M" , "NTSC_J" , "NTSC_443",
		65	"PAL_B" , "PAL_D" , "PAL_G" ,
		66	"PAL_H" , "PAL_I" , "PAL_M" ,
		67	"PAL_N" , "PAL_NC" , "PAL_60" ,
		68	"SECAM_B" , "SECAM_D" , "SECAM_G" ,
		69	"SECAM_K" , "SECAM_K1", "SECAM_L" ,
		70	"SECAM_60"
		71	};
		72
		73	#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
		74
		75	struct intel_sdvo {
		76	struct intel_encoder base;
		77
		78	struct i2c_adapter *i2c;
		79	u8 slave_addr;
		80
		81	struct i2c_adapter ddc;
		82
		83	/* Register for the SDVO device: SDVOB or SDVOC */
		84	int sdvo_reg;
		85
		86	/* Active outputs controlled by this SDVO output */
		87	uint16_t controlled_output;
		88
		89	/*
		90	* Capabilities of the SDVO device returned by
		91	* i830_sdvo_get_capabilities()
		92	*/
		93	struct intel_sdvo_caps caps;
		94
		95	/* Pixel clock limitations reported by the SDVO device, in kHz */
		96	int pixel_clock_min, pixel_clock_max;
		97
		98	/*
		99	* For multiple function SDVO device,
		100	* this is for current attached outputs.
		101	*/
		102	uint16_t attached_output;
		103
		104	/**
		105	* This is used to select the color range of RBG outputs in HDMI mode.
		106	* It is only valid when using TMDS encoding and 8 bit per color mode.
		107	*/
		108	uint32_t color_range;
		109
		110	/**
		111	* This is set if we're going to treat the device as TV-out.
		112	*
		113	* While we have these nice friendly flags for output types that ought
		114	* to decide this for us, the S-Video output on our HDMI+S-Video card
		115	* shows up as RGB1 (VGA).
		116	*/
		117	bool is_tv;
		118
		119	/* This is for current tv format name */
		120	int tv_format_index;
		121
		122	/**
		123	* This is set if we treat the device as HDMI, instead of DVI.
		124	*/
		125	bool is_hdmi;
		126	bool has_hdmi_monitor;
		127	bool has_hdmi_audio;
		128
		129	/**
		130	* This is set if we detect output of sdvo device as LVDS and
		131	* have a valid fixed mode to use with the panel.
		132	*/
		133	bool is_lvds;
		134
		135	/**
		136	* This is sdvo fixed pannel mode pointer
		137	*/
		138	struct drm_display_mode *sdvo_lvds_fixed_mode;
		139
		140	/* DDC bus used by this SDVO encoder */
		141	uint8_t ddc_bus;
		142
		143	/* Input timings for adjusted_mode */
		144	struct intel_sdvo_dtd input_dtd;
		145	};
		146
		147	struct intel_sdvo_connector {
		148	struct intel_connector base;
		149
		150	/* Mark the type of connector */
		151	uint16_t output_flag;
		152
		153	int force_audio;
		154
		155	/* This contains all current supported TV format */
		156	u8 tv_format_supported[TV_FORMAT_NUM];
		157	int format_supported_num;
		158	struct drm_property *tv_format;
		159
		160	/* add the property for the SDVO-TV */
		161	struct drm_property *left;
		162	struct drm_property *right;
		163	struct drm_property *top;
		164	struct drm_property *bottom;
		165	struct drm_property *hpos;
		166	struct drm_property *vpos;
		167	struct drm_property *contrast;
		168	struct drm_property *saturation;
		169	struct drm_property *hue;
		170	struct drm_property *sharpness;
		171	struct drm_property *flicker_filter;
		172	struct drm_property *flicker_filter_adaptive;
		173	struct drm_property *flicker_filter_2d;
		174	struct drm_property *tv_chroma_filter;
		175	struct drm_property *tv_luma_filter;
		176	struct drm_property *dot_crawl;
		177
		178	/* add the property for the SDVO-TV/LVDS */
		179	struct drm_property *brightness;
		180
		181	/* Add variable to record current setting for the above property */
		182	u32 left_margin, right_margin, top_margin, bottom_margin;
		183
		184	/* this is to get the range of margin.*/
		185	u32 max_hscan, max_vscan;
		186	u32 max_hpos, cur_hpos;
		187	u32 max_vpos, cur_vpos;
		188	u32 cur_brightness, max_brightness;
		189	u32 cur_contrast, max_contrast;
		190	u32 cur_saturation, max_saturation;
		191	u32 cur_hue, max_hue;
		192	u32 cur_sharpness, max_sharpness;
		193	u32 cur_flicker_filter, max_flicker_filter;
		194	u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
		195	u32 cur_flicker_filter_2d, max_flicker_filter_2d;
		196	u32 cur_tv_chroma_filter, max_tv_chroma_filter;
		197	u32 cur_tv_luma_filter, max_tv_luma_filter;
		198	u32 cur_dot_crawl, max_dot_crawl;
		199	};
		200
		201	static struct intel_sdvo to_intel_sdvo(struct drm_encoder encoder)
		202	{
		203	return container_of(encoder, struct intel_sdvo, base.base);
		204	}
		205
		206	static struct intel_sdvo intel_attached_sdvo(struct drm_connector connector)
		207	{
		208	return container_of(intel_attached_encoder(connector),
		209	struct intel_sdvo, base);
		210	}
		211
		212	static struct intel_sdvo_connector to_intel_sdvo_connector(struct drm_connector connector)
		213	{
		214	return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
		215	}
		216
		217	static bool
		218	intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
		219	static bool
		220	intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
		221	struct intel_sdvo_connector *intel_sdvo_connector,
		222	int type);
		223	static bool
		224	intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
		225	struct intel_sdvo_connector *intel_sdvo_connector);
		226
		227	/**
		228	* Writes the SDVOB or SDVOC with the given value, but always writes both
		229	* SDVOB and SDVOC to work around apparent hardware issues (according to
		230	* comments in the BIOS).
		231	*/
		232	static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
		233	{
		234	struct drm_device *dev = intel_sdvo->base.base.dev;
		235	struct drm_i915_private *dev_priv = dev->dev_private;
		236	u32 bval = val, cval = val;
		237	int i;
		238
		239	if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
		240	I915_WRITE(intel_sdvo->sdvo_reg, val);
		241	I915_READ(intel_sdvo->sdvo_reg);
		242	return;
		243	}
		244
		245	if (intel_sdvo->sdvo_reg == SDVOB) {
		246	cval = I915_READ(SDVOC);
		247	} else {
		248	bval = I915_READ(SDVOB);
		249	}
		250	/*
		251	* Write the registers twice for luck. Sometimes,
		252	* writing them only once doesn't appear to 'stick'.
		253	* The BIOS does this too. Yay, magic
		254	*/
		255	for (i = 0; i < 2; i++)
		256	{
		257	I915_WRITE(SDVOB, bval);
		258	I915_READ(SDVOB);
		259	I915_WRITE(SDVOC, cval);
		260	I915_READ(SDVOC);
		261	}
		262	}
		263
		264	static bool intel_sdvo_read_byte(struct intel_sdvo intel_sdvo, u8 addr, u8 ch)
		265	{
		266	struct i2c_msg msgs[] = {
		267	{
		268	.addr = intel_sdvo->slave_addr,
		269	.flags = 0,
		270	.len = 1,
		271	.buf = &addr,
		272	},
		273	{
		274	.addr = intel_sdvo->slave_addr,
		275	.flags = I2C_M_RD,
		276	.len = 1,
		277	.buf = ch,
		278	}
		279	};
		280	int ret;
		281
		282	if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
		283	return true;
		284
		285	DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
		286	return false;
		287	}
		288
		289	#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
		290	/** Mapping of command numbers to names, for debug output */
		291	static const struct _sdvo_cmd_name {
		292	u8 cmd;
		293	const char *name;
		294	} sdvo_cmd_names[] = {
		295	SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
		296	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
		297	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
		298	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
		299	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
		300	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
		301	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
		302	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
		303	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
		304	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
		305	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
		306	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
		307	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
		308	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
		309	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
		310	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
		311	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
		312	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
		313	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
		314	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
		315	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
		316	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
		317	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
		318	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
		319	SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
		320	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
		321	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
		322	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
		323	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
		324	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
		325	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
		326	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
		327	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
		328	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
		329	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
		330	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
		331	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
		332	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
		333	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
		334	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
		335	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
		336	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
		337	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
		338
		339	/* Add the op code for SDVO enhancements */
		340	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
		341	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
		342	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
		343	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
		344	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
		345	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
		346	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
		347	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
		348	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
		349	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
		350	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
		351	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
		352	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
		353	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
		354	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
		355	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
		356	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
		357	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
		358	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
		359	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
		360	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
		361	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
		362	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
		363	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
		364	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
		365	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
		366	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
		367	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
		368	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
		369	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
		370	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
		371	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
		372	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
		373	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
		374	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
		375	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
		376	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
		377	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
		378	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
		379	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
		380	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
		381	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
		382	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
		383	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
		384
		385	/* HDMI op code */
		386	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
		387	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
		388	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
		389	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
		390	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
		391	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
		392	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
		393	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
		394	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
		395	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
		396	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
		397	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
		398	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
		399	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
		400	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
		401	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
		402	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
		403	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
		404	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
		405	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
		406	};
		407
		408	#define IS_SDVOB(reg) (reg == SDVOB \|\| reg == PCH_SDVOB)
		409	#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
		410
		411	static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
		412	const void *args, int args_len)
		413	{
		414	int i;
		415
		416	DRM_DEBUG_KMS("%s: W: %02X ",
		417	SDVO_NAME(intel_sdvo), cmd);
		418	for (i = 0; i < args_len; i++)
		419	DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
		420	for (; i < 8; i++)
		421	DRM_LOG_KMS(" ");
		422	for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
		423	if (cmd == sdvo_cmd_names[i].cmd) {
		424	DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
		425	break;
		426	}
		427	}
		428	if (i == ARRAY_SIZE(sdvo_cmd_names))
		429	DRM_LOG_KMS("(%02X)", cmd);
		430	DRM_LOG_KMS("\n");
		431	}
		432
		433	static const char *cmd_status_names[] = {
		434	"Power on",
		435	"Success",
		436	"Not supported",
		437	"Invalid arg",
		438	"Pending",
		439	"Target not specified",
		440	"Scaling not supported"
		441	};
		442
		443	static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
		444	const void *args, int args_len)
		445	{
		446	u8 buf[args_len*2 + 2], status;
		447	struct i2c_msg msgs[args_len + 3];
		448	int i, ret;
		449
		450	intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
		451
		452	for (i = 0; i < args_len; i++) {
		453	msgs[i].addr = intel_sdvo->slave_addr;
		454	msgs[i].flags = 0;
		455	msgs[i].len = 2;
		456	msgs[i].buf = buf + 2 *i;
		457	buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
		458	buf[2i + 1] = ((u8)args)[i];
		459	}
		460	msgs[i].addr = intel_sdvo->slave_addr;
		461	msgs[i].flags = 0;
		462	msgs[i].len = 2;
		463	msgs[i].buf = buf + 2*i;
		464	buf[2*i + 0] = SDVO_I2C_OPCODE;
		465	buf[2*i + 1] = cmd;
		466
		467	/* the following two are to read the response */
		468	status = SDVO_I2C_CMD_STATUS;
		469	msgs[i+1].addr = intel_sdvo->slave_addr;
		470	msgs[i+1].flags = 0;
		471	msgs[i+1].len = 1;
		472	msgs[i+1].buf = &status;
		473
		474	msgs[i+2].addr = intel_sdvo->slave_addr;
		475	msgs[i+2].flags = I2C_M_RD;
		476	msgs[i+2].len = 1;
		477	msgs[i+2].buf = &status;
		478
		479	ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
		480	if (ret < 0) {
		481	DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
		482	return false;
		483	}
		484	if (ret != i+3) {
		485	/* failure in I2C transfer */
		486	DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
		487	return false;
		488	}
		489
		490	return true;
		491	}
		492
		493	static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
		494	void *response, int response_len)
		495	{
		496	u8 retry = 5;
		497	u8 status;
		498	int i;
		499
		500	DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
		501
		502	/*
		503	* The documentation states that all commands will be
		504	* processed within 15µs, and that we need only poll
		505	* the status byte a maximum of 3 times in order for the
		506	* command to be complete.
		507	*
		508	* Check 5 times in case the hardware failed to read the docs.
		509	*/
		510	if (!intel_sdvo_read_byte(intel_sdvo,
		511	SDVO_I2C_CMD_STATUS,
		512	&status))
		513	goto log_fail;
		514
		515	while (status == SDVO_CMD_STATUS_PENDING && retry--) {
		516	udelay(15);
		517	if (!intel_sdvo_read_byte(intel_sdvo,
		518	SDVO_I2C_CMD_STATUS,
		519	&status))
		520	goto log_fail;
		521	}
		522
		523	if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
		524	DRM_LOG_KMS("(%s)", cmd_status_names[status]);
		525	else
		526	DRM_LOG_KMS("(??? %d)", status);
		527
		528	if (status != SDVO_CMD_STATUS_SUCCESS)
		529	goto log_fail;
		530
		531	/* Read the command response */
		532	for (i = 0; i < response_len; i++) {
		533	if (!intel_sdvo_read_byte(intel_sdvo,
		534	SDVO_I2C_RETURN_0 + i,
		535	&((u8 *)response)[i]))
		536	goto log_fail;
		537	DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
		538	}
		539	DRM_LOG_KMS("\n");
		540	return true;
		541
		542	log_fail:
		543	DRM_LOG_KMS("... failed\n");
		544	return false;
		545	}
		546
		547	static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
		548	{
		549	if (mode->clock >= 100000)
		550	return 1;
		551	else if (mode->clock >= 50000)
		552	return 2;
		553	else
		554	return 4;
		555	}
		556
		557	static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
		558	u8 ddc_bus)
		559	{
		560	/* This must be the immediately preceding write before the i2c xfer */
		561	return intel_sdvo_write_cmd(intel_sdvo,
		562	SDVO_CMD_SET_CONTROL_BUS_SWITCH,
		563	&ddc_bus, 1);
		564	}
		565
		566	static bool intel_sdvo_set_value(struct intel_sdvo intel_sdvo, u8 cmd, const void data, int len)
		567	{
		568	if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
		569	return false;
		570
		571	return intel_sdvo_read_response(intel_sdvo, NULL, 0);
		572	}
		573
		574	static bool
		575	intel_sdvo_get_value(struct intel_sdvo intel_sdvo, u8 cmd, void value, int len)
		576	{
		577	if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
		578	return false;
		579
		580	return intel_sdvo_read_response(intel_sdvo, value, len);
		581	}
		582
		583	static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
		584	{
		585	struct intel_sdvo_set_target_input_args targets = {0};
		586	return intel_sdvo_set_value(intel_sdvo,
		587	SDVO_CMD_SET_TARGET_INPUT,
		588	&targets, sizeof(targets));
		589	}
		590
		591	/**
		592	* Return whether each input is trained.
		593	*
		594	* This function is making an assumption about the layout of the response,
		595	* which should be checked against the docs.
		596	*/
		597	static bool intel_sdvo_get_trained_inputs(struct intel_sdvo intel_sdvo, bool input_1, bool *input_2)
		598	{
		599	struct intel_sdvo_get_trained_inputs_response response;
		600
		601	BUILD_BUG_ON(sizeof(response) != 1);
		602	if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
		603	&response, sizeof(response)))
		604	return false;
		605
		606	*input_1 = response.input0_trained;
		607	*input_2 = response.input1_trained;
		608	return true;
		609	}
		610
		611	static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
		612	u16 outputs)
		613	{
		614	return intel_sdvo_set_value(intel_sdvo,
		615	SDVO_CMD_SET_ACTIVE_OUTPUTS,
		616	&outputs, sizeof(outputs));
		617	}
		618
2340	Serge	619	static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
		620	int mode)
		621	{
		622	u8 state = SDVO_ENCODER_STATE_ON;
2330	Serge	623
2340	Serge	624	switch (mode) {
		625	case DRM_MODE_DPMS_ON:
		626	state = SDVO_ENCODER_STATE_ON;
		627	break;
		628	case DRM_MODE_DPMS_STANDBY:
		629	state = SDVO_ENCODER_STATE_STANDBY;
		630	break;
		631	case DRM_MODE_DPMS_SUSPEND:
		632	state = SDVO_ENCODER_STATE_SUSPEND;
		633	break;
		634	case DRM_MODE_DPMS_OFF:
		635	state = SDVO_ENCODER_STATE_OFF;
		636	break;
		637	}
2330	Serge	638
2340	Serge	639	return intel_sdvo_set_value(intel_sdvo,
		640	SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
		641	}
2330	Serge	642
		643	static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
		644	int *clock_min,
		645	int *clock_max)
		646	{
		647	struct intel_sdvo_pixel_clock_range clocks;
		648
		649	BUILD_BUG_ON(sizeof(clocks) != 4);
		650	if (!intel_sdvo_get_value(intel_sdvo,
		651	SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
		652	&clocks, sizeof(clocks)))
		653	return false;
		654
		655	/* Convert the values from units of 10 kHz to kHz. */
		656	clock_min = clocks.min 10;
		657	clock_max = clocks.max 10;
		658	return true;
		659	}
		660
		661	static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
		662	u16 outputs)
		663	{
		664	return intel_sdvo_set_value(intel_sdvo,
		665	SDVO_CMD_SET_TARGET_OUTPUT,
		666	&outputs, sizeof(outputs));
		667	}
		668
		669	static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
		670	struct intel_sdvo_dtd *dtd)
		671	{
		672	return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
		673	intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
		674	}
		675
		676	static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
		677	struct intel_sdvo_dtd *dtd)
		678	{
		679	return intel_sdvo_set_timing(intel_sdvo,
		680	SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
		681	}
		682
		683	static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
		684	struct intel_sdvo_dtd *dtd)
		685	{
		686	return intel_sdvo_set_timing(intel_sdvo,
		687	SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
		688	}
		689
		690	static bool
		691	intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
		692	uint16_t clock,
		693	uint16_t width,
		694	uint16_t height)
		695	{
		696	struct intel_sdvo_preferred_input_timing_args args;
		697
		698	memset(&args, 0, sizeof(args));
		699	args.clock = clock;
		700	args.width = width;
		701	args.height = height;
		702	args.interlace = 0;
		703
		704	if (intel_sdvo->is_lvds &&
		705	(intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width \|\|
		706	intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
		707	args.scaled = 1;
		708
		709	return intel_sdvo_set_value(intel_sdvo,
		710	SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
		711	&args, sizeof(args));
		712	}
		713
		714	static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
		715	struct intel_sdvo_dtd *dtd)
		716	{
		717	BUILD_BUG_ON(sizeof(dtd->part1) != 8);
		718	BUILD_BUG_ON(sizeof(dtd->part2) != 8);
		719	return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
		720	&dtd->part1, sizeof(dtd->part1)) &&
		721	intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
		722	&dtd->part2, sizeof(dtd->part2));
		723	}
		724
		725	static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
		726	{
		727	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
		728	}
		729
		730	static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
		731	const struct drm_display_mode *mode)
		732	{
		733	uint16_t width, height;
		734	uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
		735	uint16_t h_sync_offset, v_sync_offset;
		736
		737	width = mode->crtc_hdisplay;
		738	height = mode->crtc_vdisplay;
		739
		740	/* do some mode translations */
		741	h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
		742	h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
		743
		744	v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
		745	v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
		746
		747	h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
		748	v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
		749
		750	dtd->part1.clock = mode->clock / 10;
		751	dtd->part1.h_active = width & 0xff;
		752	dtd->part1.h_blank = h_blank_len & 0xff;
		753	dtd->part1.h_high = (((width >> 8) & 0xf) << 4) \|
		754	((h_blank_len >> 8) & 0xf);
		755	dtd->part1.v_active = height & 0xff;
		756	dtd->part1.v_blank = v_blank_len & 0xff;
		757	dtd->part1.v_high = (((height >> 8) & 0xf) << 4) \|
		758	((v_blank_len >> 8) & 0xf);
		759
		760	dtd->part2.h_sync_off = h_sync_offset & 0xff;
		761	dtd->part2.h_sync_width = h_sync_len & 0xff;
		762	dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 \|
		763	(v_sync_len & 0xf);
		764	dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) \|
		765	((h_sync_len & 0x300) >> 4) \| ((v_sync_offset & 0x30) >> 2) \|
		766	((v_sync_len & 0x30) >> 4);
		767
		768	dtd->part2.dtd_flags = 0x18;
		769	if (mode->flags & DRM_MODE_FLAG_PHSYNC)
		770	dtd->part2.dtd_flags \|= 0x2;
		771	if (mode->flags & DRM_MODE_FLAG_PVSYNC)
		772	dtd->part2.dtd_flags \|= 0x4;
		773
		774	dtd->part2.sdvo_flags = 0;
		775	dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
		776	dtd->part2.reserved = 0;
		777	}
		778
		779	static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
		780	const struct intel_sdvo_dtd *dtd)
		781	{
		782	mode->hdisplay = dtd->part1.h_active;
		783	mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
		784	mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
		785	mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
		786	mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
		787	mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
		788	mode->htotal = mode->hdisplay + dtd->part1.h_blank;
		789	mode->htotal += (dtd->part1.h_high & 0xf) << 8;
		790
		791	mode->vdisplay = dtd->part1.v_active;
		792	mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
		793	mode->vsync_start = mode->vdisplay;
		794	mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
		795	mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
		796	mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
		797	mode->vsync_end = mode->vsync_start +
		798	(dtd->part2.v_sync_off_width & 0xf);
		799	mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
		800	mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
		801	mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
		802
		803	mode->clock = dtd->part1.clock * 10;
		804
		805	mode->flags &= ~(DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC);
		806	if (dtd->part2.dtd_flags & 0x2)
		807	mode->flags \|= DRM_MODE_FLAG_PHSYNC;
		808	if (dtd->part2.dtd_flags & 0x4)
		809	mode->flags \|= DRM_MODE_FLAG_PVSYNC;
		810	}
		811
		812	static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
		813	{
		814	struct intel_sdvo_encode encode;
		815
		816	BUILD_BUG_ON(sizeof(encode) != 2);
		817	return intel_sdvo_get_value(intel_sdvo,
		818	SDVO_CMD_GET_SUPP_ENCODE,
		819	&encode, sizeof(encode));
		820	}
		821
		822	static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
		823	uint8_t mode)
		824	{
		825	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
		826	}
		827
		828	static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
		829	uint8_t mode)
		830	{
		831	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
		832	}
		833
		834	#if 0
		835	static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
		836	{
		837	int i, j;
		838	uint8_t set_buf_index[2];
		839	uint8_t av_split;
		840	uint8_t buf_size;
		841	uint8_t buf[48];
		842	uint8_t *pos;
		843
		844	intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
		845
		846	for (i = 0; i <= av_split; i++) {
		847	set_buf_index[0] = i; set_buf_index[1] = 0;
		848	intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
		849	set_buf_index, 2);
		850	intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
		851	intel_sdvo_read_response(encoder, &buf_size, 1);
		852
		853	pos = buf;
		854	for (j = 0; j <= buf_size; j += 8) {
		855	intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
		856	NULL, 0);
		857	intel_sdvo_read_response(encoder, pos, 8);
		858	pos += 8;
		859	}
		860	}
		861	}
		862	#endif
		863
		864	static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
		865	{
		866	struct dip_infoframe avi_if = {
		867	.type = DIP_TYPE_AVI,
		868	.ver = DIP_VERSION_AVI,
		869	.len = DIP_LEN_AVI,
		870	};
		871	uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
		872	uint8_t set_buf_index[2] = { 1, 0 };
		873	uint64_t data = (uint64_t )&avi_if;
		874	unsigned i;
		875
		876	intel_dip_infoframe_csum(&avi_if);
		877
		878	if (!intel_sdvo_set_value(intel_sdvo,
		879	SDVO_CMD_SET_HBUF_INDEX,
		880	set_buf_index, 2))
		881	return false;
		882
		883	for (i = 0; i < sizeof(avi_if); i += 8) {
		884	if (!intel_sdvo_set_value(intel_sdvo,
		885	SDVO_CMD_SET_HBUF_DATA,
		886	data, 8))
		887	return false;
		888	data++;
		889	}
		890
		891	return intel_sdvo_set_value(intel_sdvo,
		892	SDVO_CMD_SET_HBUF_TXRATE,
		893	&tx_rate, 1);
		894	}
		895
		896	static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
		897	{
		898	struct intel_sdvo_tv_format format;
		899	uint32_t format_map;
		900
		901	format_map = 1 << intel_sdvo->tv_format_index;
		902	memset(&format, 0, sizeof(format));
		903	memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
		904
		905	BUILD_BUG_ON(sizeof(format) != 6);
		906	return intel_sdvo_set_value(intel_sdvo,
		907	SDVO_CMD_SET_TV_FORMAT,
		908	&format, sizeof(format));
		909	}
		910
		911	static bool
		912	intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
		913	struct drm_display_mode *mode)
		914	{
		915	struct intel_sdvo_dtd output_dtd;
		916
		917	if (!intel_sdvo_set_target_output(intel_sdvo,
		918	intel_sdvo->attached_output))
		919	return false;
		920
		921	intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
		922	if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
		923	return false;
		924
		925	return true;
		926	}
		927
		928	static bool
		929	intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
		930	struct drm_display_mode *mode,
		931	struct drm_display_mode *adjusted_mode)
		932	{
		933	/* Reset the input timing to the screen. Assume always input 0. */
		934	if (!intel_sdvo_set_target_input(intel_sdvo))
		935	return false;
		936
		937	if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
		938	mode->clock / 10,
		939	mode->hdisplay,
		940	mode->vdisplay))
		941	return false;
		942
		943	if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
		944	&intel_sdvo->input_dtd))
		945	return false;
		946
		947	intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
		948
		949	drm_mode_set_crtcinfo(adjusted_mode, 0);
		950	return true;
		951	}
		952
		953	static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
		954	struct drm_display_mode *mode,
		955	struct drm_display_mode *adjusted_mode)
		956	{
		957	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
		958	int multiplier;
		959
		960	/* We need to construct preferred input timings based on our
		961	* output timings. To do that, we have to set the output
		962	* timings, even though this isn't really the right place in
		963	* the sequence to do it. Oh well.
		964	*/
		965	if (intel_sdvo->is_tv) {
		966	if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
		967	return false;
		968
		969	(void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
		970	mode,
		971	adjusted_mode);
		972	} else if (intel_sdvo->is_lvds) {
		973	if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
		974	intel_sdvo->sdvo_lvds_fixed_mode))
		975	return false;
		976
		977	(void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
		978	mode,
		979	adjusted_mode);
		980	}
		981
		982	/* Make the CRTC code factor in the SDVO pixel multiplier. The
		983	* SDVO device will factor out the multiplier during mode_set.
		984	*/
		985	multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
		986	intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
		987
		988	return true;
		989	}
		990
		991	static void intel_sdvo_mode_set(struct drm_encoder *encoder,
		992	struct drm_display_mode *mode,
		993	struct drm_display_mode *adjusted_mode)
		994	{
		995	struct drm_device *dev = encoder->dev;
		996	struct drm_i915_private *dev_priv = dev->dev_private;
		997	struct drm_crtc *crtc = encoder->crtc;
		998	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
		999	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
		1000	u32 sdvox;
		1001	struct intel_sdvo_in_out_map in_out;
		1002	struct intel_sdvo_dtd input_dtd;
		1003	int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
		1004	int rate;
		1005
		1006	if (!mode)
		1007	return;
		1008
		1009	/* First, set the input mapping for the first input to our controlled
		1010	* output. This is only correct if we're a single-input device, in
		1011	* which case the first input is the output from the appropriate SDVO
		1012	* channel on the motherboard. In a two-input device, the first input
		1013	* will be SDVOB and the second SDVOC.
		1014	*/
		1015	in_out.in0 = intel_sdvo->attached_output;
		1016	in_out.in1 = 0;
		1017
		1018	intel_sdvo_set_value(intel_sdvo,
		1019	SDVO_CMD_SET_IN_OUT_MAP,
		1020	&in_out, sizeof(in_out));
		1021
		1022	/* Set the output timings to the screen */
		1023	if (!intel_sdvo_set_target_output(intel_sdvo,
		1024	intel_sdvo->attached_output))
		1025	return;
		1026
		1027	/* We have tried to get input timing in mode_fixup, and filled into
		1028	* adjusted_mode.
		1029	*/
		1030	if (intel_sdvo->is_tv \|\| intel_sdvo->is_lvds) {
		1031	input_dtd = intel_sdvo->input_dtd;
		1032	} else {
		1033	/* Set the output timing to the screen */
		1034	if (!intel_sdvo_set_target_output(intel_sdvo,
		1035	intel_sdvo->attached_output))
		1036	return;
		1037
		1038	intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
		1039	(void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
		1040	}
		1041
		1042	/* Set the input timing to the screen. Assume always input 0. */
		1043	if (!intel_sdvo_set_target_input(intel_sdvo))
		1044	return;
		1045
		1046	if (intel_sdvo->has_hdmi_monitor) {
		1047	intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
		1048	intel_sdvo_set_colorimetry(intel_sdvo,
		1049	SDVO_COLORIMETRY_RGB256);
		1050	intel_sdvo_set_avi_infoframe(intel_sdvo);
		1051	} else
		1052	intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
		1053
		1054	if (intel_sdvo->is_tv &&
		1055	!intel_sdvo_set_tv_format(intel_sdvo))
		1056	return;
		1057
		1058	(void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
		1059
		1060	switch (pixel_multiplier) {
		1061	default:
		1062	case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
		1063	case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
		1064	case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
		1065	}
		1066	if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
		1067	return;
		1068
		1069	/* Set the SDVO control regs. */
		1070	if (INTEL_INFO(dev)->gen >= 4) {
		1071	sdvox = 0;
		1072	if (intel_sdvo->is_hdmi)
		1073	sdvox \|= intel_sdvo->color_range;
		1074	if (INTEL_INFO(dev)->gen < 5)
		1075	sdvox \|= SDVO_BORDER_ENABLE;
		1076	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
		1077	sdvox \|= SDVO_VSYNC_ACTIVE_HIGH;
		1078	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
		1079	sdvox \|= SDVO_HSYNC_ACTIVE_HIGH;
		1080	} else {
		1081	sdvox = I915_READ(intel_sdvo->sdvo_reg);
		1082	switch (intel_sdvo->sdvo_reg) {
		1083	case SDVOB:
		1084	sdvox &= SDVOB_PRESERVE_MASK;
		1085	break;
		1086	case SDVOC:
		1087	sdvox &= SDVOC_PRESERVE_MASK;
		1088	break;
		1089	}
		1090	sdvox \|= (9 << 19) \| SDVO_BORDER_ENABLE;
		1091	}
		1092	if (intel_crtc->pipe == 1)
		1093	sdvox \|= SDVO_PIPE_B_SELECT;
		1094	if (intel_sdvo->has_hdmi_audio)
		1095	sdvox \|= SDVO_AUDIO_ENABLE;
		1096
		1097	if (INTEL_INFO(dev)->gen >= 4) {
		1098	/* done in crtc_mode_set as the dpll_md reg must be written early */
		1099	} else if (IS_I945G(dev) \|\| IS_I945GM(dev) \|\| IS_G33(dev)) {
		1100	/* done in crtc_mode_set as it lives inside the dpll register */
		1101	} else {
		1102	sdvox \|= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
		1103	}
		1104
		1105	if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
		1106	INTEL_INFO(dev)->gen < 5)
		1107	sdvox \|= SDVO_STALL_SELECT;
		1108	intel_sdvo_write_sdvox(intel_sdvo, sdvox);
		1109	}
		1110
		1111	static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
		1112	{
		1113	struct drm_device *dev = encoder->dev;
		1114	struct drm_i915_private *dev_priv = dev->dev_private;
		1115	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
		1116	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
		1117	u32 temp;
		1118
		1119	if (mode != DRM_MODE_DPMS_ON) {
		1120	intel_sdvo_set_active_outputs(intel_sdvo, 0);
		1121	if (0)
		1122	intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
		1123
		1124	if (mode == DRM_MODE_DPMS_OFF) {
		1125	temp = I915_READ(intel_sdvo->sdvo_reg);
		1126	if ((temp & SDVO_ENABLE) != 0) {
		1127	intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
		1128	}
		1129	}
		1130	} else {
		1131	bool input1, input2;
		1132	int i;
		1133	u8 status;
		1134
		1135	temp = I915_READ(intel_sdvo->sdvo_reg);
		1136	if ((temp & SDVO_ENABLE) == 0)
		1137	intel_sdvo_write_sdvox(intel_sdvo, temp \| SDVO_ENABLE);
		1138	for (i = 0; i < 2; i++)
		1139	intel_wait_for_vblank(dev, intel_crtc->pipe);
		1140
		1141	status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
		1142	/* Warn if the device reported failure to sync.
		1143	* A lot of SDVO devices fail to notify of sync, but it's
		1144	* a given it the status is a success, we succeeded.
		1145	*/
		1146	if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
		1147	DRM_DEBUG_KMS("First %s output reported failure to "
		1148	"sync\n", SDVO_NAME(intel_sdvo));
		1149	}
		1150
		1151	if (0)
		1152	intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
		1153	intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
		1154	}
		1155	return;
		1156	}
		1157
		1158	static int intel_sdvo_mode_valid(struct drm_connector *connector,
		1159	struct drm_display_mode *mode)
		1160	{
		1161	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
		1162
		1163	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
		1164	return MODE_NO_DBLESCAN;
		1165
		1166	if (intel_sdvo->pixel_clock_min > mode->clock)
		1167	return MODE_CLOCK_LOW;
		1168
		1169	if (intel_sdvo->pixel_clock_max < mode->clock)
		1170	return MODE_CLOCK_HIGH;
		1171
		1172	if (intel_sdvo->is_lvds) {
		1173	if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
		1174	return MODE_PANEL;
		1175
		1176	if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
		1177	return MODE_PANEL;
		1178	}
		1179
		1180	return MODE_OK;
		1181	}
		1182
		1183	static bool intel_sdvo_get_capabilities(struct intel_sdvo intel_sdvo, struct intel_sdvo_caps caps)
		1184	{
		1185	BUILD_BUG_ON(sizeof(*caps) != 8);
		1186	if (!intel_sdvo_get_value(intel_sdvo,
		1187	SDVO_CMD_GET_DEVICE_CAPS,
		1188	caps, sizeof(*caps)))
		1189	return false;
		1190
		1191	DRM_DEBUG_KMS("SDVO capabilities:\n"
		1192	" vendor_id: %d\n"
		1193	" device_id: %d\n"
		1194	" device_rev_id: %d\n"
		1195	" sdvo_version_major: %d\n"
		1196	" sdvo_version_minor: %d\n"
		1197	" sdvo_inputs_mask: %d\n"
		1198	" smooth_scaling: %d\n"
		1199	" sharp_scaling: %d\n"
		1200	" up_scaling: %d\n"
		1201	" down_scaling: %d\n"
		1202	" stall_support: %d\n"
		1203	" output_flags: %d\n",
		1204	caps->vendor_id,
		1205	caps->device_id,
		1206	caps->device_rev_id,
		1207	caps->sdvo_version_major,
		1208	caps->sdvo_version_minor,
		1209	caps->sdvo_inputs_mask,
		1210	caps->smooth_scaling,
		1211	caps->sharp_scaling,
		1212	caps->up_scaling,
		1213	caps->down_scaling,
		1214	caps->stall_support,
		1215	caps->output_flags);
		1216
		1217	return true;
		1218	}
		1219
		1220	/* No use! */
		1221	#if 0
		1222	struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
		1223	{
		1224	struct drm_connector *connector = NULL;
		1225	struct intel_sdvo *iout = NULL;
		1226	struct intel_sdvo *sdvo;
		1227
		1228	/* find the sdvo connector */
		1229	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
		1230	iout = to_intel_sdvo(connector);
		1231
		1232	if (iout->type != INTEL_OUTPUT_SDVO)
		1233	continue;
		1234
		1235	sdvo = iout->dev_priv;
		1236
		1237	if (sdvo->sdvo_reg == SDVOB && sdvoB)
		1238	return connector;
		1239
		1240	if (sdvo->sdvo_reg == SDVOC && !sdvoB)
		1241	return connector;
		1242
		1243	}
		1244
		1245	return NULL;
		1246	}
		1247
		1248	int intel_sdvo_supports_hotplug(struct drm_connector *connector)
		1249	{
		1250	u8 response[2];
		1251	u8 status;
		1252	struct intel_sdvo *intel_sdvo;
		1253	DRM_DEBUG_KMS("\n");
		1254
		1255	if (!connector)
		1256	return 0;
		1257
		1258	intel_sdvo = to_intel_sdvo(connector);
		1259
		1260	return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
		1261	&response, 2) && response[0];
		1262	}
		1263
		1264	void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
		1265	{
		1266	u8 response[2];
		1267	u8 status;
		1268	struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
		1269
		1270	intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
		1271	intel_sdvo_read_response(intel_sdvo, &response, 2);
		1272
		1273	if (on) {
		1274	intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
		1275	status = intel_sdvo_read_response(intel_sdvo, &response, 2);
		1276
		1277	intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
		1278	} else {
		1279	response[0] = 0;
		1280	response[1] = 0;
		1281	intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
		1282	}
		1283
		1284	intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
		1285	intel_sdvo_read_response(intel_sdvo, &response, 2);
		1286	}
		1287	#endif
		1288
		1289	static bool
		1290	intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
		1291	{
		1292	/* Is there more than one type of output? */
		1293	int caps = intel_sdvo->caps.output_flags & 0xf;
		1294	return caps & -caps;
		1295	}
		1296
		1297	static struct edid *
		1298	intel_sdvo_get_edid(struct drm_connector *connector)
		1299	{
		1300	struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
		1301	return drm_get_edid(connector, &sdvo->ddc);
		1302	}
		1303
		1304	/* Mac mini hack -- use the same DDC as the analog connector */
		1305	static struct edid *
		1306	intel_sdvo_get_analog_edid(struct drm_connector *connector)
		1307	{
		1308	struct drm_i915_private *dev_priv = connector->dev->dev_private;
		1309
		1310	return drm_get_edid(connector,
		1311	&dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
		1312	}
		1313
		1314	enum drm_connector_status
		1315	intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
		1316	{
		1317	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
		1318	enum drm_connector_status status;
		1319	struct edid *edid;
		1320
		1321	edid = intel_sdvo_get_edid(connector);
		1322
		1323	if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
		1324	u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
		1325
		1326	/*
		1327	* Don't use the 1 as the argument of DDC bus switch to get
		1328	* the EDID. It is used for SDVO SPD ROM.
		1329	*/
		1330	for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
		1331	intel_sdvo->ddc_bus = ddc;
		1332	edid = intel_sdvo_get_edid(connector);
		1333	if (edid)
		1334	break;
		1335	}
		1336	/*
		1337	* If we found the EDID on the other bus,
		1338	* assume that is the correct DDC bus.
		1339	*/
		1340	if (edid == NULL)
		1341	intel_sdvo->ddc_bus = saved_ddc;
		1342	}
		1343
		1344	/*
		1345	* When there is no edid and no monitor is connected with VGA
		1346	* port, try to use the CRT ddc to read the EDID for DVI-connector.
		1347	*/
		1348	if (edid == NULL)
		1349	edid = intel_sdvo_get_analog_edid(connector);
		1350
		1351	status = connector_status_unknown;
		1352	if (edid != NULL) {
		1353	/* DDC bus is shared, match EDID to connector type */
		1354	if (edid->input & DRM_EDID_INPUT_DIGITAL) {
		1355	status = connector_status_connected;
		1356	if (intel_sdvo->is_hdmi) {
		1357	intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
		1358	intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
		1359	}
		1360	} else
		1361	status = connector_status_disconnected;
		1362	connector->display_info.raw_edid = NULL;
		1363	kfree(edid);
		1364	}
		1365
		1366	if (status == connector_status_connected) {
		1367	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
		1368	if (intel_sdvo_connector->force_audio)
		1369	intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
		1370	}
		1371
		1372	return status;
		1373	}
		1374
		1375	static enum drm_connector_status
		1376	intel_sdvo_detect(struct drm_connector *connector, bool force)
		1377	{
		1378	uint16_t response;
		1379	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
		1380	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
		1381	enum drm_connector_status ret;
		1382
		1383	if (!intel_sdvo_write_cmd(intel_sdvo,
		1384	SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
		1385	return connector_status_unknown;
		1386
		1387	/* add 30ms delay when the output type might be TV */
		1388	if (intel_sdvo->caps.output_flags &
		1389	(SDVO_OUTPUT_SVID0 \| SDVO_OUTPUT_CVBS0))
		1390	mdelay(30);
		1391
		1392	if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
		1393	return connector_status_unknown;
		1394
		1395	DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
		1396	response & 0xff, response >> 8,
		1397	intel_sdvo_connector->output_flag);
		1398
		1399	if (response == 0)
		1400	return connector_status_disconnected;
		1401
		1402	intel_sdvo->attached_output = response;
		1403
		1404	intel_sdvo->has_hdmi_monitor = false;
		1405	intel_sdvo->has_hdmi_audio = false;
		1406
		1407	if ((intel_sdvo_connector->output_flag & response) == 0)
		1408	ret = connector_status_disconnected;
		1409	else if (IS_TMDS(intel_sdvo_connector))
		1410	ret = intel_sdvo_hdmi_sink_detect(connector);
		1411	else {
		1412	struct edid *edid;
		1413
		1414	/* if we have an edid check it matches the connection */
		1415	edid = intel_sdvo_get_edid(connector);
		1416	if (edid == NULL)
		1417	edid = intel_sdvo_get_analog_edid(connector);
		1418	if (edid != NULL) {
		1419	if (edid->input & DRM_EDID_INPUT_DIGITAL)
		1420	ret = connector_status_disconnected;
		1421	else
		1422	ret = connector_status_connected;
		1423	connector->display_info.raw_edid = NULL;
		1424	kfree(edid);
		1425	} else
		1426	ret = connector_status_connected;
		1427	}
		1428
		1429	/* May update encoder flag for like clock for SDVO TV, etc.*/
		1430	if (ret == connector_status_connected) {
		1431	intel_sdvo->is_tv = false;
		1432	intel_sdvo->is_lvds = false;
		1433	intel_sdvo->base.needs_tv_clock = false;
		1434
		1435	if (response & SDVO_TV_MASK) {
		1436	intel_sdvo->is_tv = true;
		1437	intel_sdvo->base.needs_tv_clock = true;
		1438	}
		1439	if (response & SDVO_LVDS_MASK)
		1440	intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
		1441	}
		1442
		1443	return ret;
		1444	}
		1445
		1446	static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
		1447	{
		1448	struct edid *edid;
		1449
		1450	/* set the bus switch and get the modes */
		1451	edid = intel_sdvo_get_edid(connector);
		1452
		1453	/*
		1454	* Mac mini hack. On this device, the DVI-I connector shares one DDC
		1455	* link between analog and digital outputs. So, if the regular SDVO
		1456	* DDC fails, check to see if the analog output is disconnected, in
		1457	* which case we'll look there for the digital DDC data.
		1458	*/
		1459	if (edid == NULL)
		1460	edid = intel_sdvo_get_analog_edid(connector);
		1461
		1462	if (edid != NULL) {
		1463	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
		1464	bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
		1465	bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector);
		1466
		1467	if (connector_is_digital == monitor_is_digital) {
		1468	drm_mode_connector_update_edid_property(connector, edid);
		1469	drm_add_edid_modes(connector, edid);
		1470	}
		1471
		1472	connector->display_info.raw_edid = NULL;
		1473	kfree(edid);
		1474	}
		1475	}
		1476
		1477	/*
		1478	* Set of SDVO TV modes.
		1479	* Note! This is in reply order (see loop in get_tv_modes).
		1480	* XXX: all 60Hz refresh?
		1481	*/
		1482	static const struct drm_display_mode sdvo_tv_modes[] = {
		1483	{ DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
		1484	416, 0, 200, 201, 232, 233, 0,
		1485	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1486	{ DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
		1487	416, 0, 240, 241, 272, 273, 0,
		1488	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1489	{ DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
		1490	496, 0, 300, 301, 332, 333, 0,
		1491	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1492	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
		1493	736, 0, 350, 351, 382, 383, 0,
		1494	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1495	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
		1496	736, 0, 400, 401, 432, 433, 0,
		1497	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1498	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
		1499	736, 0, 480, 481, 512, 513, 0,
		1500	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1501	{ DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
		1502	800, 0, 480, 481, 512, 513, 0,
		1503	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1504	{ DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
		1505	800, 0, 576, 577, 608, 609, 0,
		1506	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1507	{ DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
		1508	816, 0, 350, 351, 382, 383, 0,
		1509	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1510	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
		1511	816, 0, 400, 401, 432, 433, 0,
		1512	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1513	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
		1514	816, 0, 480, 481, 512, 513, 0,
		1515	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1516	{ DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
		1517	816, 0, 540, 541, 572, 573, 0,
		1518	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1519	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
		1520	816, 0, 576, 577, 608, 609, 0,
		1521	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1522	{ DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
		1523	864, 0, 576, 577, 608, 609, 0,
		1524	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1525	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
		1526	896, 0, 600, 601, 632, 633, 0,
		1527	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1528	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
		1529	928, 0, 624, 625, 656, 657, 0,
		1530	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1531	{ DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
		1532	1016, 0, 766, 767, 798, 799, 0,
		1533	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1534	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
		1535	1120, 0, 768, 769, 800, 801, 0,
		1536	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1537	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
		1538	1376, 0, 1024, 1025, 1056, 1057, 0,
		1539	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		1540	};
		1541
		1542	static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
		1543	{
		1544	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
		1545	struct intel_sdvo_sdtv_resolution_request tv_res;
		1546	uint32_t reply = 0, format_map = 0;
		1547	int i;
		1548
		1549	/* Read the list of supported input resolutions for the selected TV
		1550	* format.
		1551	*/
		1552	format_map = 1 << intel_sdvo->tv_format_index;
		1553	memcpy(&tv_res, &format_map,
		1554	min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
		1555
		1556	if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
		1557	return;
		1558
		1559	BUILD_BUG_ON(sizeof(tv_res) != 3);
		1560	if (!intel_sdvo_write_cmd(intel_sdvo,
		1561	SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
		1562	&tv_res, sizeof(tv_res)))
		1563	return;
		1564	if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
		1565	return;
		1566
		1567	for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
		1568	if (reply & (1 << i)) {
		1569	struct drm_display_mode *nmode;
		1570	nmode = drm_mode_duplicate(connector->dev,
		1571	&sdvo_tv_modes[i]);
		1572	if (nmode)
		1573	drm_mode_probed_add(connector, nmode);
		1574	}
		1575	}
		1576
		1577	static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
		1578	{
		1579	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
		1580	struct drm_i915_private *dev_priv = connector->dev->dev_private;
		1581	struct drm_display_mode *newmode;
		1582
		1583	/*
		1584	* Attempt to get the mode list from DDC.
		1585	* Assume that the preferred modes are
		1586	* arranged in priority order.
		1587	*/
		1588	intel_ddc_get_modes(connector, intel_sdvo->i2c);
		1589	if (list_empty(&connector->probed_modes) == false)
		1590	goto end;
		1591
		1592	/* Fetch modes from VBT */
		1593	if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
		1594	newmode = drm_mode_duplicate(connector->dev,
		1595	dev_priv->sdvo_lvds_vbt_mode);
		1596	if (newmode != NULL) {
		1597	/* Guarantee the mode is preferred */
		1598	newmode->type = (DRM_MODE_TYPE_PREFERRED \|
		1599	DRM_MODE_TYPE_DRIVER);
		1600	drm_mode_probed_add(connector, newmode);
		1601	}
		1602	}
		1603
		1604	end:
		1605	list_for_each_entry(newmode, &connector->probed_modes, head) {
		1606	if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
		1607	intel_sdvo->sdvo_lvds_fixed_mode =
		1608	drm_mode_duplicate(connector->dev, newmode);
		1609
		1610	drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
		1611	0);
		1612
		1613	intel_sdvo->is_lvds = true;
		1614	break;
		1615	}
		1616	}
		1617
		1618	}
		1619
		1620	static int intel_sdvo_get_modes(struct drm_connector *connector)
		1621	{
		1622	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
		1623
		1624	if (IS_TV(intel_sdvo_connector))
		1625	intel_sdvo_get_tv_modes(connector);
		1626	else if (IS_LVDS(intel_sdvo_connector))
		1627	intel_sdvo_get_lvds_modes(connector);
		1628	else
		1629	intel_sdvo_get_ddc_modes(connector);
		1630
		1631	return !list_empty(&connector->probed_modes);
		1632	}
		1633
		1634	static void
		1635	intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
		1636	{
		1637	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
		1638	struct drm_device *dev = connector->dev;
		1639
		1640	if (intel_sdvo_connector->left)
		1641	drm_property_destroy(dev, intel_sdvo_connector->left);
		1642	if (intel_sdvo_connector->right)
		1643	drm_property_destroy(dev, intel_sdvo_connector->right);
		1644	if (intel_sdvo_connector->top)
		1645	drm_property_destroy(dev, intel_sdvo_connector->top);
		1646	if (intel_sdvo_connector->bottom)
		1647	drm_property_destroy(dev, intel_sdvo_connector->bottom);
		1648	if (intel_sdvo_connector->hpos)
		1649	drm_property_destroy(dev, intel_sdvo_connector->hpos);
		1650	if (intel_sdvo_connector->vpos)
		1651	drm_property_destroy(dev, intel_sdvo_connector->vpos);
		1652	if (intel_sdvo_connector->saturation)
		1653	drm_property_destroy(dev, intel_sdvo_connector->saturation);
		1654	if (intel_sdvo_connector->contrast)
		1655	drm_property_destroy(dev, intel_sdvo_connector->contrast);
		1656	if (intel_sdvo_connector->hue)
		1657	drm_property_destroy(dev, intel_sdvo_connector->hue);
		1658	if (intel_sdvo_connector->sharpness)
		1659	drm_property_destroy(dev, intel_sdvo_connector->sharpness);
		1660	if (intel_sdvo_connector->flicker_filter)
		1661	drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
		1662	if (intel_sdvo_connector->flicker_filter_2d)
		1663	drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
		1664	if (intel_sdvo_connector->flicker_filter_adaptive)
		1665	drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
		1666	if (intel_sdvo_connector->tv_luma_filter)
		1667	drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
		1668	if (intel_sdvo_connector->tv_chroma_filter)
		1669	drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
		1670	if (intel_sdvo_connector->dot_crawl)
		1671	drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
		1672	if (intel_sdvo_connector->brightness)
		1673	drm_property_destroy(dev, intel_sdvo_connector->brightness);
		1674	}
		1675
		1676	static void intel_sdvo_destroy(struct drm_connector *connector)
		1677	{
		1678	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
		1679
		1680	if (intel_sdvo_connector->tv_format)
		1681	drm_property_destroy(connector->dev,
		1682	intel_sdvo_connector->tv_format);
		1683
		1684	intel_sdvo_destroy_enhance_property(connector);
		1685	drm_sysfs_connector_remove(connector);
		1686	drm_connector_cleanup(connector);
		1687	kfree(connector);
		1688	}
		1689
		1690
		1691
		1692
		1693
		1694	static int
		1695	intel_sdvo_set_property(struct drm_connector *connector,
		1696	struct drm_property *property,
		1697	uint64_t val)
		1698	{
		1699	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
		1700	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
		1701	struct drm_i915_private *dev_priv = connector->dev->dev_private;
		1702	uint16_t temp_value;
		1703	uint8_t cmd;
		1704	int ret;
		1705
		1706	ret = drm_connector_property_set_value(connector, property, val);
		1707	if (ret)
		1708	return ret;
		1709
		1710	#if 0
		1711	if (property == dev_priv->force_audio_property) {
		1712	int i = val;
		1713	bool has_audio;
		1714
		1715	if (i == intel_sdvo_connector->force_audio)
		1716	return 0;
		1717
		1718	intel_sdvo_connector->force_audio = i;
		1719
		1720	if (i == 0)
		1721	has_audio = intel_sdvo_detect_hdmi_audio(connector);
		1722	else
		1723	has_audio = i > 0;
		1724
		1725	if (has_audio == intel_sdvo->has_hdmi_audio)
		1726	return 0;
		1727
		1728	intel_sdvo->has_hdmi_audio = has_audio;
		1729	goto done;
		1730	}
		1731
		1732	if (property == dev_priv->broadcast_rgb_property) {
		1733	if (val == !!intel_sdvo->color_range)
		1734	return 0;
		1735
		1736	intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
		1737	goto done;
		1738	}
		1739	#endif
		1740
		1741	#define CHECK_PROPERTY(name, NAME) \
		1742	if (intel_sdvo_connector->name == property) { \
		1743	if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
		1744	if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
		1745	cmd = SDVO_CMD_SET_##NAME; \
		1746	intel_sdvo_connector->cur_##name = temp_value; \
		1747	goto set_value; \
		1748	}
		1749
		1750	if (property == intel_sdvo_connector->tv_format) {
		1751	if (val >= TV_FORMAT_NUM)
		1752	return -EINVAL;
		1753
		1754	if (intel_sdvo->tv_format_index ==
		1755	intel_sdvo_connector->tv_format_supported[val])
		1756	return 0;
		1757
		1758	intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
		1759	goto done;
		1760	} else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
		1761	temp_value = val;
		1762	if (intel_sdvo_connector->left == property) {
		1763	drm_connector_property_set_value(connector,
		1764	intel_sdvo_connector->right, val);
		1765	if (intel_sdvo_connector->left_margin == temp_value)
		1766	return 0;
		1767
		1768	intel_sdvo_connector->left_margin = temp_value;
		1769	intel_sdvo_connector->right_margin = temp_value;
		1770	temp_value = intel_sdvo_connector->max_hscan -
		1771	intel_sdvo_connector->left_margin;
		1772	cmd = SDVO_CMD_SET_OVERSCAN_H;
		1773	goto set_value;
		1774	} else if (intel_sdvo_connector->right == property) {
		1775	drm_connector_property_set_value(connector,
		1776	intel_sdvo_connector->left, val);
		1777	if (intel_sdvo_connector->right_margin == temp_value)
		1778	return 0;
		1779
		1780	intel_sdvo_connector->left_margin = temp_value;
		1781	intel_sdvo_connector->right_margin = temp_value;
		1782	temp_value = intel_sdvo_connector->max_hscan -
		1783	intel_sdvo_connector->left_margin;
		1784	cmd = SDVO_CMD_SET_OVERSCAN_H;
		1785	goto set_value;
		1786	} else if (intel_sdvo_connector->top == property) {
		1787	drm_connector_property_set_value(connector,
		1788	intel_sdvo_connector->bottom, val);
		1789	if (intel_sdvo_connector->top_margin == temp_value)
		1790	return 0;
		1791
		1792	intel_sdvo_connector->top_margin = temp_value;
		1793	intel_sdvo_connector->bottom_margin = temp_value;
		1794	temp_value = intel_sdvo_connector->max_vscan -
		1795	intel_sdvo_connector->top_margin;
		1796	cmd = SDVO_CMD_SET_OVERSCAN_V;
		1797	goto set_value;
		1798	} else if (intel_sdvo_connector->bottom == property) {
		1799	drm_connector_property_set_value(connector,
		1800	intel_sdvo_connector->top, val);
		1801	if (intel_sdvo_connector->bottom_margin == temp_value)
		1802	return 0;
		1803
		1804	intel_sdvo_connector->top_margin = temp_value;
		1805	intel_sdvo_connector->bottom_margin = temp_value;
		1806	temp_value = intel_sdvo_connector->max_vscan -
		1807	intel_sdvo_connector->top_margin;
		1808	cmd = SDVO_CMD_SET_OVERSCAN_V;
		1809	goto set_value;
		1810	}
		1811	CHECK_PROPERTY(hpos, HPOS)
		1812	CHECK_PROPERTY(vpos, VPOS)
		1813	CHECK_PROPERTY(saturation, SATURATION)
		1814	CHECK_PROPERTY(contrast, CONTRAST)
		1815	CHECK_PROPERTY(hue, HUE)
		1816	CHECK_PROPERTY(brightness, BRIGHTNESS)
		1817	CHECK_PROPERTY(sharpness, SHARPNESS)
		1818	CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
		1819	CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
		1820	CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
		1821	CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
		1822	CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
		1823	CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
		1824	}
		1825
		1826	return -EINVAL; /* unknown property */
		1827
		1828	set_value:
		1829	if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
		1830	return -EIO;
		1831
		1832
		1833	done:
		1834	if (intel_sdvo->base.base.crtc) {
		1835	struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
		1836	drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
		1837	crtc->y, crtc->fb);
		1838	}
		1839
		1840	return 0;
		1841	#undef CHECK_PROPERTY
		1842	}
		1843
		1844	static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
		1845	.dpms = intel_sdvo_dpms,
		1846	.mode_fixup = intel_sdvo_mode_fixup,
		1847	.prepare = intel_encoder_prepare,
		1848	.mode_set = intel_sdvo_mode_set,
		1849	.commit = intel_encoder_commit,
		1850	};
		1851
		1852	static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
		1853	.dpms = drm_helper_connector_dpms,
		1854	.detect = intel_sdvo_detect,
		1855	.fill_modes = drm_helper_probe_single_connector_modes,
		1856	.set_property = intel_sdvo_set_property,
		1857	.destroy = intel_sdvo_destroy,
		1858	};
		1859
		1860	static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
		1861	.get_modes = intel_sdvo_get_modes,
		1862	.mode_valid = intel_sdvo_mode_valid,
		1863	.best_encoder = intel_best_encoder,
		1864	};
		1865
		1866	static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
		1867	{
		1868	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
		1869
		1870	if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
		1871	drm_mode_destroy(encoder->dev,
		1872	intel_sdvo->sdvo_lvds_fixed_mode);
		1873
		1874	// i2c_del_adapter(&intel_sdvo->ddc);
		1875	intel_encoder_destroy(encoder);
		1876	}
		1877
		1878	static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
		1879	.destroy = intel_sdvo_enc_destroy,
		1880	};
		1881
		1882	static void
		1883	intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
		1884	{
		1885	uint16_t mask = 0;
		1886	unsigned int num_bits;
		1887
		1888	/* Make a mask of outputs less than or equal to our own priority in the
		1889	* list.
		1890	*/
		1891	switch (sdvo->controlled_output) {
		1892	case SDVO_OUTPUT_LVDS1:
		1893	mask \|= SDVO_OUTPUT_LVDS1;
		1894	case SDVO_OUTPUT_LVDS0:
		1895	mask \|= SDVO_OUTPUT_LVDS0;
		1896	case SDVO_OUTPUT_TMDS1:
		1897	mask \|= SDVO_OUTPUT_TMDS1;
		1898	case SDVO_OUTPUT_TMDS0:
		1899	mask \|= SDVO_OUTPUT_TMDS0;
		1900	case SDVO_OUTPUT_RGB1:
		1901	mask \|= SDVO_OUTPUT_RGB1;
		1902	case SDVO_OUTPUT_RGB0:
		1903	mask \|= SDVO_OUTPUT_RGB0;
		1904	break;
		1905	}
		1906
		1907	/* Count bits to find what number we are in the priority list. */
		1908	mask &= sdvo->caps.output_flags;
		1909	num_bits = hweight16(mask);
		1910	/* If more than 3 outputs, default to DDC bus 3 for now. */
		1911	if (num_bits > 3)
		1912	num_bits = 3;
		1913
		1914	/* Corresponds to SDVO_CONTROL_BUS_DDCx */
		1915	sdvo->ddc_bus = 1 << num_bits;
		1916	}
		1917
		1918	/**
		1919	* Choose the appropriate DDC bus for control bus switch command for this
		1920	* SDVO output based on the controlled output.
		1921	*
		1922	* DDC bus number assignment is in a priority order of RGB outputs, then TMDS
		1923	* outputs, then LVDS outputs.
		1924	*/
		1925	static void
		1926	intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
		1927	struct intel_sdvo *sdvo, u32 reg)
		1928	{
		1929	struct sdvo_device_mapping *mapping;
		1930
		1931	if (IS_SDVOB(reg))
		1932	mapping = &(dev_priv->sdvo_mappings[0]);
		1933	else
		1934	mapping = &(dev_priv->sdvo_mappings[1]);
		1935
		1936	if (mapping->initialized)
		1937	sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
		1938	else
		1939	intel_sdvo_guess_ddc_bus(sdvo);
		1940	}
		1941
		1942	static void
		1943	intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
		1944	struct intel_sdvo *sdvo, u32 reg)
		1945	{
		1946	struct sdvo_device_mapping *mapping;
		1947	u8 pin, speed;
		1948
		1949	if (IS_SDVOB(reg))
		1950	mapping = &dev_priv->sdvo_mappings[0];
		1951	else
		1952	mapping = &dev_priv->sdvo_mappings[1];
		1953
		1954	pin = GMBUS_PORT_DPB;
		1955	speed = GMBUS_RATE_1MHZ >> 8;
		1956	if (mapping->initialized) {
		1957	pin = mapping->i2c_pin;
		1958	speed = mapping->i2c_speed;
		1959	}
		1960
		1961	if (pin < GMBUS_NUM_PORTS) {
		1962	sdvo->i2c = &dev_priv->gmbus[pin].adapter;
		1963	intel_gmbus_set_speed(sdvo->i2c, speed);
		1964	intel_gmbus_force_bit(sdvo->i2c, true);
		1965	} else
		1966	sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
		1967	}
		1968
		1969	static bool
		1970	intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
		1971	{
		1972	return intel_sdvo_check_supp_encode(intel_sdvo);
		1973	}
		1974
		1975	static u8
		1976	intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
		1977	{
		1978	struct drm_i915_private *dev_priv = dev->dev_private;
		1979	struct sdvo_device_mapping my_mapping, other_mapping;
		1980
		1981	if (IS_SDVOB(sdvo_reg)) {
		1982	my_mapping = &dev_priv->sdvo_mappings[0];
		1983	other_mapping = &dev_priv->sdvo_mappings[1];
		1984	} else {
		1985	my_mapping = &dev_priv->sdvo_mappings[1];
		1986	other_mapping = &dev_priv->sdvo_mappings[0];
		1987	}
		1988
		1989	/* If the BIOS described our SDVO device, take advantage of it. */
		1990	if (my_mapping->slave_addr)
		1991	return my_mapping->slave_addr;
		1992
		1993	/* If the BIOS only described a different SDVO device, use the
		1994	* address that it isn't using.
		1995	*/
		1996	if (other_mapping->slave_addr) {
		1997	if (other_mapping->slave_addr == 0x70)
		1998	return 0x72;
		1999	else
		2000	return 0x70;
		2001	}
		2002
		2003	/* No SDVO device info is found for another DVO port,
		2004	* so use mapping assumption we had before BIOS parsing.
		2005	*/
		2006	if (IS_SDVOB(sdvo_reg))
		2007	return 0x70;
		2008	else
		2009	return 0x72;
		2010	}
		2011
		2012	static void
		2013	intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
		2014	struct intel_sdvo *encoder)
		2015	{
		2016	drm_connector_init(encoder->base.base.dev,
		2017	&connector->base.base,
		2018	&intel_sdvo_connector_funcs,
		2019	connector->base.base.connector_type);
		2020
		2021	drm_connector_helper_add(&connector->base.base,
		2022	&intel_sdvo_connector_helper_funcs);
		2023
		2024	connector->base.base.interlace_allowed = 0;
		2025	connector->base.base.doublescan_allowed = 0;
		2026	connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
		2027
		2028	intel_connector_attach_encoder(&connector->base, &encoder->base);
		2029	drm_sysfs_connector_add(&connector->base.base);
		2030	}
		2031
		2032	static void
		2033	intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
		2034	{
		2035	struct drm_device *dev = connector->base.base.dev;
		2036
		2037	intel_attach_force_audio_property(&connector->base.base);
		2038	if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
		2039	intel_attach_broadcast_rgb_property(&connector->base.base);
		2040	}
		2041
		2042	static bool
		2043	intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
		2044	{
		2045	struct drm_encoder *encoder = &intel_sdvo->base.base;
		2046	struct drm_connector *connector;
		2047	struct intel_connector *intel_connector;
		2048	struct intel_sdvo_connector *intel_sdvo_connector;
		2049
		2050	intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
		2051	if (!intel_sdvo_connector)
		2052	return false;
		2053
		2054	if (device == 0) {
		2055	intel_sdvo->controlled_output \|= SDVO_OUTPUT_TMDS0;
		2056	intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
		2057	} else if (device == 1) {
		2058	intel_sdvo->controlled_output \|= SDVO_OUTPUT_TMDS1;
		2059	intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
		2060	}
		2061
		2062	intel_connector = &intel_sdvo_connector->base;
		2063	connector = &intel_connector->base;
		2064	connector->polled = DRM_CONNECTOR_POLL_CONNECT \| DRM_CONNECTOR_POLL_DISCONNECT;
		2065	encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
		2066	connector->connector_type = DRM_MODE_CONNECTOR_DVID;
		2067
		2068	if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
		2069	connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
		2070	intel_sdvo->is_hdmi = true;
		2071	}
		2072	intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) \|
		2073	(1 << INTEL_ANALOG_CLONE_BIT));
		2074
		2075	intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
		2076	if (intel_sdvo->is_hdmi)
		2077	intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
		2078
		2079	return true;
		2080	}
		2081
		2082	static bool
		2083	intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
		2084	{
		2085	struct drm_encoder *encoder = &intel_sdvo->base.base;
		2086	struct drm_connector *connector;
		2087	struct intel_connector *intel_connector;
		2088	struct intel_sdvo_connector *intel_sdvo_connector;
		2089
		2090	intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
		2091	if (!intel_sdvo_connector)
		2092	return false;
		2093
		2094	intel_connector = &intel_sdvo_connector->base;
		2095	connector = &intel_connector->base;
		2096	encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
		2097	connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
		2098
		2099	intel_sdvo->controlled_output \|= type;
		2100	intel_sdvo_connector->output_flag = type;
		2101
		2102	intel_sdvo->is_tv = true;
		2103	intel_sdvo->base.needs_tv_clock = true;
		2104	intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
		2105
		2106	intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
		2107
		2108	if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
		2109	goto err;
		2110
		2111	if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
		2112	goto err;
		2113
		2114	return true;
		2115
		2116	err:
		2117	intel_sdvo_destroy(connector);
		2118	return false;
		2119	}
		2120
		2121	static bool
		2122	intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
		2123	{
		2124	struct drm_encoder *encoder = &intel_sdvo->base.base;
		2125	struct drm_connector *connector;
		2126	struct intel_connector *intel_connector;
		2127	struct intel_sdvo_connector *intel_sdvo_connector;
		2128
		2129	intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
		2130	if (!intel_sdvo_connector)
		2131	return false;
		2132
		2133	intel_connector = &intel_sdvo_connector->base;
		2134	connector = &intel_connector->base;
		2135	connector->polled = DRM_CONNECTOR_POLL_CONNECT;
		2136	encoder->encoder_type = DRM_MODE_ENCODER_DAC;
		2137	connector->connector_type = DRM_MODE_CONNECTOR_VGA;
		2138
		2139	if (device == 0) {
		2140	intel_sdvo->controlled_output \|= SDVO_OUTPUT_RGB0;
		2141	intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
		2142	} else if (device == 1) {
		2143	intel_sdvo->controlled_output \|= SDVO_OUTPUT_RGB1;
		2144	intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
		2145	}
		2146
		2147	intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) \|
		2148	(1 << INTEL_ANALOG_CLONE_BIT));
		2149
		2150	intel_sdvo_connector_init(intel_sdvo_connector,
		2151	intel_sdvo);
		2152	return true;
		2153	}
		2154
		2155	static bool
		2156	intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
		2157	{
		2158	struct drm_encoder *encoder = &intel_sdvo->base.base;
		2159	struct drm_connector *connector;
		2160	struct intel_connector *intel_connector;
		2161	struct intel_sdvo_connector *intel_sdvo_connector;
		2162
		2163	intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
		2164	if (!intel_sdvo_connector)
		2165	return false;
		2166
		2167	intel_connector = &intel_sdvo_connector->base;
		2168	connector = &intel_connector->base;
		2169	encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
		2170	connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
		2171
		2172	if (device == 0) {
		2173	intel_sdvo->controlled_output \|= SDVO_OUTPUT_LVDS0;
		2174	intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
		2175	} else if (device == 1) {
		2176	intel_sdvo->controlled_output \|= SDVO_OUTPUT_LVDS1;
		2177	intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
		2178	}
		2179
		2180	intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) \|
		2181	(1 << INTEL_SDVO_LVDS_CLONE_BIT));
		2182
		2183	intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
		2184	if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
		2185	goto err;
		2186
		2187	return true;
		2188
		2189	err:
		2190	intel_sdvo_destroy(connector);
		2191	return false;
		2192	}
		2193
		2194	static bool
		2195	intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
		2196	{
		2197	intel_sdvo->is_tv = false;
		2198	intel_sdvo->base.needs_tv_clock = false;
		2199	intel_sdvo->is_lvds = false;
		2200
		2201	/* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
		2202
		2203	if (flags & SDVO_OUTPUT_TMDS0)
		2204	if (!intel_sdvo_dvi_init(intel_sdvo, 0))
		2205	return false;
		2206
		2207	if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
		2208	if (!intel_sdvo_dvi_init(intel_sdvo, 1))
		2209	return false;
		2210
		2211	/* TV has no XXX1 function block */
		2212	if (flags & SDVO_OUTPUT_SVID0)
		2213	if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
		2214	return false;
		2215
		2216	if (flags & SDVO_OUTPUT_CVBS0)
		2217	if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
		2218	return false;
		2219
		2220	if (flags & SDVO_OUTPUT_RGB0)
		2221	if (!intel_sdvo_analog_init(intel_sdvo, 0))
		2222	return false;
		2223
		2224	if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
		2225	if (!intel_sdvo_analog_init(intel_sdvo, 1))
		2226	return false;
		2227
		2228	if (flags & SDVO_OUTPUT_LVDS0)
		2229	if (!intel_sdvo_lvds_init(intel_sdvo, 0))
		2230	return false;
		2231
		2232	if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
		2233	if (!intel_sdvo_lvds_init(intel_sdvo, 1))
		2234	return false;
		2235
		2236	if ((flags & SDVO_OUTPUT_MASK) == 0) {
		2237	unsigned char bytes[2];
		2238
		2239	intel_sdvo->controlled_output = 0;
		2240	memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
		2241	DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
		2242	SDVO_NAME(intel_sdvo),
		2243	bytes[0], bytes[1]);
		2244	return false;
		2245	}
		2246	intel_sdvo->base.crtc_mask = (1 << 0) \| (1 << 1);
		2247
		2248	return true;
		2249	}
		2250
		2251	static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
		2252	struct intel_sdvo_connector *intel_sdvo_connector,
		2253	int type)
		2254	{
		2255	struct drm_device *dev = intel_sdvo->base.base.dev;
		2256	struct intel_sdvo_tv_format format;
		2257	uint32_t format_map, i;
		2258
		2259	if (!intel_sdvo_set_target_output(intel_sdvo, type))
		2260	return false;
		2261
		2262	BUILD_BUG_ON(sizeof(format) != 6);
		2263	if (!intel_sdvo_get_value(intel_sdvo,
		2264	SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
		2265	&format, sizeof(format)))
		2266	return false;
		2267
		2268	memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
		2269
		2270	if (format_map == 0)
		2271	return false;
		2272
		2273	intel_sdvo_connector->format_supported_num = 0;
		2274	for (i = 0 ; i < TV_FORMAT_NUM; i++)
		2275	if (format_map & (1 << i))
		2276	intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
		2277
		2278
		2279	intel_sdvo_connector->tv_format =
		2280	drm_property_create(dev, DRM_MODE_PROP_ENUM,
		2281	"mode", intel_sdvo_connector->format_supported_num);
		2282	if (!intel_sdvo_connector->tv_format)
		2283	return false;
		2284
		2285	for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
		2286	drm_property_add_enum(
		2287	intel_sdvo_connector->tv_format, i,
		2288	i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
		2289
		2290	intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
		2291	drm_connector_attach_property(&intel_sdvo_connector->base.base,
		2292	intel_sdvo_connector->tv_format, 0);
		2293	return true;
		2294
		2295	}
		2296
		2297	#define ENHANCEMENT(name, NAME) do { \
		2298	if (enhancements.name) { \
		2299	if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) \|\| \
		2300	!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
		2301	return false; \
		2302	intel_sdvo_connector->max_##name = data_value[0]; \
		2303	intel_sdvo_connector->cur_##name = response; \
		2304	intel_sdvo_connector->name = \
		2305	drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
		2306	if (!intel_sdvo_connector->name) return false; \
		2307	intel_sdvo_connector->name->values[0] = 0; \
		2308	intel_sdvo_connector->name->values[1] = data_value[0]; \
		2309	drm_connector_attach_property(connector, \
		2310	intel_sdvo_connector->name, \
		2311	intel_sdvo_connector->cur_##name); \
		2312	DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
		2313	data_value[0], data_value[1], response); \
		2314	} \
		2315	} while(0)
		2316
		2317	static bool
		2318	intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
		2319	struct intel_sdvo_connector *intel_sdvo_connector,
		2320	struct intel_sdvo_enhancements_reply enhancements)
		2321	{
		2322	struct drm_device *dev = intel_sdvo->base.base.dev;
		2323	struct drm_connector *connector = &intel_sdvo_connector->base.base;
		2324	uint16_t response, data_value[2];
		2325
		2326	/* when horizontal overscan is supported, Add the left/right property */
		2327	if (enhancements.overscan_h) {
		2328	if (!intel_sdvo_get_value(intel_sdvo,
		2329	SDVO_CMD_GET_MAX_OVERSCAN_H,
		2330	&data_value, 4))
		2331	return false;
		2332
		2333	if (!intel_sdvo_get_value(intel_sdvo,
		2334	SDVO_CMD_GET_OVERSCAN_H,
		2335	&response, 2))
		2336	return false;
		2337
		2338	intel_sdvo_connector->max_hscan = data_value[0];
		2339	intel_sdvo_connector->left_margin = data_value[0] - response;
		2340	intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
		2341	intel_sdvo_connector->left =
		2342	drm_property_create(dev, DRM_MODE_PROP_RANGE,
		2343	"left_margin", 2);
		2344	if (!intel_sdvo_connector->left)
		2345	return false;
		2346
		2347	intel_sdvo_connector->left->values[0] = 0;
		2348	intel_sdvo_connector->left->values[1] = data_value[0];
		2349	drm_connector_attach_property(connector,
		2350	intel_sdvo_connector->left,
		2351	intel_sdvo_connector->left_margin);
		2352
		2353	intel_sdvo_connector->right =
		2354	drm_property_create(dev, DRM_MODE_PROP_RANGE,
		2355	"right_margin", 2);
		2356	if (!intel_sdvo_connector->right)
		2357	return false;
		2358
		2359	intel_sdvo_connector->right->values[0] = 0;
		2360	intel_sdvo_connector->right->values[1] = data_value[0];
		2361	drm_connector_attach_property(connector,
		2362	intel_sdvo_connector->right,
		2363	intel_sdvo_connector->right_margin);
		2364	DRM_DEBUG_KMS("h_overscan: max %d, "
		2365	"default %d, current %d\n",
		2366	data_value[0], data_value[1], response);
		2367	}
		2368
		2369	if (enhancements.overscan_v) {
		2370	if (!intel_sdvo_get_value(intel_sdvo,
		2371	SDVO_CMD_GET_MAX_OVERSCAN_V,
		2372	&data_value, 4))
		2373	return false;
		2374
		2375	if (!intel_sdvo_get_value(intel_sdvo,
		2376	SDVO_CMD_GET_OVERSCAN_V,
		2377	&response, 2))
		2378	return false;
		2379
		2380	intel_sdvo_connector->max_vscan = data_value[0];
		2381	intel_sdvo_connector->top_margin = data_value[0] - response;
		2382	intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
		2383	intel_sdvo_connector->top =
		2384	drm_property_create(dev, DRM_MODE_PROP_RANGE,
		2385	"top_margin", 2);
		2386	if (!intel_sdvo_connector->top)
		2387	return false;
		2388
		2389	intel_sdvo_connector->top->values[0] = 0;
		2390	intel_sdvo_connector->top->values[1] = data_value[0];
		2391	drm_connector_attach_property(connector,
		2392	intel_sdvo_connector->top,
		2393	intel_sdvo_connector->top_margin);
		2394
		2395	intel_sdvo_connector->bottom =
		2396	drm_property_create(dev, DRM_MODE_PROP_RANGE,
		2397	"bottom_margin", 2);
		2398	if (!intel_sdvo_connector->bottom)
		2399	return false;
		2400
		2401	intel_sdvo_connector->bottom->values[0] = 0;
		2402	intel_sdvo_connector->bottom->values[1] = data_value[0];
		2403	drm_connector_attach_property(connector,
		2404	intel_sdvo_connector->bottom,
		2405	intel_sdvo_connector->bottom_margin);
		2406	DRM_DEBUG_KMS("v_overscan: max %d, "
		2407	"default %d, current %d\n",
		2408	data_value[0], data_value[1], response);
		2409	}
		2410
		2411	ENHANCEMENT(hpos, HPOS);
		2412	ENHANCEMENT(vpos, VPOS);
		2413	ENHANCEMENT(saturation, SATURATION);
		2414	ENHANCEMENT(contrast, CONTRAST);
		2415	ENHANCEMENT(hue, HUE);
		2416	ENHANCEMENT(sharpness, SHARPNESS);
		2417	ENHANCEMENT(brightness, BRIGHTNESS);
		2418	ENHANCEMENT(flicker_filter, FLICKER_FILTER);
		2419	ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
		2420	ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
		2421	ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
		2422	ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
		2423
		2424	if (enhancements.dot_crawl) {
		2425	if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
		2426	return false;
		2427
		2428	intel_sdvo_connector->max_dot_crawl = 1;
		2429	intel_sdvo_connector->cur_dot_crawl = response & 0x1;
		2430	intel_sdvo_connector->dot_crawl =
		2431	drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
		2432	if (!intel_sdvo_connector->dot_crawl)
		2433	return false;
		2434
		2435	intel_sdvo_connector->dot_crawl->values[0] = 0;
		2436	intel_sdvo_connector->dot_crawl->values[1] = 1;
		2437	drm_connector_attach_property(connector,
		2438	intel_sdvo_connector->dot_crawl,
		2439	intel_sdvo_connector->cur_dot_crawl);
		2440	DRM_DEBUG_KMS("dot crawl: current %d\n", response);
		2441	}
		2442
		2443	return true;
		2444	}
		2445
		2446	static bool
		2447	intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
		2448	struct intel_sdvo_connector *intel_sdvo_connector,
		2449	struct intel_sdvo_enhancements_reply enhancements)
		2450	{
		2451	struct drm_device *dev = intel_sdvo->base.base.dev;
		2452	struct drm_connector *connector = &intel_sdvo_connector->base.base;
		2453	uint16_t response, data_value[2];
		2454
		2455	ENHANCEMENT(brightness, BRIGHTNESS);
		2456
		2457	return true;
		2458	}
		2459	#undef ENHANCEMENT
		2460
		2461	static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
		2462	struct intel_sdvo_connector *intel_sdvo_connector)
		2463	{
		2464	union {
		2465	struct intel_sdvo_enhancements_reply reply;
		2466	uint16_t response;
		2467	} enhancements;
		2468
		2469	BUILD_BUG_ON(sizeof(enhancements) != 2);
		2470
		2471	enhancements.response = 0;
		2472	intel_sdvo_get_value(intel_sdvo,
		2473	SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
		2474	&enhancements, sizeof(enhancements));
		2475	if (enhancements.response == 0) {
		2476	DRM_DEBUG_KMS("No enhancement is supported\n");
		2477	return true;
		2478	}
		2479
		2480	if (IS_TV(intel_sdvo_connector))
		2481	return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
		2482	else if(IS_LVDS(intel_sdvo_connector))
		2483	return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
		2484	else
		2485	return true;
		2486	}
		2487
		2488	static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
		2489	struct i2c_msg *msgs,
		2490	int num)
		2491	{
		2492	struct intel_sdvo *sdvo = adapter->algo_data;
		2493
		2494	if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
		2495	return -EIO;
		2496
		2497	return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
		2498	}
		2499
		2500	static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
		2501	{
		2502	struct intel_sdvo *sdvo = adapter->algo_data;
		2503	return sdvo->i2c->algo->functionality(sdvo->i2c);
		2504	}
		2505
		2506	static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
		2507	.master_xfer = intel_sdvo_ddc_proxy_xfer,
		2508	.functionality = intel_sdvo_ddc_proxy_func
		2509	};
		2510
		2511	static bool
		2512	intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
		2513	struct drm_device *dev)
		2514	{
		2515	// sdvo->ddc.owner = THIS_MODULE;
		2516	sdvo->ddc.class = I2C_CLASS_DDC;
		2517	snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
		2518	sdvo->ddc.dev.parent = &dev->pdev->dev;
		2519	sdvo->ddc.algo_data = sdvo;
		2520	sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
		2521
		2522	return 1; //i2c_add_adapter(&sdvo->ddc) == 0;
		2523	}
		2524
		2525	bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
		2526	{
		2527	struct drm_i915_private *dev_priv = dev->dev_private;
		2528	struct intel_encoder *intel_encoder;
		2529	struct intel_sdvo *intel_sdvo;
		2530	int i;
		2531
		2532	intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
		2533	if (!intel_sdvo)
		2534	return false;
		2535
		2536	intel_sdvo->sdvo_reg = sdvo_reg;
		2537	intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
		2538	intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
		2539	if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
		2540	kfree(intel_sdvo);
		2541	return false;
		2542	}
		2543
		2544	/* encoder type will be decided later */
		2545	intel_encoder = &intel_sdvo->base;
		2546	intel_encoder->type = INTEL_OUTPUT_SDVO;
		2547	drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
		2548
		2549	/* Read the regs to test if we can talk to the device */
		2550	for (i = 0; i < 0x40; i++) {
		2551	u8 byte;
		2552
		2553	if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
		2554	DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
		2555	IS_SDVOB(sdvo_reg) ? 'B' : 'C');
		2556	goto err;
		2557	}
		2558	}
		2559
		2560	if (IS_SDVOB(sdvo_reg))
		2561	dev_priv->hotplug_supported_mask \|= SDVOB_HOTPLUG_INT_STATUS;
		2562	else
		2563	dev_priv->hotplug_supported_mask \|= SDVOC_HOTPLUG_INT_STATUS;
		2564
		2565	drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
		2566
		2567	/* In default case sdvo lvds is false */
		2568	if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
		2569	goto err;
		2570
		2571	if (intel_sdvo_output_setup(intel_sdvo,
		2572	intel_sdvo->caps.output_flags) != true) {
		2573	DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
		2574	IS_SDVOB(sdvo_reg) ? 'B' : 'C');
		2575	goto err;
		2576	}
		2577
		2578	intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
		2579
		2580	/* Set the input timing to the screen. Assume always input 0. */
		2581	if (!intel_sdvo_set_target_input(intel_sdvo))
		2582	goto err;
		2583
		2584	if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
		2585	&intel_sdvo->pixel_clock_min,
		2586	&intel_sdvo->pixel_clock_max))
		2587	goto err;
		2588
		2589	DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
		2590	"clock range %dMHz - %dMHz, "
		2591	"input 1: %c, input 2: %c, "
		2592	"output 1: %c, output 2: %c\n",
		2593	SDVO_NAME(intel_sdvo),
		2594	intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
		2595	intel_sdvo->caps.device_rev_id,
		2596	intel_sdvo->pixel_clock_min / 1000,
		2597	intel_sdvo->pixel_clock_max / 1000,
		2598	(intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
		2599	(intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
		2600	/* check currently supported outputs */
		2601	intel_sdvo->caps.output_flags &
		2602	(SDVO_OUTPUT_TMDS0 \| SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
		2603	intel_sdvo->caps.output_flags &
		2604	(SDVO_OUTPUT_TMDS1 \| SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
		2605	return true;
		2606
		2607	err:
		2608	drm_encoder_cleanup(&intel_encoder->base);
		2609	// i2c_del_adapter(&intel_sdvo->ddc);
		2610	kfree(intel_sdvo);
		2611
		2612	return false;
		2613	}

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/intel_sdvo.c @ 3482 – Rev 2340