WebSVN – Kolibri OS – Blame – /drivers/video/drm/i915/intel_panel.c

Rev	Author	Line No.	Line
2330	Serge	1	/*
		2	* Copyright © 2006-2010 Intel Corporation
		3	* Copyright (c) 2006 Dave Airlie
		4	*
		5	* Permission is hereby granted, free of charge, to any person obtaining a
		6	* copy of this software and associated documentation files (the "Software"),
		7	* to deal in the Software without restriction, including without limitation
		8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
		9	* and/or sell copies of the Software, and to permit persons to whom the
		10	* Software is furnished to do so, subject to the following conditions:
		11	*
		12	* The above copyright notice and this permission notice (including the next
		13	* paragraph) shall be included in all copies or substantial portions of the
		14	* Software.
		15	*
		16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
		17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
		18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
		19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
		20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
		22	* DEALINGS IN THE SOFTWARE.
		23	*
		24	* Authors:
		25	* Eric Anholt
		26	* Dave Airlie
		27	* Jesse Barnes
		28	* Chris Wilson
		29	*/
		30
3031	serge	31	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
		32
6084	serge	33	#include
3031	serge	34	#include
6084	serge	35	#include
2330	Serge	36	#include "intel_drv.h"
		37
6084	serge	38	#define CRC_PMIC_PWM_PERIOD_NS 21333
		39
2330	Serge	40	void
4104	Serge	41	intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
2330	Serge	42	struct drm_display_mode *adjusted_mode)
		43	{
4104	Serge	44	drm_mode_copy(adjusted_mode, fixed_mode);
2330	Serge	45
4104	Serge	46	drm_mode_set_crtcinfo(adjusted_mode, 0);
2330	Serge	47	}
		48
5060	serge	49	/**
		50	* intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
		51	* @dev: drm device
		52	* @fixed_mode : panel native mode
		53	* @connector: LVDS/eDP connector
		54	*
		55	* Return downclock_avail
		56	* Find the reduced downclock for LVDS/eDP in EDID.
		57	*/
		58	struct drm_display_mode *
		59	intel_find_panel_downclock(struct drm_device *dev,
		60	struct drm_display_mode *fixed_mode,
		61	struct drm_connector *connector)
		62	{
		63	struct drm_display_mode scan, tmp_mode;
		64	int temp_downclock;
		65
		66	temp_downclock = fixed_mode->clock;
		67	tmp_mode = NULL;
		68
		69	list_for_each_entry(scan, &connector->probed_modes, head) {
		70	/*
		71	* If one mode has the same resolution with the fixed_panel
		72	* mode while they have the different refresh rate, it means
		73	* that the reduced downclock is found. In such
		74	* case we can set the different FPx0/1 to dynamically select
		75	* between low and high frequency.
		76	*/
		77	if (scan->hdisplay == fixed_mode->hdisplay &&
		78	scan->hsync_start == fixed_mode->hsync_start &&
		79	scan->hsync_end == fixed_mode->hsync_end &&
		80	scan->htotal == fixed_mode->htotal &&
		81	scan->vdisplay == fixed_mode->vdisplay &&
		82	scan->vsync_start == fixed_mode->vsync_start &&
		83	scan->vsync_end == fixed_mode->vsync_end &&
		84	scan->vtotal == fixed_mode->vtotal) {
		85	if (scan->clock < temp_downclock) {
		86	/*
		87	* The downclock is already found. But we
		88	* expect to find the lower downclock.
		89	*/
		90	temp_downclock = scan->clock;
		91	tmp_mode = scan;
		92	}
		93	}
		94	}
		95
		96	if (temp_downclock < fixed_mode->clock)
		97	return drm_mode_duplicate(dev, tmp_mode);
		98	else
		99	return NULL;
		100	}
		101
2330	Serge	102	/* adjusted_mode has been preset to be the panel's fixed mode */
		103	void
4104	Serge	104	intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
6084	serge	105	struct intel_crtc_state *pipe_config,
4104	Serge	106	int fitting_mode)
2330	Serge	107	{
6084	serge	108	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
		109	int x = 0, y = 0, width = 0, height = 0;
2330	Serge	110
		111	/* Native modes don't need fitting */
6084	serge	112	if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
		113	adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
2330	Serge	114	goto done;
		115
		116	switch (fitting_mode) {
		117	case DRM_MODE_SCALE_CENTER:
4560	Serge	118	width = pipe_config->pipe_src_w;
		119	height = pipe_config->pipe_src_h;
6084	serge	120	x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
		121	y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
2330	Serge	122	break;
		123
		124	case DRM_MODE_SCALE_ASPECT:
		125	/* Scale but preserve the aspect ratio */
		126	{
6084	serge	127	u32 scaled_width = adjusted_mode->crtc_hdisplay
4560	Serge	128	* pipe_config->pipe_src_h;
		129	u32 scaled_height = pipe_config->pipe_src_w
6084	serge	130	* adjusted_mode->crtc_vdisplay;
2330	Serge	131	if (scaled_width > scaled_height) { /* pillar */
4560	Serge	132	width = scaled_height / pipe_config->pipe_src_h;
2330	Serge	133	if (width & 1)
6084	serge	134	width++;
		135	x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
2330	Serge	136	y = 0;
6084	serge	137	height = adjusted_mode->crtc_vdisplay;
2330	Serge	138	} else if (scaled_width < scaled_height) { /* letter */
4560	Serge	139	height = scaled_width / pipe_config->pipe_src_w;
2330	Serge	140	if (height & 1)
		141	height++;
6084	serge	142	y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
2330	Serge	143	x = 0;
6084	serge	144	width = adjusted_mode->crtc_hdisplay;
2330	Serge	145	} else {
		146	x = y = 0;
6084	serge	147	width = adjusted_mode->crtc_hdisplay;
		148	height = adjusted_mode->crtc_vdisplay;
2330	Serge	149	}
		150	}
		151	break;
		152
		153	case DRM_MODE_SCALE_FULLSCREEN:
		154	x = y = 0;
6084	serge	155	width = adjusted_mode->crtc_hdisplay;
		156	height = adjusted_mode->crtc_vdisplay;
2330	Serge	157	break;
4104	Serge	158
		159	default:
		160	WARN(1, "bad panel fit mode: %d\n", fitting_mode);
		161	return;
2330	Serge	162	}
		163
		164	done:
4104	Serge	165	pipe_config->pch_pfit.pos = (x << 16) \| y;
		166	pipe_config->pch_pfit.size = (width << 16) \| height;
		167	pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
2330	Serge	168	}
		169
4104	Serge	170	static void
6084	serge	171	centre_horizontally(struct drm_display_mode *adjusted_mode,
4104	Serge	172	int width)
		173	{
		174	u32 border, sync_pos, blank_width, sync_width;
		175
		176	/* keep the hsync and hblank widths constant */
6084	serge	177	sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
		178	blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
4104	Serge	179	sync_pos = (blank_width - sync_width + 1) / 2;
		180
6084	serge	181	border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
4104	Serge	182	border += border & 1; /* make the border even */
		183
6084	serge	184	adjusted_mode->crtc_hdisplay = width;
		185	adjusted_mode->crtc_hblank_start = width + border;
		186	adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
4104	Serge	187
6084	serge	188	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
		189	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
4104	Serge	190	}
		191
		192	static void
6084	serge	193	centre_vertically(struct drm_display_mode *adjusted_mode,
4104	Serge	194	int height)
		195	{
		196	u32 border, sync_pos, blank_width, sync_width;
		197
		198	/* keep the vsync and vblank widths constant */
6084	serge	199	sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
		200	blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
4104	Serge	201	sync_pos = (blank_width - sync_width + 1) / 2;
		202
6084	serge	203	border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
4104	Serge	204
6084	serge	205	adjusted_mode->crtc_vdisplay = height;
		206	adjusted_mode->crtc_vblank_start = height + border;
		207	adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
4104	Serge	208
6084	serge	209	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
		210	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
4104	Serge	211	}
		212
		213	static inline u32 panel_fitter_scaling(u32 source, u32 target)
		214	{
		215	/*
		216	* Floating point operation is not supported. So the FACTOR
		217	* is defined, which can avoid the floating point computation
		218	* when calculating the panel ratio.
		219	*/
		220	#define ACCURACY 12
		221	#define FACTOR (1 << ACCURACY)
		222	u32 ratio = source * FACTOR / target;
		223	return (FACTOR * ratio + FACTOR/2) / FACTOR;
		224	}
		225
6084	serge	226	static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
4560	Serge	227	u32 *pfit_control)
4104	Serge	228	{
6084	serge	229	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
		230	u32 scaled_width = adjusted_mode->crtc_hdisplay *
4560	Serge	231	pipe_config->pipe_src_h;
		232	u32 scaled_height = pipe_config->pipe_src_w *
6084	serge	233	adjusted_mode->crtc_vdisplay;
4104	Serge	234
6084	serge	235	/* 965+ is easy, it does everything in hw */
		236	if (scaled_width > scaled_height)
4560	Serge	237	*pfit_control \|= PFIT_ENABLE \|
6084	serge	238	PFIT_SCALING_PILLAR;
		239	else if (scaled_width < scaled_height)
4560	Serge	240	*pfit_control \|= PFIT_ENABLE \|
6084	serge	241	PFIT_SCALING_LETTER;
		242	else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
4560	Serge	243	*pfit_control \|= PFIT_ENABLE \| PFIT_SCALING_AUTO;
		244	}
		245
6084	serge	246	static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
4560	Serge	247	u32 pfit_control, u32 pfit_pgm_ratios,
		248	u32 *border)
		249	{
6084	serge	250	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
		251	u32 scaled_width = adjusted_mode->crtc_hdisplay *
4560	Serge	252	pipe_config->pipe_src_h;
		253	u32 scaled_height = pipe_config->pipe_src_w *
6084	serge	254	adjusted_mode->crtc_vdisplay;
4560	Serge	255	u32 bits;
		256
6084	serge	257	/*
		258	* For earlier chips we have to calculate the scaling
		259	* ratio by hand and program it into the
		260	* PFIT_PGM_RATIO register
		261	*/
		262	if (scaled_width > scaled_height) { /* pillar */
		263	centre_horizontally(adjusted_mode,
		264	scaled_height /
4560	Serge	265	pipe_config->pipe_src_h);
4104	Serge	266
4560	Serge	267	*border = LVDS_BORDER_ENABLE;
6084	serge	268	if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
4560	Serge	269	bits = panel_fitter_scaling(pipe_config->pipe_src_h,
6084	serge	270	adjusted_mode->crtc_vdisplay);
4560	Serge	271
		272	*pfit_pgm_ratios \|= (bits << PFIT_HORIZ_SCALE_SHIFT \|
6084	serge	273	bits << PFIT_VERT_SCALE_SHIFT);
4560	Serge	274	*pfit_control \|= (PFIT_ENABLE \|
6084	serge	275	VERT_INTERP_BILINEAR \|
		276	HORIZ_INTERP_BILINEAR);
		277	}
		278	} else if (scaled_width < scaled_height) { /* letter */
		279	centre_vertically(adjusted_mode,
		280	scaled_width /
4560	Serge	281	pipe_config->pipe_src_w);
4104	Serge	282
4560	Serge	283	*border = LVDS_BORDER_ENABLE;
6084	serge	284	if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
4560	Serge	285	bits = panel_fitter_scaling(pipe_config->pipe_src_w,
6084	serge	286	adjusted_mode->crtc_hdisplay);
4560	Serge	287
		288	*pfit_pgm_ratios \|= (bits << PFIT_HORIZ_SCALE_SHIFT \|
6084	serge	289	bits << PFIT_VERT_SCALE_SHIFT);
4560	Serge	290	*pfit_control \|= (PFIT_ENABLE \|
6084	serge	291	VERT_INTERP_BILINEAR \|
		292	HORIZ_INTERP_BILINEAR);
		293	}
		294	} else {
		295	/* Aspects match, Let hw scale both directions */
4560	Serge	296	*pfit_control \|= (PFIT_ENABLE \|
6084	serge	297	VERT_AUTO_SCALE \| HORIZ_AUTO_SCALE \|
		298	VERT_INTERP_BILINEAR \|
		299	HORIZ_INTERP_BILINEAR);
		300	}
4560	Serge	301	}
		302
		303	void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
6084	serge	304	struct intel_crtc_state *pipe_config,
4560	Serge	305	int fitting_mode)
		306	{
		307	struct drm_device *dev = intel_crtc->base.dev;
		308	u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
6084	serge	309	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
4560	Serge	310
		311	/* Native modes don't need fitting */
6084	serge	312	if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
		313	adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
4560	Serge	314	goto out;
		315
		316	switch (fitting_mode) {
		317	case DRM_MODE_SCALE_CENTER:
		318	/*
		319	* For centered modes, we have to calculate border widths &
		320	* heights and modify the values programmed into the CRTC.
		321	*/
		322	centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
		323	centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
		324	border = LVDS_BORDER_ENABLE;
4104	Serge	325	break;
4560	Serge	326	case DRM_MODE_SCALE_ASPECT:
		327	/* Scale but preserve the aspect ratio */
		328	if (INTEL_INFO(dev)->gen >= 4)
		329	i965_scale_aspect(pipe_config, &pfit_control);
		330	else
		331	i9xx_scale_aspect(pipe_config, &pfit_control,
		332	&pfit_pgm_ratios, &border);
		333	break;
4104	Serge	334	case DRM_MODE_SCALE_FULLSCREEN:
		335	/*
		336	* Full scaling, even if it changes the aspect ratio.
		337	* Fortunately this is all done for us in hw.
		338	*/
6084	serge	339	if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay \|\|
		340	pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
4104	Serge	341	pfit_control \|= PFIT_ENABLE;
		342	if (INTEL_INFO(dev)->gen >= 4)
		343	pfit_control \|= PFIT_SCALING_AUTO;
		344	else
		345	pfit_control \|= (VERT_AUTO_SCALE \|
		346	VERT_INTERP_BILINEAR \|
		347	HORIZ_AUTO_SCALE \|
		348	HORIZ_INTERP_BILINEAR);
		349	}
		350	break;
		351	default:
		352	WARN(1, "bad panel fit mode: %d\n", fitting_mode);
		353	return;
		354	}
		355
		356	/* 965+ wants fuzzy fitting */
		357	/* FIXME: handle multiple panels by failing gracefully */
		358	if (INTEL_INFO(dev)->gen >= 4)
		359	pfit_control \|= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) \|
		360	PFIT_FILTER_FUZZY);
		361
		362	out:
		363	if ((pfit_control & PFIT_ENABLE) == 0) {
		364	pfit_control = 0;
		365	pfit_pgm_ratios = 0;
		366	}
		367
		368	/* Make sure pre-965 set dither correctly for 18bpp panels. */
		369	if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
		370	pfit_control \|= PANEL_8TO6_DITHER_ENABLE;
		371
		372	pipe_config->gmch_pfit.control = pfit_control;
		373	pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
		374	pipe_config->gmch_pfit.lvds_border_bits = border;
		375	}
		376
5060	serge	377	enum drm_connector_status
		378	intel_panel_detect(struct drm_device *dev)
		379	{
		380	struct drm_i915_private *dev_priv = dev->dev_private;
		381
		382	/* Assume that the BIOS does not lie through the OpRegion... */
		383	if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
6084	serge	384	return *dev_priv->opregion.lid_state & 0x1 ?
5060	serge	385	connector_status_connected :
		386	connector_status_disconnected;
		387	}
		388
		389	switch (i915.panel_ignore_lid) {
		390	case -2:
		391	return connector_status_connected;
		392	case -1:
		393	return connector_status_disconnected;
		394	default:
		395	return connector_status_unknown;
		396	}
		397	}
		398
		399	/**
		400	* scale - scale values from one range to another
		401	*
		402	* @source_val: value in range [@source_min..@source_max]
		403	*
		404	* Return @source_val in range [@source_min..@source_max] scaled to range
		405	* [@target_min..@target_max].
		406	*/
		407	static uint32_t scale(uint32_t source_val,
		408	uint32_t source_min, uint32_t source_max,
		409	uint32_t target_min, uint32_t target_max)
		410	{
		411	uint64_t target_val;
		412
		413	WARN_ON(source_min > source_max);
		414	WARN_ON(target_min > target_max);
		415
		416	/* defensive */
		417	source_val = clamp(source_val, source_min, source_max);
		418
		419	/* avoid overflows */
5354	serge	420	target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
		421	(target_max - target_min), source_max - source_min);
5060	serge	422	target_val += target_min;
		423
		424	return target_val;
		425	}
		426
		427	/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
		428	static inline u32 scale_user_to_hw(struct intel_connector *connector,
		429	u32 user_level, u32 user_max)
		430	{
		431	struct intel_panel *panel = &connector->panel;
		432
		433	return scale(user_level, 0, user_max,
		434	panel->backlight.min, panel->backlight.max);
		435	}
		436
		437	/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
		438	* to [hw_min..hw_max]. */
		439	static inline u32 clamp_user_to_hw(struct intel_connector *connector,
		440	u32 user_level, u32 user_max)
		441	{
		442	struct intel_panel *panel = &connector->panel;
		443	u32 hw_level;
		444
		445	hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
		446	hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
		447
		448	return hw_level;
		449	}
		450
		451	/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
		452	static inline u32 scale_hw_to_user(struct intel_connector *connector,
		453	u32 hw_level, u32 user_max)
		454	{
		455	struct intel_panel *panel = &connector->panel;
		456
		457	return scale(hw_level, panel->backlight.min, panel->backlight.max,
		458	0, user_max);
		459	}
		460
4560	Serge	461	static u32 intel_panel_compute_brightness(struct intel_connector *connector,
		462	u32 val)
2330	Serge	463	{
4560	Serge	464	struct drm_device *dev = connector->base.dev;
2330	Serge	465	struct drm_i915_private *dev_priv = dev->dev_private;
4560	Serge	466	struct intel_panel *panel = &connector->panel;
2330	Serge	467
4560	Serge	468	WARN_ON(panel->backlight.max == 0);
2330	Serge	469
5060	serge	470	if (i915.invert_brightness < 0)
4560	Serge	471	return val;
2330	Serge	472
5060	serge	473	if (i915.invert_brightness > 0 \|\|
4560	Serge	474	dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
		475	return panel->backlight.max - val;
		476	}
		477
		478	return val;
2330	Serge	479	}
		480
6084	serge	481	static u32 lpt_get_backlight(struct intel_connector *connector)
2330	Serge	482	{
4560	Serge	483	struct drm_device *dev = connector->base.dev;
3243	Serge	484	struct drm_i915_private *dev_priv = dev->dev_private;
2330	Serge	485
4560	Serge	486	return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
		487	}
4104	Serge	488
4560	Serge	489	static u32 pch_get_backlight(struct intel_connector *connector)
		490	{
		491	struct drm_device *dev = connector->base.dev;
		492	struct drm_i915_private *dev_priv = dev->dev_private;
2330	Serge	493
4560	Serge	494	return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
2330	Serge	495	}
		496
4560	Serge	497	static u32 i9xx_get_backlight(struct intel_connector *connector)
2330	Serge	498	{
4560	Serge	499	struct drm_device *dev = connector->base.dev;
		500	struct drm_i915_private *dev_priv = dev->dev_private;
		501	struct intel_panel *panel = &connector->panel;
		502	u32 val;
2330	Serge	503
4560	Serge	504	val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
		505	if (INTEL_INFO(dev)->gen < 4)
		506	val >>= 1;
2330	Serge	507
4560	Serge	508	if (panel->backlight.combination_mode) {
		509	u8 lbpc;
2330	Serge	510
4560	Serge	511	pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
		512	val *= lbpc;
2330	Serge	513	}
		514
4560	Serge	515	return val;
2330	Serge	516	}
		517
4560	Serge	518	static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
2330	Serge	519	{
		520	struct drm_i915_private *dev_priv = dev->dev_private;
3031	serge	521
5354	serge	522	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		523	return 0;
		524
4560	Serge	525	return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
		526	}
3031	serge	527
4560	Serge	528	static u32 vlv_get_backlight(struct intel_connector *connector)
		529	{
		530	struct drm_device *dev = connector->base.dev;
		531	enum pipe pipe = intel_get_pipe_from_connector(connector);
3031	serge	532
4560	Serge	533	return _vlv_get_backlight(dev, pipe);
3031	serge	534	}
		535
6084	serge	536	static u32 bxt_get_backlight(struct intel_connector *connector)
		537	{
		538	struct drm_device *dev = connector->base.dev;
		539	struct intel_panel *panel = &connector->panel;
		540	struct drm_i915_private *dev_priv = dev->dev_private;
		541
		542	return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
		543	}
		544
		545	static u32 pwm_get_backlight(struct intel_connector *connector)
		546	{
		547	struct intel_panel *panel = &connector->panel;
		548	int duty_ns;
		549
		550	duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
		551	return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
		552	}
		553
4560	Serge	554	static u32 intel_panel_get_backlight(struct intel_connector *connector)
3031	serge	555	{
4560	Serge	556	struct drm_device *dev = connector->base.dev;
3031	serge	557	struct drm_i915_private *dev_priv = dev->dev_private;
5354	serge	558	struct intel_panel *panel = &connector->panel;
		559	u32 val = 0;
2330	Serge	560
5354	serge	561	mutex_lock(&dev_priv->backlight_lock);
4104	Serge	562
5354	serge	563	if (panel->backlight.enabled) {
6084	serge	564	val = panel->backlight.get(connector);
		565	val = intel_panel_compute_brightness(connector, val);
5354	serge	566	}
2330	Serge	567
5354	serge	568	mutex_unlock(&dev_priv->backlight_lock);
2330	Serge	569
		570	DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
		571	return val;
		572	}
		573
6084	serge	574	static void lpt_set_backlight(struct intel_connector *connector, u32 level)
2330	Serge	575	{
4560	Serge	576	struct drm_device *dev = connector->base.dev;
2330	Serge	577	struct drm_i915_private *dev_priv = dev->dev_private;
4560	Serge	578	u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
		579	I915_WRITE(BLC_PWM_PCH_CTL2, val \| level);
2330	Serge	580	}
		581
4560	Serge	582	static void pch_set_backlight(struct intel_connector *connector, u32 level)
2330	Serge	583	{
4560	Serge	584	struct drm_device *dev = connector->base.dev;
2330	Serge	585	struct drm_i915_private *dev_priv = dev->dev_private;
		586	u32 tmp;
		587
4560	Serge	588	tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
		589	I915_WRITE(BLC_PWM_CPU_CTL, tmp \| level);
		590	}
2330	Serge	591
4560	Serge	592	static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
		593	{
		594	struct drm_device *dev = connector->base.dev;
		595	struct drm_i915_private *dev_priv = dev->dev_private;
		596	struct intel_panel *panel = &connector->panel;
		597	u32 tmp, mask;
2330	Serge	598
4560	Serge	599	WARN_ON(panel->backlight.max == 0);
		600
		601	if (panel->backlight.combination_mode) {
2330	Serge	602	u8 lbpc;
		603
4560	Serge	604	lbpc = level * 0xfe / panel->backlight.max + 1;
2330	Serge	605	level /= lbpc;
		606	pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
		607	}
		608
4560	Serge	609	if (IS_GEN4(dev)) {
		610	mask = BACKLIGHT_DUTY_CYCLE_MASK;
		611	} else {
2330	Serge	612	level <<= 1;
4560	Serge	613	mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
		614	}
		615
		616	tmp = I915_READ(BLC_PWM_CTL) & ~mask;
2330	Serge	617	I915_WRITE(BLC_PWM_CTL, tmp \| level);
		618	}
		619
4560	Serge	620	static void vlv_set_backlight(struct intel_connector *connector, u32 level)
		621	{
		622	struct drm_device *dev = connector->base.dev;
		623	struct drm_i915_private *dev_priv = dev->dev_private;
		624	enum pipe pipe = intel_get_pipe_from_connector(connector);
		625	u32 tmp;
		626
5354	serge	627	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		628	return;
		629
4560	Serge	630	tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
		631	I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp \| level);
		632	}
		633
6084	serge	634	static void bxt_set_backlight(struct intel_connector *connector, u32 level)
4560	Serge	635	{
		636	struct drm_device *dev = connector->base.dev;
		637	struct drm_i915_private *dev_priv = dev->dev_private;
6084	serge	638	struct intel_panel *panel = &connector->panel;
4560	Serge	639
6084	serge	640	I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
		641	}
		642
		643	static void pwm_set_backlight(struct intel_connector *connector, u32 level)
		644	{
		645	struct intel_panel *panel = &connector->panel;
		646	int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
		647
		648	pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
		649	}
		650
		651	static void
		652	intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
		653	{
		654	struct intel_panel *panel = &connector->panel;
		655
4560	Serge	656	DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
		657
		658	level = intel_panel_compute_brightness(connector, level);
6084	serge	659	panel->backlight.set(connector, level);
4560	Serge	660	}
		661
5060	serge	662	/* set backlight brightness to level in range [0..max], scaling wrt hw min */
		663	static void intel_panel_set_backlight(struct intel_connector *connector,
		664	u32 user_level, u32 user_max)
2342	Serge	665	{
4560	Serge	666	struct drm_device *dev = connector->base.dev;
2342	Serge	667	struct drm_i915_private *dev_priv = dev->dev_private;
4560	Serge	668	struct intel_panel *panel = &connector->panel;
5060	serge	669	u32 hw_level;
2342	Serge	670
5354	serge	671	if (!panel->backlight.present)
4560	Serge	672	return;
3746	Serge	673
5354	serge	674	mutex_lock(&dev_priv->backlight_lock);
4560	Serge	675
		676	WARN_ON(panel->backlight.max == 0);
		677
5060	serge	678	hw_level = scale_user_to_hw(connector, user_level, user_max);
		679	panel->backlight.level = hw_level;
4560	Serge	680
5060	serge	681	if (panel->backlight.enabled)
		682	intel_panel_actually_set_backlight(connector, hw_level);
4560	Serge	683
5354	serge	684	mutex_unlock(&dev_priv->backlight_lock);
5060	serge	685	}
		686
		687	/* set backlight brightness to level in range [0..max], assuming hw min is
		688	* respected.
		689	*/
		690	void intel_panel_set_backlight_acpi(struct intel_connector *connector,
		691	u32 user_level, u32 user_max)
		692	{
		693	struct drm_device *dev = connector->base.dev;
		694	struct drm_i915_private *dev_priv = dev->dev_private;
		695	struct intel_panel *panel = &connector->panel;
		696	enum pipe pipe = intel_get_pipe_from_connector(connector);
		697	u32 hw_level;
		698
5354	serge	699	/*
		700	* INVALID_PIPE may occur during driver init because
		701	* connection_mutex isn't held across the entire backlight
		702	* setup + modeset readout, and the BIOS can issue the
		703	* requests at any time.
		704	*/
5060	serge	705	if (!panel->backlight.present \|\| pipe == INVALID_PIPE)
		706	return;
		707
5354	serge	708	mutex_lock(&dev_priv->backlight_lock);
5060	serge	709
		710	WARN_ON(panel->backlight.max == 0);
		711
		712	hw_level = clamp_user_to_hw(connector, user_level, user_max);
		713	panel->backlight.level = hw_level;
		714
6283	serge	715
		716	if (panel->backlight.enabled)
		717	intel_panel_actually_set_backlight(connector, hw_level);
		718
6084	serge	719	mutex_unlock(&dev_priv->backlight_lock);
		720	}
5060	serge	721
6084	serge	722	static void lpt_disable_backlight(struct intel_connector *connector)
		723	{
		724	struct drm_device *dev = connector->base.dev;
		725	struct drm_i915_private *dev_priv = dev->dev_private;
		726	u32 tmp;
4560	Serge	727
6084	serge	728	intel_panel_actually_set_backlight(connector, 0);
		729
		730	/*
		731	* Although we don't support or enable CPU PWM with LPT/SPT based
		732	* systems, it may have been enabled prior to loading the
		733	* driver. Disable to avoid warnings on LCPLL disable.
		734	*
		735	* This needs rework if we need to add support for CPU PWM on PCH split
		736	* platforms.
		737	*/
		738	tmp = I915_READ(BLC_PWM_CPU_CTL2);
		739	if (tmp & BLM_PWM_ENABLE) {
		740	DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
		741	I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
		742	}
		743
		744	tmp = I915_READ(BLC_PWM_PCH_CTL1);
		745	I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
2342	Serge	746	}
		747
4560	Serge	748	static void pch_disable_backlight(struct intel_connector *connector)
2330	Serge	749	{
4560	Serge	750	struct drm_device *dev = connector->base.dev;
2330	Serge	751	struct drm_i915_private *dev_priv = dev->dev_private;
4560	Serge	752	u32 tmp;
		753
		754	intel_panel_actually_set_backlight(connector, 0);
		755
		756	tmp = I915_READ(BLC_PWM_CPU_CTL2);
		757	I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
		758
		759	tmp = I915_READ(BLC_PWM_PCH_CTL1);
		760	I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
		761	}
		762
		763	static void i9xx_disable_backlight(struct intel_connector *connector)
		764	{
		765	intel_panel_actually_set_backlight(connector, 0);
		766	}
		767
		768	static void i965_disable_backlight(struct intel_connector *connector)
		769	{
		770	struct drm_device *dev = connector->base.dev;
		771	struct drm_i915_private *dev_priv = dev->dev_private;
		772	u32 tmp;
		773
		774	intel_panel_actually_set_backlight(connector, 0);
		775
		776	tmp = I915_READ(BLC_PWM_CTL2);
		777	I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
		778	}
		779
		780	static void vlv_disable_backlight(struct intel_connector *connector)
		781	{
		782	struct drm_device *dev = connector->base.dev;
		783	struct drm_i915_private *dev_priv = dev->dev_private;
		784	enum pipe pipe = intel_get_pipe_from_connector(connector);
		785	u32 tmp;
		786
5354	serge	787	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		788	return;
		789
4560	Serge	790	intel_panel_actually_set_backlight(connector, 0);
		791
		792	tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
		793	I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
		794	}
		795
6084	serge	796	static void bxt_disable_backlight(struct intel_connector *connector)
		797	{
		798	struct drm_device *dev = connector->base.dev;
		799	struct drm_i915_private *dev_priv = dev->dev_private;
		800	struct intel_panel *panel = &connector->panel;
		801	u32 tmp, val;
		802
		803	intel_panel_actually_set_backlight(connector, 0);
		804
		805	tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
		806	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
		807	tmp & ~BXT_BLC_PWM_ENABLE);
		808
		809	if (panel->backlight.controller == 1) {
		810	val = I915_READ(UTIL_PIN_CTL);
		811	val &= ~UTIL_PIN_ENABLE;
		812	I915_WRITE(UTIL_PIN_CTL, val);
		813	}
		814	}
		815
		816	static void pwm_disable_backlight(struct intel_connector *connector)
		817	{
		818	struct intel_panel *panel = &connector->panel;
		819
		820	/* Disable the backlight */
		821	pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
		822	usleep_range(2000, 3000);
		823	pwm_disable(panel->backlight.pwm);
		824	}
		825
4560	Serge	826	void intel_panel_disable_backlight(struct intel_connector *connector)
		827	{
		828	struct drm_device *dev = connector->base.dev;
		829	struct drm_i915_private *dev_priv = dev->dev_private;
		830	struct intel_panel *panel = &connector->panel;
2330	Serge	831
5354	serge	832	if (!panel->backlight.present)
4560	Serge	833	return;
		834
4293	Serge	835	/*
6084	serge	836	* Do not disable backlight on the vga_switcheroo path. When switching
4293	Serge	837	* away from i915, the other client may depend on i915 to handle the
		838	* backlight. This will leave the backlight on unnecessarily when
		839	* another client is not activated.
		840	*/
		841	if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
		842	DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
		843	return;
		844	}
		845
5354	serge	846	mutex_lock(&dev_priv->backlight_lock);
4104	Serge	847
6088	serge	848	panel->backlight.enabled = false;
6084	serge	849	panel->backlight.disable(connector);
3031	serge	850
5354	serge	851	mutex_unlock(&dev_priv->backlight_lock);
4560	Serge	852	}
3031	serge	853
6084	serge	854	static void lpt_enable_backlight(struct intel_connector *connector)
4560	Serge	855	{
		856	struct drm_device *dev = connector->base.dev;
		857	struct drm_i915_private *dev_priv = dev->dev_private;
		858	struct intel_panel *panel = &connector->panel;
		859	u32 pch_ctl1, pch_ctl2;
3031	serge	860
4560	Serge	861	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
		862	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
		863	DRM_DEBUG_KMS("pch backlight already enabled\n");
		864	pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
		865	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
3031	serge	866	}
4104	Serge	867
4560	Serge	868	pch_ctl2 = panel->backlight.max << 16;
		869	I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
		870
		871	pch_ctl1 = 0;
		872	if (panel->backlight.active_low_pwm)
		873	pch_ctl1 \|= BLM_PCH_POLARITY;
		874
5354	serge	875	/* After LPT, override is the default. */
		876	if (HAS_PCH_LPT(dev_priv))
6084	serge	877	pch_ctl1 \|= BLM_PCH_OVERRIDE_ENABLE;
4560	Serge	878
		879	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
		880	POSTING_READ(BLC_PWM_PCH_CTL1);
		881	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 \| BLM_PCH_PWM_ENABLE);
		882
		883	/* This won't stick until the above enable. */
		884	intel_panel_actually_set_backlight(connector, panel->backlight.level);
2330	Serge	885	}
		886
4560	Serge	887	static void pch_enable_backlight(struct intel_connector *connector)
2330	Serge	888	{
4560	Serge	889	struct drm_device *dev = connector->base.dev;
2330	Serge	890	struct drm_i915_private *dev_priv = dev->dev_private;
4560	Serge	891	struct intel_panel *panel = &connector->panel;
		892	enum pipe pipe = intel_get_pipe_from_connector(connector);
4104	Serge	893	enum transcoder cpu_transcoder =
		894	intel_pipe_to_cpu_transcoder(dev_priv, pipe);
4560	Serge	895	u32 cpu_ctl2, pch_ctl1, pch_ctl2;
2330	Serge	896
4560	Serge	897	cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
		898	if (cpu_ctl2 & BLM_PWM_ENABLE) {
5097	serge	899	DRM_DEBUG_KMS("cpu backlight already enabled\n");
4560	Serge	900	cpu_ctl2 &= ~BLM_PWM_ENABLE;
		901	I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
		902	}
4104	Serge	903
4560	Serge	904	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
		905	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
		906	DRM_DEBUG_KMS("pch backlight already enabled\n");
		907	pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
		908	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
3746	Serge	909	}
2330	Serge	910
4560	Serge	911	if (cpu_transcoder == TRANSCODER_EDP)
		912	cpu_ctl2 = BLM_TRANSCODER_EDP;
		913	else
		914	cpu_ctl2 = BLM_PIPE(cpu_transcoder);
		915	I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
		916	POSTING_READ(BLC_PWM_CPU_CTL2);
		917	I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 \| BLM_PWM_ENABLE);
3031	serge	918
4560	Serge	919	/* This won't stick until the above enable. */
		920	intel_panel_actually_set_backlight(connector, panel->backlight.level);
3031	serge	921
4560	Serge	922	pch_ctl2 = panel->backlight.max << 16;
		923	I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
3031	serge	924
4560	Serge	925	pch_ctl1 = 0;
		926	if (panel->backlight.active_low_pwm)
		927	pch_ctl1 \|= BLM_PCH_POLARITY;
3031	serge	928
4560	Serge	929	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
		930	POSTING_READ(BLC_PWM_PCH_CTL1);
		931	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 \| BLM_PCH_PWM_ENABLE);
		932	}
3031	serge	933
4560	Serge	934	static void i9xx_enable_backlight(struct intel_connector *connector)
		935	{
		936	struct drm_device *dev = connector->base.dev;
		937	struct drm_i915_private *dev_priv = dev->dev_private;
		938	struct intel_panel *panel = &connector->panel;
		939	u32 ctl, freq;
3031	serge	940
4560	Serge	941	ctl = I915_READ(BLC_PWM_CTL);
		942	if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
5097	serge	943	DRM_DEBUG_KMS("backlight already enabled\n");
4560	Serge	944	I915_WRITE(BLC_PWM_CTL, 0);
		945	}
3031	serge	946
4560	Serge	947	freq = panel->backlight.max;
		948	if (panel->backlight.combination_mode)
		949	freq /= 0xff;
3031	serge	950
4560	Serge	951	ctl = freq << 17;
5060	serge	952	if (panel->backlight.combination_mode)
4560	Serge	953	ctl \|= BLM_LEGACY_MODE;
		954	if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
		955	ctl \|= BLM_POLARITY_PNV;
		956
		957	I915_WRITE(BLC_PWM_CTL, ctl);
		958	POSTING_READ(BLC_PWM_CTL);
		959
		960	/* XXX: combine this into above write? */
		961	intel_panel_actually_set_backlight(connector, panel->backlight.level);
6084	serge	962
		963	/*
		964	* Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
		965	* 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
		966	* that has backlight.
		967	*/
		968	if (IS_GEN2(dev))
		969	I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
4560	Serge	970	}
		971
		972	static void i965_enable_backlight(struct intel_connector *connector)
		973	{
		974	struct drm_device *dev = connector->base.dev;
		975	struct drm_i915_private *dev_priv = dev->dev_private;
		976	struct intel_panel *panel = &connector->panel;
		977	enum pipe pipe = intel_get_pipe_from_connector(connector);
		978	u32 ctl, ctl2, freq;
		979
		980	ctl2 = I915_READ(BLC_PWM_CTL2);
		981	if (ctl2 & BLM_PWM_ENABLE) {
5097	serge	982	DRM_DEBUG_KMS("backlight already enabled\n");
4560	Serge	983	ctl2 &= ~BLM_PWM_ENABLE;
		984	I915_WRITE(BLC_PWM_CTL2, ctl2);
6084	serge	985	}
4560	Serge	986
		987	freq = panel->backlight.max;
		988	if (panel->backlight.combination_mode)
		989	freq /= 0xff;
		990
		991	ctl = freq << 16;
		992	I915_WRITE(BLC_PWM_CTL, ctl);
		993
		994	ctl2 = BLM_PIPE(pipe);
		995	if (panel->backlight.combination_mode)
		996	ctl2 \|= BLM_COMBINATION_MODE;
		997	if (panel->backlight.active_low_pwm)
		998	ctl2 \|= BLM_POLARITY_I965;
		999	I915_WRITE(BLC_PWM_CTL2, ctl2);
		1000	POSTING_READ(BLC_PWM_CTL2);
		1001	I915_WRITE(BLC_PWM_CTL2, ctl2 \| BLM_PWM_ENABLE);
5060	serge	1002
		1003	intel_panel_actually_set_backlight(connector, panel->backlight.level);
4560	Serge	1004	}
		1005
		1006	static void vlv_enable_backlight(struct intel_connector *connector)
		1007	{
		1008	struct drm_device *dev = connector->base.dev;
		1009	struct drm_i915_private *dev_priv = dev->dev_private;
		1010	struct intel_panel *panel = &connector->panel;
		1011	enum pipe pipe = intel_get_pipe_from_connector(connector);
		1012	u32 ctl, ctl2;
		1013
5354	serge	1014	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		1015	return;
		1016
4560	Serge	1017	ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
		1018	if (ctl2 & BLM_PWM_ENABLE) {
5097	serge	1019	DRM_DEBUG_KMS("backlight already enabled\n");
4560	Serge	1020	ctl2 &= ~BLM_PWM_ENABLE;
		1021	I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
3031	serge	1022	}
		1023
4560	Serge	1024	ctl = panel->backlight.max << 16;
		1025	I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
4104	Serge	1026
4560	Serge	1027	/* XXX: combine this into above write? */
		1028	intel_panel_actually_set_backlight(connector, panel->backlight.level);
		1029
		1030	ctl2 = 0;
		1031	if (panel->backlight.active_low_pwm)
		1032	ctl2 \|= BLM_POLARITY_I965;
		1033	I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
		1034	POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
		1035	I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 \| BLM_PWM_ENABLE);
2330	Serge	1036	}
		1037
6084	serge	1038	static void bxt_enable_backlight(struct intel_connector *connector)
		1039	{
		1040	struct drm_device *dev = connector->base.dev;
		1041	struct drm_i915_private *dev_priv = dev->dev_private;
		1042	struct intel_panel *panel = &connector->panel;
		1043	enum pipe pipe = intel_get_pipe_from_connector(connector);
		1044	u32 pwm_ctl, val;
		1045
		1046	/* To use 2nd set of backlight registers, utility pin has to be
		1047	* enabled with PWM mode.
		1048	* The field should only be changed when the utility pin is disabled
		1049	*/
		1050	if (panel->backlight.controller == 1) {
		1051	val = I915_READ(UTIL_PIN_CTL);
		1052	if (val & UTIL_PIN_ENABLE) {
		1053	DRM_DEBUG_KMS("util pin already enabled\n");
		1054	val &= ~UTIL_PIN_ENABLE;
		1055	I915_WRITE(UTIL_PIN_CTL, val);
		1056	}
		1057
		1058	val = 0;
		1059	if (panel->backlight.util_pin_active_low)
		1060	val \|= UTIL_PIN_POLARITY;
		1061	I915_WRITE(UTIL_PIN_CTL, val \| UTIL_PIN_PIPE(pipe) \|
		1062	UTIL_PIN_MODE_PWM \| UTIL_PIN_ENABLE);
		1063	}
		1064
		1065	pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
		1066	if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
		1067	DRM_DEBUG_KMS("backlight already enabled\n");
		1068	pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
		1069	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
		1070	pwm_ctl);
		1071	}
		1072
		1073	I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
		1074	panel->backlight.max);
		1075
		1076	intel_panel_actually_set_backlight(connector, panel->backlight.level);
		1077
		1078	pwm_ctl = 0;
		1079	if (panel->backlight.active_low_pwm)
		1080	pwm_ctl \|= BXT_BLC_PWM_POLARITY;
		1081
		1082	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
		1083	POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
		1084	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
		1085	pwm_ctl \| BXT_BLC_PWM_ENABLE);
		1086	}
		1087
		1088	static void pwm_enable_backlight(struct intel_connector *connector)
		1089	{
		1090	struct intel_panel *panel = &connector->panel;
		1091
		1092	pwm_enable(panel->backlight.pwm);
		1093	intel_panel_actually_set_backlight(connector, panel->backlight.level);
		1094	}
		1095
4560	Serge	1096	void intel_panel_enable_backlight(struct intel_connector *connector)
2330	Serge	1097	{
4560	Serge	1098	struct drm_device *dev = connector->base.dev;
2330	Serge	1099	struct drm_i915_private *dev_priv = dev->dev_private;
4560	Serge	1100	struct intel_panel *panel = &connector->panel;
		1101	enum pipe pipe = intel_get_pipe_from_connector(connector);
2330	Serge	1102
5354	serge	1103	if (!panel->backlight.present)
4560	Serge	1104	return;
		1105
		1106	DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
		1107
5354	serge	1108	mutex_lock(&dev_priv->backlight_lock);
4560	Serge	1109
		1110	WARN_ON(panel->backlight.max == 0);
		1111
6283	serge	1112	if (panel->backlight.level <= panel->backlight.min) {
		1113	panel->backlight.level = panel->backlight.max;
		1114	}
		1115
6084	serge	1116	panel->backlight.enable(connector);
4560	Serge	1117	panel->backlight.enabled = true;
		1118
5354	serge	1119	mutex_unlock(&dev_priv->backlight_lock);
2330	Serge	1120	}
		1121
4560	Serge	1122	#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
		1123	static int intel_backlight_device_update_status(struct backlight_device *bd)
2330	Serge	1124	{
4560	Serge	1125	struct intel_connector *connector = bl_get_data(bd);
5354	serge	1126	struct intel_panel *panel = &connector->panel;
4560	Serge	1127	struct drm_device *dev = connector->base.dev;
		1128
5060	serge	1129	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
4560	Serge	1130	DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
		1131	bd->props.brightness, bd->props.max_brightness);
		1132	intel_panel_set_backlight(connector, bd->props.brightness,
4104	Serge	1133	bd->props.max_brightness);
6084	serge	1134
		1135	/*
		1136	* Allow flipping bl_power as a sub-state of enabled. Sadly the
		1137	* backlight class device does not make it easy to to differentiate
		1138	* between callbacks for brightness and bl_power, so our backlight_power
		1139	* callback needs to take this into account.
		1140	*/
		1141	if (panel->backlight.enabled) {
		1142	if (panel->backlight.power) {
		1143	bool enable = bd->props.power == FB_BLANK_UNBLANK &&
		1144	bd->props.brightness != 0;
		1145	panel->backlight.power(connector, enable);
		1146	}
		1147	} else {
		1148	bd->props.power = FB_BLANK_POWERDOWN;
		1149	}
		1150
5060	serge	1151	drm_modeset_unlock(&dev->mode_config.connection_mutex);
2330	Serge	1152	return 0;
		1153	}
		1154
4560	Serge	1155	static int intel_backlight_device_get_brightness(struct backlight_device *bd)
2330	Serge	1156	{
4560	Serge	1157	struct intel_connector *connector = bl_get_data(bd);
		1158	struct drm_device *dev = connector->base.dev;
		1159	struct drm_i915_private *dev_priv = dev->dev_private;
5060	serge	1160	u32 hw_level;
4560	Serge	1161	int ret;
		1162
		1163	intel_runtime_pm_get(dev_priv);
5060	serge	1164	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
		1165
		1166	hw_level = intel_panel_get_backlight(connector);
		1167	ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
		1168
		1169	drm_modeset_unlock(&dev->mode_config.connection_mutex);
4560	Serge	1170	intel_runtime_pm_put(dev_priv);
		1171
		1172	return ret;
2330	Serge	1173	}
		1174
4560	Serge	1175	static const struct backlight_ops intel_backlight_device_ops = {
		1176	.update_status = intel_backlight_device_update_status,
		1177	.get_brightness = intel_backlight_device_get_brightness,
2330	Serge	1178	};
		1179
4560	Serge	1180	static int intel_backlight_device_register(struct intel_connector *connector)
2330	Serge	1181	{
4560	Serge	1182	struct intel_panel *panel = &connector->panel;
2330	Serge	1183	struct backlight_properties props;
		1184
4560	Serge	1185	if (WARN_ON(panel->backlight.device))
3746	Serge	1186	return -ENODEV;
		1187
5354	serge	1188	if (!panel->backlight.present)
		1189	return 0;
		1190
5060	serge	1191	WARN_ON(panel->backlight.max == 0);
4560	Serge	1192
3031	serge	1193	memset(&props, 0, sizeof(props));
2330	Serge	1194	props.type = BACKLIGHT_RAW;
5060	serge	1195
		1196	/*
		1197	* Note: Everything should work even if the backlight device max
		1198	* presented to the userspace is arbitrarily chosen.
		1199	*/
4560	Serge	1200	props.max_brightness = panel->backlight.max;
5060	serge	1201	props.brightness = scale_hw_to_user(connector,
		1202	panel->backlight.level,
		1203	props.max_brightness);
4104	Serge	1204
5354	serge	1205	if (panel->backlight.enabled)
		1206	props.power = FB_BLANK_UNBLANK;
		1207	else
		1208	props.power = FB_BLANK_POWERDOWN;
		1209
4560	Serge	1210	/*
		1211	* Note: using the same name independent of the connector prevents
		1212	* registration of multiple backlight devices in the driver.
		1213	*/
		1214	panel->backlight.device =
2330	Serge	1215	backlight_device_register("intel_backlight",
4560	Serge	1216	connector->base.kdev,
		1217	connector,
		1218	&intel_backlight_device_ops, &props);
2330	Serge	1219
4560	Serge	1220	if (IS_ERR(panel->backlight.device)) {
2330	Serge	1221	DRM_ERROR("Failed to register backlight: %ld\n",
4560	Serge	1222	PTR_ERR(panel->backlight.device));
		1223	panel->backlight.device = NULL;
2330	Serge	1224	return -ENODEV;
		1225	}
5354	serge	1226
		1227	DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
		1228	connector->base.name);
		1229
2330	Serge	1230	return 0;
		1231	}
		1232
4560	Serge	1233	static void intel_backlight_device_unregister(struct intel_connector *connector)
2330	Serge	1234	{
4560	Serge	1235	struct intel_panel *panel = &connector->panel;
		1236
		1237	if (panel->backlight.device) {
		1238	backlight_device_unregister(panel->backlight.device);
		1239	panel->backlight.device = NULL;
		1240	}
		1241	}
		1242	#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
		1243	static int intel_backlight_device_register(struct intel_connector *connector)
		1244	{
		1245	return 0;
		1246	}
		1247	static void intel_backlight_device_unregister(struct intel_connector *connector)
		1248	{
		1249	}
		1250	#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
		1251
		1252	/*
6084	serge	1253	* SPT: This value represents the period of the PWM stream in clock periods
		1254	* multiplied by 16 (default increment) or 128 (alternate increment selected in
		1255	* SCHICKEN_1 bit 0). PWM clock is 24 MHz.
		1256	*/
		1257	static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
		1258	{
		1259	struct drm_device *dev = connector->base.dev;
		1260	struct drm_i915_private *dev_priv = dev->dev_private;
		1261	u32 mul, clock;
		1262
		1263	if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
		1264	mul = 128;
		1265	else
		1266	mul = 16;
		1267
		1268	clock = MHz(24);
		1269
		1270	return clock / (pwm_freq_hz * mul);
		1271	}
		1272
		1273	/*
		1274	* LPT: This value represents the period of the PWM stream in clock periods
		1275	* multiplied by 128 (default increment) or 16 (alternate increment, selected in
		1276	* LPT SOUTH_CHICKEN2 register bit 5).
		1277	*/
		1278	static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
		1279	{
		1280	struct drm_device *dev = connector->base.dev;
		1281	struct drm_i915_private *dev_priv = dev->dev_private;
		1282	u32 mul, clock;
		1283
		1284	if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
		1285	mul = 16;
		1286	else
		1287	mul = 128;
		1288
		1289	if (dev_priv->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE)
		1290	clock = MHz(135); /* LPT:H */
		1291	else
		1292	clock = MHz(24); /* LPT:LP */
		1293
		1294	return clock / (pwm_freq_hz * mul);
		1295	}
		1296
		1297	/*
		1298	* ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
		1299	* display raw clocks multiplied by 128.
		1300	*/
		1301	static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
		1302	{
		1303	struct drm_device *dev = connector->base.dev;
		1304	int clock = MHz(intel_pch_rawclk(dev));
		1305
		1306	return clock / (pwm_freq_hz * 128);
		1307	}
		1308
		1309	/*
		1310	* Gen2: This field determines the number of time base events (display core
		1311	* clock frequency/32) in total for a complete cycle of modulated backlight
		1312	* control.
4560	Serge	1313	*
6084	serge	1314	* Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
		1315	* divided by 32.
4560	Serge	1316	*/
6084	serge	1317	static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
		1318	{
		1319	struct drm_device *dev = connector->base.dev;
		1320	struct drm_i915_private *dev_priv = dev->dev_private;
		1321	int clock;
		1322
		1323	if (IS_PINEVIEW(dev))
		1324	clock = intel_hrawclk(dev);
		1325	else
		1326	clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
		1327
		1328	return clock / (pwm_freq_hz * 32);
		1329	}
		1330
		1331	/*
		1332	* Gen4: This value represents the period of the PWM stream in display core
		1333	* clocks multiplied by 128.
		1334	*/
		1335	static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
		1336	{
		1337	struct drm_device *dev = connector->base.dev;
		1338	struct drm_i915_private *dev_priv = dev->dev_private;
		1339	int clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
		1340
		1341	return clock / (pwm_freq_hz * 128);
		1342	}
		1343
		1344	/*
		1345	* VLV: This value represents the period of the PWM stream in display core
		1346	* clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
		1347	* multiplied by 16. CHV uses a 19.2MHz S0IX clock.
		1348	*/
		1349	static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
		1350	{
		1351	struct drm_device *dev = connector->base.dev;
		1352	struct drm_i915_private *dev_priv = dev->dev_private;
		1353	int clock;
		1354
		1355	if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
		1356	if (IS_CHERRYVIEW(dev))
		1357	return KHz(19200) / (pwm_freq_hz * 16);
		1358	else
		1359	return MHz(25) / (pwm_freq_hz * 16);
		1360	} else {
		1361	clock = intel_hrawclk(dev);
		1362	return MHz(clock) / (pwm_freq_hz * 128);
		1363	}
		1364	}
		1365
		1366	static u32 get_backlight_max_vbt(struct intel_connector *connector)
		1367	{
		1368	struct drm_device *dev = connector->base.dev;
		1369	struct drm_i915_private *dev_priv = dev->dev_private;
		1370	struct intel_panel *panel = &connector->panel;
		1371	u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
		1372	u32 pwm;
		1373
		1374	if (!pwm_freq_hz) {
		1375	DRM_DEBUG_KMS("backlight frequency not specified in VBT\n");
		1376	return 0;
		1377	}
		1378
		1379	if (!panel->backlight.hz_to_pwm) {
		1380	DRM_DEBUG_KMS("backlight frequency setting from VBT currently not supported on this platform\n");
		1381	return 0;
		1382	}
		1383
		1384	pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
		1385	if (!pwm) {
		1386	DRM_DEBUG_KMS("backlight frequency conversion failed\n");
		1387	return 0;
		1388	}
		1389
		1390	DRM_DEBUG_KMS("backlight frequency %u Hz from VBT\n", pwm_freq_hz);
		1391
		1392	return pwm;
		1393	}
		1394
		1395	/*
		1396	* Note: The setup hooks can't assume pipe is set!
		1397	*/
5060	serge	1398	static u32 get_backlight_min_vbt(struct intel_connector *connector)
		1399	{
		1400	struct drm_device *dev = connector->base.dev;
		1401	struct drm_i915_private *dev_priv = dev->dev_private;
		1402	struct intel_panel *panel = &connector->panel;
5354	serge	1403	int min;
5060	serge	1404
		1405	WARN_ON(panel->backlight.max == 0);
		1406
5354	serge	1407	/*
		1408	* XXX: If the vbt value is 255, it makes min equal to max, which leads
		1409	* to problems. There are such machines out there. Either our
		1410	* interpretation is wrong or the vbt has bogus data. Or both. Safeguard
		1411	* against this by letting the minimum be at most (arbitrarily chosen)
		1412	* 25% of the max.
		1413	*/
		1414	min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
		1415	if (min != dev_priv->vbt.backlight.min_brightness) {
		1416	DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
		1417	dev_priv->vbt.backlight.min_brightness, min);
		1418	}
		1419
5060	serge	1420	/* vbt value is a coefficient in range [0..255] */
5354	serge	1421	return scale(min, 0, 255, 0, panel->backlight.max);
5060	serge	1422	}
		1423
6084	serge	1424	static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
4560	Serge	1425	{
		1426	struct drm_device *dev = connector->base.dev;
2330	Serge	1427	struct drm_i915_private *dev_priv = dev->dev_private;
4560	Serge	1428	struct intel_panel *panel = &connector->panel;
		1429	u32 pch_ctl1, pch_ctl2, val;
		1430
		1431	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
		1432	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
		1433
		1434	pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
		1435	panel->backlight.max = pch_ctl2 >> 16;
6084	serge	1436
4560	Serge	1437	if (!panel->backlight.max)
6084	serge	1438	panel->backlight.max = get_backlight_max_vbt(connector);
		1439
		1440	if (!panel->backlight.max)
4560	Serge	1441	return -ENODEV;
		1442
5060	serge	1443	panel->backlight.min = get_backlight_min_vbt(connector);
		1444
6084	serge	1445	val = lpt_get_backlight(connector);
4560	Serge	1446	panel->backlight.level = intel_panel_compute_brightness(connector, val);
		1447
		1448	panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
		1449	panel->backlight.level != 0;
		1450
		1451	return 0;
		1452	}
		1453
5354	serge	1454	static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
4560	Serge	1455	{
		1456	struct drm_device *dev = connector->base.dev;
		1457	struct drm_i915_private *dev_priv = dev->dev_private;
		1458	struct intel_panel *panel = &connector->panel;
		1459	u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
		1460
		1461	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
		1462	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
		1463
		1464	pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
		1465	panel->backlight.max = pch_ctl2 >> 16;
6084	serge	1466
4560	Serge	1467	if (!panel->backlight.max)
6084	serge	1468	panel->backlight.max = get_backlight_max_vbt(connector);
		1469
		1470	if (!panel->backlight.max)
4560	Serge	1471	return -ENODEV;
		1472
5060	serge	1473	panel->backlight.min = get_backlight_min_vbt(connector);
		1474
4560	Serge	1475	val = pch_get_backlight(connector);
		1476	panel->backlight.level = intel_panel_compute_brightness(connector, val);
		1477
		1478	cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
		1479	panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
		1480	(pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
		1481
		1482	return 0;
		1483	}
		1484
5354	serge	1485	static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
4560	Serge	1486	{
		1487	struct drm_device *dev = connector->base.dev;
		1488	struct drm_i915_private *dev_priv = dev->dev_private;
		1489	struct intel_panel *panel = &connector->panel;
		1490	u32 ctl, val;
		1491
		1492	ctl = I915_READ(BLC_PWM_CTL);
		1493
5060	serge	1494	if (IS_GEN2(dev) \|\| IS_I915GM(dev) \|\| IS_I945GM(dev))
4560	Serge	1495	panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
		1496
		1497	if (IS_PINEVIEW(dev))
		1498	panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
		1499
		1500	panel->backlight.max = ctl >> 17;
		1501
6084	serge	1502	if (!panel->backlight.max) {
		1503	panel->backlight.max = get_backlight_max_vbt(connector);
		1504	panel->backlight.max >>= 1;
		1505	}
		1506
4560	Serge	1507	if (!panel->backlight.max)
		1508	return -ENODEV;
		1509
6084	serge	1510	if (panel->backlight.combination_mode)
		1511	panel->backlight.max *= 0xff;
		1512
5060	serge	1513	panel->backlight.min = get_backlight_min_vbt(connector);
		1514
4560	Serge	1515	val = i9xx_get_backlight(connector);
		1516	panel->backlight.level = intel_panel_compute_brightness(connector, val);
		1517
		1518	panel->backlight.enabled = panel->backlight.level != 0;
		1519
		1520	return 0;
		1521	}
		1522
5354	serge	1523	static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
4560	Serge	1524	{
		1525	struct drm_device *dev = connector->base.dev;
		1526	struct drm_i915_private *dev_priv = dev->dev_private;
		1527	struct intel_panel *panel = &connector->panel;
		1528	u32 ctl, ctl2, val;
		1529
		1530	ctl2 = I915_READ(BLC_PWM_CTL2);
		1531	panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
		1532	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
		1533
		1534	ctl = I915_READ(BLC_PWM_CTL);
		1535	panel->backlight.max = ctl >> 16;
		1536
		1537	if (!panel->backlight.max)
6084	serge	1538	panel->backlight.max = get_backlight_max_vbt(connector);
		1539
		1540	if (!panel->backlight.max)
4560	Serge	1541	return -ENODEV;
		1542
6084	serge	1543	if (panel->backlight.combination_mode)
		1544	panel->backlight.max *= 0xff;
		1545
5060	serge	1546	panel->backlight.min = get_backlight_min_vbt(connector);
		1547
4560	Serge	1548	val = i9xx_get_backlight(connector);
		1549	panel->backlight.level = intel_panel_compute_brightness(connector, val);
		1550
		1551	panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
		1552	panel->backlight.level != 0;
		1553
		1554	return 0;
		1555	}
		1556
5354	serge	1557	static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
4560	Serge	1558	{
		1559	struct drm_device *dev = connector->base.dev;
		1560	struct drm_i915_private *dev_priv = dev->dev_private;
		1561	struct intel_panel *panel = &connector->panel;
		1562	u32 ctl, ctl2, val;
		1563
5354	serge	1564	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		1565	return -ENODEV;
		1566
		1567	ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
4560	Serge	1568	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
		1569
5354	serge	1570	ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
4560	Serge	1571	panel->backlight.max = ctl >> 16;
6084	serge	1572
4560	Serge	1573	if (!panel->backlight.max)
6084	serge	1574	panel->backlight.max = get_backlight_max_vbt(connector);
		1575
		1576	if (!panel->backlight.max)
4560	Serge	1577	return -ENODEV;
		1578
5060	serge	1579	panel->backlight.min = get_backlight_min_vbt(connector);
		1580
5354	serge	1581	val = _vlv_get_backlight(dev, pipe);
4560	Serge	1582	panel->backlight.level = intel_panel_compute_brightness(connector, val);
		1583
		1584	panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
		1585	panel->backlight.level != 0;
		1586
		1587	return 0;
2330	Serge	1588	}
4560	Serge	1589
6084	serge	1590	static int
		1591	bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
		1592	{
		1593	struct drm_device *dev = connector->base.dev;
		1594	struct drm_i915_private *dev_priv = dev->dev_private;
		1595	struct intel_panel *panel = &connector->panel;
		1596	u32 pwm_ctl, val;
		1597
		1598	/*
		1599	* For BXT hard coding the Backlight controller to 0.
		1600	* TODO : Read the controller value from VBT and generalize
		1601	*/
		1602	panel->backlight.controller = 0;
		1603
		1604	pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
		1605
		1606	/* Keeping the check if controller 1 is to be programmed.
		1607	* This will come into affect once the VBT parsing
		1608	* is fixed for controller selection, and controller 1 is used
		1609	* for a prticular display configuration.
		1610	*/
		1611	if (panel->backlight.controller == 1) {
		1612	val = I915_READ(UTIL_PIN_CTL);
		1613	panel->backlight.util_pin_active_low =
		1614	val & UTIL_PIN_POLARITY;
		1615	}
		1616
		1617	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
		1618	panel->backlight.max =
		1619	I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
		1620
		1621	if (!panel->backlight.max)
		1622	panel->backlight.max = get_backlight_max_vbt(connector);
		1623
		1624	if (!panel->backlight.max)
		1625	return -ENODEV;
		1626
		1627	val = bxt_get_backlight(connector);
		1628	panel->backlight.level = intel_panel_compute_brightness(connector, val);
		1629
		1630	panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) &&
		1631	panel->backlight.level != 0;
		1632
		1633	return 0;
		1634	}
		1635
		1636	static int pwm_setup_backlight(struct intel_connector *connector,
		1637	enum pipe pipe)
		1638	{
		1639	struct drm_device *dev = connector->base.dev;
		1640	struct intel_panel *panel = &connector->panel;
		1641	int retval;
		1642
		1643	/* Get the PWM chip for backlight control */
		1644	panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
		1645	if (IS_ERR(panel->backlight.pwm)) {
		1646	DRM_ERROR("Failed to own the pwm chip\n");
		1647	panel->backlight.pwm = NULL;
		1648	return -ENODEV;
		1649	}
		1650
		1651	retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
		1652	CRC_PMIC_PWM_PERIOD_NS);
		1653	if (retval < 0) {
		1654	DRM_ERROR("Failed to configure the pwm chip\n");
		1655	pwm_put(panel->backlight.pwm);
		1656	panel->backlight.pwm = NULL;
		1657	return retval;
		1658	}
		1659
		1660	panel->backlight.min = 0; /* 0% */
		1661	panel->backlight.max = 100; /* 100% */
		1662	panel->backlight.level = DIV_ROUND_UP(
		1663	pwm_get_duty_cycle(panel->backlight.pwm) * 100,
		1664	CRC_PMIC_PWM_PERIOD_NS);
		1665	panel->backlight.enabled = panel->backlight.level != 0;
		1666
		1667	return 0;
		1668	}
		1669
5354	serge	1670	int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
2330	Serge	1671	{
4560	Serge	1672	struct drm_device *dev = connector->dev;
		1673	struct drm_i915_private *dev_priv = dev->dev_private;
		1674	struct intel_connector *intel_connector = to_intel_connector(connector);
		1675	struct intel_panel *panel = &intel_connector->panel;
		1676	int ret;
		1677
5060	serge	1678	if (!dev_priv->vbt.backlight.present) {
		1679	if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
		1680	DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
		1681	} else {
		1682	DRM_DEBUG_KMS("no backlight present per VBT\n");
6084	serge	1683	return 0;
		1684	}
5060	serge	1685	}
		1686
6084	serge	1687	/* ensure intel_panel has been initialized first */
		1688	if (WARN_ON(!panel->backlight.setup))
		1689	return -ENODEV;
		1690
4560	Serge	1691	/* set level and max in panel struct */
5354	serge	1692	mutex_lock(&dev_priv->backlight_lock);
6084	serge	1693	ret = panel->backlight.setup(intel_connector, pipe);
5354	serge	1694	mutex_unlock(&dev_priv->backlight_lock);
4560	Serge	1695
		1696	if (ret) {
		1697	DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
5060	serge	1698	connector->name);
4560	Serge	1699	return ret;
		1700	}
		1701
		1702	panel->backlight.present = true;
		1703
5354	serge	1704	DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
		1705	connector->name,
4560	Serge	1706	panel->backlight.enabled ? "enabled" : "disabled",
5354	serge	1707	panel->backlight.level, panel->backlight.max);
4560	Serge	1708
2330	Serge	1709	return 0;
		1710	}
		1711
4560	Serge	1712	void intel_panel_destroy_backlight(struct drm_connector *connector)
2330	Serge	1713	{
4560	Serge	1714	struct intel_connector *intel_connector = to_intel_connector(connector);
		1715	struct intel_panel *panel = &intel_connector->panel;
		1716
6084	serge	1717	/* dispose of the pwm */
		1718	if (panel->backlight.pwm)
		1719	pwm_put(panel->backlight.pwm);
		1720
4560	Serge	1721	panel->backlight.present = false;
2330	Serge	1722	}
3243	Serge	1723
4560	Serge	1724	/* Set up chip specific backlight functions */
6084	serge	1725	static void
		1726	intel_panel_init_backlight_funcs(struct intel_panel *panel)
4560	Serge	1727	{
6084	serge	1728	struct intel_connector *intel_connector =
		1729	container_of(panel, struct intel_connector, panel);
		1730	struct drm_device *dev = intel_connector->base.dev;
4560	Serge	1731	struct drm_i915_private *dev_priv = dev->dev_private;
		1732
6084	serge	1733	if (IS_BROXTON(dev)) {
		1734	panel->backlight.setup = bxt_setup_backlight;
		1735	panel->backlight.enable = bxt_enable_backlight;
		1736	panel->backlight.disable = bxt_disable_backlight;
		1737	panel->backlight.set = bxt_set_backlight;
		1738	panel->backlight.get = bxt_get_backlight;
		1739	} else if (HAS_PCH_LPT(dev) \|\| HAS_PCH_SPT(dev)) {
		1740	panel->backlight.setup = lpt_setup_backlight;
		1741	panel->backlight.enable = lpt_enable_backlight;
		1742	panel->backlight.disable = lpt_disable_backlight;
		1743	panel->backlight.set = lpt_set_backlight;
		1744	panel->backlight.get = lpt_get_backlight;
		1745	if (HAS_PCH_LPT(dev))
		1746	panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
		1747	else
		1748	panel->backlight.hz_to_pwm = spt_hz_to_pwm;
4560	Serge	1749	} else if (HAS_PCH_SPLIT(dev)) {
6084	serge	1750	panel->backlight.setup = pch_setup_backlight;
		1751	panel->backlight.enable = pch_enable_backlight;
		1752	panel->backlight.disable = pch_disable_backlight;
		1753	panel->backlight.set = pch_set_backlight;
		1754	panel->backlight.get = pch_get_backlight;
		1755	panel->backlight.hz_to_pwm = pch_hz_to_pwm;
4560	Serge	1756	} else if (IS_VALLEYVIEW(dev)) {
6084	serge	1757	if (dev_priv->vbt.has_mipi) {
		1758	panel->backlight.setup = pwm_setup_backlight;
		1759	panel->backlight.enable = pwm_enable_backlight;
		1760	panel->backlight.disable = pwm_disable_backlight;
		1761	panel->backlight.set = pwm_set_backlight;
		1762	panel->backlight.get = pwm_get_backlight;
		1763	} else {
		1764	panel->backlight.setup = vlv_setup_backlight;
		1765	panel->backlight.enable = vlv_enable_backlight;
		1766	panel->backlight.disable = vlv_disable_backlight;
		1767	panel->backlight.set = vlv_set_backlight;
		1768	panel->backlight.get = vlv_get_backlight;
		1769	panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
		1770	}
4560	Serge	1771	} else if (IS_GEN4(dev)) {
6084	serge	1772	panel->backlight.setup = i965_setup_backlight;
		1773	panel->backlight.enable = i965_enable_backlight;
		1774	panel->backlight.disable = i965_disable_backlight;
		1775	panel->backlight.set = i9xx_set_backlight;
		1776	panel->backlight.get = i9xx_get_backlight;
		1777	panel->backlight.hz_to_pwm = i965_hz_to_pwm;
4560	Serge	1778	} else {
6084	serge	1779	panel->backlight.setup = i9xx_setup_backlight;
		1780	panel->backlight.enable = i9xx_enable_backlight;
		1781	panel->backlight.disable = i9xx_disable_backlight;
		1782	panel->backlight.set = i9xx_set_backlight;
		1783	panel->backlight.get = i9xx_get_backlight;
		1784	panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
4560	Serge	1785	}
		1786	}
		1787
3243	Serge	1788	int intel_panel_init(struct intel_panel *panel,
5060	serge	1789	struct drm_display_mode *fixed_mode,
		1790	struct drm_display_mode *downclock_mode)
3243	Serge	1791	{
6084	serge	1792	intel_panel_init_backlight_funcs(panel);
		1793
3243	Serge	1794	panel->fixed_mode = fixed_mode;
5060	serge	1795	panel->downclock_mode = downclock_mode;
3243	Serge	1796
		1797	return 0;
		1798	}
		1799
		1800	void intel_panel_fini(struct intel_panel *panel)
		1801	{
		1802	struct intel_connector *intel_connector =
		1803	container_of(panel, struct intel_connector, panel);
		1804
		1805	if (panel->fixed_mode)
		1806	drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
4560	Serge	1807
		1808	if (panel->downclock_mode)
		1809	drm_mode_destroy(intel_connector->base.dev,
		1810	panel->downclock_mode);
3243	Serge	1811	}
5354	serge	1812
		1813	void intel_backlight_register(struct drm_device *dev)
		1814	{
		1815	struct intel_connector *connector;
		1816
		1817	list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
		1818	intel_backlight_device_register(connector);
		1819	}
		1820
		1821	void intel_backlight_unregister(struct drm_device *dev)
		1822	{
		1823	struct intel_connector *connector;
		1824
		1825	list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
		1826	intel_backlight_device_unregister(connector);
		1827	}

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/intel_panel.c – Rev 6283