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2327 Serge 1
/*
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 * Copyright 2008 Intel Corporation 
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 * Copyright 2008 Red Hat 
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining
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 * a copy of this software and associated documentation files (the
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 * "Software"), to deal in the Software without restriction, including
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * distribute, sub license, and/or sell copies of the Software, and to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the
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 * next paragraph) shall be included in all copies or substantial
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 * portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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 * NON-INFRINGEMENT.  IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE
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 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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 * SOFTWARE.
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 *
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 */
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//#include 
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//#include 
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//#include 
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#include 
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#include "drmP.h"
2330 Serge 33
#include "i915_drm.h"
2327 Serge 34
#include "i915_drv.h"
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#include "intel_drv.h"
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#define PCI_ASLE 0xe4
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#define PCI_ASLS 0xfc
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#define OPREGION_HEADER_OFFSET 0
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#define OPREGION_ACPI_OFFSET   0x100
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#define   ACPI_CLID 0x01ac /* current lid state indicator */
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#define   ACPI_CDCK 0x01b0 /* current docking state indicator */
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#define OPREGION_SWSCI_OFFSET  0x200
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#define OPREGION_ASLE_OFFSET   0x300
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#define OPREGION_VBT_OFFSET    0x400
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#define OPREGION_SIGNATURE "IntelGraphicsMem"
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#define MBOX_ACPI      (1<<0)
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#define MBOX_SWSCI     (1<<1)
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#define MBOX_ASLE      (1<<2)
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struct opregion_header {
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       u8 signature[16];
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       u32 size;
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       u32 opregion_ver;
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       u8 bios_ver[32];
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       u8 vbios_ver[16];
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       u8 driver_ver[16];
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       u32 mboxes;
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       u8 reserved[164];
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} __attribute__((packed));
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/* OpRegion mailbox #1: public ACPI methods */
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struct opregion_acpi {
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       u32 drdy;       /* driver readiness */
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       u32 csts;       /* notification status */
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       u32 cevt;       /* current event */
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       u8 rsvd1[20];
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       u32 didl[8];    /* supported display devices ID list */
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       u32 cpdl[8];    /* currently presented display list */
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       u32 cadl[8];    /* currently active display list */
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       u32 nadl[8];    /* next active devices list */
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       u32 aslp;       /* ASL sleep time-out */
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       u32 tidx;       /* toggle table index */
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       u32 chpd;       /* current hotplug enable indicator */
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       u32 clid;       /* current lid state*/
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       u32 cdck;       /* current docking state */
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       u32 sxsw;       /* Sx state resume */
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       u32 evts;       /* ASL supported events */
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       u32 cnot;       /* current OS notification */
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       u32 nrdy;       /* driver status */
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       u8 rsvd2[60];
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} __attribute__((packed));
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/* OpRegion mailbox #2: SWSCI */
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struct opregion_swsci {
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       u32 scic;       /* SWSCI command|status|data */
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       u32 parm;       /* command parameters */
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       u32 dslp;       /* driver sleep time-out */
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       u8 rsvd[244];
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} __attribute__((packed));
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/* OpRegion mailbox #3: ASLE */
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struct opregion_asle {
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       u32 ardy;       /* driver readiness */
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       u32 aslc;       /* ASLE interrupt command */
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       u32 tche;       /* technology enabled indicator */
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       u32 alsi;       /* current ALS illuminance reading */
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       u32 bclp;       /* backlight brightness to set */
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       u32 pfit;       /* panel fitting state */
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       u32 cblv;       /* current brightness level */
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       u16 bclm[20];   /* backlight level duty cycle mapping table */
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       u32 cpfm;       /* current panel fitting mode */
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       u32 epfm;       /* enabled panel fitting modes */
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       u8 plut[74];    /* panel LUT and identifier */
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       u32 pfmb;       /* PWM freq and min brightness */
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       u8 rsvd[102];
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} __attribute__((packed));
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/* ASLE irq request bits */
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#define ASLE_SET_ALS_ILLUM     (1 << 0)
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#define ASLE_SET_BACKLIGHT     (1 << 1)
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#define ASLE_SET_PFIT          (1 << 2)
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#define ASLE_SET_PWM_FREQ      (1 << 3)
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#define ASLE_REQ_MSK           0xf
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/* response bits of ASLE irq request */
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#define ASLE_ALS_ILLUM_FAILED	(1<<10)
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#define ASLE_BACKLIGHT_FAILED	(1<<12)
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#define ASLE_PFIT_FAILED	(1<<14)
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#define ASLE_PWM_FREQ_FAILED	(1<<16)
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/* ASLE backlight brightness to set */
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#define ASLE_BCLP_VALID                (1<<31)
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#define ASLE_BCLP_MSK          (~(1<<31))
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/* ASLE panel fitting request */
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#define ASLE_PFIT_VALID         (1<<31)
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#define ASLE_PFIT_CENTER (1<<0)
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#define ASLE_PFIT_STRETCH_TEXT (1<<1)
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#define ASLE_PFIT_STRETCH_GFX (1<<2)
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/* PWM frequency and minimum brightness */
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#define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
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#define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
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#define ASLE_PFMB_PWM_MASK (0x7ffffe00)
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#define ASLE_PFMB_PWM_VALID (1<<31)
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#define ASLE_CBLV_VALID         (1<<31)
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#define ACPI_OTHER_OUTPUT (0<<8)
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#define ACPI_VGA_OUTPUT (1<<8)
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#define ACPI_TV_OUTPUT (2<<8)
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#define ACPI_DIGITAL_OUTPUT (3<<8)
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#define ACPI_LVDS_OUTPUT (4<<8)
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#ifdef CONFIG_ACPI
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#endif
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static inline int pci_read_config_dword(struct pci_dev *dev, int where,
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                    u32 *val)
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{
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    *val = PciRead32(dev->busnr, dev->devfn, where);
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    return 1;
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}
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int intel_opregion_setup(struct drm_device *dev)
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{
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	struct drm_i915_private *dev_priv = dev->dev_private;
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	struct intel_opregion *opregion = &dev_priv->opregion;
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	void *base;
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	u32 asls, mboxes;
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	int err = 0;
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	pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
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	DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
168
	if (asls == 0) {
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		DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n");
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		return -ENOTSUPP;
171
	}
172
 
173
    base = ioremap(asls, OPREGION_SIZE);
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	if (!base)
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		return -ENOMEM;
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	if (memcmp(base, OPREGION_SIGNATURE, 16)) {
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		DRM_DEBUG_DRIVER("opregion signature mismatch\n");
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		err = -EINVAL;
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		goto err_out;
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	}
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	opregion->header = base;
183
	opregion->vbt = base + OPREGION_VBT_OFFSET;
184
 
185
	opregion->lid_state = base + ACPI_CLID;
186
 
187
	mboxes = opregion->header->mboxes;
188
	if (mboxes & MBOX_ACPI) {
189
		DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
190
		opregion->acpi = base + OPREGION_ACPI_OFFSET;
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	}
192
 
193
	if (mboxes & MBOX_SWSCI) {
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		DRM_DEBUG_DRIVER("SWSCI supported\n");
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		opregion->swsci = base + OPREGION_SWSCI_OFFSET;
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	}
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	if (mboxes & MBOX_ASLE) {
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		DRM_DEBUG_DRIVER("ASLE supported\n");
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		opregion->asle = base + OPREGION_ASLE_OFFSET;
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	}
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	return 0;
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err_out:
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	iounmap(base);
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	return err;
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}