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2330 Serge 1
/*
2
 * Copyright 2006 Dave Airlie 
3
 * Copyright © 2006-2007 Intel Corporation
4
 *
5
 * Permission is hereby granted, free of charge, to any person obtaining a
6
 * copy of this software and associated documentation files (the "Software"),
7
 * to deal in the Software without restriction, including without limitation
8
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9
 * and/or sell copies of the Software, and to permit persons to whom the
10
 * Software is furnished to do so, subject to the following conditions:
11
 *
12
 * The above copyright notice and this permission notice (including the next
13
 * paragraph) shall be included in all copies or substantial portions of the
14
 * Software.
15
 *
16
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22
 * DEALINGS IN THE SOFTWARE.
23
 *
24
 * Authors:
25
 *	Eric Anholt 
26
 */
27
#include 
28
#include 
3031 serge 29
#include 
30
#include 
2330 Serge 31
#include "intel_drv.h"
3031 serge 32
#include 
2330 Serge 33
#include "i915_drv.h"
34
#include "dvo.h"
35
 
36
#define SIL164_ADDR	0x38
37
#define CH7xxx_ADDR	0x76
38
#define TFP410_ADDR	0x38
3031 serge 39
#define NS2501_ADDR     0x38
2330 Serge 40
 
41
static const struct intel_dvo_device intel_dvo_devices[] = {
42
	{
43
		.type = INTEL_DVO_CHIP_TMDS,
44
		.name = "sil164",
45
		.dvo_reg = DVOC,
46
		.slave_addr = SIL164_ADDR,
47
		.dev_ops = &sil164_ops,
48
	},
49
	{
50
		.type = INTEL_DVO_CHIP_TMDS,
51
		.name = "ch7xxx",
52
		.dvo_reg = DVOC,
53
		.slave_addr = CH7xxx_ADDR,
54
		.dev_ops = &ch7xxx_ops,
55
	},
56
	{
4104 Serge 57
		.type = INTEL_DVO_CHIP_TMDS,
58
		.name = "ch7xxx",
59
		.dvo_reg = DVOC,
60
		.slave_addr = 0x75, /* For some ch7010 */
61
		.dev_ops = &ch7xxx_ops,
62
	},
63
	{
2330 Serge 64
		.type = INTEL_DVO_CHIP_LVDS,
65
		.name = "ivch",
66
		.dvo_reg = DVOA,
67
		.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
68
		.dev_ops = &ivch_ops,
69
	},
70
	{
71
		.type = INTEL_DVO_CHIP_TMDS,
72
		.name = "tfp410",
73
		.dvo_reg = DVOC,
74
		.slave_addr = TFP410_ADDR,
75
		.dev_ops = &tfp410_ops,
76
	},
77
	{
78
		.type = INTEL_DVO_CHIP_LVDS,
79
		.name = "ch7017",
80
		.dvo_reg = DVOC,
81
		.slave_addr = 0x75,
82
		.gpio = GMBUS_PORT_DPB,
83
		.dev_ops = &ch7017_ops,
3031 serge 84
	},
85
	{
86
	        .type = INTEL_DVO_CHIP_TMDS,
87
		.name = "ns2501",
88
		.dvo_reg = DVOC,
89
		.slave_addr = NS2501_ADDR,
90
		.dev_ops = &ns2501_ops,
2330 Serge 91
	}
92
};
93
 
94
struct intel_dvo {
95
	struct intel_encoder base;
96
 
97
	struct intel_dvo_device dev;
98
 
99
	struct drm_display_mode *panel_fixed_mode;
100
	bool panel_wants_dither;
101
};
102
 
4104 Serge 103
static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
2330 Serge 104
{
4104 Serge 105
	return container_of(encoder, struct intel_dvo, base);
2330 Serge 106
}
107
 
108
static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
109
{
4104 Serge 110
	return enc_to_dvo(intel_attached_encoder(connector));
2330 Serge 111
}
112
 
3031 serge 113
static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
2330 Serge 114
{
3031 serge 115
	struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
116
 
117
	return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
118
}
119
 
120
static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
121
				   enum pipe *pipe)
122
{
123
	struct drm_device *dev = encoder->base.dev;
124
	struct drm_i915_private *dev_priv = dev->dev_private;
4104 Serge 125
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
3031 serge 126
	u32 tmp;
127
 
128
	tmp = I915_READ(intel_dvo->dev.dvo_reg);
129
 
130
	if (!(tmp & DVO_ENABLE))
131
		return false;
132
 
133
	*pipe = PORT_TO_PIPE(tmp);
134
 
135
	return true;
136
}
137
 
4104 Serge 138
static void intel_dvo_get_config(struct intel_encoder *encoder,
139
				 struct intel_crtc_config *pipe_config)
140
{
141
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
142
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
143
	u32 tmp, flags = 0;
144
 
145
	tmp = I915_READ(intel_dvo->dev.dvo_reg);
146
	if (tmp & DVO_HSYNC_ACTIVE_HIGH)
147
		flags |= DRM_MODE_FLAG_PHSYNC;
148
	else
149
		flags |= DRM_MODE_FLAG_NHSYNC;
150
	if (tmp & DVO_VSYNC_ACTIVE_HIGH)
151
		flags |= DRM_MODE_FLAG_PVSYNC;
152
	else
153
		flags |= DRM_MODE_FLAG_NVSYNC;
154
 
155
	pipe_config->adjusted_mode.flags |= flags;
156
}
157
 
3031 serge 158
static void intel_disable_dvo(struct intel_encoder *encoder)
159
{
160
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
4104 Serge 161
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
2330 Serge 162
	u32 dvo_reg = intel_dvo->dev.dvo_reg;
163
	u32 temp = I915_READ(dvo_reg);
164
 
3031 serge 165
	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
166
	I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
167
	I915_READ(dvo_reg);
168
}
169
 
170
static void intel_enable_dvo(struct intel_encoder *encoder)
171
{
172
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
4104 Serge 173
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
3031 serge 174
	u32 dvo_reg = intel_dvo->dev.dvo_reg;
175
	u32 temp = I915_READ(dvo_reg);
176
 
2330 Serge 177
		I915_WRITE(dvo_reg, temp | DVO_ENABLE);
178
		I915_READ(dvo_reg);
3031 serge 179
	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
180
}
181
 
4104 Serge 182
/* Special dpms function to support cloning between dvo/sdvo/crt. */
3031 serge 183
static void intel_dvo_dpms(struct drm_connector *connector, int mode)
184
{
185
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
186
	struct drm_crtc *crtc;
187
 
188
	/* dvo supports only 2 dpms states. */
189
	if (mode != DRM_MODE_DPMS_ON)
190
		mode = DRM_MODE_DPMS_OFF;
191
 
192
	if (mode == connector->dpms)
193
		return;
194
 
195
	connector->dpms = mode;
196
 
197
	/* Only need to change hw state when actually enabled */
198
	crtc = intel_dvo->base.base.crtc;
199
	if (!crtc) {
200
		intel_dvo->base.connectors_active = false;
201
		return;
202
	}
203
 
4104 Serge 204
	/* We call connector dpms manually below in case pipe dpms doesn't
205
	 * change due to cloning. */
3031 serge 206
	if (mode == DRM_MODE_DPMS_ON) {
207
		intel_dvo->base.connectors_active = true;
208
 
209
		intel_crtc_update_dpms(crtc);
210
 
211
		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
2330 Serge 212
	} else {
3031 serge 213
		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
214
 
215
		intel_dvo->base.connectors_active = false;
216
 
217
		intel_crtc_update_dpms(crtc);
2330 Serge 218
	}
3031 serge 219
 
220
	intel_modeset_check_state(connector->dev);
2330 Serge 221
}
222
 
223
static int intel_dvo_mode_valid(struct drm_connector *connector,
224
				struct drm_display_mode *mode)
225
{
226
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
227
 
228
	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
229
		return MODE_NO_DBLESCAN;
230
 
231
	/* XXX: Validate clock range */
232
 
233
	if (intel_dvo->panel_fixed_mode) {
234
		if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
235
			return MODE_PANEL;
236
		if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
237
			return MODE_PANEL;
238
	}
239
 
240
	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
241
}
242
 
4104 Serge 243
static bool intel_dvo_compute_config(struct intel_encoder *encoder,
244
				     struct intel_crtc_config *pipe_config)
2330 Serge 245
{
4104 Serge 246
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
247
	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
2330 Serge 248
 
249
	/* If we have timings from the BIOS for the panel, put them in
250
	 * to the adjusted mode.  The CRTC will be set up for this mode,
251
	 * with the panel scaling set up to source from the H/VDisplay
252
	 * of the original mode.
253
	 */
254
	if (intel_dvo->panel_fixed_mode != NULL) {
255
#define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
256
		C(hdisplay);
257
		C(hsync_start);
258
		C(hsync_end);
259
		C(htotal);
260
		C(vdisplay);
261
		C(vsync_start);
262
		C(vsync_end);
263
		C(vtotal);
264
		C(clock);
265
#undef C
4104 Serge 266
 
267
		drm_mode_set_crtcinfo(adjusted_mode, 0);
2330 Serge 268
	}
269
 
270
	if (intel_dvo->dev.dev_ops->mode_fixup)
4104 Serge 271
		return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev,
272
							  &pipe_config->requested_mode,
273
							  adjusted_mode);
2330 Serge 274
 
275
	return true;
276
}
277
 
4104 Serge 278
static void intel_dvo_mode_set(struct intel_encoder *encoder)
2330 Serge 279
{
4104 Serge 280
	struct drm_device *dev = encoder->base.dev;
2330 Serge 281
	struct drm_i915_private *dev_priv = dev->dev_private;
4104 Serge 282
	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
283
	struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
284
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
285
	int pipe = crtc->pipe;
2330 Serge 286
	u32 dvo_val;
287
	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
288
 
289
	switch (dvo_reg) {
290
	case DVOA:
291
	default:
292
		dvo_srcdim_reg = DVOA_SRCDIM;
293
		break;
294
	case DVOB:
295
		dvo_srcdim_reg = DVOB_SRCDIM;
296
		break;
297
	case DVOC:
298
		dvo_srcdim_reg = DVOC_SRCDIM;
299
		break;
300
	}
301
 
4104 Serge 302
	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
303
					 &crtc->config.requested_mode,
304
					 adjusted_mode);
2330 Serge 305
 
306
	/* Save the data order, since I don't know what it should be set to. */
307
	dvo_val = I915_READ(dvo_reg) &
308
		  (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
309
	dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
310
		   DVO_BLANK_ACTIVE_HIGH;
311
 
312
	if (pipe == 1)
313
		dvo_val |= DVO_PIPE_B_SELECT;
314
	dvo_val |= DVO_PIPE_STALL;
315
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
316
		dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
317
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
318
		dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
319
 
320
	/*I915_WRITE(DVOB_SRCDIM,
321
	  (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
322
	  (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
323
	I915_WRITE(dvo_srcdim_reg,
324
		   (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
325
		   (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
326
	/*I915_WRITE(DVOB, dvo_val);*/
327
	I915_WRITE(dvo_reg, dvo_val);
328
}
329
 
330
/**
331
 * Detect the output connection on our DVO device.
332
 *
333
 * Unimplemented.
334
 */
335
static enum drm_connector_status
336
intel_dvo_detect(struct drm_connector *connector, bool force)
337
{
338
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
4104 Serge 339
	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
340
		      connector->base.id, drm_get_connector_name(connector));
2330 Serge 341
	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
342
}
343
 
344
static int intel_dvo_get_modes(struct drm_connector *connector)
345
{
346
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
347
	struct drm_i915_private *dev_priv = connector->dev->dev_private;
348
 
349
	/* We should probably have an i2c driver get_modes function for those
350
	 * devices which will have a fixed set of modes determined by the chip
351
	 * (TV-out, for example), but for now with just TMDS and LVDS,
352
	 * that's not the case.
353
	 */
354
	intel_ddc_get_modes(connector,
3031 serge 355
			    intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
2330 Serge 356
	if (!list_empty(&connector->probed_modes))
357
		return 1;
358
 
359
	if (intel_dvo->panel_fixed_mode != NULL) {
360
		struct drm_display_mode *mode;
361
		mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
362
		if (mode) {
363
			drm_mode_probed_add(connector, mode);
364
			return 1;
365
		}
366
	}
367
 
368
	return 0;
369
}
370
 
371
static void intel_dvo_destroy(struct drm_connector *connector)
372
{
373
	drm_sysfs_connector_remove(connector);
374
	drm_connector_cleanup(connector);
375
	kfree(connector);
376
}
377
 
378
static const struct drm_connector_funcs intel_dvo_connector_funcs = {
3031 serge 379
	.dpms = intel_dvo_dpms,
2330 Serge 380
	.detect = intel_dvo_detect,
381
	.destroy = intel_dvo_destroy,
382
	.fill_modes = drm_helper_probe_single_connector_modes,
383
};
384
 
385
static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
386
	.mode_valid = intel_dvo_mode_valid,
387
	.get_modes = intel_dvo_get_modes,
388
	.best_encoder = intel_best_encoder,
389
};
390
 
391
static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
392
{
4104 Serge 393
	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
2330 Serge 394
 
395
	if (intel_dvo->dev.dev_ops->destroy)
396
		intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
397
 
398
	kfree(intel_dvo->panel_fixed_mode);
399
 
400
	intel_encoder_destroy(encoder);
401
}
402
 
403
static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
404
	.destroy = intel_dvo_enc_destroy,
405
};
406
 
407
/**
408
 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
409
 *
410
 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
411
 * chip being on DVOB/C and having multiple pipes.
412
 */
413
static struct drm_display_mode *
414
intel_dvo_get_current_mode(struct drm_connector *connector)
415
{
416
	struct drm_device *dev = connector->dev;
417
	struct drm_i915_private *dev_priv = dev->dev_private;
418
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
419
	uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
420
	struct drm_display_mode *mode = NULL;
421
 
422
	/* If the DVO port is active, that'll be the LVDS, so we can pull out
423
	 * its timings to get how the BIOS set up the panel.
424
	 */
425
	if (dvo_val & DVO_ENABLE) {
426
		struct drm_crtc *crtc;
427
		int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
428
 
429
		crtc = intel_get_crtc_for_pipe(dev, pipe);
430
		if (crtc) {
431
			mode = intel_crtc_mode_get(dev, crtc);
432
			if (mode) {
433
				mode->type |= DRM_MODE_TYPE_PREFERRED;
434
				if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
435
					mode->flags |= DRM_MODE_FLAG_PHSYNC;
436
				if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
437
					mode->flags |= DRM_MODE_FLAG_PVSYNC;
438
			}
439
		}
440
	}
441
 
442
	return mode;
443
}
444
 
445
void intel_dvo_init(struct drm_device *dev)
446
{
447
	struct drm_i915_private *dev_priv = dev->dev_private;
448
	struct intel_encoder *intel_encoder;
449
	struct intel_dvo *intel_dvo;
450
	struct intel_connector *intel_connector;
451
	int i;
452
	int encoder_type = DRM_MODE_ENCODER_NONE;
453
 
454
	intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
455
	if (!intel_dvo)
456
		return;
457
 
458
	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
459
	if (!intel_connector) {
460
		kfree(intel_dvo);
461
		return;
462
	}
463
 
464
	intel_encoder = &intel_dvo->base;
465
	drm_encoder_init(dev, &intel_encoder->base,
466
			 &intel_dvo_enc_funcs, encoder_type);
467
 
3031 serge 468
	intel_encoder->disable = intel_disable_dvo;
469
	intel_encoder->enable = intel_enable_dvo;
470
	intel_encoder->get_hw_state = intel_dvo_get_hw_state;
4104 Serge 471
	intel_encoder->get_config = intel_dvo_get_config;
472
	intel_encoder->compute_config = intel_dvo_compute_config;
473
	intel_encoder->mode_set = intel_dvo_mode_set;
3031 serge 474
	intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
475
 
2330 Serge 476
	/* Now, try to find a controller */
477
	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
478
		struct drm_connector *connector = &intel_connector->base;
479
		const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
480
		struct i2c_adapter *i2c;
481
		int gpio;
3746 Serge 482
		bool dvoinit;
2330 Serge 483
 
484
		/* Allow the I2C driver info to specify the GPIO to be used in
485
		 * special cases, but otherwise default to what's defined
486
		 * in the spec.
487
		 */
3031 serge 488
		if (intel_gmbus_is_port_valid(dvo->gpio))
2330 Serge 489
			gpio = dvo->gpio;
490
		else if (dvo->type == INTEL_DVO_CHIP_LVDS)
491
			gpio = GMBUS_PORT_SSC;
492
		else
493
			gpio = GMBUS_PORT_DPB;
494
 
495
		/* Set up the I2C bus necessary for the chip we're probing.
496
		 * It appears that everything is on GPIOE except for panels
497
		 * on i830 laptops, which are on GPIOB (DVOA).
498
		 */
3031 serge 499
		i2c = intel_gmbus_get_adapter(dev_priv, gpio);
2330 Serge 500
 
501
		intel_dvo->dev = *dvo;
3746 Serge 502
 
503
		/* GMBUS NAK handling seems to be unstable, hence let the
504
		 * transmitter detection run in bit banging mode for now.
505
		 */
506
		intel_gmbus_force_bit(i2c, true);
507
 
508
		dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
509
 
510
		intel_gmbus_force_bit(i2c, false);
511
 
512
		if (!dvoinit)
2330 Serge 513
			continue;
514
 
515
		intel_encoder->type = INTEL_OUTPUT_DVO;
516
		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
517
		switch (dvo->type) {
518
		case INTEL_DVO_CHIP_TMDS:
3031 serge 519
			intel_encoder->cloneable = true;
2330 Serge 520
			drm_connector_init(dev, connector,
521
					   &intel_dvo_connector_funcs,
522
					   DRM_MODE_CONNECTOR_DVII);
523
			encoder_type = DRM_MODE_ENCODER_TMDS;
524
			break;
525
		case INTEL_DVO_CHIP_LVDS:
3031 serge 526
			intel_encoder->cloneable = false;
2330 Serge 527
			drm_connector_init(dev, connector,
528
					   &intel_dvo_connector_funcs,
529
					   DRM_MODE_CONNECTOR_LVDS);
530
			encoder_type = DRM_MODE_ENCODER_LVDS;
531
			break;
532
		}
533
 
534
		drm_connector_helper_add(connector,
535
					 &intel_dvo_connector_helper_funcs);
536
		connector->display_info.subpixel_order = SubPixelHorizontalRGB;
537
		connector->interlace_allowed = false;
538
		connector->doublescan_allowed = false;
539
 
540
		intel_connector_attach_encoder(intel_connector, intel_encoder);
541
		if (dvo->type == INTEL_DVO_CHIP_LVDS) {
542
			/* For our LVDS chipsets, we should hopefully be able
543
			 * to dig the fixed panel mode out of the BIOS data.
544
			 * However, it's in a different format from the BIOS
545
			 * data on chipsets with integrated LVDS (stored in AIM
546
			 * headers, likely), so for now, just get the current
547
			 * mode being output through DVO.
548
			 */
549
			intel_dvo->panel_fixed_mode =
550
				intel_dvo_get_current_mode(connector);
551
			intel_dvo->panel_wants_dither = true;
552
		}
553
 
554
		drm_sysfs_connector_add(connector);
555
		return;
556
	}
557
 
558
	drm_encoder_cleanup(&intel_encoder->base);
559
	kfree(intel_dvo);
560
	kfree(intel_connector);
561
}