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4560 | Serge | 1 | /* |
2 | * Copyright © 2013 Intel Corporation |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
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21 | * DEALINGS IN THE SOFTWARE. |
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22 | */ |
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23 | |||
24 | #ifndef _INTEL_DSI_H |
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25 | #define _INTEL_DSI_H |
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26 | |||
27 | #include |
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28 | #include |
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6084 | serge | 29 | #include |
4560 | Serge | 30 | #include "intel_drv.h" |
31 | |||
6084 | serge | 32 | /* Dual Link support */ |
33 | #define DSI_DUAL_LINK_NONE 0 |
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34 | #define DSI_DUAL_LINK_FRONT_BACK 1 |
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35 | #define DSI_DUAL_LINK_PIXEL_ALT 2 |
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4560 | Serge | 36 | |
6084 | serge | 37 | struct intel_dsi_host; |
4560 | Serge | 38 | |
39 | struct intel_dsi { |
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40 | struct intel_encoder base; |
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41 | |||
6084 | serge | 42 | struct drm_panel *panel; |
43 | struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS]; |
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4560 | Serge | 44 | |
6084 | serge | 45 | /* GPIO Desc for CRC based Panel control */ |
46 | struct gpio_desc *gpio_panel; |
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47 | |||
4560 | Serge | 48 | struct intel_connector *attached_connector; |
49 | |||
6084 | serge | 50 | /* bit mask of ports being driven */ |
51 | u16 ports; |
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52 | |||
4560 | Serge | 53 | /* if true, use HS mode, otherwise LP */ |
54 | bool hs; |
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55 | |||
56 | /* virtual channel */ |
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57 | int channel; |
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58 | |||
5060 | serge | 59 | /* Video mode or command mode */ |
60 | u16 operation_mode; |
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61 | |||
4560 | Serge | 62 | /* number of DSI lanes */ |
63 | unsigned int lane_count; |
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64 | |||
65 | /* video mode pixel format for MIPI_DSI_FUNC_PRG register */ |
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66 | u32 pixel_format; |
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67 | |||
68 | /* video mode format for MIPI_VIDEO_MODE_FORMAT register */ |
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69 | u32 video_mode_format; |
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70 | |||
71 | /* eot for MIPI_EOT_DISABLE register */ |
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5060 | serge | 72 | u8 eotp_pkt; |
73 | u8 clock_stop; |
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4560 | Serge | 74 | |
5060 | serge | 75 | u8 escape_clk_div; |
6084 | serge | 76 | u8 dual_link; |
77 | u8 pixel_overlap; |
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4560 | Serge | 78 | u32 port_bits; |
79 | u32 bw_timer; |
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80 | u32 dphy_reg; |
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81 | u32 video_frmt_cfg_bits; |
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82 | u16 lp_byte_clk; |
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83 | |||
84 | /* timeouts in byte clocks */ |
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85 | u16 lp_rx_timeout; |
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86 | u16 turn_arnd_val; |
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87 | u16 rst_timer_val; |
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88 | u16 hs_to_lp_count; |
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89 | u16 clk_lp_to_hs_count; |
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90 | u16 clk_hs_to_lp_count; |
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5060 | serge | 91 | |
92 | u16 init_count; |
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5354 | serge | 93 | u32 pclk; |
94 | u16 burst_mode_ratio; |
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5060 | serge | 95 | |
96 | /* all delays in ms */ |
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97 | u16 backlight_off_delay; |
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98 | u16 backlight_on_delay; |
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99 | u16 panel_on_delay; |
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100 | u16 panel_off_delay; |
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101 | u16 panel_pwr_cycle_delay; |
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4560 | Serge | 102 | }; |
103 | |||
6084 | serge | 104 | struct intel_dsi_host { |
105 | struct mipi_dsi_host base; |
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106 | struct intel_dsi *intel_dsi; |
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107 | enum port port; |
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108 | |||
109 | /* our little hack */ |
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110 | struct mipi_dsi_device *device; |
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111 | }; |
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112 | |||
113 | static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h) |
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114 | { |
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115 | return container_of(h, struct intel_dsi_host, base); |
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116 | } |
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117 | |||
118 | #define for_each_dsi_port(__port, __ports_mask) \ |
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119 | for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++) \ |
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120 | if ((__ports_mask) & (1 << (__port))) |
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121 | |||
4560 | Serge | 122 | static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder) |
123 | { |
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124 | return container_of(encoder, struct intel_dsi, base.base); |
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125 | } |
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126 | |||
6084 | serge | 127 | extern void intel_enable_dsi_pll(struct intel_encoder *encoder); |
128 | extern void intel_disable_dsi_pll(struct intel_encoder *encoder); |
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5060 | serge | 129 | extern u32 vlv_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp); |
6084 | serge | 130 | extern u32 bxt_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp); |
131 | extern void intel_dsi_reset_clocks(struct intel_encoder *encoder, |
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132 | enum port port); |
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4560 | Serge | 133 | |
6084 | serge | 134 | struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id); |
5060 | serge | 135 | |
4560 | Serge | 136 | #endif /* _INTEL_DSI_H */><>> |