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Rev | Author | Line No. | Line |
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5060 | serge | 1 | /* |
2 | * Copyright © 2008 Intel Corporation |
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3 | * 2014 Red Hat Inc. |
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4 | * |
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5 | * Permission is hereby granted, free of charge, to any person obtaining a |
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6 | * copy of this software and associated documentation files (the "Software"), |
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7 | * to deal in the Software without restriction, including without limitation |
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8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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9 | * and/or sell copies of the Software, and to permit persons to whom the |
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10 | * Software is furnished to do so, subject to the following conditions: |
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11 | * |
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12 | * The above copyright notice and this permission notice (including the next |
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13 | * paragraph) shall be included in all copies or substantial portions of the |
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14 | * Software. |
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15 | * |
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16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
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22 | * IN THE SOFTWARE. |
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23 | * |
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24 | */ |
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25 | |||
26 | #include |
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27 | #include "i915_drv.h" |
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28 | #include "intel_drv.h" |
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6084 | serge | 29 | #include |
5060 | serge | 30 | #include |
31 | #include |
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32 | |||
33 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, |
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6084 | serge | 34 | struct intel_crtc_state *pipe_config) |
5060 | serge | 35 | { |
6084 | serge | 36 | struct drm_device *dev = encoder->base.dev; |
5060 | serge | 37 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
38 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
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39 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
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6084 | serge | 40 | struct drm_atomic_state *state; |
41 | int bpp, i; |
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5060 | serge | 42 | int lane_count, slots; |
6084 | serge | 43 | const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
44 | struct drm_connector *drm_connector; |
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45 | struct intel_connector *connector, *found = NULL; |
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46 | struct drm_connector_state *connector_state; |
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5060 | serge | 47 | int mst_pbn; |
48 | |||
49 | pipe_config->dp_encoder_is_mst = true; |
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50 | pipe_config->has_pch_encoder = false; |
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51 | pipe_config->has_dp_encoder = true; |
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52 | bpp = 24; |
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53 | /* |
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54 | * for MST we always configure max link bw - the spec doesn't |
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55 | * seem to suggest we should do otherwise. |
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56 | */ |
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57 | lane_count = drm_dp_max_lane_count(intel_dp->dpcd); |
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58 | |||
6084 | serge | 59 | |
60 | pipe_config->lane_count = lane_count; |
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61 | |||
5060 | serge | 62 | pipe_config->pipe_bpp = 24; |
6084 | serge | 63 | pipe_config->port_clock = intel_dp_max_link_rate(intel_dp); |
5060 | serge | 64 | |
6084 | serge | 65 | state = pipe_config->base.state; |
66 | |||
67 | for_each_connector_in_state(state, drm_connector, connector_state, i) { |
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68 | connector = to_intel_connector(drm_connector); |
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69 | |||
70 | if (connector_state->best_encoder == &encoder->base) { |
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71 | found = connector; |
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5060 | serge | 72 | break; |
73 | } |
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74 | } |
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75 | |||
76 | if (!found) { |
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77 | DRM_ERROR("can't find connector\n"); |
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78 | return false; |
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79 | } |
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80 | |||
6084 | serge | 81 | mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp); |
5060 | serge | 82 | |
83 | pipe_config->pbn = mst_pbn; |
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84 | slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); |
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85 | |||
86 | intel_link_compute_m_n(bpp, lane_count, |
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87 | adjusted_mode->crtc_clock, |
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88 | pipe_config->port_clock, |
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89 | &pipe_config->dp_m_n); |
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90 | |||
91 | pipe_config->dp_m_n.tu = slots; |
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6084 | serge | 92 | |
93 | if (IS_HASWELL(dev) || IS_BROADWELL(dev)) |
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94 | hsw_dp_set_ddi_pll_sel(pipe_config); |
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95 | |||
5060 | serge | 96 | return true; |
97 | |||
98 | } |
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99 | |||
100 | static void intel_mst_disable_dp(struct intel_encoder *encoder) |
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101 | { |
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102 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
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103 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
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104 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
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105 | int ret; |
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106 | |||
107 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
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108 | |||
109 | drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port); |
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110 | |||
111 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); |
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112 | if (ret) { |
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113 | DRM_ERROR("failed to update payload %d\n", ret); |
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114 | } |
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115 | } |
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116 | |||
117 | static void intel_mst_post_disable_dp(struct intel_encoder *encoder) |
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118 | { |
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119 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
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120 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
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121 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
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122 | |||
123 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
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124 | |||
125 | /* this can fail */ |
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126 | drm_dp_check_act_status(&intel_dp->mst_mgr); |
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127 | /* and this can also fail */ |
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128 | drm_dp_update_payload_part2(&intel_dp->mst_mgr); |
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129 | |||
130 | drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port); |
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131 | |||
132 | intel_dp->active_mst_links--; |
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133 | intel_mst->port = NULL; |
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134 | if (intel_dp->active_mst_links == 0) { |
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135 | intel_dig_port->base.post_disable(&intel_dig_port->base); |
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136 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); |
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137 | } |
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138 | } |
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139 | |||
140 | static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) |
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141 | { |
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142 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
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143 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
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144 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
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145 | struct drm_device *dev = encoder->base.dev; |
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146 | struct drm_i915_private *dev_priv = dev->dev_private; |
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147 | enum port port = intel_dig_port->port; |
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148 | int ret; |
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149 | uint32_t temp; |
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6084 | serge | 150 | struct intel_connector *found = NULL, *connector; |
5060 | serge | 151 | int slots; |
152 | struct drm_crtc *crtc = encoder->base.crtc; |
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153 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
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154 | |||
6084 | serge | 155 | for_each_intel_connector(dev, connector) { |
156 | if (connector->base.state->best_encoder == &encoder->base) { |
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157 | found = connector; |
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5060 | serge | 158 | break; |
159 | } |
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160 | } |
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161 | |||
162 | if (!found) { |
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163 | DRM_ERROR("can't find connector\n"); |
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164 | return; |
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165 | } |
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166 | |||
6084 | serge | 167 | /* MST encoders are bound to a crtc, not to a connector, |
168 | * force the mapping here for get_hw_state. |
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169 | */ |
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170 | found->encoder = encoder; |
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171 | |||
5060 | serge | 172 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
173 | intel_mst->port = found->port; |
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174 | |||
175 | if (intel_dp->active_mst_links == 0) { |
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176 | enum port port = intel_ddi_get_encoder_port(encoder); |
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177 | |||
6084 | serge | 178 | intel_dp_set_link_params(intel_dp, intel_crtc->config); |
5060 | serge | 179 | |
6084 | serge | 180 | /* FIXME: add support for SKL */ |
181 | if (INTEL_INFO(dev)->gen < 9) |
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182 | I915_WRITE(PORT_CLK_SEL(port), |
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183 | intel_crtc->config->ddi_pll_sel); |
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184 | |||
5060 | serge | 185 | intel_ddi_init_dp_buf_reg(&intel_dig_port->base); |
186 | |||
187 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); |
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188 | |||
189 | |||
190 | intel_dp_start_link_train(intel_dp); |
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191 | intel_dp_stop_link_train(intel_dp); |
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192 | } |
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193 | |||
194 | ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, |
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6084 | serge | 195 | intel_mst->port, |
196 | intel_crtc->config->pbn, &slots); |
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5060 | serge | 197 | if (ret == false) { |
198 | DRM_ERROR("failed to allocate vcpi\n"); |
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199 | return; |
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200 | } |
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201 | |||
202 | |||
203 | intel_dp->active_mst_links++; |
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204 | temp = I915_READ(DP_TP_STATUS(port)); |
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205 | I915_WRITE(DP_TP_STATUS(port), temp); |
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206 | |||
207 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); |
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208 | } |
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209 | |||
210 | static void intel_mst_enable_dp(struct intel_encoder *encoder) |
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211 | { |
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212 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
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213 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
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214 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
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215 | struct drm_device *dev = intel_dig_port->base.base.dev; |
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216 | struct drm_i915_private *dev_priv = dev->dev_private; |
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217 | enum port port = intel_dig_port->port; |
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218 | int ret; |
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219 | |||
220 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
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221 | |||
222 | if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT), |
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223 | 1)) |
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224 | DRM_ERROR("Timed out waiting for ACT sent\n"); |
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225 | |||
226 | ret = drm_dp_check_act_status(&intel_dp->mst_mgr); |
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227 | |||
228 | ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); |
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229 | } |
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230 | |||
231 | static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, |
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232 | enum pipe *pipe) |
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233 | { |
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234 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
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235 | *pipe = intel_mst->pipe; |
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236 | if (intel_mst->port) |
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237 | return true; |
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238 | return false; |
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239 | } |
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240 | |||
241 | static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, |
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6084 | serge | 242 | struct intel_crtc_state *pipe_config) |
5060 | serge | 243 | { |
244 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
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245 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
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246 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
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247 | struct drm_device *dev = encoder->base.dev; |
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248 | struct drm_i915_private *dev_priv = dev->dev_private; |
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6084 | serge | 249 | enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; |
5060 | serge | 250 | u32 temp, flags = 0; |
251 | |||
252 | pipe_config->has_dp_encoder = true; |
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253 | |||
254 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); |
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255 | if (temp & TRANS_DDI_PHSYNC) |
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256 | flags |= DRM_MODE_FLAG_PHSYNC; |
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257 | else |
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258 | flags |= DRM_MODE_FLAG_NHSYNC; |
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259 | if (temp & TRANS_DDI_PVSYNC) |
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260 | flags |= DRM_MODE_FLAG_PVSYNC; |
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261 | else |
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262 | flags |= DRM_MODE_FLAG_NVSYNC; |
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263 | |||
264 | switch (temp & TRANS_DDI_BPC_MASK) { |
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265 | case TRANS_DDI_BPC_6: |
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266 | pipe_config->pipe_bpp = 18; |
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267 | break; |
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268 | case TRANS_DDI_BPC_8: |
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269 | pipe_config->pipe_bpp = 24; |
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270 | break; |
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271 | case TRANS_DDI_BPC_10: |
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272 | pipe_config->pipe_bpp = 30; |
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273 | break; |
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274 | case TRANS_DDI_BPC_12: |
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275 | pipe_config->pipe_bpp = 36; |
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276 | break; |
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277 | default: |
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278 | break; |
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279 | } |
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6084 | serge | 280 | pipe_config->base.adjusted_mode.flags |= flags; |
281 | |||
282 | pipe_config->lane_count = |
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283 | ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1; |
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284 | |||
5060 | serge | 285 | intel_dp_get_m_n(crtc, pipe_config); |
286 | |||
287 | intel_ddi_clock_get(&intel_dig_port->base, pipe_config); |
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288 | } |
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289 | |||
290 | static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) |
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291 | { |
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292 | struct intel_connector *intel_connector = to_intel_connector(connector); |
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293 | struct intel_dp *intel_dp = intel_connector->mst_port; |
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294 | struct edid *edid; |
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295 | int ret; |
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296 | |||
297 | edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); |
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298 | if (!edid) |
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299 | return 0; |
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300 | |||
301 | ret = intel_connector_update_modes(connector, edid); |
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302 | kfree(edid); |
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303 | |||
304 | return ret; |
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305 | } |
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306 | |||
307 | static enum drm_connector_status |
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5354 | serge | 308 | intel_dp_mst_detect(struct drm_connector *connector, bool force) |
5060 | serge | 309 | { |
310 | struct intel_connector *intel_connector = to_intel_connector(connector); |
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311 | struct intel_dp *intel_dp = intel_connector->mst_port; |
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312 | |||
5354 | serge | 313 | return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); |
5060 | serge | 314 | } |
315 | |||
316 | static int |
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317 | intel_dp_mst_set_property(struct drm_connector *connector, |
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318 | struct drm_property *property, |
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319 | uint64_t val) |
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320 | { |
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321 | return 0; |
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322 | } |
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323 | |||
324 | static void |
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325 | intel_dp_mst_connector_destroy(struct drm_connector *connector) |
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326 | { |
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327 | struct intel_connector *intel_connector = to_intel_connector(connector); |
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328 | |||
329 | if (!IS_ERR_OR_NULL(intel_connector->edid)) |
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330 | kfree(intel_connector->edid); |
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331 | |||
332 | drm_connector_cleanup(connector); |
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333 | kfree(connector); |
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334 | } |
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335 | |||
336 | static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { |
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6084 | serge | 337 | .dpms = drm_atomic_helper_connector_dpms, |
5060 | serge | 338 | .detect = intel_dp_mst_detect, |
339 | .fill_modes = drm_helper_probe_single_connector_modes, |
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340 | .set_property = intel_dp_mst_set_property, |
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6084 | serge | 341 | .atomic_get_property = intel_connector_atomic_get_property, |
5060 | serge | 342 | .destroy = intel_dp_mst_connector_destroy, |
6084 | serge | 343 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
344 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
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5060 | serge | 345 | }; |
346 | |||
347 | static int intel_dp_mst_get_modes(struct drm_connector *connector) |
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348 | { |
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349 | return intel_dp_mst_get_ddc_modes(connector); |
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350 | } |
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351 | |||
352 | static enum drm_mode_status |
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353 | intel_dp_mst_mode_valid(struct drm_connector *connector, |
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354 | struct drm_display_mode *mode) |
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355 | { |
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356 | /* TODO - validate mode against available PBN for link */ |
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357 | if (mode->clock < 10000) |
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358 | return MODE_CLOCK_LOW; |
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359 | |||
360 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) |
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361 | return MODE_H_ILLEGAL; |
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362 | |||
363 | return MODE_OK; |
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364 | } |
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365 | |||
6084 | serge | 366 | static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector, |
367 | struct drm_connector_state *state) |
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368 | { |
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369 | struct intel_connector *intel_connector = to_intel_connector(connector); |
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370 | struct intel_dp *intel_dp = intel_connector->mst_port; |
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371 | struct intel_crtc *crtc = to_intel_crtc(state->crtc); |
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372 | |||
373 | return &intel_dp->mst_encoders[crtc->pipe]->base.base; |
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374 | } |
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375 | |||
5060 | serge | 376 | static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) |
377 | { |
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378 | struct intel_connector *intel_connector = to_intel_connector(connector); |
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379 | struct intel_dp *intel_dp = intel_connector->mst_port; |
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380 | return &intel_dp->mst_encoders[0]->base.base; |
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381 | } |
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382 | |||
383 | static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { |
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384 | .get_modes = intel_dp_mst_get_modes, |
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385 | .mode_valid = intel_dp_mst_mode_valid, |
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6084 | serge | 386 | .atomic_best_encoder = intel_mst_atomic_best_encoder, |
5060 | serge | 387 | .best_encoder = intel_mst_best_encoder, |
388 | }; |
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389 | |||
390 | static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) |
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391 | { |
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392 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); |
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393 | |||
394 | drm_encoder_cleanup(encoder); |
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395 | kfree(intel_mst); |
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396 | } |
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397 | |||
398 | static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { |
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399 | .destroy = intel_dp_mst_encoder_destroy, |
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400 | }; |
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401 | |||
402 | static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) |
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403 | { |
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6084 | serge | 404 | if (connector->encoder && connector->base.state->crtc) { |
5060 | serge | 405 | enum pipe pipe; |
406 | if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) |
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407 | return false; |
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408 | return true; |
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409 | } |
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410 | return false; |
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411 | } |
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412 | |||
413 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) |
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414 | { |
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6084 | serge | 415 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
5060 | serge | 416 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
417 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); |
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418 | #endif |
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419 | } |
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420 | |||
421 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) |
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422 | { |
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6084 | serge | 423 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
5060 | serge | 424 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
425 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); |
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426 | #endif |
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427 | } |
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428 | |||
5354 | serge | 429 | static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) |
5060 | serge | 430 | { |
431 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); |
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432 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
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433 | struct drm_device *dev = intel_dig_port->base.base.dev; |
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434 | struct intel_connector *intel_connector; |
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435 | struct drm_connector *connector; |
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436 | int i; |
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437 | |||
6084 | serge | 438 | intel_connector = intel_connector_alloc(); |
5060 | serge | 439 | if (!intel_connector) |
440 | return NULL; |
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441 | |||
442 | connector = &intel_connector->base; |
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443 | drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); |
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444 | drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); |
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445 | |||
446 | intel_connector->unregister = intel_connector_unregister; |
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447 | intel_connector->get_hw_state = intel_dp_mst_get_hw_state; |
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448 | intel_connector->mst_port = intel_dp; |
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449 | intel_connector->port = port; |
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450 | |||
451 | for (i = PIPE_A; i <= PIPE_C; i++) { |
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452 | drm_mode_connector_attach_encoder(&intel_connector->base, |
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453 | &intel_dp->mst_encoders[i]->base.base); |
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454 | } |
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455 | intel_dp_add_properties(intel_dp, connector); |
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456 | |||
457 | drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); |
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5354 | serge | 458 | drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); |
459 | |||
5060 | serge | 460 | drm_mode_connector_set_path_property(connector, pathprop); |
6084 | serge | 461 | return connector; |
462 | } |
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463 | |||
464 | static void intel_dp_register_mst_connector(struct drm_connector *connector) |
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465 | { |
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466 | struct intel_connector *intel_connector = to_intel_connector(connector); |
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467 | struct drm_device *dev = connector->dev; |
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468 | drm_modeset_lock_all(dev); |
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5060 | serge | 469 | intel_connector_add_to_fbdev(intel_connector); |
6084 | serge | 470 | drm_modeset_unlock_all(dev); |
5060 | serge | 471 | drm_connector_register(&intel_connector->base); |
472 | } |
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473 | |||
474 | static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, |
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475 | struct drm_connector *connector) |
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476 | { |
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477 | struct intel_connector *intel_connector = to_intel_connector(connector); |
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478 | struct drm_device *dev = connector->dev; |
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6084 | serge | 479 | |
6660 | serge | 480 | intel_connector->unregister(intel_connector); |
481 | |||
5060 | serge | 482 | /* need to nuke the connector */ |
6084 | serge | 483 | drm_modeset_lock_all(dev); |
484 | if (connector->state->crtc) { |
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485 | struct drm_mode_set set; |
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486 | int ret; |
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5060 | serge | 487 | |
6084 | serge | 488 | memset(&set, 0, sizeof(set)); |
489 | set.crtc = connector->state->crtc, |
||
490 | |||
491 | ret = drm_atomic_helper_set_config(&set); |
||
492 | |||
493 | WARN(ret, "Disabling mst crtc failed with %i\n", ret); |
||
494 | } |
||
495 | |||
5060 | serge | 496 | intel_connector_remove_from_fbdev(intel_connector); |
497 | drm_connector_cleanup(connector); |
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6084 | serge | 498 | drm_modeset_unlock_all(dev); |
5060 | serge | 499 | |
500 | kfree(intel_connector); |
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501 | DRM_DEBUG_KMS("\n"); |
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502 | } |
||
503 | |||
504 | static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) |
||
505 | { |
||
506 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); |
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507 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
||
508 | struct drm_device *dev = intel_dig_port->base.base.dev; |
||
509 | |||
510 | drm_kms_helper_hotplug_event(dev); |
||
511 | } |
||
512 | |||
513 | static struct drm_dp_mst_topology_cbs mst_cbs = { |
||
514 | .add_connector = intel_dp_add_mst_connector, |
||
6084 | serge | 515 | .register_connector = intel_dp_register_mst_connector, |
5060 | serge | 516 | .destroy_connector = intel_dp_destroy_mst_connector, |
517 | .hotplug = intel_dp_mst_hotplug, |
||
518 | }; |
||
519 | |||
520 | static struct intel_dp_mst_encoder * |
||
521 | intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) |
||
522 | { |
||
523 | struct intel_dp_mst_encoder *intel_mst; |
||
524 | struct intel_encoder *intel_encoder; |
||
525 | struct drm_device *dev = intel_dig_port->base.base.dev; |
||
526 | |||
527 | intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); |
||
528 | |||
529 | if (!intel_mst) |
||
530 | return NULL; |
||
531 | |||
532 | intel_mst->pipe = pipe; |
||
533 | intel_encoder = &intel_mst->base; |
||
534 | intel_mst->primary = intel_dig_port; |
||
535 | |||
536 | drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, |
||
537 | DRM_MODE_ENCODER_DPMST); |
||
538 | |||
539 | intel_encoder->type = INTEL_OUTPUT_DP_MST; |
||
540 | intel_encoder->crtc_mask = 0x7; |
||
541 | intel_encoder->cloneable = 0; |
||
542 | |||
543 | intel_encoder->compute_config = intel_dp_mst_compute_config; |
||
544 | intel_encoder->disable = intel_mst_disable_dp; |
||
545 | intel_encoder->post_disable = intel_mst_post_disable_dp; |
||
546 | intel_encoder->pre_enable = intel_mst_pre_enable_dp; |
||
547 | intel_encoder->enable = intel_mst_enable_dp; |
||
548 | intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; |
||
549 | intel_encoder->get_config = intel_dp_mst_enc_get_config; |
||
550 | |||
551 | return intel_mst; |
||
552 | |||
553 | } |
||
554 | |||
555 | static bool |
||
556 | intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) |
||
557 | { |
||
558 | int i; |
||
559 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
||
560 | |||
561 | for (i = PIPE_A; i <= PIPE_C; i++) |
||
562 | intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); |
||
563 | return true; |
||
564 | } |
||
565 | |||
566 | int |
||
567 | intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) |
||
568 | { |
||
569 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
||
570 | struct drm_device *dev = intel_dig_port->base.base.dev; |
||
571 | int ret; |
||
572 | |||
573 | intel_dp->can_mst = true; |
||
574 | intel_dp->mst_mgr.cbs = &mst_cbs; |
||
575 | |||
576 | /* create encoders */ |
||
577 | intel_dp_create_fake_mst_encoders(intel_dig_port); |
||
578 | ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); |
||
579 | if (ret) { |
||
580 | intel_dp->can_mst = false; |
||
581 | return ret; |
||
582 | } |
||
583 | return 0; |
||
584 | } |
||
585 | |||
586 | void |
||
587 | intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) |
||
588 | { |
||
589 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
||
590 | |||
591 | if (!intel_dp->can_mst) |
||
592 | return; |
||
593 | |||
594 | drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); |
||
595 | /* encoders will get killed by normal cleanup */ |
||
596 | }=>=>>> |