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2330 Serge 1
/*
2
 * Copyright © 2006-2007 Intel Corporation
3
 *
4
 * Permission is hereby granted, free of charge, to any person obtaining a
5
 * copy of this software and associated documentation files (the "Software"),
6
 * to deal in the Software without restriction, including without limitation
7
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
 * and/or sell copies of the Software, and to permit persons to whom the
9
 * Software is furnished to do so, subject to the following conditions:
10
 *
11
 * The above copyright notice and this permission notice (including the next
12
 * paragraph) shall be included in all copies or substantial portions of the
13
 * Software.
14
 *
15
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21
 * DEALINGS IN THE SOFTWARE.
22
 *
23
 * Authors:
24
 *	Eric Anholt 
25
 */
26
 
27
#include 
28
#include 
3031 serge 29
#include 
30
#include 
31
#include 
32
#include 
2330 Serge 33
#include "intel_drv.h"
3031 serge 34
#include 
2330 Serge 35
#include "i915_drv.h"
36
 
37
/* Here's the desired hotplug mode */
38
#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |		\
39
			   ADPA_CRT_HOTPLUG_WARMUP_10MS |		\
40
			   ADPA_CRT_HOTPLUG_SAMPLE_4S |			\
41
			   ADPA_CRT_HOTPLUG_VOLTAGE_50 |		\
42
			   ADPA_CRT_HOTPLUG_VOLREF_325MV |		\
43
			   ADPA_CRT_HOTPLUG_ENABLE)
44
 
45
struct intel_crt {
46
	struct intel_encoder base;
47
	bool force_hotplug_required;
3031 serge 48
	u32 adpa_reg;
2330 Serge 49
};
50
 
51
static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
52
{
53
	return container_of(intel_attached_encoder(connector),
54
			    struct intel_crt, base);
55
}
56
 
3031 serge 57
static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
2330 Serge 58
{
3031 serge 59
	return container_of(encoder, struct intel_crt, base);
60
}
61
 
62
static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
63
				   enum pipe *pipe)
64
{
65
	struct drm_device *dev = encoder->base.dev;
2330 Serge 66
	struct drm_i915_private *dev_priv = dev->dev_private;
3031 serge 67
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
68
	u32 tmp;
2330 Serge 69
 
3031 serge 70
	tmp = I915_READ(crt->adpa_reg);
71
 
72
	if (!(tmp & ADPA_DAC_ENABLE))
73
		return false;
74
 
75
	if (HAS_PCH_CPT(dev))
76
		*pipe = PORT_TO_PIPE_CPT(tmp);
2330 Serge 77
	else
3031 serge 78
		*pipe = PORT_TO_PIPE(tmp);
2330 Serge 79
 
3031 serge 80
	return true;
81
}
82
 
83
static void intel_disable_crt(struct intel_encoder *encoder)
84
{
85
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
86
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
87
	u32 temp;
88
 
89
	temp = I915_READ(crt->adpa_reg);
2330 Serge 90
	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
91
	temp &= ~ADPA_DAC_ENABLE;
3031 serge 92
	I915_WRITE(crt->adpa_reg, temp);
93
}
2330 Serge 94
 
3031 serge 95
static void intel_enable_crt(struct intel_encoder *encoder)
96
{
97
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
98
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
99
	u32 temp;
100
 
101
	temp = I915_READ(crt->adpa_reg);
102
	temp |= ADPA_DAC_ENABLE;
103
	I915_WRITE(crt->adpa_reg, temp);
104
}
105
 
106
/* Note: The caller is required to filter out dpms modes not supported by the
107
 * platform. */
108
static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
109
{
110
	struct drm_device *dev = encoder->base.dev;
111
	struct drm_i915_private *dev_priv = dev->dev_private;
112
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
113
	u32 temp;
114
 
115
	temp = I915_READ(crt->adpa_reg);
116
	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
117
	temp &= ~ADPA_DAC_ENABLE;
118
 
2342 Serge 119
	switch (mode) {
2330 Serge 120
	case DRM_MODE_DPMS_ON:
121
		temp |= ADPA_DAC_ENABLE;
122
		break;
123
	case DRM_MODE_DPMS_STANDBY:
124
		temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
125
		break;
126
	case DRM_MODE_DPMS_SUSPEND:
127
		temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
128
		break;
129
	case DRM_MODE_DPMS_OFF:
130
		temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
131
		break;
132
	}
133
 
3031 serge 134
	I915_WRITE(crt->adpa_reg, temp);
2330 Serge 135
}
136
 
3031 serge 137
static void intel_crt_dpms(struct drm_connector *connector, int mode)
138
{
139
	struct drm_device *dev = connector->dev;
140
	struct intel_encoder *encoder = intel_attached_encoder(connector);
141
	struct drm_crtc *crtc;
142
	int old_dpms;
143
 
144
	/* PCH platforms and VLV only support on/off. */
3120 serge 145
	if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
3031 serge 146
		mode = DRM_MODE_DPMS_OFF;
147
 
148
	if (mode == connector->dpms)
149
		return;
150
 
151
	old_dpms = connector->dpms;
152
	connector->dpms = mode;
153
 
154
	/* Only need to change hw state when actually enabled */
155
	crtc = encoder->base.crtc;
156
	if (!crtc) {
157
		encoder->connectors_active = false;
158
		return;
159
	}
160
 
161
	/* We need the pipe to run for anything but OFF. */
162
	if (mode == DRM_MODE_DPMS_OFF)
163
		encoder->connectors_active = false;
164
	else
165
		encoder->connectors_active = true;
166
 
167
	if (mode < old_dpms) {
168
		/* From off to on, enable the pipe first. */
169
		intel_crtc_update_dpms(crtc);
170
 
171
		intel_crt_set_dpms(encoder, mode);
172
	} else {
173
		intel_crt_set_dpms(encoder, mode);
174
 
175
		intel_crtc_update_dpms(crtc);
176
	}
177
 
178
	intel_modeset_check_state(connector->dev);
179
}
180
 
2330 Serge 181
static int intel_crt_mode_valid(struct drm_connector *connector,
182
				struct drm_display_mode *mode)
183
{
184
	struct drm_device *dev = connector->dev;
185
 
186
	int max_clock = 0;
187
	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
188
		return MODE_NO_DBLESCAN;
189
 
190
	if (mode->clock < 25000)
191
		return MODE_CLOCK_LOW;
192
 
193
	if (IS_GEN2(dev))
194
		max_clock = 350000;
195
	else
196
		max_clock = 400000;
197
	if (mode->clock > max_clock)
198
		return MODE_CLOCK_HIGH;
199
 
200
	return MODE_OK;
201
}
202
 
203
static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
3031 serge 204
				 const struct drm_display_mode *mode,
2330 Serge 205
				 struct drm_display_mode *adjusted_mode)
206
{
207
	return true;
208
}
209
 
210
static void intel_crt_mode_set(struct drm_encoder *encoder,
211
			       struct drm_display_mode *mode,
212
			       struct drm_display_mode *adjusted_mode)
213
{
214
 
215
	struct drm_device *dev = encoder->dev;
216
	struct drm_crtc *crtc = encoder->crtc;
3031 serge 217
	struct intel_crt *crt =
218
		intel_encoder_to_crt(to_intel_encoder(encoder));
2330 Serge 219
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
220
	struct drm_i915_private *dev_priv = dev->dev_private;
3031 serge 221
	u32 adpa;
2330 Serge 222
 
223
	adpa = ADPA_HOTPLUG_BITS;
224
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
225
		adpa |= ADPA_HSYNC_ACTIVE_HIGH;
226
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
227
		adpa |= ADPA_VSYNC_ACTIVE_HIGH;
228
 
2342 Serge 229
	/* For CPT allow 3 pipe config, for others just use A or B */
2330 Serge 230
		if (HAS_PCH_CPT(dev))
2342 Serge 231
		adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
232
	else if (intel_crtc->pipe == 0)
2330 Serge 233
			adpa |= ADPA_PIPE_A_SELECT;
234
		else
235
			adpa |= ADPA_PIPE_B_SELECT;
236
 
237
	if (!HAS_PCH_SPLIT(dev))
238
		I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
239
 
3031 serge 240
	I915_WRITE(crt->adpa_reg, adpa);
2330 Serge 241
}
242
 
243
static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
244
{
245
	struct drm_device *dev = connector->dev;
246
	struct intel_crt *crt = intel_attached_crt(connector);
247
	struct drm_i915_private *dev_priv = dev->dev_private;
248
	u32 adpa;
249
	bool ret;
250
 
251
	/* The first time through, trigger an explicit detection cycle */
252
	if (crt->force_hotplug_required) {
253
		bool turn_off_dac = HAS_PCH_SPLIT(dev);
254
		u32 save_adpa;
255
 
256
		crt->force_hotplug_required = 0;
257
 
258
		save_adpa = adpa = I915_READ(PCH_ADPA);
259
		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
260
 
261
		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
262
		if (turn_off_dac)
263
			adpa &= ~ADPA_DAC_ENABLE;
264
 
265
		I915_WRITE(PCH_ADPA, adpa);
266
 
267
		if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
268
			     1000))
269
			DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
270
 
271
		if (turn_off_dac) {
272
			I915_WRITE(PCH_ADPA, save_adpa);
273
			POSTING_READ(PCH_ADPA);
274
		}
275
	}
276
 
277
	/* Check the status to see if both blue and green are on now */
278
	adpa = I915_READ(PCH_ADPA);
279
	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
280
		ret = true;
281
	else
282
		ret = false;
283
	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
284
 
285
	return ret;
286
}
287
 
3031 serge 288
static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
289
{
290
	struct drm_device *dev = connector->dev;
291
	struct drm_i915_private *dev_priv = dev->dev_private;
292
	u32 adpa;
293
	bool ret;
294
	u32 save_adpa;
295
 
296
	save_adpa = adpa = I915_READ(ADPA);
297
	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
298
 
299
	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
300
 
301
	I915_WRITE(ADPA, adpa);
302
 
303
	if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
304
		     1000)) {
305
		DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
306
		I915_WRITE(ADPA, save_adpa);
307
	}
308
 
309
	/* Check the status to see if both blue and green are on now */
310
	adpa = I915_READ(ADPA);
311
	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
312
		ret = true;
313
	else
314
		ret = false;
315
 
316
	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
317
 
318
	/* FIXME: debug force function and remove */
319
	ret = true;
320
 
321
	return ret;
322
}
323
 
2330 Serge 324
/**
325
 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
326
 *
327
 * Not for i915G/i915GM
328
 *
329
 * \return true if CRT is connected.
330
 * \return false if CRT is disconnected.
331
 */
332
static bool intel_crt_detect_hotplug(struct drm_connector *connector)
333
{
334
	struct drm_device *dev = connector->dev;
335
	struct drm_i915_private *dev_priv = dev->dev_private;
336
	u32 hotplug_en, orig, stat;
337
	bool ret = false;
338
	int i, tries = 0;
339
 
340
	if (HAS_PCH_SPLIT(dev))
341
		return intel_ironlake_crt_detect_hotplug(connector);
342
 
3031 serge 343
	if (IS_VALLEYVIEW(dev))
344
		return valleyview_crt_detect_hotplug(connector);
345
 
2330 Serge 346
	/*
347
	 * On 4 series desktop, CRT detect sequence need to be done twice
348
	 * to get a reliable result.
349
	 */
350
 
351
	if (IS_G4X(dev) && !IS_GM45(dev))
352
		tries = 2;
353
	else
354
		tries = 1;
355
	hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
356
	hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
357
 
358
	for (i = 0; i < tries ; i++) {
359
		/* turn on the FORCE_DETECT */
360
		I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
361
		/* wait for FORCE_DETECT to go off */
362
		if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
363
			      CRT_HOTPLUG_FORCE_DETECT) == 0,
364
			     1000))
365
			DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
366
	}
367
 
368
	stat = I915_READ(PORT_HOTPLUG_STAT);
369
	if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
370
		ret = true;
371
 
372
	/* clear the interrupt we just generated, if any */
373
	I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
374
 
375
	/* and put the bits back */
376
	I915_WRITE(PORT_HOTPLUG_EN, orig);
377
 
378
	return ret;
379
}
380
 
3031 serge 381
static struct edid *intel_crt_get_edid(struct drm_connector *connector,
382
				struct i2c_adapter *i2c)
383
{
384
	struct edid *edid;
385
 
386
	edid = drm_get_edid(connector, i2c);
387
 
388
	if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
389
		DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
390
		intel_gmbus_force_bit(i2c, true);
391
		edid = drm_get_edid(connector, i2c);
392
		intel_gmbus_force_bit(i2c, false);
393
	}
394
 
395
	return edid;
396
}
397
 
398
/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
399
static int intel_crt_ddc_get_modes(struct drm_connector *connector,
400
				struct i2c_adapter *adapter)
401
{
402
	struct edid *edid;
403
 
404
	edid = intel_crt_get_edid(connector, adapter);
405
	if (!edid)
406
		return 0;
407
 
408
	return intel_connector_update_modes(connector, edid);
409
}
410
 
2330 Serge 411
static bool intel_crt_detect_ddc(struct drm_connector *connector)
412
{
413
	struct intel_crt *crt = intel_attached_crt(connector);
414
	struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
3031 serge 415
	struct edid *edid;
416
	struct i2c_adapter *i2c;
2330 Serge 417
 
3031 serge 418
	BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
2330 Serge 419
 
3031 serge 420
	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
421
	edid = intel_crt_get_edid(connector, i2c);
2330 Serge 422
 
3031 serge 423
	if (edid) {
424
		bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
425
 
2330 Serge 426
		/*
427
		 * This may be a DVI-I connector with a shared DDC
428
		 * link between analog and digital outputs, so we
429
		 * have to check the EDID input spec of the attached device.
430
		 */
431
		if (!is_digital) {
432
			DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
433
			return true;
3031 serge 434
		}
435
 
436
		DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
2330 Serge 437
		} else {
3031 serge 438
		DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
2330 Serge 439
		}
440
 
3031 serge 441
	kfree(edid);
442
 
2330 Serge 443
	return false;
444
}
445
 
446
static enum drm_connector_status
447
intel_crt_load_detect(struct intel_crt *crt)
448
{
449
	struct drm_device *dev = crt->base.base.dev;
450
	struct drm_i915_private *dev_priv = dev->dev_private;
451
	uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
452
	uint32_t save_bclrpat;
453
	uint32_t save_vtotal;
454
	uint32_t vtotal, vactive;
455
	uint32_t vsample;
456
	uint32_t vblank, vblank_start, vblank_end;
457
	uint32_t dsl;
458
	uint32_t bclrpat_reg;
459
	uint32_t vtotal_reg;
460
	uint32_t vblank_reg;
461
	uint32_t vsync_reg;
462
	uint32_t pipeconf_reg;
463
	uint32_t pipe_dsl_reg;
464
	uint8_t	st00;
465
	enum drm_connector_status status;
466
 
467
	DRM_DEBUG_KMS("starting load-detect on CRT\n");
468
 
469
	bclrpat_reg = BCLRPAT(pipe);
470
	vtotal_reg = VTOTAL(pipe);
471
	vblank_reg = VBLANK(pipe);
472
	vsync_reg = VSYNC(pipe);
473
	pipeconf_reg = PIPECONF(pipe);
474
	pipe_dsl_reg = PIPEDSL(pipe);
475
 
476
	save_bclrpat = I915_READ(bclrpat_reg);
477
	save_vtotal = I915_READ(vtotal_reg);
478
	vblank = I915_READ(vblank_reg);
479
 
480
	vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
481
	vactive = (save_vtotal & 0x7ff) + 1;
482
 
483
	vblank_start = (vblank & 0xfff) + 1;
484
	vblank_end = ((vblank >> 16) & 0xfff) + 1;
485
 
486
	/* Set the border color to purple. */
487
	I915_WRITE(bclrpat_reg, 0x500050);
488
 
489
	if (!IS_GEN2(dev)) {
490
		uint32_t pipeconf = I915_READ(pipeconf_reg);
491
		I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
492
		POSTING_READ(pipeconf_reg);
493
		/* Wait for next Vblank to substitue
494
		 * border color for Color info */
495
		intel_wait_for_vblank(dev, pipe);
496
		st00 = I915_READ8(VGA_MSR_WRITE);
497
		status = ((st00 & (1 << 4)) != 0) ?
498
			connector_status_connected :
499
			connector_status_disconnected;
500
 
501
		I915_WRITE(pipeconf_reg, pipeconf);
502
	} else {
503
		bool restore_vblank = false;
504
		int count, detect;
505
 
506
		/*
507
		* If there isn't any border, add some.
508
		* Yes, this will flicker
509
		*/
510
		if (vblank_start <= vactive && vblank_end >= vtotal) {
511
			uint32_t vsync = I915_READ(vsync_reg);
512
			uint32_t vsync_start = (vsync & 0xffff) + 1;
513
 
514
			vblank_start = vsync_start;
515
			I915_WRITE(vblank_reg,
516
				   (vblank_start - 1) |
517
				   ((vblank_end - 1) << 16));
518
			restore_vblank = true;
519
		}
520
		/* sample in the vertical border, selecting the larger one */
521
		if (vblank_start - vactive >= vtotal - vblank_end)
522
			vsample = (vblank_start + vactive) >> 1;
523
		else
524
			vsample = (vtotal + vblank_end) >> 1;
525
 
526
		/*
527
		 * Wait for the border to be displayed
528
		 */
529
		while (I915_READ(pipe_dsl_reg) >= vactive)
530
			;
531
		while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
532
			;
533
		/*
534
		 * Watch ST00 for an entire scanline
535
		 */
536
		detect = 0;
537
		count = 0;
538
		do {
539
			count++;
540
			/* Read the ST00 VGA status register */
541
			st00 = I915_READ8(VGA_MSR_WRITE);
542
			if (st00 & (1 << 4))
543
				detect++;
544
		} while ((I915_READ(pipe_dsl_reg) == dsl));
545
 
546
		/* restore vblank if necessary */
547
		if (restore_vblank)
548
			I915_WRITE(vblank_reg, vblank);
549
		/*
550
		 * If more than 3/4 of the scanline detected a monitor,
551
		 * then it is assumed to be present. This works even on i830,
552
		 * where there isn't any way to force the border color across
553
		 * the screen
554
		 */
555
		status = detect * 4 > count * 3 ?
556
			 connector_status_connected :
557
			 connector_status_disconnected;
558
	}
559
 
560
	/* Restore previous settings */
561
	I915_WRITE(bclrpat_reg, save_bclrpat);
562
 
563
	return status;
564
}
565
 
566
static enum drm_connector_status
567
intel_crt_detect(struct drm_connector *connector, bool force)
568
{
569
	struct drm_device *dev = connector->dev;
570
	struct intel_crt *crt = intel_attached_crt(connector);
571
	enum drm_connector_status status;
3031 serge 572
	struct intel_load_detect_pipe tmp;
2330 Serge 573
 
574
	if (I915_HAS_HOTPLUG(dev)) {
3031 serge 575
		/* We can not rely on the HPD pin always being correctly wired
576
		 * up, for example many KVM do not pass it through, and so
577
		 * only trust an assertion that the monitor is connected.
578
		 */
2330 Serge 579
		if (intel_crt_detect_hotplug(connector)) {
580
			DRM_DEBUG_KMS("CRT detected via hotplug\n");
581
			return connector_status_connected;
3031 serge 582
		} else
2330 Serge 583
			DRM_DEBUG_KMS("CRT not detected via hotplug\n");
584
	}
585
 
586
	if (intel_crt_detect_ddc(connector))
587
		return connector_status_connected;
588
 
3031 serge 589
	/* Load detection is broken on HPD capable machines. Whoever wants a
590
	 * broken monitor (without edid) to work behind a broken kvm (that fails
591
	 * to have the right resistors for HP detection) needs to fix this up.
592
	 * For now just bail out. */
593
	if (I915_HAS_HOTPLUG(dev))
594
		return connector_status_disconnected;
595
 
2330 Serge 596
	if (!force)
597
		return connector->status;
598
 
599
	/* for pre-945g platforms use load detect */
3031 serge 600
	if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
2330 Serge 601
			if (intel_crt_detect_ddc(connector))
602
				status = connector_status_connected;
603
			else
604
				status = intel_crt_load_detect(crt);
3031 serge 605
		intel_release_load_detect_pipe(connector, &tmp);
2330 Serge 606
		} else
607
			status = connector_status_unknown;
608
 
609
	return status;
610
}
611
 
612
static void intel_crt_destroy(struct drm_connector *connector)
613
{
614
	drm_sysfs_connector_remove(connector);
615
	drm_connector_cleanup(connector);
616
	kfree(connector);
617
}
618
 
619
static int intel_crt_get_modes(struct drm_connector *connector)
620
{
621
	struct drm_device *dev = connector->dev;
622
	struct drm_i915_private *dev_priv = dev->dev_private;
623
	int ret;
3031 serge 624
	struct i2c_adapter *i2c;
2330 Serge 625
 
3031 serge 626
	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
627
	ret = intel_crt_ddc_get_modes(connector, i2c);
2330 Serge 628
	if (ret || !IS_G4X(dev))
629
		return ret;
630
 
631
	/* Try to probe digital port for output in DVI-I -> VGA mode. */
3031 serge 632
	i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
633
	return intel_crt_ddc_get_modes(connector, i2c);
2330 Serge 634
}
635
 
636
static int intel_crt_set_property(struct drm_connector *connector,
637
				  struct drm_property *property,
638
				  uint64_t value)
639
{
640
	return 0;
641
}
642
 
643
static void intel_crt_reset(struct drm_connector *connector)
644
{
645
	struct drm_device *dev = connector->dev;
646
	struct intel_crt *crt = intel_attached_crt(connector);
647
 
648
	if (HAS_PCH_SPLIT(dev))
649
		crt->force_hotplug_required = 1;
650
}
651
 
652
/*
653
 * Routines for controlling stuff on the analog port
654
 */
655
 
3031 serge 656
static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
2330 Serge 657
	.mode_fixup = intel_crt_mode_fixup,
658
	.mode_set = intel_crt_mode_set,
3031 serge 659
	.disable = intel_encoder_noop,
2330 Serge 660
};
661
 
662
static const struct drm_connector_funcs intel_crt_connector_funcs = {
663
	.reset = intel_crt_reset,
3031 serge 664
	.dpms = intel_crt_dpms,
2330 Serge 665
	.detect = intel_crt_detect,
666
	.fill_modes = drm_helper_probe_single_connector_modes,
667
	.destroy = intel_crt_destroy,
668
	.set_property = intel_crt_set_property,
669
};
670
 
671
static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
672
	.mode_valid = intel_crt_mode_valid,
673
	.get_modes = intel_crt_get_modes,
674
	.best_encoder = intel_best_encoder,
675
};
676
 
677
static const struct drm_encoder_funcs intel_crt_enc_funcs = {
678
	.destroy = intel_encoder_destroy,
679
};
680
 
681
void intel_crt_init(struct drm_device *dev)
682
{
683
	struct drm_connector *connector;
684
	struct intel_crt *crt;
685
	struct intel_connector *intel_connector;
686
	struct drm_i915_private *dev_priv = dev->dev_private;
687
 
688
	crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
689
	if (!crt)
690
		return;
691
 
692
	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
693
	if (!intel_connector) {
694
		kfree(crt);
695
		return;
696
	}
697
 
698
	connector = &intel_connector->base;
699
	drm_connector_init(dev, &intel_connector->base,
700
			   &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
701
 
702
	drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
703
			 DRM_MODE_ENCODER_DAC);
704
 
705
	intel_connector_attach_encoder(intel_connector, &crt->base);
706
 
707
	crt->base.type = INTEL_OUTPUT_ANALOG;
3031 serge 708
	crt->base.cloneable = true;
709
	if (IS_HASWELL(dev) || IS_I830(dev))
710
		crt->base.crtc_mask = (1 << 0);
711
	else
712
		crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
713
 
714
	if (IS_GEN2(dev))
715
		connector->interlace_allowed = 0;
716
	else
2330 Serge 717
	connector->interlace_allowed = 1;
718
	connector->doublescan_allowed = 0;
719
 
3031 serge 720
	if (HAS_PCH_SPLIT(dev))
721
		crt->adpa_reg = PCH_ADPA;
722
	else if (IS_VALLEYVIEW(dev))
723
		crt->adpa_reg = VLV_ADPA;
724
	else
725
		crt->adpa_reg = ADPA;
726
 
727
	crt->base.disable = intel_disable_crt;
728
	crt->base.enable = intel_enable_crt;
729
	crt->base.get_hw_state = intel_crt_get_hw_state;
730
	intel_connector->get_hw_state = intel_connector_get_hw_state;
731
 
732
	drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
2330 Serge 733
	drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
734
 
735
	drm_sysfs_connector_add(connector);
736
 
737
	if (I915_HAS_HOTPLUG(dev))
738
		connector->polled = DRM_CONNECTOR_POLL_HPD;
739
	else
740
		connector->polled = DRM_CONNECTOR_POLL_CONNECT;
741
 
742
	/*
743
	 * Configure the automatic hotplug detection stuff
744
	 */
745
	crt->force_hotplug_required = 0;
746
	if (HAS_PCH_SPLIT(dev)) {
747
		u32 adpa;
748
 
749
		adpa = I915_READ(PCH_ADPA);
750
		adpa &= ~ADPA_CRT_HOTPLUG_MASK;
751
		adpa |= ADPA_HOTPLUG_BITS;
752
		I915_WRITE(PCH_ADPA, adpa);
753
		POSTING_READ(PCH_ADPA);
754
 
755
		DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
756
		crt->force_hotplug_required = 1;
757
	}
758
 
759
	dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
760
}