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2351 | Serge | 1 | /* |
2 | * Copyright © 2006 Intel Corporation |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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21 | * SOFTWARE. |
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22 | * |
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23 | * Authors: |
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24 | * Eric Anholt |
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25 | * |
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26 | */ |
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27 | #include |
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28 | #include "drmP.h" |
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29 | #include "drm.h" |
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30 | #include "i915_drm.h" |
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31 | #include "i915_drv.h" |
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32 | #include "intel_bios.h" |
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33 | |||
34 | #define SLAVE_ADDR1 0x70 |
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35 | #define SLAVE_ADDR2 0x72 |
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36 | |||
37 | static int panel_type; |
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38 | |||
39 | static void * |
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40 | find_section(struct bdb_header *bdb, int section_id) |
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41 | { |
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42 | u8 *base = (u8 *)bdb; |
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43 | int index = 0; |
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44 | u16 total, current_size; |
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45 | u8 current_id; |
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46 | |||
47 | /* skip to first section */ |
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48 | index += bdb->header_size; |
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49 | total = bdb->bdb_size; |
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50 | |||
51 | /* walk the sections looking for section_id */ |
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52 | while (index < total) { |
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53 | current_id = *(base + index); |
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54 | index++; |
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55 | current_size = *((u16 *)(base + index)); |
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56 | index += 2; |
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57 | if (current_id == section_id) |
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58 | return base + index; |
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59 | index += current_size; |
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60 | } |
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61 | |||
62 | return NULL; |
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63 | } |
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64 | |||
65 | static u16 |
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66 | get_blocksize(void *p) |
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67 | { |
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68 | u16 *block_ptr, block_size; |
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69 | |||
70 | block_ptr = (u16 *)((char *)p - 2); |
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71 | block_size = *block_ptr; |
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72 | return block_size; |
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73 | } |
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74 | |||
75 | static void |
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76 | fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, |
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77 | const struct lvds_dvo_timing *dvo_timing) |
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78 | { |
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79 | panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | |
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80 | dvo_timing->hactive_lo; |
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81 | panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + |
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82 | ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); |
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83 | panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + |
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84 | dvo_timing->hsync_pulse_width; |
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85 | panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + |
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86 | ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); |
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87 | |||
88 | panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | |
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89 | dvo_timing->vactive_lo; |
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90 | panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + |
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91 | dvo_timing->vsync_off; |
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92 | panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + |
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93 | dvo_timing->vsync_pulse_width; |
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94 | panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + |
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95 | ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); |
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96 | panel_fixed_mode->clock = dvo_timing->clock * 10; |
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97 | panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; |
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98 | |||
99 | if (dvo_timing->hsync_positive) |
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100 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; |
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101 | else |
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102 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; |
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103 | |||
104 | if (dvo_timing->vsync_positive) |
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105 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; |
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106 | else |
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107 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; |
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108 | |||
109 | /* Some VBTs have bogus h/vtotal values */ |
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110 | if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) |
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111 | panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; |
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112 | if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) |
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113 | panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; |
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114 | |||
115 | drm_mode_set_name(panel_fixed_mode); |
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116 | } |
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117 | |||
118 | static bool |
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119 | lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a, |
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120 | const struct lvds_dvo_timing *b) |
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121 | { |
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122 | if (a->hactive_hi != b->hactive_hi || |
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123 | a->hactive_lo != b->hactive_lo) |
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124 | return false; |
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125 | |||
126 | if (a->hsync_off_hi != b->hsync_off_hi || |
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127 | a->hsync_off_lo != b->hsync_off_lo) |
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128 | return false; |
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129 | |||
130 | if (a->hsync_pulse_width != b->hsync_pulse_width) |
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131 | return false; |
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132 | |||
133 | if (a->hblank_hi != b->hblank_hi || |
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134 | a->hblank_lo != b->hblank_lo) |
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135 | return false; |
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136 | |||
137 | if (a->vactive_hi != b->vactive_hi || |
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138 | a->vactive_lo != b->vactive_lo) |
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139 | return false; |
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140 | |||
141 | if (a->vsync_off != b->vsync_off) |
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142 | return false; |
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143 | |||
144 | if (a->vsync_pulse_width != b->vsync_pulse_width) |
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145 | return false; |
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146 | |||
147 | if (a->vblank_hi != b->vblank_hi || |
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148 | a->vblank_lo != b->vblank_lo) |
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149 | return false; |
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150 | |||
151 | return true; |
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152 | } |
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153 | |||
154 | static const struct lvds_dvo_timing * |
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155 | get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, |
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156 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, |
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157 | int index) |
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158 | { |
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159 | /* |
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160 | * the size of fp_timing varies on the different platform. |
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161 | * So calculate the DVO timing relative offset in LVDS data |
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162 | * entry to get the DVO timing entry |
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163 | */ |
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164 | |||
165 | int lfp_data_size = |
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166 | lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - |
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167 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; |
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168 | int dvo_timing_offset = |
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169 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - |
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170 | lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; |
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171 | char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; |
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172 | |||
173 | return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); |
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174 | } |
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175 | |||
176 | /* Try to find integrated panel data */ |
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177 | static void |
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178 | parse_lfp_panel_data(struct drm_i915_private *dev_priv, |
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179 | struct bdb_header *bdb) |
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180 | { |
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181 | const struct bdb_lvds_options *lvds_options; |
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182 | const struct bdb_lvds_lfp_data *lvds_lfp_data; |
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183 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; |
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184 | const struct lvds_dvo_timing *panel_dvo_timing; |
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185 | struct drm_display_mode *panel_fixed_mode; |
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186 | int i, downclock; |
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187 | |||
188 | lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); |
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189 | if (!lvds_options) |
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190 | return; |
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191 | |||
192 | dev_priv->lvds_dither = lvds_options->pixel_dither; |
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193 | if (lvds_options->panel_type == 0xff) |
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194 | return; |
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195 | |||
196 | panel_type = lvds_options->panel_type; |
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197 | |||
198 | lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); |
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199 | if (!lvds_lfp_data) |
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200 | return; |
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201 | |||
202 | lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); |
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203 | if (!lvds_lfp_data_ptrs) |
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204 | return; |
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205 | |||
206 | dev_priv->lvds_vbt = 1; |
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207 | |||
208 | panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, |
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209 | lvds_lfp_data_ptrs, |
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210 | lvds_options->panel_type); |
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211 | |||
212 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
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213 | if (!panel_fixed_mode) |
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214 | return; |
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215 | |||
216 | fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); |
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217 | |||
218 | dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode; |
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219 | |||
220 | DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n"); |
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221 | drm_mode_debug_printmodeline(panel_fixed_mode); |
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222 | |||
223 | /* |
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224 | * Iterate over the LVDS panel timing info to find the lowest clock |
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225 | * for the native resolution. |
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226 | */ |
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227 | downclock = panel_dvo_timing->clock; |
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228 | for (i = 0; i < 16; i++) { |
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229 | const struct lvds_dvo_timing *dvo_timing; |
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230 | |||
231 | dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, |
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232 | lvds_lfp_data_ptrs, |
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233 | i); |
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234 | if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) && |
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235 | dvo_timing->clock < downclock) |
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236 | downclock = dvo_timing->clock; |
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237 | } |
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238 | |||
239 | if (downclock < panel_dvo_timing->clock && i915_lvds_downclock) { |
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240 | dev_priv->lvds_downclock_avail = 1; |
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241 | dev_priv->lvds_downclock = downclock * 10; |
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242 | DRM_DEBUG_KMS("LVDS downclock is found in VBT. " |
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243 | "Normal Clock %dKHz, downclock %dKHz\n", |
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244 | panel_fixed_mode->clock, 10*downclock); |
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245 | } |
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246 | } |
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247 | |||
248 | /* Try to find sdvo panel data */ |
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249 | static void |
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250 | parse_sdvo_panel_data(struct drm_i915_private *dev_priv, |
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251 | struct bdb_header *bdb) |
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252 | { |
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253 | struct lvds_dvo_timing *dvo_timing; |
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254 | struct drm_display_mode *panel_fixed_mode; |
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255 | int index; |
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256 | |||
257 | index = i915_vbt_sdvo_panel_type; |
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258 | if (index == -1) { |
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259 | struct bdb_sdvo_lvds_options *sdvo_lvds_options; |
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260 | |||
261 | sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); |
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262 | if (!sdvo_lvds_options) |
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263 | return; |
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264 | |||
265 | index = sdvo_lvds_options->panel_type; |
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266 | } |
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267 | |||
268 | dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS); |
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269 | if (!dvo_timing) |
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270 | return; |
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271 | |||
272 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
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273 | if (!panel_fixed_mode) |
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274 | return; |
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275 | |||
276 | fill_detail_timing_data(panel_fixed_mode, dvo_timing + index); |
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277 | |||
278 | dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode; |
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279 | |||
280 | DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); |
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281 | drm_mode_debug_printmodeline(panel_fixed_mode); |
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282 | } |
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283 | |||
284 | static int intel_bios_ssc_frequency(struct drm_device *dev, |
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285 | bool alternate) |
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286 | { |
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287 | switch (INTEL_INFO(dev)->gen) { |
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288 | case 2: |
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289 | return alternate ? 66 : 48; |
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290 | case 3: |
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291 | case 4: |
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292 | return alternate ? 100 : 96; |
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293 | default: |
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294 | return alternate ? 100 : 120; |
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295 | } |
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296 | } |
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297 | |||
298 | static void |
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299 | parse_general_features(struct drm_i915_private *dev_priv, |
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300 | struct bdb_header *bdb) |
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301 | { |
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302 | struct drm_device *dev = dev_priv->dev; |
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303 | struct bdb_general_features *general; |
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304 | |||
305 | general = find_section(bdb, BDB_GENERAL_FEATURES); |
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306 | if (general) { |
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307 | dev_priv->int_tv_support = general->int_tv_support; |
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308 | dev_priv->int_crt_support = general->int_crt_support; |
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309 | dev_priv->lvds_use_ssc = general->enable_ssc; |
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310 | dev_priv->lvds_ssc_freq = |
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311 | intel_bios_ssc_frequency(dev, general->ssc_freq); |
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312 | dev_priv->display_clock_mode = general->display_clock_mode; |
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313 | DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d\n", |
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314 | dev_priv->int_tv_support, |
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315 | dev_priv->int_crt_support, |
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316 | dev_priv->lvds_use_ssc, |
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317 | dev_priv->lvds_ssc_freq, |
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318 | dev_priv->display_clock_mode); |
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319 | } |
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320 | } |
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321 | |||
322 | static void |
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323 | parse_general_definitions(struct drm_i915_private *dev_priv, |
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324 | struct bdb_header *bdb) |
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325 | { |
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326 | struct bdb_general_definitions *general; |
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327 | |||
328 | general = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
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329 | if (general) { |
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330 | u16 block_size = get_blocksize(general); |
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331 | if (block_size >= sizeof(*general)) { |
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332 | int bus_pin = general->crt_ddc_gmbus_pin; |
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333 | DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); |
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334 | if (bus_pin >= 1 && bus_pin <= 6) |
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335 | dev_priv->crt_ddc_pin = bus_pin; |
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336 | } else { |
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337 | DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n", |
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338 | block_size); |
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339 | } |
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340 | } |
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341 | } |
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342 | |||
343 | static void |
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344 | parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, |
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345 | struct bdb_header *bdb) |
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346 | { |
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347 | struct sdvo_device_mapping *p_mapping; |
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348 | struct bdb_general_definitions *p_defs; |
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349 | struct child_device_config *p_child; |
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350 | int i, child_device_num, count; |
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351 | u16 block_size; |
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352 | |||
353 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
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354 | if (!p_defs) { |
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355 | DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n"); |
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356 | return; |
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357 | } |
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358 | /* judge whether the size of child device meets the requirements. |
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359 | * If the child device size obtained from general definition block |
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360 | * is different with sizeof(struct child_device_config), skip the |
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361 | * parsing of sdvo device info |
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362 | */ |
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363 | if (p_defs->child_dev_size != sizeof(*p_child)) { |
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364 | /* different child dev size . Ignore it */ |
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365 | DRM_DEBUG_KMS("different child size is found. Invalid.\n"); |
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366 | return; |
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367 | } |
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368 | /* get the block size of general definitions */ |
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369 | block_size = get_blocksize(p_defs); |
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370 | /* get the number of child device */ |
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371 | child_device_num = (block_size - sizeof(*p_defs)) / |
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372 | sizeof(*p_child); |
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373 | count = 0; |
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374 | for (i = 0; i < child_device_num; i++) { |
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375 | p_child = &(p_defs->devices[i]); |
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376 | if (!p_child->device_type) { |
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377 | /* skip the device block if device type is invalid */ |
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378 | continue; |
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379 | } |
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380 | if (p_child->slave_addr != SLAVE_ADDR1 && |
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381 | p_child->slave_addr != SLAVE_ADDR2) { |
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382 | /* |
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383 | * If the slave address is neither 0x70 nor 0x72, |
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384 | * it is not a SDVO device. Skip it. |
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385 | */ |
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386 | continue; |
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387 | } |
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388 | if (p_child->dvo_port != DEVICE_PORT_DVOB && |
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389 | p_child->dvo_port != DEVICE_PORT_DVOC) { |
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390 | /* skip the incorrect SDVO port */ |
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391 | DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); |
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392 | continue; |
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393 | } |
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394 | DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" |
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395 | " %s port\n", |
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396 | p_child->slave_addr, |
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397 | (p_child->dvo_port == DEVICE_PORT_DVOB) ? |
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398 | "SDVOB" : "SDVOC"); |
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399 | p_mapping = &(dev_priv->sdvo_mappings[p_child->dvo_port - 1]); |
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400 | if (!p_mapping->initialized) { |
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401 | p_mapping->dvo_port = p_child->dvo_port; |
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402 | p_mapping->slave_addr = p_child->slave_addr; |
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403 | p_mapping->dvo_wiring = p_child->dvo_wiring; |
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404 | p_mapping->ddc_pin = p_child->ddc_pin; |
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405 | p_mapping->i2c_pin = p_child->i2c_pin; |
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406 | p_mapping->initialized = 1; |
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407 | DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", |
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408 | p_mapping->dvo_port, |
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409 | p_mapping->slave_addr, |
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410 | p_mapping->dvo_wiring, |
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411 | p_mapping->ddc_pin, |
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412 | p_mapping->i2c_pin); |
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413 | } else { |
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414 | DRM_DEBUG_KMS("Maybe one SDVO port is shared by " |
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415 | "two SDVO device.\n"); |
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416 | } |
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417 | if (p_child->slave2_addr) { |
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418 | /* Maybe this is a SDVO device with multiple inputs */ |
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419 | /* And the mapping info is not added */ |
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420 | DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" |
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421 | " is a SDVO device with multiple inputs.\n"); |
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422 | } |
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423 | count++; |
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424 | } |
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425 | |||
426 | if (!count) { |
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427 | /* No SDVO device info is found */ |
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428 | DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); |
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429 | } |
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430 | return; |
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431 | } |
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432 | |||
433 | static void |
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434 | parse_driver_features(struct drm_i915_private *dev_priv, |
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435 | struct bdb_header *bdb) |
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436 | { |
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437 | struct drm_device *dev = dev_priv->dev; |
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438 | struct bdb_driver_features *driver; |
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439 | |||
440 | driver = find_section(bdb, BDB_DRIVER_FEATURES); |
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441 | if (!driver) |
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442 | return; |
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443 | |||
444 | if (SUPPORTS_EDP(dev) && |
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445 | driver->lvds_config == BDB_DRIVER_FEATURE_EDP) |
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446 | dev_priv->edp.support = 1; |
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447 | |||
448 | if (driver->dual_frequency) |
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449 | dev_priv->render_reclock_avail = true; |
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450 | } |
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451 | |||
452 | static void |
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453 | parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb) |
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454 | { |
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455 | struct bdb_edp *edp; |
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456 | struct edp_power_seq *edp_pps; |
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457 | struct edp_link_params *edp_link_params; |
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458 | |||
459 | edp = find_section(bdb, BDB_EDP); |
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460 | if (!edp) { |
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461 | if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp.support) { |
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462 | DRM_DEBUG_KMS("No eDP BDB found but eDP panel " |
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463 | "supported, assume %dbpp panel color " |
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464 | "depth.\n", |
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465 | dev_priv->edp.bpp); |
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466 | } |
||
467 | return; |
||
468 | } |
||
469 | |||
470 | switch ((edp->color_depth >> (panel_type * 2)) & 3) { |
||
471 | case EDP_18BPP: |
||
472 | dev_priv->edp.bpp = 18; |
||
473 | break; |
||
474 | case EDP_24BPP: |
||
475 | dev_priv->edp.bpp = 24; |
||
476 | break; |
||
477 | case EDP_30BPP: |
||
478 | dev_priv->edp.bpp = 30; |
||
479 | break; |
||
480 | } |
||
481 | |||
482 | /* Get the eDP sequencing and link info */ |
||
483 | edp_pps = &edp->power_seqs[panel_type]; |
||
484 | edp_link_params = &edp->link_params[panel_type]; |
||
485 | |||
486 | dev_priv->edp.pps = *edp_pps; |
||
487 | |||
488 | dev_priv->edp.rate = edp_link_params->rate ? DP_LINK_BW_2_7 : |
||
489 | DP_LINK_BW_1_62; |
||
490 | switch (edp_link_params->lanes) { |
||
491 | case 0: |
||
492 | dev_priv->edp.lanes = 1; |
||
493 | break; |
||
494 | case 1: |
||
495 | dev_priv->edp.lanes = 2; |
||
496 | break; |
||
497 | case 3: |
||
498 | default: |
||
499 | dev_priv->edp.lanes = 4; |
||
500 | break; |
||
501 | } |
||
502 | switch (edp_link_params->preemphasis) { |
||
503 | case 0: |
||
504 | dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_0; |
||
505 | break; |
||
506 | case 1: |
||
507 | dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5; |
||
508 | break; |
||
509 | case 2: |
||
510 | dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_6; |
||
511 | break; |
||
512 | case 3: |
||
513 | dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5; |
||
514 | break; |
||
515 | } |
||
516 | switch (edp_link_params->vswing) { |
||
517 | case 0: |
||
518 | dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_400; |
||
519 | break; |
||
520 | case 1: |
||
521 | dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_600; |
||
522 | break; |
||
523 | case 2: |
||
524 | dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_800; |
||
525 | break; |
||
526 | case 3: |
||
527 | dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_1200; |
||
528 | break; |
||
529 | } |
||
530 | } |
||
531 | |||
532 | static void |
||
533 | parse_device_mapping(struct drm_i915_private *dev_priv, |
||
534 | struct bdb_header *bdb) |
||
535 | { |
||
536 | struct bdb_general_definitions *p_defs; |
||
537 | struct child_device_config *p_child, *child_dev_ptr; |
||
538 | int i, child_device_num, count; |
||
539 | u16 block_size; |
||
540 | |||
541 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
||
542 | if (!p_defs) { |
||
543 | DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); |
||
544 | return; |
||
545 | } |
||
546 | /* judge whether the size of child device meets the requirements. |
||
547 | * If the child device size obtained from general definition block |
||
548 | * is different with sizeof(struct child_device_config), skip the |
||
549 | * parsing of sdvo device info |
||
550 | */ |
||
551 | if (p_defs->child_dev_size != sizeof(*p_child)) { |
||
552 | /* different child dev size . Ignore it */ |
||
553 | DRM_DEBUG_KMS("different child size is found. Invalid.\n"); |
||
554 | return; |
||
555 | } |
||
556 | /* get the block size of general definitions */ |
||
557 | block_size = get_blocksize(p_defs); |
||
558 | /* get the number of child device */ |
||
559 | child_device_num = (block_size - sizeof(*p_defs)) / |
||
560 | sizeof(*p_child); |
||
561 | count = 0; |
||
562 | /* get the number of child device that is present */ |
||
563 | for (i = 0; i < child_device_num; i++) { |
||
564 | p_child = &(p_defs->devices[i]); |
||
565 | if (!p_child->device_type) { |
||
566 | /* skip the device block if device type is invalid */ |
||
567 | continue; |
||
568 | } |
||
569 | count++; |
||
570 | } |
||
571 | if (!count) { |
||
572 | DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); |
||
573 | return; |
||
574 | } |
||
575 | dev_priv->child_dev = kzalloc(sizeof(*p_child) * count, GFP_KERNEL); |
||
576 | if (!dev_priv->child_dev) { |
||
577 | DRM_DEBUG_KMS("No memory space for child device\n"); |
||
578 | return; |
||
579 | } |
||
580 | |||
581 | dev_priv->child_dev_num = count; |
||
582 | count = 0; |
||
583 | for (i = 0; i < child_device_num; i++) { |
||
584 | p_child = &(p_defs->devices[i]); |
||
585 | if (!p_child->device_type) { |
||
586 | /* skip the device block if device type is invalid */ |
||
587 | continue; |
||
588 | } |
||
589 | child_dev_ptr = dev_priv->child_dev + count; |
||
590 | count++; |
||
591 | memcpy((void *)child_dev_ptr, (void *)p_child, |
||
592 | sizeof(*p_child)); |
||
593 | } |
||
594 | return; |
||
595 | } |
||
596 | |||
597 | static void |
||
598 | init_vbt_defaults(struct drm_i915_private *dev_priv) |
||
599 | { |
||
600 | struct drm_device *dev = dev_priv->dev; |
||
601 | |||
602 | dev_priv->crt_ddc_pin = GMBUS_PORT_VGADDC; |
||
603 | |||
604 | /* LFP panel data */ |
||
605 | dev_priv->lvds_dither = 1; |
||
606 | dev_priv->lvds_vbt = 0; |
||
607 | |||
608 | /* SDVO panel data */ |
||
609 | dev_priv->sdvo_lvds_vbt_mode = NULL; |
||
610 | |||
611 | /* general features */ |
||
612 | dev_priv->int_tv_support = 1; |
||
613 | dev_priv->int_crt_support = 1; |
||
614 | |||
615 | /* Default to using SSC */ |
||
616 | dev_priv->lvds_use_ssc = 1; |
||
617 | dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1); |
||
618 | DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->lvds_ssc_freq); |
||
619 | |||
620 | /* eDP data */ |
||
621 | dev_priv->edp.bpp = 18; |
||
622 | } |
||
623 | |||
624 | /** |
||
625 | * intel_parse_bios - find VBT and initialize settings from the BIOS |
||
626 | * @dev: DRM device |
||
627 | * |
||
628 | * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers |
||
629 | * to appropriate values. |
||
630 | * |
||
631 | * Returns 0 on success, nonzero on failure. |
||
632 | */ |
||
633 | bool |
||
634 | intel_parse_bios(struct drm_device *dev) |
||
635 | { |
||
636 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
637 | struct pci_dev *pdev = dev->pdev; |
||
638 | struct bdb_header *bdb = NULL; |
||
639 | u8 __iomem *bios = NULL; |
||
640 | |||
641 | init_vbt_defaults(dev_priv); |
||
642 | |||
643 | /* XXX Should this validation be moved to intel_opregion.c? */ |
||
644 | if (dev_priv->opregion.vbt) { |
||
645 | struct vbt_header *vbt = dev_priv->opregion.vbt; |
||
646 | if (memcmp(vbt->signature, "$VBT", 4) == 0) { |
||
647 | DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n", |
||
648 | vbt->signature); |
||
649 | bdb = (struct bdb_header *)((char *)vbt + vbt->bdb_offset); |
||
650 | } else |
||
651 | dev_priv->opregion.vbt = NULL; |
||
652 | } |
||
653 | |||
654 | if (bdb == NULL) { |
||
655 | struct vbt_header *vbt = NULL; |
||
656 | size_t size; |
||
657 | int i; |
||
658 | |||
2352 | Serge | 659 | bios = (void*)pci_map_rom(pdev, &size); |
2351 | Serge | 660 | if (!bios) |
661 | return -1; |
||
662 | |||
663 | /* Scour memory looking for the VBT signature */ |
||
664 | for (i = 0; i + 4 < size; i++) { |
||
665 | if (!memcmp(bios + i, "$VBT", 4)) { |
||
666 | vbt = (struct vbt_header *)(bios + i); |
||
667 | break; |
||
668 | } |
||
669 | } |
||
670 | |||
671 | if (!vbt) { |
||
672 | DRM_ERROR("VBT signature missing\n"); |
||
673 | pci_unmap_rom(pdev, bios); |
||
674 | return -1; |
||
675 | } |
||
676 | |||
677 | bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset); |
||
678 | } |
||
679 | |||
680 | /* Grab useful general definitions */ |
||
681 | parse_general_features(dev_priv, bdb); |
||
682 | parse_general_definitions(dev_priv, bdb); |
||
683 | parse_lfp_panel_data(dev_priv, bdb); |
||
684 | parse_sdvo_panel_data(dev_priv, bdb); |
||
685 | parse_sdvo_device_mapping(dev_priv, bdb); |
||
686 | parse_device_mapping(dev_priv, bdb); |
||
687 | parse_driver_features(dev_priv, bdb); |
||
688 | parse_edp(dev_priv, bdb); |
||
689 | |||
690 | if (bios) |
||
691 | pci_unmap_rom(pdev, bios); |
||
692 | |||
693 | return 0; |
||
694 | } |
||
695 | |||
696 | /* Ensure that vital registers have been initialised, even if the BIOS |
||
697 | * is absent or just failing to do its job. |
||
698 | */ |
||
699 | void intel_setup_bios(struct drm_device *dev) |
||
700 | { |
||
701 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
702 | |||
703 | /* Set the Panel Power On/Off timings if uninitialized. */ |
||
704 | if ((I915_READ(PP_ON_DELAYS) == 0) && (I915_READ(PP_OFF_DELAYS) == 0)) { |
||
705 | /* Set T2 to 40ms and T5 to 200ms */ |
||
706 | I915_WRITE(PP_ON_DELAYS, 0x019007d0); |
||
707 | |||
708 | /* Set T3 to 35ms and Tx to 200ms */ |
||
709 | I915_WRITE(PP_OFF_DELAYS, 0x015e07d0); |
||
710 | } |
||
711 | }>>>>=>>>>><>><>><>><>><>> |