Rev 4560 | Go to most recent revision | Details | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 4126 | Serge | 1 | /* |
| 2 | * Copyright (c) 2008 Intel Corporation |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice (including the next |
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| 12 | * paragraph) shall be included in all copies or substantial portions of the |
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| 13 | * Software. |
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| 14 | * |
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| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
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| 21 | * IN THE SOFTWARE. |
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| 22 | * |
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| 23 | * Authors: |
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| 24 | * Eric Anholt |
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| 25 | * Keith Packard |
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| 26 | * Mika Kuoppala |
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| 27 | * |
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| 28 | */ |
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| 29 | |||
| 30 | #include "i915_drv.h" |
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| 31 | |||
| 32 | #if 0 |
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| 33 | static const char *yesno(int v) |
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| 34 | { |
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| 35 | return v ? "yes" : "no"; |
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| 36 | } |
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| 37 | |||
| 38 | static const char *ring_str(int ring) |
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| 39 | { |
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| 40 | switch (ring) { |
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| 41 | case RCS: return "render"; |
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| 42 | case VCS: return "bsd"; |
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| 43 | case BCS: return "blt"; |
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| 44 | case VECS: return "vebox"; |
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| 45 | default: return ""; |
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| 46 | } |
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| 47 | } |
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| 48 | |||
| 49 | static const char *pin_flag(int pinned) |
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| 50 | { |
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| 51 | if (pinned > 0) |
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| 52 | return " P"; |
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| 53 | else if (pinned < 0) |
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| 54 | return " p"; |
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| 55 | else |
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| 56 | return ""; |
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| 57 | } |
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| 58 | |||
| 59 | static const char *tiling_flag(int tiling) |
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| 60 | { |
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| 61 | switch (tiling) { |
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| 62 | default: |
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| 63 | case I915_TILING_NONE: return ""; |
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| 64 | case I915_TILING_X: return " X"; |
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| 65 | case I915_TILING_Y: return " Y"; |
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| 66 | } |
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| 67 | } |
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| 68 | |||
| 69 | static const char *dirty_flag(int dirty) |
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| 70 | { |
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| 71 | return dirty ? " dirty" : ""; |
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| 72 | } |
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| 73 | |||
| 74 | static const char *purgeable_flag(int purgeable) |
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| 75 | { |
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| 76 | return purgeable ? " purgeable" : ""; |
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| 77 | } |
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| 78 | |||
| 79 | static bool __i915_error_ok(struct drm_i915_error_state_buf *e) |
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| 80 | { |
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| 81 | |||
| 82 | if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) { |
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| 83 | e->err = -ENOSPC; |
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| 84 | return false; |
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| 85 | } |
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| 86 | |||
| 87 | if (e->bytes == e->size - 1 || e->err) |
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| 88 | return false; |
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| 89 | |||
| 90 | return true; |
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| 91 | } |
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| 92 | |||
| 93 | static bool __i915_error_seek(struct drm_i915_error_state_buf *e, |
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| 94 | unsigned len) |
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| 95 | { |
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| 96 | if (e->pos + len <= e->start) { |
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| 97 | e->pos += len; |
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| 98 | return false; |
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| 99 | } |
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| 100 | |||
| 101 | /* First vsnprintf needs to fit in its entirety for memmove */ |
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| 102 | if (len >= e->size) { |
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| 103 | e->err = -EIO; |
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| 104 | return false; |
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| 105 | } |
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| 106 | |||
| 107 | return true; |
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| 108 | } |
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| 109 | |||
| 110 | static void __i915_error_advance(struct drm_i915_error_state_buf *e, |
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| 111 | unsigned len) |
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| 112 | { |
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| 113 | /* If this is first printf in this window, adjust it so that |
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| 114 | * start position matches start of the buffer |
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| 115 | */ |
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| 116 | |||
| 117 | if (e->pos < e->start) { |
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| 118 | const size_t off = e->start - e->pos; |
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| 119 | |||
| 120 | /* Should not happen but be paranoid */ |
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| 121 | if (off > len || e->bytes) { |
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| 122 | e->err = -EIO; |
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| 123 | return; |
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| 124 | } |
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| 125 | |||
| 126 | memmove(e->buf, e->buf + off, len - off); |
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| 127 | e->bytes = len - off; |
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| 128 | e->pos = e->start; |
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| 129 | return; |
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| 130 | } |
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| 131 | |||
| 132 | e->bytes += len; |
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| 133 | e->pos += len; |
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| 134 | } |
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| 135 | |||
| 136 | static void i915_error_vprintf(struct drm_i915_error_state_buf *e, |
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| 137 | const char *f, va_list args) |
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| 138 | { |
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| 139 | unsigned len; |
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| 140 | |||
| 141 | if (!__i915_error_ok(e)) |
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| 142 | return; |
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| 143 | |||
| 144 | /* Seek the first printf which is hits start position */ |
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| 145 | if (e->pos < e->start) { |
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| 146 | va_list tmp; |
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| 147 | |||
| 148 | va_copy(tmp, args); |
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| 149 | if (!__i915_error_seek(e, vsnprintf(NULL, 0, f, tmp))) |
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| 150 | return; |
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| 151 | } |
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| 152 | |||
| 153 | len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args); |
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| 154 | if (len >= e->size - e->bytes) |
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| 155 | len = e->size - e->bytes - 1; |
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| 156 | |||
| 157 | __i915_error_advance(e, len); |
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| 158 | } |
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| 159 | |||
| 160 | static void i915_error_puts(struct drm_i915_error_state_buf *e, |
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| 161 | const char *str) |
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| 162 | { |
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| 163 | unsigned len; |
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| 164 | |||
| 165 | if (!__i915_error_ok(e)) |
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| 166 | return; |
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| 167 | |||
| 168 | len = strlen(str); |
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| 169 | |||
| 170 | /* Seek the first printf which is hits start position */ |
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| 171 | if (e->pos < e->start) { |
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| 172 | if (!__i915_error_seek(e, len)) |
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| 173 | return; |
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| 174 | } |
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| 175 | |||
| 176 | if (len >= e->size - e->bytes) |
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| 177 | len = e->size - e->bytes - 1; |
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| 178 | memcpy(e->buf + e->bytes, str, len); |
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| 179 | |||
| 180 | __i915_error_advance(e, len); |
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| 181 | } |
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| 182 | |||
| 183 | #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__) |
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| 184 | #define err_puts(e, s) i915_error_puts(e, s) |
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| 185 | |||
| 186 | static void print_error_buffers(struct drm_i915_error_state_buf *m, |
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| 187 | const char *name, |
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| 188 | struct drm_i915_error_buffer *err, |
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| 189 | int count) |
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| 190 | { |
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| 191 | err_printf(m, "%s [%d]:\n", name, count); |
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| 192 | |||
| 193 | while (count--) { |
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| 194 | err_printf(m, " %08x %8u %02x %02x %x %x", |
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| 195 | err->gtt_offset, |
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| 196 | err->size, |
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| 197 | err->read_domains, |
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| 198 | err->write_domain, |
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| 199 | err->rseqno, err->wseqno); |
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| 200 | err_puts(m, pin_flag(err->pinned)); |
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| 201 | err_puts(m, tiling_flag(err->tiling)); |
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| 202 | err_puts(m, dirty_flag(err->dirty)); |
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| 203 | err_puts(m, purgeable_flag(err->purgeable)); |
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| 204 | err_puts(m, err->ring != -1 ? " " : ""); |
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| 205 | err_puts(m, ring_str(err->ring)); |
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| 206 | err_puts(m, i915_cache_level_str(err->cache_level)); |
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| 207 | |||
| 208 | if (err->name) |
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| 209 | err_printf(m, " (name: %d)", err->name); |
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| 210 | if (err->fence_reg != I915_FENCE_REG_NONE) |
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| 211 | err_printf(m, " (fence: %d)", err->fence_reg); |
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| 212 | |||
| 213 | err_puts(m, "\n"); |
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| 214 | err++; |
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| 215 | } |
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| 216 | } |
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| 217 | |||
| 218 | static void i915_ring_error_state(struct drm_i915_error_state_buf *m, |
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| 219 | struct drm_device *dev, |
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| 220 | struct drm_i915_error_state *error, |
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| 221 | unsigned ring) |
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| 222 | { |
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| 223 | BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */ |
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| 224 | err_printf(m, "%s command stream:\n", ring_str(ring)); |
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| 225 | err_printf(m, " HEAD: 0x%08x\n", error->head[ring]); |
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| 226 | err_printf(m, " TAIL: 0x%08x\n", error->tail[ring]); |
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| 227 | err_printf(m, " CTL: 0x%08x\n", error->ctl[ring]); |
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| 228 | err_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]); |
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| 229 | err_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]); |
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| 230 | err_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]); |
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| 231 | err_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]); |
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| 232 | if (ring == RCS && INTEL_INFO(dev)->gen >= 4) |
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| 233 | err_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr); |
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| 234 | |||
| 235 | if (INTEL_INFO(dev)->gen >= 4) |
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| 236 | err_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]); |
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| 237 | err_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]); |
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| 238 | err_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]); |
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| 239 | if (INTEL_INFO(dev)->gen >= 6) { |
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| 240 | err_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]); |
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| 241 | err_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]); |
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| 242 | err_printf(m, " SYNC_0: 0x%08x [last synced 0x%08x]\n", |
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| 243 | error->semaphore_mboxes[ring][0], |
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| 244 | error->semaphore_seqno[ring][0]); |
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| 245 | err_printf(m, " SYNC_1: 0x%08x [last synced 0x%08x]\n", |
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| 246 | error->semaphore_mboxes[ring][1], |
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| 247 | error->semaphore_seqno[ring][1]); |
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| 248 | if (HAS_VEBOX(dev)) { |
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| 249 | err_printf(m, " SYNC_2: 0x%08x [last synced 0x%08x]\n", |
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| 250 | error->semaphore_mboxes[ring][2], |
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| 251 | error->semaphore_seqno[ring][2]); |
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| 252 | } |
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| 253 | } |
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| 254 | err_printf(m, " seqno: 0x%08x\n", error->seqno[ring]); |
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| 255 | err_printf(m, " waiting: %s\n", yesno(error->waiting[ring])); |
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| 256 | err_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]); |
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| 257 | err_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]); |
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| 258 | } |
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| 259 | |||
| 260 | void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...) |
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| 261 | { |
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| 262 | va_list args; |
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| 263 | |||
| 264 | va_start(args, f); |
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| 265 | i915_error_vprintf(e, f, args); |
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| 266 | va_end(args); |
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| 267 | } |
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| 268 | |||
| 269 | int i915_error_state_to_str(struct drm_i915_error_state_buf *m, |
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| 270 | const struct i915_error_state_file_priv *error_priv) |
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| 271 | { |
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| 272 | struct drm_device *dev = error_priv->dev; |
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| 273 | drm_i915_private_t *dev_priv = dev->dev_private; |
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| 274 | struct drm_i915_error_state *error = error_priv->error; |
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| 275 | struct intel_ring_buffer *ring; |
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| 276 | int i, j, page, offset, elt; |
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| 277 | |||
| 278 | if (!error) { |
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| 279 | err_printf(m, "no error state collected\n"); |
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| 280 | goto out; |
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| 281 | } |
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| 282 | |||
| 283 | err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, |
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| 284 | error->time.tv_usec); |
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| 285 | err_printf(m, "Kernel: " UTS_RELEASE "\n"); |
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| 286 | err_printf(m, "PCI ID: 0x%04x\n", dev->pci_device); |
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| 287 | err_printf(m, "EIR: 0x%08x\n", error->eir); |
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| 288 | err_printf(m, "IER: 0x%08x\n", error->ier); |
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| 289 | err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); |
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| 290 | err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake); |
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| 291 | err_printf(m, "DERRMR: 0x%08x\n", error->derrmr); |
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| 292 | err_printf(m, "CCID: 0x%08x\n", error->ccid); |
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| 293 | |||
| 294 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
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| 295 | err_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]); |
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| 296 | |||
| 297 | for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++) |
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| 298 | err_printf(m, " INSTDONE_%d: 0x%08x\n", i, |
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| 299 | error->extra_instdone[i]); |
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| 300 | |||
| 301 | if (INTEL_INFO(dev)->gen >= 6) { |
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| 302 | err_printf(m, "ERROR: 0x%08x\n", error->error); |
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| 303 | err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg); |
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| 304 | } |
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| 305 | |||
| 306 | if (INTEL_INFO(dev)->gen == 7) |
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| 307 | err_printf(m, "ERR_INT: 0x%08x\n", error->err_int); |
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| 308 | |||
| 309 | for_each_ring(ring, dev_priv, i) |
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| 310 | i915_ring_error_state(m, dev, error, i); |
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| 311 | |||
| 312 | if (error->active_bo) |
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| 313 | print_error_buffers(m, "Active", |
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| 314 | error->active_bo[0], |
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| 315 | error->active_bo_count[0]); |
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| 316 | |||
| 317 | if (error->pinned_bo) |
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| 318 | print_error_buffers(m, "Pinned", |
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| 319 | error->pinned_bo[0], |
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| 320 | error->pinned_bo_count[0]); |
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| 321 | |||
| 322 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
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| 323 | struct drm_i915_error_object *obj; |
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| 324 | |||
| 325 | if ((obj = error->ring[i].batchbuffer)) { |
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| 326 | err_printf(m, "%s --- gtt_offset = 0x%08x\n", |
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| 327 | dev_priv->ring[i].name, |
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| 328 | obj->gtt_offset); |
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| 329 | offset = 0; |
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| 330 | for (page = 0; page < obj->page_count; page++) { |
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| 331 | for (elt = 0; elt < PAGE_SIZE/4; elt++) { |
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| 332 | err_printf(m, "%08x : %08x\n", offset, |
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| 333 | obj->pages[page][elt]); |
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| 334 | offset += 4; |
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| 335 | } |
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| 336 | } |
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| 337 | } |
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| 338 | |||
| 339 | if (error->ring[i].num_requests) { |
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| 340 | err_printf(m, "%s --- %d requests\n", |
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| 341 | dev_priv->ring[i].name, |
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| 342 | error->ring[i].num_requests); |
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| 343 | for (j = 0; j < error->ring[i].num_requests; j++) { |
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| 344 | err_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n", |
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| 345 | error->ring[i].requests[j].seqno, |
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| 346 | error->ring[i].requests[j].jiffies, |
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| 347 | error->ring[i].requests[j].tail); |
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| 348 | } |
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| 349 | } |
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| 350 | |||
| 351 | if ((obj = error->ring[i].ringbuffer)) { |
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| 352 | err_printf(m, "%s --- ringbuffer = 0x%08x\n", |
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| 353 | dev_priv->ring[i].name, |
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| 354 | obj->gtt_offset); |
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| 355 | offset = 0; |
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| 356 | for (page = 0; page < obj->page_count; page++) { |
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| 357 | for (elt = 0; elt < PAGE_SIZE/4; elt++) { |
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| 358 | err_printf(m, "%08x : %08x\n", |
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| 359 | offset, |
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| 360 | obj->pages[page][elt]); |
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| 361 | offset += 4; |
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| 362 | } |
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| 363 | } |
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| 364 | } |
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| 365 | |||
| 366 | obj = error->ring[i].ctx; |
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| 367 | if (obj) { |
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| 368 | err_printf(m, "%s --- HW Context = 0x%08x\n", |
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| 369 | dev_priv->ring[i].name, |
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| 370 | obj->gtt_offset); |
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| 371 | offset = 0; |
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| 372 | for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { |
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| 373 | err_printf(m, "[%04x] %08x %08x %08x %08x\n", |
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| 374 | offset, |
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| 375 | obj->pages[0][elt], |
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| 376 | obj->pages[0][elt+1], |
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| 377 | obj->pages[0][elt+2], |
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| 378 | obj->pages[0][elt+3]); |
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| 379 | offset += 16; |
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| 380 | } |
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| 381 | } |
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| 382 | } |
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| 383 | |||
| 384 | if (error->overlay) |
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| 385 | intel_overlay_print_error_state(m, error->overlay); |
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| 386 | |||
| 387 | if (error->display) |
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| 388 | intel_display_print_error_state(m, dev, error->display); |
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| 389 | |||
| 390 | out: |
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| 391 | if (m->bytes == 0 && m->err) |
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| 392 | return m->err; |
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| 393 | |||
| 394 | return 0; |
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| 395 | } |
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| 396 | |||
| 397 | int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf, |
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| 398 | size_t count, loff_t pos) |
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| 399 | { |
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| 400 | memset(ebuf, 0, sizeof(*ebuf)); |
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| 401 | |||
| 402 | /* We need to have enough room to store any i915_error_state printf |
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| 403 | * so that we can move it to start position. |
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| 404 | */ |
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| 405 | ebuf->size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE; |
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| 406 | ebuf->buf = kmalloc(ebuf->size, |
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| 407 | GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN); |
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| 408 | |||
| 409 | if (ebuf->buf == NULL) { |
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| 410 | ebuf->size = PAGE_SIZE; |
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| 411 | ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY); |
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| 412 | } |
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| 413 | |||
| 414 | if (ebuf->buf == NULL) { |
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| 415 | ebuf->size = 128; |
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| 416 | ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY); |
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| 417 | } |
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| 418 | |||
| 419 | if (ebuf->buf == NULL) |
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| 420 | return -ENOMEM; |
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| 421 | |||
| 422 | ebuf->start = pos; |
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| 423 | |||
| 424 | return 0; |
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| 425 | } |
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| 426 | |||
| 427 | static void i915_error_object_free(struct drm_i915_error_object *obj) |
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| 428 | { |
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| 429 | int page; |
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| 430 | |||
| 431 | if (obj == NULL) |
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| 432 | return; |
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| 433 | |||
| 434 | for (page = 0; page < obj->page_count; page++) |
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| 435 | kfree(obj->pages[page]); |
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| 436 | |||
| 437 | kfree(obj); |
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| 438 | } |
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| 439 | |||
| 440 | static void i915_error_state_free(struct kref *error_ref) |
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| 441 | { |
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| 442 | struct drm_i915_error_state *error = container_of(error_ref, |
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| 443 | typeof(*error), ref); |
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| 444 | int i; |
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| 445 | |||
| 446 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
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| 447 | i915_error_object_free(error->ring[i].batchbuffer); |
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| 448 | i915_error_object_free(error->ring[i].ringbuffer); |
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| 449 | i915_error_object_free(error->ring[i].ctx); |
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| 450 | kfree(error->ring[i].requests); |
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| 451 | } |
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| 452 | |||
| 453 | kfree(error->active_bo); |
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| 454 | kfree(error->overlay); |
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| 455 | kfree(error->display); |
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| 456 | kfree(error); |
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| 457 | } |
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| 458 | |||
| 459 | static struct drm_i915_error_object * |
||
| 460 | i915_error_object_create_sized(struct drm_i915_private *dev_priv, |
||
| 461 | struct drm_i915_gem_object *src, |
||
| 462 | const int num_pages) |
||
| 463 | { |
||
| 464 | struct drm_i915_error_object *dst; |
||
| 465 | int i; |
||
| 466 | u32 reloc_offset; |
||
| 467 | |||
| 468 | if (src == NULL || src->pages == NULL) |
||
| 469 | return NULL; |
||
| 470 | |||
| 471 | dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), GFP_ATOMIC); |
||
| 472 | if (dst == NULL) |
||
| 473 | return NULL; |
||
| 474 | |||
| 475 | reloc_offset = dst->gtt_offset = i915_gem_obj_ggtt_offset(src); |
||
| 476 | for (i = 0; i < num_pages; i++) { |
||
| 477 | unsigned long flags; |
||
| 478 | void *d; |
||
| 479 | |||
| 480 | d = kmalloc(PAGE_SIZE, GFP_ATOMIC); |
||
| 481 | if (d == NULL) |
||
| 482 | goto unwind; |
||
| 483 | |||
| 484 | local_irq_save(flags); |
||
| 485 | if (reloc_offset < dev_priv->gtt.mappable_end && |
||
| 486 | src->has_global_gtt_mapping) { |
||
| 487 | void __iomem *s; |
||
| 488 | |||
| 489 | /* Simply ignore tiling or any overlapping fence. |
||
| 490 | * It's part of the error state, and this hopefully |
||
| 491 | * captures what the GPU read. |
||
| 492 | */ |
||
| 493 | |||
| 494 | s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable, |
||
| 495 | reloc_offset); |
||
| 496 | memcpy_fromio(d, s, PAGE_SIZE); |
||
| 497 | io_mapping_unmap_atomic(s); |
||
| 498 | } else if (src->stolen) { |
||
| 499 | unsigned long offset; |
||
| 500 | |||
| 501 | offset = dev_priv->mm.stolen_base; |
||
| 502 | offset += src->stolen->start; |
||
| 503 | offset += i << PAGE_SHIFT; |
||
| 504 | |||
| 505 | memcpy_fromio(d, (void __iomem *) offset, PAGE_SIZE); |
||
| 506 | } else { |
||
| 507 | struct page *page; |
||
| 508 | void *s; |
||
| 509 | |||
| 510 | page = i915_gem_object_get_page(src, i); |
||
| 511 | |||
| 512 | drm_clflush_pages(&page, 1); |
||
| 513 | |||
| 514 | s = kmap_atomic(page); |
||
| 515 | memcpy(d, s, PAGE_SIZE); |
||
| 516 | kunmap_atomic(s); |
||
| 517 | |||
| 518 | drm_clflush_pages(&page, 1); |
||
| 519 | } |
||
| 520 | local_irq_restore(flags); |
||
| 521 | |||
| 522 | dst->pages[i] = d; |
||
| 523 | |||
| 524 | reloc_offset += PAGE_SIZE; |
||
| 525 | } |
||
| 526 | dst->page_count = num_pages; |
||
| 527 | |||
| 528 | return dst; |
||
| 529 | |||
| 530 | unwind: |
||
| 531 | while (i--) |
||
| 532 | kfree(dst->pages[i]); |
||
| 533 | kfree(dst); |
||
| 534 | return NULL; |
||
| 535 | } |
||
| 536 | #define i915_error_object_create(dev_priv, src) \ |
||
| 537 | i915_error_object_create_sized((dev_priv), (src), \ |
||
| 538 | (src)->base.size>>PAGE_SHIFT) |
||
| 539 | |||
| 540 | static void capture_bo(struct drm_i915_error_buffer *err, |
||
| 541 | struct drm_i915_gem_object *obj) |
||
| 542 | { |
||
| 543 | err->size = obj->base.size; |
||
| 544 | err->name = obj->base.name; |
||
| 545 | err->rseqno = obj->last_read_seqno; |
||
| 546 | err->wseqno = obj->last_write_seqno; |
||
| 547 | err->gtt_offset = i915_gem_obj_ggtt_offset(obj); |
||
| 548 | err->read_domains = obj->base.read_domains; |
||
| 549 | err->write_domain = obj->base.write_domain; |
||
| 550 | err->fence_reg = obj->fence_reg; |
||
| 551 | err->pinned = 0; |
||
| 552 | if (obj->pin_count > 0) |
||
| 553 | err->pinned = 1; |
||
| 554 | if (obj->user_pin_count > 0) |
||
| 555 | err->pinned = -1; |
||
| 556 | err->tiling = obj->tiling_mode; |
||
| 557 | err->dirty = obj->dirty; |
||
| 558 | err->purgeable = obj->madv != I915_MADV_WILLNEED; |
||
| 559 | err->ring = obj->ring ? obj->ring->id : -1; |
||
| 560 | err->cache_level = obj->cache_level; |
||
| 561 | } |
||
| 562 | |||
| 563 | static u32 capture_active_bo(struct drm_i915_error_buffer *err, |
||
| 564 | int count, struct list_head *head) |
||
| 565 | { |
||
| 566 | struct i915_vma *vma; |
||
| 567 | int i = 0; |
||
| 568 | |||
| 569 | list_for_each_entry(vma, head, mm_list) { |
||
| 570 | capture_bo(err++, vma->obj); |
||
| 571 | if (++i == count) |
||
| 572 | break; |
||
| 573 | } |
||
| 574 | |||
| 575 | return i; |
||
| 576 | } |
||
| 577 | |||
| 578 | static u32 capture_pinned_bo(struct drm_i915_error_buffer *err, |
||
| 579 | int count, struct list_head *head) |
||
| 580 | { |
||
| 581 | struct drm_i915_gem_object *obj; |
||
| 582 | int i = 0; |
||
| 583 | |||
| 584 | list_for_each_entry(obj, head, global_list) { |
||
| 585 | if (obj->pin_count == 0) |
||
| 586 | continue; |
||
| 587 | |||
| 588 | capture_bo(err++, obj); |
||
| 589 | if (++i == count) |
||
| 590 | break; |
||
| 591 | } |
||
| 592 | |||
| 593 | return i; |
||
| 594 | } |
||
| 595 | |||
| 596 | static void i915_gem_record_fences(struct drm_device *dev, |
||
| 597 | struct drm_i915_error_state *error) |
||
| 598 | { |
||
| 599 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
| 600 | int i; |
||
| 601 | |||
| 602 | /* Fences */ |
||
| 603 | switch (INTEL_INFO(dev)->gen) { |
||
| 604 | case 7: |
||
| 605 | case 6: |
||
| 606 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
||
| 607 | error->fence[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8)); |
||
| 608 | break; |
||
| 609 | case 5: |
||
| 610 | case 4: |
||
| 611 | for (i = 0; i < 16; i++) |
||
| 612 | error->fence[i] = I915_READ64(FENCE_REG_965_0 + (i * 8)); |
||
| 613 | break; |
||
| 614 | case 3: |
||
| 615 | if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) |
||
| 616 | for (i = 0; i < 8; i++) |
||
| 617 | error->fence[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4)); |
||
| 618 | case 2: |
||
| 619 | for (i = 0; i < 8; i++) |
||
| 620 | error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4)); |
||
| 621 | break; |
||
| 622 | |||
| 623 | default: |
||
| 624 | BUG(); |
||
| 625 | } |
||
| 626 | } |
||
| 627 | |||
| 628 | static struct drm_i915_error_object * |
||
| 629 | i915_error_first_batchbuffer(struct drm_i915_private *dev_priv, |
||
| 630 | struct intel_ring_buffer *ring) |
||
| 631 | { |
||
| 632 | struct i915_address_space *vm; |
||
| 633 | struct i915_vma *vma; |
||
| 634 | struct drm_i915_gem_object *obj; |
||
| 635 | u32 seqno; |
||
| 636 | |||
| 637 | if (!ring->get_seqno) |
||
| 638 | return NULL; |
||
| 639 | |||
| 640 | if (HAS_BROKEN_CS_TLB(dev_priv->dev)) { |
||
| 641 | u32 acthd = I915_READ(ACTHD); |
||
| 642 | |||
| 643 | if (WARN_ON(ring->id != RCS)) |
||
| 644 | return NULL; |
||
| 645 | |||
| 646 | obj = ring->scratch.obj; |
||
| 647 | if (acthd >= i915_gem_obj_ggtt_offset(obj) && |
||
| 648 | acthd < i915_gem_obj_ggtt_offset(obj) + obj->base.size) |
||
| 649 | return i915_error_object_create(dev_priv, obj); |
||
| 650 | } |
||
| 651 | |||
| 652 | seqno = ring->get_seqno(ring, false); |
||
| 653 | list_for_each_entry(vm, &dev_priv->vm_list, global_link) { |
||
| 654 | list_for_each_entry(vma, &vm->active_list, mm_list) { |
||
| 655 | obj = vma->obj; |
||
| 656 | if (obj->ring != ring) |
||
| 657 | continue; |
||
| 658 | |||
| 659 | if (i915_seqno_passed(seqno, obj->last_read_seqno)) |
||
| 660 | continue; |
||
| 661 | |||
| 662 | if ((obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) == 0) |
||
| 663 | continue; |
||
| 664 | |||
| 665 | /* We need to copy these to an anonymous buffer as the simplest |
||
| 666 | * method to avoid being overwritten by userspace. |
||
| 667 | */ |
||
| 668 | return i915_error_object_create(dev_priv, obj); |
||
| 669 | } |
||
| 670 | } |
||
| 671 | |||
| 672 | return NULL; |
||
| 673 | } |
||
| 674 | |||
| 675 | static void i915_record_ring_state(struct drm_device *dev, |
||
| 676 | struct drm_i915_error_state *error, |
||
| 677 | struct intel_ring_buffer *ring) |
||
| 678 | { |
||
| 679 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
| 680 | |||
| 681 | if (INTEL_INFO(dev)->gen >= 6) { |
||
| 682 | error->rc_psmi[ring->id] = I915_READ(ring->mmio_base + 0x50); |
||
| 683 | error->fault_reg[ring->id] = I915_READ(RING_FAULT_REG(ring)); |
||
| 684 | error->semaphore_mboxes[ring->id][0] |
||
| 685 | = I915_READ(RING_SYNC_0(ring->mmio_base)); |
||
| 686 | error->semaphore_mboxes[ring->id][1] |
||
| 687 | = I915_READ(RING_SYNC_1(ring->mmio_base)); |
||
| 688 | error->semaphore_seqno[ring->id][0] = ring->sync_seqno[0]; |
||
| 689 | error->semaphore_seqno[ring->id][1] = ring->sync_seqno[1]; |
||
| 690 | } |
||
| 691 | |||
| 692 | if (HAS_VEBOX(dev)) { |
||
| 693 | error->semaphore_mboxes[ring->id][2] = |
||
| 694 | I915_READ(RING_SYNC_2(ring->mmio_base)); |
||
| 695 | error->semaphore_seqno[ring->id][2] = ring->sync_seqno[2]; |
||
| 696 | } |
||
| 697 | |||
| 698 | if (INTEL_INFO(dev)->gen >= 4) { |
||
| 699 | error->faddr[ring->id] = I915_READ(RING_DMA_FADD(ring->mmio_base)); |
||
| 700 | error->ipeir[ring->id] = I915_READ(RING_IPEIR(ring->mmio_base)); |
||
| 701 | error->ipehr[ring->id] = I915_READ(RING_IPEHR(ring->mmio_base)); |
||
| 702 | error->instdone[ring->id] = I915_READ(RING_INSTDONE(ring->mmio_base)); |
||
| 703 | error->instps[ring->id] = I915_READ(RING_INSTPS(ring->mmio_base)); |
||
| 704 | if (ring->id == RCS) |
||
| 705 | error->bbaddr = I915_READ64(BB_ADDR); |
||
| 706 | } else { |
||
| 707 | error->faddr[ring->id] = I915_READ(DMA_FADD_I8XX); |
||
| 708 | error->ipeir[ring->id] = I915_READ(IPEIR); |
||
| 709 | error->ipehr[ring->id] = I915_READ(IPEHR); |
||
| 710 | error->instdone[ring->id] = I915_READ(INSTDONE); |
||
| 711 | } |
||
| 712 | |||
| 713 | error->waiting[ring->id] = waitqueue_active(&ring->irq_queue); |
||
| 714 | error->instpm[ring->id] = I915_READ(RING_INSTPM(ring->mmio_base)); |
||
| 715 | error->seqno[ring->id] = ring->get_seqno(ring, false); |
||
| 716 | error->acthd[ring->id] = intel_ring_get_active_head(ring); |
||
| 717 | error->head[ring->id] = I915_READ_HEAD(ring); |
||
| 718 | error->tail[ring->id] = I915_READ_TAIL(ring); |
||
| 719 | error->ctl[ring->id] = I915_READ_CTL(ring); |
||
| 720 | |||
| 721 | error->cpu_ring_head[ring->id] = ring->head; |
||
| 722 | error->cpu_ring_tail[ring->id] = ring->tail; |
||
| 723 | } |
||
| 724 | |||
| 725 | |||
| 726 | static void i915_gem_record_active_context(struct intel_ring_buffer *ring, |
||
| 727 | struct drm_i915_error_state *error, |
||
| 728 | struct drm_i915_error_ring *ering) |
||
| 729 | { |
||
| 730 | struct drm_i915_private *dev_priv = ring->dev->dev_private; |
||
| 731 | struct drm_i915_gem_object *obj; |
||
| 732 | |||
| 733 | /* Currently render ring is the only HW context user */ |
||
| 734 | if (ring->id != RCS || !error->ccid) |
||
| 735 | return; |
||
| 736 | |||
| 737 | list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) { |
||
| 738 | if ((error->ccid & PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) { |
||
| 739 | ering->ctx = i915_error_object_create_sized(dev_priv, |
||
| 740 | obj, 1); |
||
| 741 | break; |
||
| 742 | } |
||
| 743 | } |
||
| 744 | } |
||
| 745 | |||
| 746 | static void i915_gem_record_rings(struct drm_device *dev, |
||
| 747 | struct drm_i915_error_state *error) |
||
| 748 | { |
||
| 749 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
| 750 | struct intel_ring_buffer *ring; |
||
| 751 | struct drm_i915_gem_request *request; |
||
| 752 | int i, count; |
||
| 753 | |||
| 754 | for_each_ring(ring, dev_priv, i) { |
||
| 755 | i915_record_ring_state(dev, error, ring); |
||
| 756 | |||
| 757 | error->ring[i].batchbuffer = |
||
| 758 | i915_error_first_batchbuffer(dev_priv, ring); |
||
| 759 | |||
| 760 | error->ring[i].ringbuffer = |
||
| 761 | i915_error_object_create(dev_priv, ring->obj); |
||
| 762 | |||
| 763 | |||
| 764 | i915_gem_record_active_context(ring, error, &error->ring[i]); |
||
| 765 | |||
| 766 | count = 0; |
||
| 767 | list_for_each_entry(request, &ring->request_list, list) |
||
| 768 | count++; |
||
| 769 | |||
| 770 | error->ring[i].num_requests = count; |
||
| 771 | error->ring[i].requests = |
||
| 772 | kmalloc(count*sizeof(struct drm_i915_error_request), |
||
| 773 | GFP_ATOMIC); |
||
| 774 | if (error->ring[i].requests == NULL) { |
||
| 775 | error->ring[i].num_requests = 0; |
||
| 776 | continue; |
||
| 777 | } |
||
| 778 | |||
| 779 | count = 0; |
||
| 780 | list_for_each_entry(request, &ring->request_list, list) { |
||
| 781 | struct drm_i915_error_request *erq; |
||
| 782 | |||
| 783 | erq = &error->ring[i].requests[count++]; |
||
| 784 | erq->seqno = request->seqno; |
||
| 785 | erq->jiffies = request->emitted_jiffies; |
||
| 786 | erq->tail = request->tail; |
||
| 787 | } |
||
| 788 | } |
||
| 789 | } |
||
| 790 | |||
| 791 | /* FIXME: Since pin count/bound list is global, we duplicate what we capture per |
||
| 792 | * VM. |
||
| 793 | */ |
||
| 794 | static void i915_gem_capture_vm(struct drm_i915_private *dev_priv, |
||
| 795 | struct drm_i915_error_state *error, |
||
| 796 | struct i915_address_space *vm, |
||
| 797 | const int ndx) |
||
| 798 | { |
||
| 799 | struct drm_i915_error_buffer *active_bo = NULL, *pinned_bo = NULL; |
||
| 800 | struct drm_i915_gem_object *obj; |
||
| 801 | struct i915_vma *vma; |
||
| 802 | int i; |
||
| 803 | |||
| 804 | i = 0; |
||
| 805 | list_for_each_entry(vma, &vm->active_list, mm_list) |
||
| 806 | i++; |
||
| 807 | error->active_bo_count[ndx] = i; |
||
| 808 | list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) |
||
| 809 | if (obj->pin_count) |
||
| 810 | i++; |
||
| 811 | error->pinned_bo_count[ndx] = i - error->active_bo_count[ndx]; |
||
| 812 | |||
| 813 | if (i) { |
||
| 814 | active_bo = kmalloc(sizeof(*active_bo)*i, GFP_ATOMIC); |
||
| 815 | if (active_bo) |
||
| 816 | pinned_bo = active_bo + error->active_bo_count[ndx]; |
||
| 817 | } |
||
| 818 | |||
| 819 | if (active_bo) |
||
| 820 | error->active_bo_count[ndx] = |
||
| 821 | capture_active_bo(active_bo, |
||
| 822 | error->active_bo_count[ndx], |
||
| 823 | &vm->active_list); |
||
| 824 | |||
| 825 | if (pinned_bo) |
||
| 826 | error->pinned_bo_count[ndx] = |
||
| 827 | capture_pinned_bo(pinned_bo, |
||
| 828 | error->pinned_bo_count[ndx], |
||
| 829 | &dev_priv->mm.bound_list); |
||
| 830 | error->active_bo[ndx] = active_bo; |
||
| 831 | error->pinned_bo[ndx] = pinned_bo; |
||
| 832 | } |
||
| 833 | |||
| 834 | static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv, |
||
| 835 | struct drm_i915_error_state *error) |
||
| 836 | { |
||
| 837 | struct i915_address_space *vm; |
||
| 838 | int cnt = 0, i = 0; |
||
| 839 | |||
| 840 | list_for_each_entry(vm, &dev_priv->vm_list, global_link) |
||
| 841 | cnt++; |
||
| 842 | |||
| 843 | if (WARN(cnt > 1, "Multiple VMs not yet supported\n")) |
||
| 844 | cnt = 1; |
||
| 845 | |||
| 846 | vm = &dev_priv->gtt.base; |
||
| 847 | |||
| 848 | error->active_bo = kcalloc(cnt, sizeof(*error->active_bo), GFP_ATOMIC); |
||
| 849 | error->pinned_bo = kcalloc(cnt, sizeof(*error->pinned_bo), GFP_ATOMIC); |
||
| 850 | error->active_bo_count = kcalloc(cnt, sizeof(*error->active_bo_count), |
||
| 851 | GFP_ATOMIC); |
||
| 852 | error->pinned_bo_count = kcalloc(cnt, sizeof(*error->pinned_bo_count), |
||
| 853 | GFP_ATOMIC); |
||
| 854 | |||
| 855 | list_for_each_entry(vm, &dev_priv->vm_list, global_link) |
||
| 856 | i915_gem_capture_vm(dev_priv, error, vm, i++); |
||
| 857 | } |
||
| 858 | |||
| 859 | /** |
||
| 860 | * i915_capture_error_state - capture an error record for later analysis |
||
| 861 | * @dev: drm device |
||
| 862 | * |
||
| 863 | * Should be called when an error is detected (either a hang or an error |
||
| 864 | * interrupt) to capture error state from the time of the error. Fills |
||
| 865 | * out a structure which becomes available in debugfs for user level tools |
||
| 866 | * to pick up. |
||
| 867 | */ |
||
| 868 | void i915_capture_error_state(struct drm_device *dev) |
||
| 869 | { |
||
| 870 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
| 871 | struct drm_i915_error_state *error; |
||
| 872 | unsigned long flags; |
||
| 873 | int pipe; |
||
| 874 | |||
| 875 | spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); |
||
| 876 | error = dev_priv->gpu_error.first_error; |
||
| 877 | spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); |
||
| 878 | if (error) |
||
| 879 | return; |
||
| 880 | |||
| 881 | /* Account for pipe specific data like PIPE*STAT */ |
||
| 882 | error = kzalloc(sizeof(*error), GFP_ATOMIC); |
||
| 883 | if (!error) { |
||
| 884 | DRM_DEBUG_DRIVER("out of memory, not capturing error state\n"); |
||
| 885 | return; |
||
| 886 | } |
||
| 887 | |||
| 888 | DRM_INFO("capturing error event; look for more information in " |
||
| 889 | "/sys/class/drm/card%d/error\n", dev->primary->index); |
||
| 890 | |||
| 891 | kref_init(&error->ref); |
||
| 892 | error->eir = I915_READ(EIR); |
||
| 893 | error->pgtbl_er = I915_READ(PGTBL_ER); |
||
| 894 | if (HAS_HW_CONTEXTS(dev)) |
||
| 895 | error->ccid = I915_READ(CCID); |
||
| 896 | |||
| 897 | if (HAS_PCH_SPLIT(dev)) |
||
| 898 | error->ier = I915_READ(DEIER) | I915_READ(GTIER); |
||
| 899 | else if (IS_VALLEYVIEW(dev)) |
||
| 900 | error->ier = I915_READ(GTIER) | I915_READ(VLV_IER); |
||
| 901 | else if (IS_GEN2(dev)) |
||
| 902 | error->ier = I915_READ16(IER); |
||
| 903 | else |
||
| 904 | error->ier = I915_READ(IER); |
||
| 905 | |||
| 906 | if (INTEL_INFO(dev)->gen >= 6) |
||
| 907 | error->derrmr = I915_READ(DERRMR); |
||
| 908 | |||
| 909 | if (IS_VALLEYVIEW(dev)) |
||
| 910 | error->forcewake = I915_READ(FORCEWAKE_VLV); |
||
| 911 | else if (INTEL_INFO(dev)->gen >= 7) |
||
| 912 | error->forcewake = I915_READ(FORCEWAKE_MT); |
||
| 913 | else if (INTEL_INFO(dev)->gen == 6) |
||
| 914 | error->forcewake = I915_READ(FORCEWAKE); |
||
| 915 | |||
| 916 | if (!HAS_PCH_SPLIT(dev)) |
||
| 917 | for_each_pipe(pipe) |
||
| 918 | error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); |
||
| 919 | |||
| 920 | if (INTEL_INFO(dev)->gen >= 6) { |
||
| 921 | error->error = I915_READ(ERROR_GEN6); |
||
| 922 | error->done_reg = I915_READ(DONE_REG); |
||
| 923 | } |
||
| 924 | |||
| 925 | if (INTEL_INFO(dev)->gen == 7) |
||
| 926 | error->err_int = I915_READ(GEN7_ERR_INT); |
||
| 927 | |||
| 928 | i915_get_extra_instdone(dev, error->extra_instdone); |
||
| 929 | |||
| 930 | i915_gem_capture_buffers(dev_priv, error); |
||
| 931 | i915_gem_record_fences(dev, error); |
||
| 932 | i915_gem_record_rings(dev, error); |
||
| 933 | |||
| 934 | do_gettimeofday(&error->time); |
||
| 935 | |||
| 936 | error->overlay = intel_overlay_capture_error_state(dev); |
||
| 937 | error->display = intel_display_capture_error_state(dev); |
||
| 938 | |||
| 939 | spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); |
||
| 940 | if (dev_priv->gpu_error.first_error == NULL) { |
||
| 941 | dev_priv->gpu_error.first_error = error; |
||
| 942 | error = NULL; |
||
| 943 | } |
||
| 944 | spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); |
||
| 945 | |||
| 946 | if (error) |
||
| 947 | i915_error_state_free(&error->ref); |
||
| 948 | } |
||
| 949 | |||
| 950 | void i915_error_state_get(struct drm_device *dev, |
||
| 951 | struct i915_error_state_file_priv *error_priv) |
||
| 952 | { |
||
| 953 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
| 954 | unsigned long flags; |
||
| 955 | |||
| 956 | spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); |
||
| 957 | error_priv->error = dev_priv->gpu_error.first_error; |
||
| 958 | if (error_priv->error) |
||
| 959 | kref_get(&error_priv->error->ref); |
||
| 960 | spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); |
||
| 961 | |||
| 962 | } |
||
| 963 | |||
| 964 | void i915_error_state_put(struct i915_error_state_file_priv *error_priv) |
||
| 965 | { |
||
| 966 | if (error_priv->error) |
||
| 967 | kref_put(&error_priv->error->ref, i915_error_state_free); |
||
| 968 | } |
||
| 969 | |||
| 970 | void i915_destroy_error_state(struct drm_device *dev) |
||
| 971 | { |
||
| 972 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
| 973 | struct drm_i915_error_state *error; |
||
| 974 | unsigned long flags; |
||
| 975 | |||
| 976 | spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); |
||
| 977 | error = dev_priv->gpu_error.first_error; |
||
| 978 | dev_priv->gpu_error.first_error = NULL; |
||
| 979 | spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); |
||
| 980 | |||
| 981 | if (error) |
||
| 982 | kref_put(&error->ref, i915_error_state_free); |
||
| 983 | } |
||
| 984 | |||
| 985 | const char *i915_cache_level_str(int type) |
||
| 986 | { |
||
| 987 | switch (type) { |
||
| 988 | case I915_CACHE_NONE: return " uncached"; |
||
| 989 | case I915_CACHE_LLC: return " snooped or LLC"; |
||
| 990 | case I915_CACHE_L3_LLC: return " L3+LLC"; |
||
| 991 | default: return ""; |
||
| 992 | } |
||
| 993 | } |
||
| 994 | #endif |
||
| 995 | |||
| 996 | /* NB: please notice the memset */ |
||
| 997 | void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone) |
||
| 998 | { |
||
| 999 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
| 1000 | memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG); |
||
| 1001 | |||
| 1002 | switch (INTEL_INFO(dev)->gen) { |
||
| 1003 | case 2: |
||
| 1004 | case 3: |
||
| 1005 | instdone[0] = I915_READ(INSTDONE); |
||
| 1006 | break; |
||
| 1007 | case 4: |
||
| 1008 | case 5: |
||
| 1009 | case 6: |
||
| 1010 | instdone[0] = I915_READ(INSTDONE_I965); |
||
| 1011 | instdone[1] = I915_READ(INSTDONE1); |
||
| 1012 | break; |
||
| 1013 | default: |
||
| 1014 | WARN_ONCE(1, "Unsupported platform\n"); |
||
| 1015 | case 7: |
||
| 1016 | instdone[0] = I915_READ(GEN7_INSTDONE_1); |
||
| 1017 | instdone[1] = I915_READ(GEN7_SC_INSTDONE); |
||
| 1018 | instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE); |
||
| 1019 | instdone[3] = I915_READ(GEN7_ROW_INSTDONE); |
||
| 1020 | break; |
||
| 1021 | } |
||
| 1022 | } |