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3031 serge 1
/*
2
 * Copyright © 2011-2012 Intel Corporation
3
 *
4
 * Permission is hereby granted, free of charge, to any person obtaining a
5
 * copy of this software and associated documentation files (the "Software"),
6
 * to deal in the Software without restriction, including without limitation
7
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
 * and/or sell copies of the Software, and to permit persons to whom the
9
 * Software is furnished to do so, subject to the following conditions:
10
 *
11
 * The above copyright notice and this permission notice (including the next
12
 * paragraph) shall be included in all copies or substantial portions of the
13
 * Software.
14
 *
15
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21
 * IN THE SOFTWARE.
22
 *
23
 * Authors:
24
 *    Ben Widawsky 
25
 *
26
 */
27
 
28
/*
29
 * This file implements HW context support. On gen5+ a HW context consists of an
30
 * opaque GPU object which is referenced at times of context saves and restores.
31
 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32
 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33
 * something like a context does exist for the media ring, the code only
34
 * supports contexts for the render ring.
35
 *
36
 * In software, there is a distinction between contexts created by the user,
37
 * and the default HW context. The default HW context is used by GPU clients
38
 * that do not request setup of their own hardware context. The default
39
 * context's state is never restored to help prevent programming errors. This
40
 * would happen if a client ran and piggy-backed off another clients GPU state.
41
 * The default context only exists to give the GPU some offset to load as the
42
 * current to invoke a save of the context we actually care about. In fact, the
43
 * code could likely be constructed, albeit in a more complicated fashion, to
44
 * never use the default context, though that limits the driver's ability to
45
 * swap out, and/or destroy other contexts.
46
 *
47
 * All other contexts are created as a request by the GPU client. These contexts
48
 * store GPU state, and thus allow GPU clients to not re-emit state (and
49
 * potentially query certain state) at any time. The kernel driver makes
50
 * certain that the appropriate commands are inserted.
51
 *
52
 * The context life cycle is semi-complicated in that context BOs may live
53
 * longer than the context itself because of the way the hardware, and object
54
 * tracking works. Below is a very crude representation of the state machine
55
 * describing the context life.
56
 *                                         refcount     pincount     active
57
 * S0: initial state                          0            0           0
58
 * S1: context created                        1            0           0
59
 * S2: context is currently running           2            1           X
60
 * S3: GPU referenced, but not current        2            0           1
61
 * S4: context is current, but destroyed      1            1           0
62
 * S5: like S3, but destroyed                 1            0           1
63
 *
64
 * The most common (but not all) transitions:
65
 * S0->S1: client creates a context
66
 * S1->S2: client submits execbuf with context
67
 * S2->S3: other clients submits execbuf with context
68
 * S3->S1: context object was retired
69
 * S3->S2: clients submits another execbuf
70
 * S2->S4: context destroy called with current context
71
 * S3->S5->S0: destroy path
72
 * S4->S5->S0: destroy path on current context
73
 *
74
 * There are two confusing terms used above:
75
 *  The "current context" means the context which is currently running on the
76
 *  GPU. The GPU has loaded it's state already and has stored away the gtt
77
 *  offset of the BO. The GPU is not actively referencing the data at this
78
 *  offset, but it will on the next context switch. The only way to avoid this
79
 *  is to do a GPU reset.
80
 *
81
 *  An "active context' is one which was previously the "current context" and is
82
 *  on the active list waiting for the next context switch to occur. Until this
83
 *  happens, the object must remain at the same gtt offset. It is therefore
84
 *  possible to destroy a context, but it is still active.
85
 *
86
 */
87
 
88
#include 
89
#include 
90
#include "i915_drv.h"
91
 
92
/* This is a HW constraint. The value below is the largest known requirement
93
 * I've seen in a spec to date, and that was a workaround for a non-shipping
94
 * part. It should be safe to decrease this, but it's more future proof as is.
95
 */
96
#define CONTEXT_ALIGN (64<<10)
97
 
98
static struct i915_hw_context *
99
i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
100
static int do_switch(struct i915_hw_context *to);
101
 
102
static int get_context_size(struct drm_device *dev)
103
{
104
	struct drm_i915_private *dev_priv = dev->dev_private;
105
	int ret;
106
	u32 reg;
107
 
108
	switch (INTEL_INFO(dev)->gen) {
109
	case 6:
110
		reg = I915_READ(CXT_SIZE);
111
		ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
112
		break;
113
	case 7:
114
		reg = I915_READ(GEN7_CXT_SIZE);
115
		if (IS_HASWELL(dev))
4104 Serge 116
			ret = HSW_CXT_TOTAL_SIZE;
3031 serge 117
		else
118
			ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
119
		break;
120
	default:
121
		BUG();
122
	}
123
 
124
	return ret;
125
}
126
 
4104 Serge 127
void i915_gem_context_free(struct kref *ctx_ref)
3031 serge 128
{
4104 Serge 129
	struct i915_hw_context *ctx = container_of(ctx_ref,
130
						   typeof(*ctx), ref);
3031 serge 131
 
132
	drm_gem_object_unreference(&ctx->obj->base);
133
	kfree(ctx);
134
}
135
 
136
static struct i915_hw_context *
137
create_hw_context(struct drm_device *dev,
138
		  struct drm_i915_file_private *file_priv)
139
{
140
	struct drm_i915_private *dev_priv = dev->dev_private;
141
	struct i915_hw_context *ctx;
3480 Serge 142
	int ret;
3031 serge 143
 
3243 Serge 144
	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
3031 serge 145
	if (ctx == NULL)
146
		return ERR_PTR(-ENOMEM);
147
 
4104 Serge 148
	kref_init(&ctx->ref);
3031 serge 149
	ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
150
	if (ctx->obj == NULL) {
151
		kfree(ctx);
152
		DRM_DEBUG_DRIVER("Context object allocated failed\n");
153
		return ERR_PTR(-ENOMEM);
154
	}
155
 
3746 Serge 156
	if (INTEL_INFO(dev)->gen >= 7) {
157
		ret = i915_gem_object_set_cache_level(ctx->obj,
4104 Serge 158
						      I915_CACHE_L3_LLC);
159
		/* Failure shouldn't ever happen this early */
160
		if (WARN_ON(ret))
3746 Serge 161
			goto err_out;
162
	}
163
 
3031 serge 164
	/* The ring associated with the context object is handled by the normal
165
	 * object tracking code. We give an initial ring value simple to pass an
166
	 * assertion in the context switch code.
167
	 */
168
	ctx->ring = &dev_priv->ring[RCS];
169
 
170
	/* Default context will never have a file_priv */
171
	if (file_priv == NULL)
172
		return ctx;
173
 
3480 Serge 174
	ret = idr_alloc(&file_priv->context_idr, ctx, DEFAULT_CONTEXT_ID + 1, 0,
175
			GFP_KERNEL);
176
	if (ret < 0)
3031 serge 177
		goto err_out;
4104 Serge 178
 
179
	ctx->file_priv = file_priv;
3480 Serge 180
	ctx->id = ret;
3031 serge 181
 
182
	return ctx;
183
 
184
err_out:
4104 Serge 185
	i915_gem_context_unreference(ctx);
3031 serge 186
	return ERR_PTR(ret);
187
}
188
 
189
static inline bool is_default_context(struct i915_hw_context *ctx)
190
{
191
	return (ctx == ctx->ring->default_context);
192
}
193
 
194
/**
195
 * The default context needs to exist per ring that uses contexts. It stores the
196
 * context state of the GPU for applications that don't utilize HW contexts, as
197
 * well as an idle case.
198
 */
199
static int create_default_context(struct drm_i915_private *dev_priv)
200
{
201
	struct i915_hw_context *ctx;
202
	int ret;
203
 
204
	BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
205
 
206
	ctx = create_hw_context(dev_priv->dev, NULL);
207
	if (IS_ERR(ctx))
208
		return PTR_ERR(ctx);
209
 
210
	/* We may need to do things with the shrinker which require us to
211
	 * immediately switch back to the default context. This can cause a
212
	 * problem as pinning the default context also requires GTT space which
213
	 * may not be available. To avoid this we always pin the
214
	 * default context.
215
	 */
216
	dev_priv->ring[RCS].default_context = ctx;
4104 Serge 217
	ret = i915_gem_obj_ggtt_pin(ctx->obj, CONTEXT_ALIGN, false, false);
218
	if (ret) {
219
		DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret);
3031 serge 220
		goto err_destroy;
4104 Serge 221
	}
3031 serge 222
 
223
	ret = do_switch(ctx);
4104 Serge 224
	if (ret) {
225
		DRM_DEBUG_DRIVER("Switch failed %d\n", ret);
3031 serge 226
		goto err_unpin;
4104 Serge 227
	}
3031 serge 228
 
229
	DRM_DEBUG_DRIVER("Default HW context loaded\n");
230
	return 0;
231
 
232
err_unpin:
233
	i915_gem_object_unpin(ctx->obj);
234
err_destroy:
4104 Serge 235
	i915_gem_context_unreference(ctx);
3031 serge 236
	return ret;
237
}
238
 
239
void i915_gem_context_init(struct drm_device *dev)
240
{
241
	struct drm_i915_private *dev_priv = dev->dev_private;
242
 
243
	if (!HAS_HW_CONTEXTS(dev)) {
244
		dev_priv->hw_contexts_disabled = true;
4104 Serge 245
		DRM_DEBUG_DRIVER("Disabling HW Contexts; old hardware\n");
3031 serge 246
		return;
247
	}
248
 
249
	/* If called from reset, or thaw... we've been here already */
250
	if (dev_priv->hw_contexts_disabled ||
251
	    dev_priv->ring[RCS].default_context)
252
		return;
253
 
3480 Serge 254
	dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
3031 serge 255
 
3480 Serge 256
	if (dev_priv->hw_context_size > (1<<20)) {
3031 serge 257
		dev_priv->hw_contexts_disabled = true;
4104 Serge 258
		DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size\n");
3031 serge 259
		return;
260
	}
261
 
262
	if (create_default_context(dev_priv)) {
263
		dev_priv->hw_contexts_disabled = true;
4104 Serge 264
		DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed\n");
3031 serge 265
		return;
266
	}
267
 
268
	DRM_DEBUG_DRIVER("HW context support initialized\n");
269
}
270
 
271
void i915_gem_context_fini(struct drm_device *dev)
272
{
273
	struct drm_i915_private *dev_priv = dev->dev_private;
4104 Serge 274
	struct i915_hw_context *dctx = dev_priv->ring[RCS].default_context;
3031 serge 275
 
276
	if (dev_priv->hw_contexts_disabled)
277
		return;
278
 
279
	/* The only known way to stop the gpu from accessing the hw context is
280
	 * to reset it. Do this as the very last operation to avoid confusing
281
	 * other code, leading to spurious errors. */
4104 Serge 282
	intel_gpu_reset(dev);
3031 serge 283
 
4104 Serge 284
	i915_gem_object_unpin(dctx->obj);
3031 serge 285
 
4104 Serge 286
	/* When default context is created and switched to, base object refcount
287
	 * will be 2 (+1 from object creation and +1 from do_switch()).
288
	 * i915_gem_context_fini() will be called after gpu_idle() has switched
289
	 * to default context. So we need to unreference the base object once
290
	 * to offset the do_switch part, so that i915_gem_context_unreference()
291
	 * can then free the base object correctly. */
4246 Serge 292
	drm_gem_object_unreference(&dctx->obj->base);
293
	i915_gem_context_unreference(dctx);
3031 serge 294
}
295
 
296
static int context_idr_cleanup(int id, void *p, void *data)
297
{
298
	struct i915_hw_context *ctx = p;
299
 
300
	BUG_ON(id == DEFAULT_CONTEXT_ID);
301
 
4280 Serge 302
	i915_gem_context_unreference(ctx);
303
	return 0;
304
}
3031 serge 305
 
4280 Serge 306
struct i915_ctx_hang_stats *
307
i915_gem_context_get_hang_stats(struct drm_device *dev,
308
				struct drm_file *file,
309
				u32 id)
310
{
311
	struct drm_i915_private *dev_priv = dev->dev_private;
312
	struct drm_i915_file_private *file_priv = file->driver_priv;
313
	struct i915_hw_context *ctx;
4104 Serge 314
 
4280 Serge 315
	if (id == DEFAULT_CONTEXT_ID)
316
		return &file_priv->hang_stats;
317
 
318
	ctx = NULL;
319
	if (!dev_priv->hw_contexts_disabled)
320
		ctx = i915_gem_context_get(file->driver_priv, id);
321
	if (ctx == NULL)
322
		return ERR_PTR(-ENOENT);
323
 
324
	return &ctx->hang_stats;
3031 serge 325
}
326
 
327
void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
328
{
329
	struct drm_i915_file_private *file_priv = file->driver_priv;
330
 
331
	mutex_lock(&dev->struct_mutex);
4246 Serge 332
	idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
3031 serge 333
	idr_destroy(&file_priv->context_idr);
334
	mutex_unlock(&dev->struct_mutex);
335
}
336
 
337
static struct i915_hw_context *
338
i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
339
{
340
	return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
341
}
342
 
343
static inline int
344
mi_set_context(struct intel_ring_buffer *ring,
345
	       struct i915_hw_context *new_context,
346
	       u32 hw_flags)
347
{
348
	int ret;
349
 
350
	/* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
351
	 * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
352
	 * explicitly, so we rely on the value at ring init, stored in
353
	 * itlb_before_ctx_switch.
354
	 */
355
	if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
356
		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
357
		if (ret)
358
			return ret;
359
	}
360
 
361
	ret = intel_ring_begin(ring, 6);
362
	if (ret)
363
		return ret;
364
 
4104 Serge 365
	/* WaProgramMiArbOnOffAroundMiSetContext:ivb,vlv,hsw */
3031 serge 366
	if (IS_GEN7(ring->dev))
367
		intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
368
	else
369
		intel_ring_emit(ring, MI_NOOP);
370
 
371
	intel_ring_emit(ring, MI_NOOP);
372
	intel_ring_emit(ring, MI_SET_CONTEXT);
4104 Serge 373
	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->obj) |
3031 serge 374
			MI_MM_SPACE_GTT |
375
			MI_SAVE_EXT_STATE_EN |
376
			MI_RESTORE_EXT_STATE_EN |
377
			hw_flags);
378
	/* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
379
	intel_ring_emit(ring, MI_NOOP);
380
 
381
	if (IS_GEN7(ring->dev))
382
		intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
383
	else
384
		intel_ring_emit(ring, MI_NOOP);
385
 
386
	intel_ring_advance(ring);
387
 
388
	return ret;
389
}
390
 
391
static int do_switch(struct i915_hw_context *to)
392
{
393
	struct intel_ring_buffer *ring = to->ring;
4104 Serge 394
	struct i915_hw_context *from = ring->last_context;
3031 serge 395
	u32 hw_flags = 0;
396
	int ret;
397
 
4104 Serge 398
	BUG_ON(from != NULL && from->obj != NULL && from->obj->pin_count == 0);
3031 serge 399
 
4104 Serge 400
	if (from == to)
3031 serge 401
		return 0;
402
 
4104 Serge 403
	ret = i915_gem_obj_ggtt_pin(to->obj, CONTEXT_ALIGN, false, false);
3031 serge 404
	if (ret)
405
		return ret;
406
 
407
	/* Clear this page out of any CPU caches for coherent swap-in/out. Note
408
	 * that thanks to write = false in this call and us not setting any gpu
409
	 * write domains when putting a context object onto the active list
410
	 * (when switching away from it), this won't block.
411
	 * XXX: We need a real interface to do this instead of trickery. */
412
	ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
413
	if (ret) {
414
		i915_gem_object_unpin(to->obj);
415
		return ret;
416
	}
417
 
418
	if (!to->obj->has_global_gtt_mapping)
419
		i915_gem_gtt_bind_object(to->obj, to->obj->cache_level);
420
 
421
	if (!to->is_initialized || is_default_context(to))
422
		hw_flags |= MI_RESTORE_INHIBIT;
4104 Serge 423
	else if (WARN_ON_ONCE(from == to)) /* not yet expected */
3031 serge 424
		hw_flags |= MI_FORCE_RESTORE;
425
 
426
	ret = mi_set_context(ring, to, hw_flags);
427
	if (ret) {
428
		i915_gem_object_unpin(to->obj);
429
		return ret;
430
	}
431
 
432
	/* The backing object for the context is done after switching to the
433
	 * *next* context. Therefore we cannot retire the previous context until
434
	 * the next context has already started running. In fact, the below code
435
	 * is a bit suboptimal because the retiring can occur simply after the
436
	 * MI_SET_CONTEXT instead of when the next seqno has completed.
437
	 */
4104 Serge 438
	if (from != NULL) {
439
		struct drm_i915_private *dev_priv = from->obj->base.dev->dev_private;
440
		struct i915_address_space *ggtt = &dev_priv->gtt.base;
441
		from->obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
442
		list_move_tail(&i915_gem_obj_to_vma(from->obj, ggtt)->mm_list, &ggtt->active_list);
443
		i915_gem_object_move_to_active(from->obj, ring);
3031 serge 444
		/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
445
		 * whole damn pipeline, we don't need to explicitly mark the
446
		 * object dirty. The only exception is that the context must be
447
		 * correct in case the object gets swapped out. Ideally we'd be
448
		 * able to defer doing this until we know the object would be
449
		 * swapped, but there is no way to do that yet.
450
		 */
4104 Serge 451
		from->obj->dirty = 1;
452
		BUG_ON(from->obj->ring != ring);
3031 serge 453
 
4104 Serge 454
		ret = i915_add_request(ring, NULL);
455
		if (ret) {
456
			/* Too late, we've already scheduled a context switch.
457
			 * Try to undo the change so that the hw state is
458
			 * consistent with out tracking. In case of emergency,
459
			 * scream.
460
			 */
461
			WARN_ON(mi_set_context(ring, from, MI_RESTORE_INHIBIT));
462
			return ret;
463
		}
464
 
465
		i915_gem_object_unpin(from->obj);
466
		i915_gem_context_unreference(from);
3031 serge 467
	}
468
 
4104 Serge 469
	i915_gem_context_reference(to);
470
	ring->last_context = to;
3031 serge 471
	to->is_initialized = true;
472
 
473
	return 0;
474
}
475
 
476
/**
477
 * i915_switch_context() - perform a GPU context switch.
478
 * @ring: ring for which we'll execute the context switch
479
 * @file_priv: file_priv associated with the context, may be NULL
480
 * @id: context id number
481
 * @seqno: sequence number by which the new context will be switched to
482
 * @flags:
483
 *
484
 * The context life cycle is simple. The context refcount is incremented and
485
 * decremented by 1 and create and destroy. If the context is in use by the GPU,
486
 * it will have a refoucnt > 1. This allows us to destroy the context abstract
487
 * object while letting the normal object tracking destroy the backing BO.
488
 */
489
int i915_switch_context(struct intel_ring_buffer *ring,
490
			struct drm_file *file,
491
			int to_id)
492
{
493
	struct drm_i915_private *dev_priv = ring->dev->dev_private;
494
	struct i915_hw_context *to;
495
 
496
	if (dev_priv->hw_contexts_disabled)
497
		return 0;
498
 
4104 Serge 499
	WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
500
 
3031 serge 501
	if (ring != &dev_priv->ring[RCS])
502
		return 0;
503
 
504
	if (to_id == DEFAULT_CONTEXT_ID) {
505
		to = ring->default_context;
506
	} else {
507
		if (file == NULL)
508
			return -EINVAL;
509
 
510
		to = i915_gem_context_get(file->driver_priv, to_id);
511
		if (to == NULL)
512
			return -ENOENT;
513
	}
514
 
515
	return do_switch(to);
516
}
517
 
518
int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
519
				  struct drm_file *file)
520
{
521
	struct drm_i915_private *dev_priv = dev->dev_private;
522
	struct drm_i915_gem_context_create *args = data;
523
	struct drm_i915_file_private *file_priv = file->driver_priv;
524
	struct i915_hw_context *ctx;
525
	int ret;
526
 
527
	if (!(dev->driver->driver_features & DRIVER_GEM))
528
		return -ENODEV;
529
 
530
	if (dev_priv->hw_contexts_disabled)
531
		return -ENODEV;
532
 
533
	ret = i915_mutex_lock_interruptible(dev);
534
	if (ret)
535
		return ret;
536
 
537
	ctx = create_hw_context(dev, file_priv);
538
	mutex_unlock(&dev->struct_mutex);
539
	if (IS_ERR(ctx))
540
		return PTR_ERR(ctx);
541
 
542
	args->ctx_id = ctx->id;
543
	DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
544
 
545
	return 0;
546
}
547
 
548
int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
549
				   struct drm_file *file)
550
{
551
	struct drm_i915_gem_context_destroy *args = data;
552
	struct drm_i915_file_private *file_priv = file->driver_priv;
553
	struct i915_hw_context *ctx;
554
	int ret;
555
 
556
	if (!(dev->driver->driver_features & DRIVER_GEM))
557
		return -ENODEV;
558
 
559
	ret = i915_mutex_lock_interruptible(dev);
560
	if (ret)
561
		return ret;
562
 
563
	ctx = i915_gem_context_get(file_priv, args->ctx_id);
564
	if (!ctx) {
565
		mutex_unlock(&dev->struct_mutex);
566
		return -ENOENT;
567
	}
568
 
4246 Serge 569
	idr_remove(&ctx->file_priv->context_idr, ctx->id);
570
	i915_gem_context_unreference(ctx);
3031 serge 571
	mutex_unlock(&dev->struct_mutex);
572
 
573
	DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
574
	return 0;
575
}