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2325 | Serge | 1 | /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*- |
2 | */ |
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3 | /* |
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4 | * |
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5 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
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6 | * All Rights Reserved. |
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7 | * |
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8 | * Permission is hereby granted, free of charge, to any person obtaining a |
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9 | * copy of this software and associated documentation files (the |
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10 | * "Software"), to deal in the Software without restriction, including |
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11 | * without limitation the rights to use, copy, modify, merge, publish, |
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12 | * distribute, sub license, and/or sell copies of the Software, and to |
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13 | * permit persons to whom the Software is furnished to do so, subject to |
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14 | * the following conditions: |
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15 | * |
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16 | * The above copyright notice and this permission notice (including the |
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17 | * next paragraph) shall be included in all copies or substantial portions |
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18 | * of the Software. |
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19 | * |
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20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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21 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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22 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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23 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
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24 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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25 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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26 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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27 | * |
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28 | */ |
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29 | |||
2330 | Serge | 30 | //#include |
3031 | serge | 31 | #include |
32 | #include |
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2330 | Serge | 33 | #include "i915_drv.h" |
4126 | Serge | 34 | #include "i915_trace.h" |
2330 | Serge | 35 | #include "intel_drv.h" |
2325 | Serge | 36 | |
37 | #include |
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38 | #include |
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39 | #include |
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40 | #include |
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41 | |||
3031 | serge | 42 | #include |
43 | |||
2325 | Serge | 44 | #include |
45 | |||
2330 | Serge | 46 | #define __read_mostly |
2327 | Serge | 47 | |
2338 | Serge | 48 | int init_display_kms(struct drm_device *dev); |
2330 | Serge | 49 | |
3031 | serge | 50 | static int i915_modeset __read_mostly = 1; |
3480 | Serge | 51 | module_param_named(modeset, i915_modeset, int, 0400); |
3031 | serge | 52 | MODULE_PARM_DESC(modeset, |
53 | "Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, " |
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54 | "1=on, -1=force vga console preference [default])"); |
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55 | |||
3746 | Serge | 56 | unsigned int i915_fbpercrtc __always_unused = 0; |
57 | module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400); |
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3031 | serge | 58 | |
3480 | Serge | 59 | int i915_panel_ignore_lid __read_mostly = 1; |
60 | module_param_named(panel_ignore_lid, i915_panel_ignore_lid, int, 0600); |
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3031 | serge | 61 | MODULE_PARM_DESC(panel_ignore_lid, |
3480 | Serge | 62 | "Override lid status (0=autodetect, 1=autodetect disabled [default], " |
63 | "-1=force lid closed, -2=force lid open)"); |
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2330 | Serge | 64 | |
4280 | Serge | 65 | unsigned int i915_powersave __read_mostly = 0; |
3480 | Serge | 66 | module_param_named(powersave, i915_powersave, int, 0600); |
3031 | serge | 67 | MODULE_PARM_DESC(powersave, |
68 | "Enable powersavings, fbc, downclocking, etc. (default: true)"); |
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2330 | Serge | 69 | |
3031 | serge | 70 | int i915_semaphores __read_mostly = -1; |
3480 | Serge | 71 | module_param_named(semaphores, i915_semaphores, int, 0600); |
3031 | serge | 72 | MODULE_PARM_DESC(semaphores, |
73 | "Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))"); |
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2330 | Serge | 74 | |
4280 | Serge | 75 | int i915_enable_rc6 __read_mostly = 0; |
3480 | Serge | 76 | module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0400); |
3031 | serge | 77 | MODULE_PARM_DESC(i915_enable_rc6, |
78 | "Enable power-saving render C-state 6. " |
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79 | "Different stages can be selected via bitmask values " |
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80 | "(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). " |
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81 | "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. " |
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82 | "default: -1 (use per-chip default)"); |
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83 | |||
4280 | Serge | 84 | int i915_enable_fbc __read_mostly = 0; |
3480 | Serge | 85 | module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600); |
3031 | serge | 86 | MODULE_PARM_DESC(i915_enable_fbc, |
87 | "Enable frame buffer compression for power savings " |
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88 | "(default: -1 (use per-chip default))"); |
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89 | |||
2330 | Serge | 90 | unsigned int i915_lvds_downclock __read_mostly = 0; |
3480 | Serge | 91 | module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400); |
3031 | serge | 92 | MODULE_PARM_DESC(lvds_downclock, |
93 | "Use panel (LVDS/eDP) downclocking for power savings " |
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94 | "(default: false)"); |
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2330 | Serge | 95 | |
3031 | serge | 96 | int i915_lvds_channel_mode __read_mostly; |
3480 | Serge | 97 | module_param_named(lvds_channel_mode, i915_lvds_channel_mode, int, 0600); |
3031 | serge | 98 | MODULE_PARM_DESC(lvds_channel_mode, |
99 | "Specify LVDS channel mode " |
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100 | "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)"); |
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2330 | Serge | 101 | |
3031 | serge | 102 | int i915_panel_use_ssc __read_mostly = -1; |
3480 | Serge | 103 | module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600); |
3031 | serge | 104 | MODULE_PARM_DESC(lvds_use_ssc, |
105 | "Use Spread Spectrum Clock with panels [LVDS/eDP] " |
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106 | "(default: auto from VBT)"); |
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107 | |||
2332 | Serge | 108 | int i915_vbt_sdvo_panel_type __read_mostly = -1; |
3480 | Serge | 109 | module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600); |
3031 | serge | 110 | MODULE_PARM_DESC(vbt_sdvo_panel_type, |
111 | "Override/Ignore selection of SDVO panel mode in the VBT " |
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112 | "(-2=ignore, -1=auto [default], index in VBT BIOS table)"); |
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2330 | Serge | 113 | |
3031 | serge | 114 | static bool i915_try_reset __read_mostly = true; |
3480 | Serge | 115 | module_param_named(reset, i915_try_reset, bool, 0600); |
3031 | serge | 116 | MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)"); |
117 | |||
118 | bool i915_enable_hangcheck __read_mostly = false; |
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3480 | Serge | 119 | module_param_named(enable_hangcheck, i915_enable_hangcheck, bool, 0644); |
3031 | serge | 120 | MODULE_PARM_DESC(enable_hangcheck, |
121 | "Periodically check GPU activity for detecting hangs. " |
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122 | "WARNING: Disabling this can cause system wide hangs. " |
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123 | "(default: true)"); |
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124 | |||
3746 | Serge | 125 | int i915_enable_ppgtt __read_mostly = 0; |
3480 | Serge | 126 | module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600); |
3031 | serge | 127 | MODULE_PARM_DESC(i915_enable_ppgtt, |
128 | "Enable PPGTT (default: true)"); |
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129 | |||
4104 | Serge | 130 | int i915_enable_psr __read_mostly = 0; |
131 | module_param_named(enable_psr, i915_enable_psr, int, 0600); |
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132 | MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)"); |
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133 | |||
134 | unsigned int i915_preliminary_hw_support __read_mostly = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT); |
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3480 | Serge | 135 | module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600); |
3031 | serge | 136 | MODULE_PARM_DESC(preliminary_hw_support, |
4104 | Serge | 137 | "Enable preliminary hardware support."); |
3031 | serge | 138 | |
4126 | Serge | 139 | int i915_disable_power_well __read_mostly = 1; |
3482 | Serge | 140 | module_param_named(disable_power_well, i915_disable_power_well, int, 0600); |
141 | MODULE_PARM_DESC(disable_power_well, |
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4104 | Serge | 142 | "Disable the power well when possible (default: true)"); |
3031 | serge | 143 | |
4104 | Serge | 144 | int i915_enable_ips __read_mostly = 1; |
145 | module_param_named(enable_ips, i915_enable_ips, int, 0600); |
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146 | MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)"); |
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147 | |||
148 | bool i915_fastboot __read_mostly = 0; |
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149 | module_param_named(fastboot, i915_fastboot, bool, 0600); |
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150 | MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time " |
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151 | "(default: false)"); |
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152 | |||
4280 | Serge | 153 | int i915_enable_pc8 __read_mostly = 0; |
4104 | Serge | 154 | module_param_named(enable_pc8, i915_enable_pc8, int, 0600); |
155 | MODULE_PARM_DESC(enable_pc8, "Enable support for low power package C states (PC8+) (default: true)"); |
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156 | |||
157 | int i915_pc8_timeout __read_mostly = 5000; |
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158 | module_param_named(pc8_timeout, i915_pc8_timeout, int, 0600); |
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159 | MODULE_PARM_DESC(pc8_timeout, "Number of msecs of idleness required to enter PC8+ (default: 5000)"); |
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160 | |||
161 | bool i915_prefault_disable __read_mostly; |
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162 | module_param_named(prefault_disable, i915_prefault_disable, bool, 0600); |
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163 | MODULE_PARM_DESC(prefault_disable, |
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164 | "Disable page prefaulting for pread/pwrite/reloc (default:false). For developers only."); |
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165 | |||
166 | static struct drm_driver driver; |
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167 | extern int intel_agp_enabled; |
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168 | |||
2326 | Serge | 169 | #define PCI_VENDOR_ID_INTEL 0x8086 |
170 | |||
2325 | Serge | 171 | |
2339 | Serge | 172 | static const struct intel_device_info intel_i915g_info = { |
3746 | Serge | 173 | .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2, |
2339 | Serge | 174 | .has_overlay = 1, .overlay_needs_physical = 1, |
175 | }; |
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176 | static const struct intel_device_info intel_i915gm_info = { |
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3746 | Serge | 177 | .gen = 3, .is_mobile = 1, .num_pipes = 2, |
2339 | Serge | 178 | .cursor_needs_physical = 1, |
179 | .has_overlay = 1, .overlay_needs_physical = 1, |
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180 | .supports_tv = 1, |
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181 | }; |
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182 | static const struct intel_device_info intel_i945g_info = { |
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3746 | Serge | 183 | .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2, |
2339 | Serge | 184 | .has_overlay = 1, .overlay_needs_physical = 1, |
185 | }; |
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186 | static const struct intel_device_info intel_i945gm_info = { |
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3746 | Serge | 187 | .gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2, |
2339 | Serge | 188 | .has_hotplug = 1, .cursor_needs_physical = 1, |
189 | .has_overlay = 1, .overlay_needs_physical = 1, |
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190 | .supports_tv = 1, |
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191 | }; |
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