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2325 | Serge | 1 | /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*- |
2 | */ |
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3 | /* |
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4 | * |
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5 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
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6 | * All Rights Reserved. |
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7 | * |
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8 | * Permission is hereby granted, free of charge, to any person obtaining a |
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9 | * copy of this software and associated documentation files (the |
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10 | * "Software"), to deal in the Software without restriction, including |
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11 | * without limitation the rights to use, copy, modify, merge, publish, |
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12 | * distribute, sub license, and/or sell copies of the Software, and to |
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13 | * permit persons to whom the Software is furnished to do so, subject to |
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14 | * the following conditions: |
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15 | * |
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16 | * The above copyright notice and this permission notice (including the |
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17 | * next paragraph) shall be included in all copies or substantial portions |
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18 | * of the Software. |
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19 | * |
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20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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21 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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22 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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23 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
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24 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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25 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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26 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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27 | * |
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28 | */ |
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29 | |||
2330 | Serge | 30 | //#include |
3031 | serge | 31 | #include |
32 | #include |
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2330 | Serge | 33 | #include "i915_drv.h" |
34 | #include "intel_drv.h" |
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2325 | Serge | 35 | |
36 | #include |
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37 | #include |
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38 | #include |
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39 | #include |
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40 | #include |
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41 | |||
3031 | serge | 42 | #include |
43 | |||
2325 | Serge | 44 | #include |
45 | |||
2330 | Serge | 46 | #define __read_mostly |
2327 | Serge | 47 | |
2338 | Serge | 48 | int init_display_kms(struct drm_device *dev); |
2330 | Serge | 49 | |
2340 | Serge | 50 | struct drm_device *main_device; |
2338 | Serge | 51 | |
3255 | Serge | 52 | struct drm_file *drm_file_handlers[256]; |
53 | |||
3031 | serge | 54 | static int i915_modeset __read_mostly = 1; |
55 | MODULE_PARM_DESC(modeset, |
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56 | "Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, " |
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57 | "1=on, -1=force vga console preference [default])"); |
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58 | |||
59 | |||
2332 | Serge | 60 | int i915_panel_ignore_lid __read_mostly = 0; |
3031 | serge | 61 | MODULE_PARM_DESC(panel_ignore_lid, |
62 | "Override lid status (0=autodetect [default], 1=lid open, " |
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63 | "-1=lid closed)"); |
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2330 | Serge | 64 | |
2332 | Serge | 65 | unsigned int i915_powersave __read_mostly = 0; |
3031 | serge | 66 | MODULE_PARM_DESC(powersave, |
67 | "Enable powersavings, fbc, downclocking, etc. (default: true)"); |
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2330 | Serge | 68 | |
3031 | serge | 69 | int i915_semaphores __read_mostly = -1; |
2330 | Serge | 70 | |
3031 | serge | 71 | MODULE_PARM_DESC(semaphores, |
72 | "Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))"); |
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2330 | Serge | 73 | |
3031 | serge | 74 | int i915_enable_rc6 __read_mostly = 0; |
75 | MODULE_PARM_DESC(i915_enable_rc6, |
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76 | "Enable power-saving render C-state 6. " |
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77 | "Different stages can be selected via bitmask values " |
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78 | "(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). " |
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79 | "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. " |
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80 | "default: -1 (use per-chip default)"); |
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81 | |||
82 | int i915_enable_fbc __read_mostly = 0; |
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83 | MODULE_PARM_DESC(i915_enable_fbc, |
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84 | "Enable frame buffer compression for power savings " |
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85 | "(default: -1 (use per-chip default))"); |
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86 | |||
2330 | Serge | 87 | unsigned int i915_lvds_downclock __read_mostly = 0; |
3031 | serge | 88 | MODULE_PARM_DESC(lvds_downclock, |
89 | "Use panel (LVDS/eDP) downclocking for power savings " |
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90 | "(default: false)"); |
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2330 | Serge | 91 | |
3031 | serge | 92 | int i915_lvds_channel_mode __read_mostly; |
93 | MODULE_PARM_DESC(lvds_channel_mode, |
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94 | "Specify LVDS channel mode " |
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95 | "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)"); |
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2330 | Serge | 96 | |
3031 | serge | 97 | int i915_panel_use_ssc __read_mostly = -1; |
98 | MODULE_PARM_DESC(lvds_use_ssc, |
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99 | "Use Spread Spectrum Clock with panels [LVDS/eDP] " |
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100 | "(default: auto from VBT)"); |
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101 | |||
2332 | Serge | 102 | int i915_vbt_sdvo_panel_type __read_mostly = -1; |
3031 | serge | 103 | MODULE_PARM_DESC(vbt_sdvo_panel_type, |
104 | "Override/Ignore selection of SDVO panel mode in the VBT " |
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105 | "(-2=ignore, -1=auto [default], index in VBT BIOS table)"); |
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2330 | Serge | 106 | |
3031 | serge | 107 | static bool i915_try_reset __read_mostly = true; |
108 | MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)"); |
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109 | |||
110 | bool i915_enable_hangcheck __read_mostly = false; |
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111 | MODULE_PARM_DESC(enable_hangcheck, |
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112 | "Periodically check GPU activity for detecting hangs. " |
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113 | "WARNING: Disabling this can cause system wide hangs. " |
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114 | "(default: true)"); |
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115 | |||
116 | int i915_enable_ppgtt __read_mostly = false; |
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117 | MODULE_PARM_DESC(i915_enable_ppgtt, |
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118 | "Enable PPGTT (default: true)"); |
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119 | |||
120 | unsigned int i915_preliminary_hw_support __read_mostly = true; |
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121 | MODULE_PARM_DESC(preliminary_hw_support, |
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122 | "Enable preliminary hardware support. " |
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123 | "Enable Haswell and ValleyView Support. " |
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124 | "(default: false)"); |
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125 | |||
126 | |||
2326 | Serge | 127 | #define PCI_VENDOR_ID_INTEL 0x8086 |
128 | |||
2325 | Serge | 129 | #define INTEL_VGA_DEVICE(id, info) { \ |
2342 | Serge | 130 | .class = PCI_BASE_CLASS_DISPLAY << 16, \ |
2325 | Serge | 131 | .class_mask = 0xff0000, \ |
132 | .vendor = 0x8086, \ |
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133 | .device = id, \ |
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134 | .subvendor = PCI_ANY_ID, \ |
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135 | .subdevice = PCI_ANY_ID, \ |
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136 | .driver_data = (unsigned long) info } |
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137 | |||
2339 | Serge | 138 | |
139 | static const struct intel_device_info intel_i915g_info = { |
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140 | .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, |
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141 | .has_overlay = 1, .overlay_needs_physical = 1, |
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142 | }; |
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143 | static const struct intel_device_info intel_i915gm_info = { |
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144 | .gen = 3, .is_mobile = 1, |
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145 | .cursor_needs_physical = 1, |
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146 | .has_overlay = 1, .overlay_needs_physical = 1, |
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147 | .supports_tv = 1, |
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148 | }; |
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149 | static const struct intel_device_info intel_i945g_info = { |
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150 | .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, |
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151 | .has_overlay = 1, .overlay_needs_physical = 1, |
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152 | }; |
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153 | static const struct intel_device_info intel_i945gm_info = { |
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154 | .gen = 3, .is_i945gm = 1, .is_mobile = 1, |
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155 | .has_hotplug = 1, .cursor_needs_physical = 1, |
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156 | .has_overlay = 1, .overlay_needs_physical = 1, |
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157 | .supports_tv = 1, |
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158 | }; |
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159 | |||
160 | static const struct intel_device_info intel_i965g_info = { |
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161 | .gen = 4, .is_broadwater = 1, |
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162 | .has_hotplug = 1, |
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163 | .has_overlay = 1, |
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164 | }; |
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165 | |||
166 | static const struct intel_device_info intel_i965gm_info = { |
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167 | .gen = 4, .is_crestline = 1, |
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168 | .is_mobile = 1, .has_fbc = 1, .has_hotplug = 1, |
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169 | .has_overlay = 1, |
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170 | .supports_tv = 1, |
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171 | }; |
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172 | |||
173 | static const struct intel_device_info intel_g33_info = { |
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174 | .gen = 3, .is_g33 = 1, |
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175 | .need_gfx_hws = 1, .has_hotplug = 1, |
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176 | .has_overlay = 1, |
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177 | }; |
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178 | |||
179 | static const struct intel_device_info intel_g45_info = { |
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180 | .gen = 4, .is_g4x = 1, .need_gfx_hws = 1, |
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181 | .has_pipe_cxsr = 1, .has_hotplug = 1, |
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182 | .has_bsd_ring = 1, |
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183 | }; |
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184 | |||
185 | static const struct intel_device_info intel_gm45_info = { |
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186 | .gen = 4, .is_g4x = 1, |
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187 | .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, |
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188 | .has_pipe_cxsr = 1, .has_hotplug = 1, |
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189 | .supports_tv = 1, |
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190 | .has_bsd_ring = 1, |
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191 | }; |
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192 | |||
193 | static const struct intel_device_info intel_pineview_info = { |
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194 | .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, |
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195 | .need_gfx_hws = 1, .has_hotplug = 1, |
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196 | .has_overlay = 1, |
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197 | }; |
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198 | |||
199 | static const struct intel_device_info intel_ironlake_d_info = { |
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200 | .gen = 5, |
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3031 | serge | 201 | .need_gfx_hws = 1, .has_hotplug = 1, |
2339 | Serge | 202 | .has_bsd_ring = 1, |
203 | }; |
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204 | |||
205 | static const struct intel_device_info intel_ironlake_m_info = { |
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206 | .gen = 5, .is_mobile = 1, |
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207 | .need_gfx_hws = 1, .has_hotplug = 1, |
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208 | .has_fbc = 1, |
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209 | .has_bsd_ring = 1, |
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210 | }; |
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211 | |||
2325 | Serge | 212 | static const struct intel_device_info intel_sandybridge_d_info = { |
213 | .gen = 6, |
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2330 | Serge | 214 | .need_gfx_hws = 1, .has_hotplug = 1, |
2325 | Serge | 215 | .has_bsd_ring = 1, |
216 | .has_blt_ring = 1, |
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3031 | serge | 217 | .has_llc = 1, |
218 | .has_force_wake = 1, |
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2325 | Serge | 219 | }; |
220 | |||
221 | static const struct intel_device_info intel_sandybridge_m_info = { |
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2330 | Serge | 222 | .gen = 6, .is_mobile = 1, |
223 | .need_gfx_hws = 1, .has_hotplug = 1, |
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2325 | Serge | 224 | .has_fbc = 1, |
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