Subversion Repositories Kolibri OS

Rev

Rev 2332 | Rev 2338 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
2325 Serge 1
 
2
 */
3
/*
4
 *
5
 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6
 * All Rights Reserved.
7
 *
8
 * Permission is hereby granted, free of charge, to any person obtaining a
9
 * copy of this software and associated documentation files (the
10
 * "Software"), to deal in the Software without restriction, including
11
 * without limitation the rights to use, copy, modify, merge, publish,
12
 * distribute, sub license, and/or sell copies of the Software, and to
13
 * permit persons to whom the Software is furnished to do so, subject to
14
 * the following conditions:
15
 *
16
 * The above copyright notice and this permission notice (including the
17
 * next paragraph) shall be included in all copies or substantial portions
18
 * of the Software.
19
 *
20
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23
 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24
 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
 *
28
 */
29
30
 
2330 Serge 31
#include "drmP.h"
32
#include "drm.h"
33
#include "i915_drm.h"
34
#include "i915_drv.h"
35
#include "intel_drv.h"
36
2325 Serge 37
 
2330 Serge 38
 
2325 Serge 39
#include 
40
#include 
41
#include 
42
#include 
43
44
 
45
46
 
2330 Serge 47
2327 Serge 48
 
2330 Serge 49
 
2332 Serge 50
2330 Serge 51
 
2332 Serge 52
2330 Serge 53
 
2332 Serge 54
2330 Serge 55
 
2336 Serge 56
2330 Serge 57
 
58
59
 
2332 Serge 60
2330 Serge 61
 
2332 Serge 62
2330 Serge 63
 
2326 Serge 64
65
 
2325 Serge 66
    .class = PCI_CLASS_DISPLAY_VGA << 8,    \
67
    .class_mask = 0xff0000,                 \
68
    .vendor = 0x8086,                       \
69
    .device = id,                           \
70
    .subvendor = PCI_ANY_ID,                \
71
    .subdevice = PCI_ANY_ID,                \
72
    .driver_data = (unsigned long) info }
73
74
 
75
    .gen = 6,
76
	.need_gfx_hws = 1, .has_hotplug = 1,
2330 Serge 77
    .has_bsd_ring = 1,
2325 Serge 78
    .has_blt_ring = 1,
79
};
80
81
 
82
	.gen = 6, .is_mobile = 1,
2330 Serge 83
	.need_gfx_hws = 1, .has_hotplug = 1,
84
    .has_fbc      = 1,
2325 Serge 85
    .has_bsd_ring = 1,
86
    .has_blt_ring = 1,
87
};
88
89
 
90
 
91
    INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
92
    INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
93
    INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
94
    INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
95
    INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
96
    INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
97
    INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
98
    {0, 0, 0}
99
};
100
101
 
2326 Serge 102
#define INTEL_PCH_IBX_DEVICE_ID_TYPE    0x3b00
103
#define INTEL_PCH_CPT_DEVICE_ID_TYPE    0x1c00
104
#define INTEL_PCH_PPT_DEVICE_ID_TYPE    0x1e00
105
2325 Serge 106
 
2326 Serge 107
{
108
    struct drm_i915_private *dev_priv = dev->dev_private;
109
    struct pci_dev *pch;
110
111
 
112
     * The reason to probe ISA bridge instead of Dev31:Fun0 is to
113
     * make graphics device passthrough work easy for VMM, that only
114
     * need to expose ISA bridge to let driver know the real hardware
115
     * underneath. This is a requirement from virtualization team.
116
     */
117
    pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
118
    if (pch) {
119
        if (pch->vendor == PCI_VENDOR_ID_INTEL) {
120
            int id;
121
            id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
122
123
 
124
                dev_priv->pch_type = PCH_IBX;
125
                DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
126
            } else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
127
                dev_priv->pch_type = PCH_CPT;
128
                DRM_DEBUG_KMS("Found CougarPoint PCH\n");
129
            } else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
130
                /* PantherPoint is CPT compatible */
131
                dev_priv->pch_type = PCH_CPT;
132
                DRM_DEBUG_KMS("Found PatherPoint PCH\n");
133
            }
134
        }
135
    }
136
}
137
138
 
139
{
140
    int count;
141
142
 
143
    while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
144
        udelay(10);
145
146
 
147
    POSTING_READ(FORCEWAKE);
148
149
 
150
    while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
151
        udelay(10);
152
}
153
154
 
155
 * Generally this is called implicitly by the register read function. However,
156
 * if some sequence requires the GT to not power down then this function should
157
 * be called at the beginning of the sequence followed by a call to
158
 * gen6_gt_force_wake_put() at the end of the sequence.
159
 */
160
void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
161
{
162
//    WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
163
164
 
165
    if (atomic_add_return(1, &dev_priv->forcewake_count) == 1)
166
        __gen6_gt_force_wake_get(dev_priv);
167
}
168
169
 
170
{
171
    I915_WRITE_NOTRACE(FORCEWAKE, 0);
172
    POSTING_READ(FORCEWAKE);
173
}
174
175
 
176
 * see gen6_gt_force_wake_get()
177
 */
178
void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
179
{
180
//    WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
181
182
 
183
        __gen6_gt_force_wake_put(dev_priv);
184
}
185
186
 
187
{
188
    if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) {
189
        int loop = 500;
190
        u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
191
        while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
192
            udelay(10);
193
            fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
194
        }
195
//        WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES);
196
        dev_priv->gt_fifo_count = fifo;
197
    }
198
    dev_priv->gt_fifo_count--;
199
}
200
201
 
202
 
203
 
204
 
205
 
2325 Serge 206
207
 
208
{
209
    static pci_dev_t device;
210
    const struct pci_device_id  *ent;
211
    int  err;
212
213
 
214
    {
215
        DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
216
        return 0;
217
    };
218
219
 
220
221
 
222
    {
223
        dbgprintf("device not found\n");
224
        return 0;
225
    };
226
227
 
228
                                device.pci_dev.device);
229
230
 
231
232
 
233
}
234
235
 
236
{
237
    static struct drm_device *dev;
238
    int ret;
239
240
 
241
242
 
243
    if (!dev)
244
        return -ENOMEM;
245
246
 
247
 //   if (ret)
248
 //       goto err_g1;
249
250
 
251
252
 
253
 //       printk(KERN_ERR "DRM: Fill_in_dev failed.\n");
254
 //       goto err_g2;
255
 //   }
256
257
 
258
    dev->pci_device = pdev->device;
259
    dev->pci_vendor = pdev->vendor;
260
261
 
262
    INIT_LIST_HEAD(&dev->ctxlist);
263
    INIT_LIST_HEAD(&dev->vmalist);
264
    INIT_LIST_HEAD(&dev->maplist);
265
266
 
267
    mutex_init(&dev->struct_mutex);
268
    mutex_init(&dev->ctxlist_mutex);
269
270
 
2336 Serge 271
2325 Serge 272
 
2336 Serge 273
        struct drm_connector  *connector;
274
        struct drm_connector_helper_funcs *connector_funcs;
275
2330 Serge 276
 
2336 Serge 277
        struct drm_encoder    *encoder;
278
        struct drm_crtc       *crtc;
279
280
 
281
        char *con_name;
282
        char *enc_name;
283
284
 
285
        {
286
            if( connector->status != connector_status_connected)
287
                continue;
288
289
 
290
            encoder = connector_funcs->best_encoder(connector);
291
            if( encoder == NULL)
292
            {
293
                dbgprintf("CONNECTOR %x ID: %d no active encoders\n",
294
                          connector, connector->base.id);
295
                continue;
296
            }
297
            connector->encoder = encoder;
298
299
 
300
                   connector, connector->base.id,
301
                   connector->status, connector->encoder,
302
                   encoder->crtc);
303
304
 
305
            crtc = encoder->crtc;
306
307
 
308
        };
309
310
 
311
 
312
        {
313
            struct drm_crtc *tmp_crtc;
314
            int crtc_mask = 1;
315
316
 
317
            {
318
                if (encoder->possible_crtcs & crtc_mask)
319
                {
320
                    crtc = tmp_crtc;
321
                    encoder->crtc = crtc;
322
                    break;
323
                };
324
                crtc_mask <<= 1;
325
            };
326
327
 
328
            {
329
                dbgprintf("No CRTC for encoder %d\n", encoder->base.id);
330
                goto out;
331
            }
332
        };
333
        DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);
334
335
 
336
        struct drm_fb_helper *fb_helper = &dev_priv->fbdev->helper;
337
        struct drm_display_mode  *mode = NULL, *tmpmode;
338
339
 
340
        {
341
            if( (drm_mode_width(tmpmode)    == 1024)  &&
342
                (drm_mode_height(tmpmode)   == 768) &&
343
                (drm_mode_vrefresh(tmpmode) == 60) )
344
            {
345
                mode = tmpmode;
346
                goto do_set;
347
            }
348
        };
349
        if( (mode == NULL) )
350
        {
351
            list_for_each_entry(tmpmode, &connector->modes, head)
352
            {
353
                if( (drm_mode_width(tmpmode)  == 1024)  &&
354
                    (drm_mode_height(tmpmode) == 768) )
355
                {
356
                    mode = tmpmode;
357
                    goto do_set;
358
                }
359
            };
360
        };
361
        goto out;
362
363
 
364
        {
365
366
 
367
368
 
369
{
370
    int  x;
371
    int  y;
372
    int  width;
373
    int  height;
374
    int  bpp;
375
    int  vrefresh;
376
    int  pitch;
377
    int  lfb;
378
379
 
380
    struct drm_device    *ddev;
381
    struct drm_connector *connector;
382
    struct drm_crtc      *crtc;
383
384
 
385
386
 
387
388
 
389
390
 
391
            enc_name = drm_get_encoder_name(encoder);
392
393
 
394
                       1024, 768, con_name, enc_name);
395
396
 
397
398
 
399
            fb->height = 768;
400
            fb->pitch  = ALIGN(1024* ((32 + 7) / 8), 64);
401
            fb->bits_per_pixel = 32;
402
            fb->depth == 24;
403
404
 
405
            crtc->enabled = true;
406
407
 
408
409
 
410
            {
411
                rdisplay->width    = fb->width;
412
                rdisplay->height   = fb->height;
413
                rdisplay->pitch    = fb->pitch;
414
                rdisplay->vrefresh = drm_mode_vrefresh(mode);
415
416
 
417
418
 
419
                           fb->width, fb->height, fb->pitch);
420
            }
421
            else
422
                DRM_ERROR("failed to set mode %d_%d on crtc %p\n",
423
                       fb->width, fb->height, crtc);
424
        };
425
    };
426
427
 
428
429
 
2325 Serge 430
//        goto err_g4;
431
432
 
433
//        init_display_kms(dev->dev_private, &usermode);
434
//    else
435
//        init_display(dev->dev_private, &usermode);
436
437
 
438
439
 
440
441
 
442
//    drm_put_minor(&dev->primary);
443
//err_g3:
444
//    if (drm_core_check_feature(dev, DRIVER_MODESET))
445
//        drm_put_minor(&dev->control);
446
//err_g2:
447
//    pci_disable_device(pdev);
448
//err_g1:
449
    free(dev);
450
451
 
452
453
 
454
}
455