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3031 | serge | 1 | /* |
2 | * |
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3 | * Copyright (c) 2012 Gilles Dartiguelongue, Thomas Richter |
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4 | * |
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5 | * All Rights Reserved. |
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6 | * |
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7 | * Permission is hereby granted, free of charge, to any person obtaining a |
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8 | * copy of this software and associated documentation files (the |
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9 | * "Software"), to deal in the Software without restriction, including |
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10 | * without limitation the rights to use, copy, modify, merge, publish, |
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11 | * distribute, sub license, and/or sell copies of the Software, and to |
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12 | * permit persons to whom the Software is furnished to do so, subject to |
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13 | * the following conditions: |
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14 | * |
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15 | * The above copyright notice and this permission notice (including the |
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16 | * next paragraph) shall be included in all copies or substantial portions |
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17 | * of the Software. |
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18 | * |
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19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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22 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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23 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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24 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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25 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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26 | * |
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27 | */ |
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28 | |||
29 | #include "dvo.h" |
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30 | #include "i915_reg.h" |
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31 | #include "i915_drv.h" |
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32 | |||
33 | #define NS2501_VID 0x1305 |
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34 | #define NS2501_DID 0x6726 |
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35 | |||
36 | #define NS2501_VID_LO 0x00 |
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37 | #define NS2501_VID_HI 0x01 |
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38 | #define NS2501_DID_LO 0x02 |
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39 | #define NS2501_DID_HI 0x03 |
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40 | #define NS2501_REV 0x04 |
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41 | #define NS2501_RSVD 0x05 |
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42 | #define NS2501_FREQ_LO 0x06 |
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43 | #define NS2501_FREQ_HI 0x07 |
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44 | |||
45 | #define NS2501_REG8 0x08 |
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46 | #define NS2501_8_VEN (1<<5) |
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47 | #define NS2501_8_HEN (1<<4) |
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48 | #define NS2501_8_DSEL (1<<3) |
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49 | #define NS2501_8_BPAS (1<<2) |
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50 | #define NS2501_8_RSVD (1<<1) |
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51 | #define NS2501_8_PD (1<<0) |
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52 | |||
53 | #define NS2501_REG9 0x09 |
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54 | #define NS2501_9_VLOW (1<<7) |
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55 | #define NS2501_9_MSEL_MASK (0x7<<4) |
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56 | #define NS2501_9_TSEL (1<<3) |
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57 | #define NS2501_9_RSEN (1<<2) |
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58 | #define NS2501_9_RSVD (1<<1) |
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59 | #define NS2501_9_MDI (1<<0) |
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60 | |||
61 | #define NS2501_REGC 0x0c |
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62 | |||
63 | struct ns2501_priv { |
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64 | //I2CDevRec d; |
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65 | bool quiet; |
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66 | int reg_8_shadow; |
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67 | int reg_8_set; |
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68 | // Shadow registers for i915 |
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69 | int dvoc; |
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70 | int pll_a; |
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71 | int srcdim; |
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72 | int fw_blc; |
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73 | }; |
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74 | |||
75 | #define NSPTR(d) ((NS2501Ptr)(d->DriverPrivate.ptr)) |
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76 | |||
77 | /* |
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78 | * For reasons unclear to me, the ns2501 at least on the Fujitsu/Siemens |
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79 | * laptops does not react on the i2c bus unless |
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80 | * both the PLL is running and the display is configured in its native |
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81 | * resolution. |
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82 | * This function forces the DVO on, and stores the registers it touches. |
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83 | * Afterwards, registers are restored to regular values. |
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84 | * |
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85 | * This is pretty much a hack, though it works. |
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86 | * Without that, ns2501_readb and ns2501_writeb fail |
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87 | * when switching the resolution. |
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88 | */ |
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89 | |||
90 | static void enable_dvo(struct intel_dvo_device *dvo) |
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91 | { |
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92 | struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); |
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93 | struct i2c_adapter *adapter = dvo->i2c_bus; |
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94 | struct intel_gmbus *bus = container_of(adapter, |
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95 | struct intel_gmbus, |
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96 | adapter); |
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97 | struct drm_i915_private *dev_priv = bus->dev_priv; |
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98 | |||
99 | DRM_DEBUG_KMS("%s: Trying to re-enable the DVO\n", __FUNCTION__); |
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100 | |||
101 | ns->dvoc = I915_READ(DVO_C); |
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102 | ns->pll_a = I915_READ(_DPLL_A); |
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103 | ns->srcdim = I915_READ(DVOC_SRCDIM); |
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104 | ns->fw_blc = I915_READ(FW_BLC); |
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105 | |||
106 | I915_WRITE(DVOC, 0x10004084); |
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107 | I915_WRITE(_DPLL_A, 0xd0820000); |
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108 | I915_WRITE(DVOC_SRCDIM, 0x400300); // 1024x768 |
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109 | I915_WRITE(FW_BLC, 0x1080304); |
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110 | |||
111 | I915_WRITE(DVOC, 0x90004084); |
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112 | } |
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113 | |||
114 | /* |
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115 | * Restore the I915 registers modified by the above |
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116 | * trigger function. |
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117 | */ |
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118 | static void restore_dvo(struct intel_dvo_device *dvo) |
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119 | { |
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120 | struct i2c_adapter *adapter = dvo->i2c_bus; |
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121 | struct intel_gmbus *bus = container_of(adapter, |
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122 | struct intel_gmbus, |
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123 | adapter); |
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124 | struct drm_i915_private *dev_priv = bus->dev_priv; |
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125 | struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); |
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126 | |||
127 | I915_WRITE(DVOC, ns->dvoc); |
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128 | I915_WRITE(_DPLL_A, ns->pll_a); |
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129 | I915_WRITE(DVOC_SRCDIM, ns->srcdim); |
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130 | I915_WRITE(FW_BLC, ns->fw_blc); |
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131 | } |
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132 | |||
133 | /* |
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134 | ** Read a register from the ns2501. |
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135 | ** Returns true if successful, false otherwise. |
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136 | ** If it returns false, it might be wise to enable the |
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137 | ** DVO with the above function. |
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138 | */ |
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139 | static bool ns2501_readb(struct intel_dvo_device *dvo, int addr, uint8_t * ch) |
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140 | { |
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141 | struct ns2501_priv *ns = dvo->dev_priv; |
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142 | struct i2c_adapter *adapter = dvo->i2c_bus; |
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143 | u8 out_buf[2]; |
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144 | u8 in_buf[2]; |
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145 | |||
146 | struct i2c_msg msgs[] = { |
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147 | { |
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148 | .addr = dvo->slave_addr, |
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149 | .flags = 0, |
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150 | .len = 1, |
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151 | .buf = out_buf, |
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152 | }, |
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153 | { |
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154 | .addr = dvo->slave_addr, |
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155 | .flags = I2C_M_RD, |
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156 | .len = 1, |
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157 | .buf = in_buf, |
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158 | } |
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159 | }; |
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160 | |||
161 | out_buf[0] = addr; |
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162 | out_buf[1] = 0; |
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163 | |||
164 | if (i2c_transfer(adapter, msgs, 2) == 2) { |
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165 | *ch = in_buf[0]; |
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166 | return true; |
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167 | }; |
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168 | |||
169 | if (!ns->quiet) { |
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170 | DRM_DEBUG_KMS |
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171 | ("Unable to read register 0x%02x from %s:0x%02x.\n", addr, |
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172 | adapter->name, dvo->slave_addr); |
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173 | } |
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174 | |||
175 | return false; |
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176 | } |
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177 | |||
178 | /* |
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179 | ** Write a register to the ns2501. |
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180 | ** Returns true if successful, false otherwise. |
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181 | ** If it returns false, it might be wise to enable the |
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182 | ** DVO with the above function. |
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183 | */ |
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184 | static bool ns2501_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch) |
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185 | { |
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186 | struct ns2501_priv *ns = dvo->dev_priv; |
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187 | struct i2c_adapter *adapter = dvo->i2c_bus; |
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188 | uint8_t out_buf[2]; |
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189 | |||
190 | struct i2c_msg msg = { |
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191 | .addr = dvo->slave_addr, |
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192 | .flags = 0, |
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193 | .len = 2, |
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194 | .buf = out_buf, |
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195 | }; |
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196 | |||
197 | out_buf[0] = addr; |
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198 | out_buf[1] = ch; |
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199 | |||
200 | if (i2c_transfer(adapter, &msg, 1) == 1) { |
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201 | return true; |
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202 | } |
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203 | |||
204 | if (!ns->quiet) { |
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205 | DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d\n", |
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206 | addr, adapter->name, dvo->slave_addr); |
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207 | } |
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208 | |||
209 | return false; |
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210 | } |
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211 | |||
212 | /* National Semiconductor 2501 driver for chip on i2c bus |
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213 | * scan for the chip on the bus. |
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214 | * Hope the VBIOS initialized the PLL correctly so we can |
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215 | * talk to it. If not, it will not be seen and not detected. |
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216 | * Bummer! |
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217 | */ |
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218 | static bool ns2501_init(struct intel_dvo_device *dvo, |
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219 | struct i2c_adapter *adapter) |
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220 | { |
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221 | /* this will detect the NS2501 chip on the specified i2c bus */ |
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222 | struct ns2501_priv *ns; |
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223 | unsigned char ch; |
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224 | |||
225 | ns = kzalloc(sizeof(struct ns2501_priv), GFP_KERNEL); |
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226 | if (ns == NULL) |
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227 | return false; |
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228 | |||
229 | dvo->i2c_bus = adapter; |
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230 | dvo->dev_priv = ns; |
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231 | ns->quiet = true; |
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232 | |||
233 | if (!ns2501_readb(dvo, NS2501_VID_LO, &ch)) |
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234 | goto out; |
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235 | |||
236 | if (ch != (NS2501_VID & 0xff)) { |
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237 | DRM_DEBUG_KMS("ns2501 not detected got %d: from %s Slave %d.\n", |
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238 | ch, adapter->name, dvo->slave_addr); |
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239 | goto out; |
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240 | } |
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241 | |||
242 | if (!ns2501_readb(dvo, NS2501_DID_LO, &ch)) |
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243 | goto out; |
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244 | |||
245 | if (ch != (NS2501_DID & 0xff)) { |
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246 | DRM_DEBUG_KMS("ns2501 not detected got %d: from %s Slave %d.\n", |
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247 | ch, adapter->name, dvo->slave_addr); |
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248 | goto out; |
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249 | } |
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250 | ns->quiet = false; |
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251 | ns->reg_8_set = 0; |
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252 | ns->reg_8_shadow = |
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253 | NS2501_8_PD | NS2501_8_BPAS | NS2501_8_VEN | NS2501_8_HEN; |
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254 | |||
255 | DRM_DEBUG_KMS("init ns2501 dvo controller successfully!\n"); |
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256 | return true; |
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257 | |||
258 | out: |
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259 | kfree(ns); |
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260 | return false; |
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261 | } |
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262 | |||
263 | static enum drm_connector_status ns2501_detect(struct intel_dvo_device *dvo) |
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264 | { |
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265 | /* |
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266 | * This is a Laptop display, it doesn't have hotplugging. |
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267 | * Even if not, the detection bit of the 2501 is unreliable as |
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268 | * it only works for some display types. |
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269 | * It is even more unreliable as the PLL must be active for |
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270 | * allowing reading from the chiop. |
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271 | */ |
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272 | return connector_status_connected; |
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273 | } |
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274 | |||
275 | static enum drm_mode_status ns2501_mode_valid(struct intel_dvo_device *dvo, |
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276 | struct drm_display_mode *mode) |
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277 | { |
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278 | DRM_DEBUG_KMS |
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279 | ("%s: is mode valid (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d)\n", |
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280 | __FUNCTION__, mode->hdisplay, mode->htotal, mode->vdisplay, |
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281 | mode->vtotal); |
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282 | |||
283 | /* |
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284 | * Currently, these are all the modes I have data from. |
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285 | * More might exist. Unclear how to find the native resolution |
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286 | * of the panel in here so we could always accept it |
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287 | * by disabling the scaler. |
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288 | */ |
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289 | if ((mode->hdisplay == 800 && mode->vdisplay == 600) || |
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290 | (mode->hdisplay == 640 && mode->vdisplay == 480) || |
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291 | (mode->hdisplay == 1024 && mode->vdisplay == 768)) { |
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292 | return MODE_OK; |
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293 | } else { |
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294 | return MODE_ONE_SIZE; /* Is this a reasonable error? */ |
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295 | } |
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296 | } |
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297 | |||
298 | static void ns2501_mode_set(struct intel_dvo_device *dvo, |
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299 | struct drm_display_mode *mode, |
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300 | struct drm_display_mode *adjusted_mode) |
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301 | { |
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302 | bool ok; |
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303 | bool restore = false; |
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304 | struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); |
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305 | |||
306 | DRM_DEBUG_KMS |
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307 | ("%s: set mode (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d).\n", |
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308 | __FUNCTION__, mode->hdisplay, mode->htotal, mode->vdisplay, |
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309 | mode->vtotal); |
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310 | |||
311 | /* |
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312 | * Where do I find the native resolution for which scaling is not required??? |
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313 | * |
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314 | * First trigger the DVO on as otherwise the chip does not appear on the i2c |
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315 | * bus. |
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316 | */ |
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317 | do { |
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318 | ok = true; |
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319 | |||
320 | if (mode->hdisplay == 800 && mode->vdisplay == 600) { |
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321 | /* mode 277 */ |
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322 | ns->reg_8_shadow &= ~NS2501_8_BPAS; |
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323 | DRM_DEBUG_KMS("%s: switching to 800x600\n", |
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324 | __FUNCTION__); |
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325 | |||
326 | /* |
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327 | * No, I do not know where this data comes from. |
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328 | * It is just what the video bios left in the DVO, so |
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329 | * I'm just copying it here over. |
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330 | * This also means that I cannot support any other modes |
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331 | * except the ones supported by the bios. |
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332 | */ |
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333 | ok &= ns2501_writeb(dvo, 0x11, 0xc8); // 0xc7 also works. |
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334 | ok &= ns2501_writeb(dvo, 0x1b, 0x19); |
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335 | ok &= ns2501_writeb(dvo, 0x1c, 0x62); // VBIOS left 0x64 here, but 0x62 works nicer |
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336 | ok &= ns2501_writeb(dvo, 0x1d, 0x02); |
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337 | |||
338 | ok &= ns2501_writeb(dvo, 0x34, 0x03); |
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339 | ok &= ns2501_writeb(dvo, 0x35, 0xff); |
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340 | |||
341 | ok &= ns2501_writeb(dvo, 0x80, 0x27); |
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342 | ok &= ns2501_writeb(dvo, 0x81, 0x03); |
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343 | ok &= ns2501_writeb(dvo, 0x82, 0x41); |
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344 | ok &= ns2501_writeb(dvo, 0x83, 0x05); |
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345 | |||
346 | ok &= ns2501_writeb(dvo, 0x8d, 0x02); |
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347 | ok &= ns2501_writeb(dvo, 0x8e, 0x04); |
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348 | ok &= ns2501_writeb(dvo, 0x8f, 0x00); |
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349 | |||
350 | ok &= ns2501_writeb(dvo, 0x90, 0xfe); /* vertical. VBIOS left 0xff here, but 0xfe works better */ |
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351 | ok &= ns2501_writeb(dvo, 0x91, 0x07); |
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352 | ok &= ns2501_writeb(dvo, 0x94, 0x00); |
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353 | ok &= ns2501_writeb(dvo, 0x95, 0x00); |
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354 | |||
355 | ok &= ns2501_writeb(dvo, 0x96, 0x00); |
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356 | |||
357 | ok &= ns2501_writeb(dvo, 0x99, 0x00); |
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358 | ok &= ns2501_writeb(dvo, 0x9a, 0x88); |
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359 | |||
360 | ok &= ns2501_writeb(dvo, 0x9c, 0x23); /* Looks like first and last line of the image. */ |
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361 | ok &= ns2501_writeb(dvo, 0x9d, 0x00); |
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362 | ok &= ns2501_writeb(dvo, 0x9e, 0x25); |
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363 | ok &= ns2501_writeb(dvo, 0x9f, 0x03); |
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364 | |||
365 | ok &= ns2501_writeb(dvo, 0xa4, 0x80); |
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366 | |||
367 | ok &= ns2501_writeb(dvo, 0xb6, 0x00); |
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368 | |||
369 | ok &= ns2501_writeb(dvo, 0xb9, 0xc8); /* horizontal? */ |
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370 | ok &= ns2501_writeb(dvo, 0xba, 0x00); /* horizontal? */ |
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371 | |||
372 | ok &= ns2501_writeb(dvo, 0xc0, 0x05); /* horizontal? */ |
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373 | ok &= ns2501_writeb(dvo, 0xc1, 0xd7); |
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374 | |||
375 | ok &= ns2501_writeb(dvo, 0xc2, 0x00); |
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376 | ok &= ns2501_writeb(dvo, 0xc3, 0xf8); |
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377 | |||
378 | ok &= ns2501_writeb(dvo, 0xc4, 0x03); |
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379 | ok &= ns2501_writeb(dvo, 0xc5, 0x1a); |
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380 | |||
381 | ok &= ns2501_writeb(dvo, 0xc6, 0x00); |
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382 | ok &= ns2501_writeb(dvo, 0xc7, 0x73); |
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383 | ok &= ns2501_writeb(dvo, 0xc8, 0x02); |
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384 | |||
385 | } else if (mode->hdisplay == 640 && mode->vdisplay == 480) { |
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386 | /* mode 274 */ |
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387 | DRM_DEBUG_KMS("%s: switching to 640x480\n", |
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388 | __FUNCTION__); |
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389 | /* |
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390 | * No, I do not know where this data comes from. |
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391 | * It is just what the video bios left in the DVO, so |
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392 | * I'm just copying it here over. |
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393 | * This also means that I cannot support any other modes |
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394 | * except the ones supported by the bios. |
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395 | */ |
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396 | ns->reg_8_shadow &= ~NS2501_8_BPAS; |
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397 | |||
398 | ok &= ns2501_writeb(dvo, 0x11, 0xa0); |
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399 | ok &= ns2501_writeb(dvo, 0x1b, 0x11); |
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400 | ok &= ns2501_writeb(dvo, 0x1c, 0x54); |
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401 | ok &= ns2501_writeb(dvo, 0x1d, 0x03); |
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402 | |||
403 | ok &= ns2501_writeb(dvo, 0x34, 0x03); |
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404 | ok &= ns2501_writeb(dvo, 0x35, 0xff); |
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405 | |||
406 | ok &= ns2501_writeb(dvo, 0x80, 0xff); |
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407 | ok &= ns2501_writeb(dvo, 0x81, 0x07); |
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408 | ok &= ns2501_writeb(dvo, 0x82, 0x3d); |
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409 | ok &= ns2501_writeb(dvo, 0x83, 0x05); |
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410 | |||
411 | ok &= ns2501_writeb(dvo, 0x8d, 0x02); |
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412 | ok &= ns2501_writeb(dvo, 0x8e, 0x10); |
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413 | ok &= ns2501_writeb(dvo, 0x8f, 0x00); |
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414 | |||
415 | ok &= ns2501_writeb(dvo, 0x90, 0xff); /* vertical */ |
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416 | ok &= ns2501_writeb(dvo, 0x91, 0x07); |
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417 | ok &= ns2501_writeb(dvo, 0x94, 0x00); |
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418 | ok &= ns2501_writeb(dvo, 0x95, 0x00); |
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419 | |||
420 | ok &= ns2501_writeb(dvo, 0x96, 0x05); |
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421 | |||
422 | ok &= ns2501_writeb(dvo, 0x99, 0x00); |
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423 | ok &= ns2501_writeb(dvo, 0x9a, 0x88); |
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424 | |||
425 | ok &= ns2501_writeb(dvo, 0x9c, 0x24); |
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426 | ok &= ns2501_writeb(dvo, 0x9d, 0x00); |
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427 | ok &= ns2501_writeb(dvo, 0x9e, 0x25); |
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428 | ok &= ns2501_writeb(dvo, 0x9f, 0x03); |
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429 | |||
430 | ok &= ns2501_writeb(dvo, 0xa4, 0x84); |
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431 | |||
432 | ok &= ns2501_writeb(dvo, 0xb6, 0x09); |
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433 | |||
434 | ok &= ns2501_writeb(dvo, 0xb9, 0xa0); /* horizontal? */ |
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435 | ok &= ns2501_writeb(dvo, 0xba, 0x00); /* horizontal? */ |
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436 | |||
437 | ok &= ns2501_writeb(dvo, 0xc0, 0x05); /* horizontal? */ |
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438 | ok &= ns2501_writeb(dvo, 0xc1, 0x90); |
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439 | |||
440 | ok &= ns2501_writeb(dvo, 0xc2, 0x00); |
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441 | ok &= ns2501_writeb(dvo, 0xc3, 0x0f); |
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442 | |||
443 | ok &= ns2501_writeb(dvo, 0xc4, 0x03); |
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444 | ok &= ns2501_writeb(dvo, 0xc5, 0x16); |
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445 | |||
446 | ok &= ns2501_writeb(dvo, 0xc6, 0x00); |
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447 | ok &= ns2501_writeb(dvo, 0xc7, 0x02); |
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448 | ok &= ns2501_writeb(dvo, 0xc8, 0x02); |
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449 | |||
450 | } else if (mode->hdisplay == 1024 && mode->vdisplay == 768) { |
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451 | /* mode 280 */ |
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452 | DRM_DEBUG_KMS("%s: switching to 1024x768\n", |
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453 | __FUNCTION__); |
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454 | /* |
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455 | * This might or might not work, actually. I'm silently |
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456 | * assuming here that the native panel resolution is |
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457 | * 1024x768. If not, then this leaves the scaler disabled |
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458 | * generating a picture that is likely not the expected. |
||
459 | * |
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460 | * Problem is that I do not know where to take the panel |
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461 | * dimensions from. |
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462 | * |
||
463 | * Enable the bypass, scaling not required. |
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464 | * |
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465 | * The scaler registers are irrelevant here.... |
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466 | * |
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467 | */ |
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468 | ns->reg_8_shadow |= NS2501_8_BPAS; |
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469 | ok &= ns2501_writeb(dvo, 0x37, 0x44); |
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470 | } else { |
||
471 | /* |
||
472 | * Data not known. Bummer! |
||
473 | * Hopefully, the code should not go here |
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474 | * as mode_OK delivered no other modes. |
||
475 | */ |
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476 | ns->reg_8_shadow |= NS2501_8_BPAS; |
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477 | } |
||
478 | ok &= ns2501_writeb(dvo, NS2501_REG8, ns->reg_8_shadow); |
||
479 | |||
480 | if (!ok) { |
||
481 | if (restore) |
||
482 | restore_dvo(dvo); |
||
483 | enable_dvo(dvo); |
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484 | restore = true; |
||
485 | } |
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486 | } while (!ok); |
||
487 | /* |
||
488 | * Restore the old i915 registers before |
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489 | * forcing the ns2501 on. |
||
490 | */ |
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491 | if (restore) |
||
492 | restore_dvo(dvo); |
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493 | } |
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494 | |||
495 | /* set the NS2501 power state */ |
||
496 | static bool ns2501_get_hw_state(struct intel_dvo_device *dvo) |
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497 | { |
||
498 | unsigned char ch; |
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499 | |||
500 | if (!ns2501_readb(dvo, NS2501_REG8, &ch)) |
||
501 | return false; |
||
502 | |||
503 | if (ch & NS2501_8_PD) |
||
504 | return true; |
||
505 | else |
||
506 | return false; |
||
507 | } |
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508 | |||
509 | /* set the NS2501 power state */ |
||
510 | static void ns2501_dpms(struct intel_dvo_device *dvo, bool enable) |
||
511 | { |
||
512 | bool ok; |
||
513 | bool restore = false; |
||
514 | struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); |
||
515 | unsigned char ch; |
||
516 | |||
517 | DRM_DEBUG_KMS("%s: Trying set the dpms of the DVO to %i\n", |
||
518 | __FUNCTION__, enable); |
||
519 | |||
520 | ch = ns->reg_8_shadow; |
||
521 | |||
522 | if (enable) |
||
523 | ch |= NS2501_8_PD; |
||
524 | else |
||
525 | ch &= ~NS2501_8_PD; |
||
526 | |||
527 | if (ns->reg_8_set == 0 || ns->reg_8_shadow != ch) { |
||
528 | ns->reg_8_set = 1; |
||
529 | ns->reg_8_shadow = ch; |
||
530 | |||
531 | do { |
||
532 | ok = true; |
||
533 | ok &= ns2501_writeb(dvo, NS2501_REG8, ch); |
||
534 | ok &= |
||
535 | ns2501_writeb(dvo, 0x34, |
||
536 | enable ? 0x03 : 0x00); |
||
537 | ok &= |
||
538 | ns2501_writeb(dvo, 0x35, |
||
539 | enable ? 0xff : 0x00); |
||
540 | if (!ok) { |
||
541 | if (restore) |
||
542 | restore_dvo(dvo); |
||
543 | enable_dvo(dvo); |
||
544 | restore = true; |
||
545 | } |
||
546 | } while (!ok); |
||
547 | |||
548 | if (restore) |
||
549 | restore_dvo(dvo); |
||
550 | } |
||
551 | } |
||
552 | |||
553 | static void ns2501_dump_regs(struct intel_dvo_device *dvo) |
||
554 | { |
||
555 | uint8_t val; |
||
556 | |||
557 | ns2501_readb(dvo, NS2501_FREQ_LO, &val); |
||
558 | DRM_LOG_KMS("NS2501_FREQ_LO: 0x%02x\n", val); |
||
559 | ns2501_readb(dvo, NS2501_FREQ_HI, &val); |
||
560 | DRM_LOG_KMS("NS2501_FREQ_HI: 0x%02x\n", val); |
||
561 | ns2501_readb(dvo, NS2501_REG8, &val); |
||
562 | DRM_LOG_KMS("NS2501_REG8: 0x%02x\n", val); |
||
563 | ns2501_readb(dvo, NS2501_REG9, &val); |
||
564 | DRM_LOG_KMS("NS2501_REG9: 0x%02x\n", val); |
||
565 | ns2501_readb(dvo, NS2501_REGC, &val); |
||
566 | DRM_LOG_KMS("NS2501_REGC: 0x%02x\n", val); |
||
567 | } |
||
568 | |||
569 | static void ns2501_destroy(struct intel_dvo_device *dvo) |
||
570 | { |
||
571 | struct ns2501_priv *ns = dvo->dev_priv; |
||
572 | |||
573 | if (ns) { |
||
574 | kfree(ns); |
||
575 | dvo->dev_priv = NULL; |
||
576 | } |
||
577 | } |
||
578 | |||
579 | struct intel_dvo_dev_ops ns2501_ops = { |
||
580 | .init = ns2501_init, |
||
581 | .detect = ns2501_detect, |
||
582 | .mode_valid = ns2501_mode_valid, |
||
583 | .mode_set = ns2501_mode_set, |
||
584 | .dpms = ns2501_dpms, |
||
585 | .get_hw_state = ns2501_get_hw_state, |
||
586 | .dump_regs = ns2501_dump_regs, |
||
587 | .destroy = ns2501_destroy, |
||
588 | };0) |