Rev 2340 | Go to most recent revision | Details | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 2325 | Serge | 1 | /* |
| 2 | * Intel AGPGART routines. |
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| 3 | */ |
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| 4 | |||
| 5 | #include |
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| 6 | #include |
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| 7 | #include |
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| 8 | #include |
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| 9 | #include |
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| 10 | |||
| 11 | //#include |
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| 12 | //#include |
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| 13 | #include |
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| 14 | |||
| 15 | #include "agp.h" |
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| 16 | #include "intel-agp.h" |
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| 17 | |||
| 18 | #include |
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| 19 | |||
| 20 | #define __devinit |
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| 21 | #define PCI_VENDOR_ID_INTEL 0x8086 |
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| 22 | |||
| 23 | |||
| 24 | int intel_gmch_probe(struct pci_dev *pdev, |
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| 25 | struct agp_bridge_data *bridge); |
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| 26 | |||
| 27 | int intel_agp_enabled; |
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| 28 | |||
| 29 | struct agp_bridge_data *agp_alloc_bridge(void) |
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| 30 | { |
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| 31 | struct agp_bridge_data *bridge; |
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| 32 | |||
| 33 | bridge = kzalloc(sizeof(*bridge), GFP_KERNEL); |
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| 34 | if (!bridge) |
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| 35 | return NULL; |
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| 36 | |||
| 37 | atomic_set(&bridge->agp_in_use, 0); |
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| 38 | atomic_set(&bridge->current_memory_agp, 0); |
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| 39 | |||
| 40 | // if (list_empty(&agp_bridges)) |
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| 41 | // agp_bridge = bridge; |
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| 42 | |||
| 43 | return bridge; |
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| 44 | } |
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| 45 | |||
| 46 | static int __devinit agp_intel_probe(struct pci_dev *pdev, |
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| 47 | const struct pci_device_id *ent) |
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| 48 | { |
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| 49 | struct agp_bridge_data *bridge; |
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| 50 | u8 cap_ptr = 0; |
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| 51 | int err = -ENODEV; |
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| 52 | |||
| 53 | cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP); |
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| 54 | |||
| 55 | bridge = agp_alloc_bridge(); |
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| 56 | if (!bridge) |
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| 57 | return -ENOMEM; |
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| 58 | |||
| 59 | bridge->capndx = cap_ptr; |
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| 60 | |||
| 61 | if (intel_gmch_probe(pdev, bridge)) |
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| 62 | { |
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| 63 | // pci_set_drvdata(pdev, bridge); |
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| 64 | // err = agp_add_bridge(bridge); |
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| 65 | // if (!err) |
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| 66 | intel_agp_enabled = 1; |
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| 67 | err = 0; |
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| 68 | } |
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| 69 | |||
| 70 | return err; |
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| 71 | } |
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| 72 | |||
| 73 | static struct pci_device_id agp_intel_pci_table[] = { |
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| 74 | #define ID(x) \ |
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| 75 | { \ |
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| 76 | .class = (PCI_CLASS_BRIDGE_HOST << 8), \ |
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| 77 | .class_mask = ~0, \ |
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| 78 | .vendor = PCI_VENDOR_ID_INTEL, \ |
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| 79 | .device = x, \ |
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| 80 | .subvendor = PCI_ANY_ID, \ |
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| 81 | .subdevice = PCI_ANY_ID, \ |
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| 82 | } |
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| 83 | ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB), |
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| 84 | ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB), |
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| 85 | ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_HB), |
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| 86 | { } |
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| 87 | }; |
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| 88 | |||
| 89 | static pci_dev_t agp_device; |
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| 90 | |||
| 91 | int init_agp(void) |
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| 92 | { |
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| 93 | const struct pci_device_id *ent; |
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| 94 | |||
| 95 | ent = find_pci_device(&agp_device, agp_intel_pci_table); |
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| 96 | |||
| 97 | if( unlikely(ent == NULL) ) |
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| 98 | { |
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| 99 | dbgprintf("host controller not found\n"); |
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| 100 | return -ENODEV; |
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| 101 | }; |
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| 102 | |||
| 103 | return agp_intel_probe(&agp_device.pci_dev, ent); |
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| 104 | } |
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| 105 |