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1123 | serge | 1 | /* |
2 | * Copyright © 1997-2003 by The XFree86 Project, Inc. |
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3 | * Copyright © 2007 Dave Airlie |
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4 | * Copyright © 2007-2008 Intel Corporation |
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5 | * Jesse Barnes |
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1179 | serge | 6 | * Copyright 2005-2006 Luc Verhaegen |
7 | * Copyright (c) 2001, Andy Ritger aritger@nvidia.com |
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1123 | serge | 8 | * |
9 | * Permission is hereby granted, free of charge, to any person obtaining a |
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10 | * copy of this software and associated documentation files (the "Software"), |
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11 | * to deal in the Software without restriction, including without limitation |
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12 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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13 | * and/or sell copies of the Software, and to permit persons to whom the |
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14 | * Software is furnished to do so, subject to the following conditions: |
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15 | * |
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16 | * The above copyright notice and this permission notice shall be included in |
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17 | * all copies or substantial portions of the Software. |
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18 | * |
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19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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22 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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23 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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24 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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25 | * OTHER DEALINGS IN THE SOFTWARE. |
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26 | * |
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27 | * Except as contained in this notice, the name of the copyright holder(s) |
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28 | * and author(s) shall not be used in advertising or otherwise to promote |
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29 | * the sale, use or other dealings in this Software without prior written |
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30 | * authorization from the copyright holder(s) and author(s). |
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31 | */ |
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32 | |||
1179 | serge | 33 | #include |
1404 | serge | 34 | #include |
3031 | serge | 35 | #include |
36 | #include |
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37 | #include |
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1123 | serge | 38 | |
39 | /** |
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40 | * drm_mode_debug_printmodeline - debug print a mode |
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41 | * @dev: DRM device |
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42 | * @mode: mode to print |
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43 | * |
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44 | * LOCKING: |
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45 | * None. |
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46 | * |
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47 | * Describe @mode using DRM_DEBUG. |
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48 | */ |
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3192 | Serge | 49 | void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) |
1123 | serge | 50 | { |
1179 | serge | 51 | DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " |
52 | "0x%x 0x%x\n", |
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1123 | serge | 53 | mode->base.id, mode->name, mode->vrefresh, mode->clock, |
54 | mode->hdisplay, mode->hsync_start, |
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55 | mode->hsync_end, mode->htotal, |
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56 | mode->vdisplay, mode->vsync_start, |
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57 | mode->vsync_end, mode->vtotal, mode->type, mode->flags); |
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58 | } |
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59 | EXPORT_SYMBOL(drm_mode_debug_printmodeline); |
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60 | |||
61 | /** |
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1179 | serge | 62 | * drm_cvt_mode -create a modeline based on CVT algorithm |
63 | * @dev: DRM device |
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64 | * @hdisplay: hdisplay size |
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65 | * @vdisplay: vdisplay size |
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66 | * @vrefresh : vrefresh rate |
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67 | * @reduced : Whether the GTF calculation is simplified |
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68 | * @interlaced:Whether the interlace is supported |
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69 | * |
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70 | * LOCKING: |
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71 | * none. |
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72 | * |
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73 | * return the modeline based on CVT algorithm |
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74 | * |
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75 | * This function is called to generate the modeline based on CVT algorithm |
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76 | * according to the hdisplay, vdisplay, vrefresh. |
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77 | * It is based from the VESA(TM) Coordinated Video Timing Generator by |
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78 | * Graham Loveridge April 9, 2003 available at |
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1963 | serge | 79 | * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls |
1179 | serge | 80 | * |
81 | * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. |
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82 | * What I have done is to translate it by using integer calculation. |
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83 | */ |
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84 | #define HV_FACTOR 1000 |
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85 | struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, |
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86 | int vdisplay, int vrefresh, |
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1221 | serge | 87 | bool reduced, bool interlaced, bool margins) |
1179 | serge | 88 | { |
89 | /* 1) top/bottom margin size (% of height) - default: 1.8, */ |
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90 | #define CVT_MARGIN_PERCENTAGE 18 |
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91 | /* 2) character cell horizontal granularity (pixels) - default 8 */ |
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92 | #define CVT_H_GRANULARITY 8 |
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93 | /* 3) Minimum vertical porch (lines) - default 3 */ |
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94 | #define CVT_MIN_V_PORCH 3 |
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95 | /* 4) Minimum number of vertical back porch lines - default 6 */ |
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96 | #define CVT_MIN_V_BPORCH 6 |
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97 | /* Pixel Clock step (kHz) */ |
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98 | #define CVT_CLOCK_STEP 250 |
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99 | struct drm_display_mode *drm_mode; |
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100 | unsigned int vfieldrate, hperiod; |
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101 | int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; |
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102 | int interlace; |
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103 | |||
104 | /* allocate the drm_display_mode structure. If failure, we will |
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105 | * return directly |
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106 | */ |
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107 | drm_mode = drm_mode_create(dev); |
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108 | if (!drm_mode) |
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109 | return NULL; |
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110 | |||
111 | /* the CVT default refresh rate is 60Hz */ |
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112 | if (!vrefresh) |
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113 | vrefresh = 60; |
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114 | |||
115 | /* the required field fresh rate */ |
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116 | if (interlaced) |
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117 | vfieldrate = vrefresh * 2; |
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118 | else |
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119 | vfieldrate = vrefresh; |
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120 | |||
121 | /* horizontal pixels */ |
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122 | hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); |
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123 | |||
124 | /* determine the left&right borders */ |
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125 | hmargin = 0; |
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126 | if (margins) { |
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127 | hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; |
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128 | hmargin -= hmargin % CVT_H_GRANULARITY; |
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129 | } |
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130 | /* find the total active pixels */ |
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131 | drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; |
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132 | |||
133 | /* find the number of lines per field */ |
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134 | if (interlaced) |
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135 | vdisplay_rnd = vdisplay / 2; |
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136 | else |
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137 | vdisplay_rnd = vdisplay; |
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138 | |||
139 | /* find the top & bottom borders */ |
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140 | vmargin = 0; |
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141 | if (margins) |
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142 | vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; |
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143 | |||
144 | drm_mode->vdisplay = vdisplay + 2 * vmargin; |
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145 | |||
146 | /* Interlaced */ |
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147 | if (interlaced) |
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148 | interlace = 1; |
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149 | else |
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150 | interlace = 0; |
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151 | |||
152 | /* Determine VSync Width from aspect ratio */ |
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153 | if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) |
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154 | vsync = 4; |
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155 | else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) |
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156 | vsync = 5; |
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157 | else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) |
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158 | vsync = 6; |
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159 | else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) |
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160 | vsync = 7; |
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161 | else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) |
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162 | vsync = 7; |
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163 | else /* custom */ |
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164 | vsync = 10; |
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165 | |||
166 | if (!reduced) { |
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167 | /* simplify the GTF calculation */ |
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168 | /* 4) Minimum time of vertical sync + back porch interval (µs) |
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169 | * default 550.0 |
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170 | */ |
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171 | int tmp1, tmp2; |
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172 | #define CVT_MIN_VSYNC_BP 550 |
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173 | /* 3) Nominal HSync width (% of line period) - default 8 */ |
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174 | #define CVT_HSYNC_PERCENTAGE 8 |
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175 | unsigned int hblank_percentage; |
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176 | int vsyncandback_porch, vback_porch, hblank; |
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177 | |||
178 | /* estimated the horizontal period */ |
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179 | tmp1 = HV_FACTOR * 1000000 - |
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180 | CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; |
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181 | tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + |
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182 | interlace; |
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183 | hperiod = tmp1 * 2 / (tmp2 * vfieldrate); |
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184 | |||
185 | tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; |
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186 | /* 9. Find number of lines in sync + backporch */ |
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187 | if (tmp1 < (vsync + CVT_MIN_V_PORCH)) |
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188 | vsyncandback_porch = vsync + CVT_MIN_V_PORCH; |
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189 | else |
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190 | vsyncandback_porch = tmp1; |
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191 | /* 10. Find number of lines in back porch */ |
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192 | vback_porch = vsyncandback_porch - vsync; |
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193 | drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + |
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194 | vsyncandback_porch + CVT_MIN_V_PORCH; |
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195 | /* 5) Definition of Horizontal blanking time limitation */ |
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196 | /* Gradient (%/kHz) - default 600 */ |
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197 | #define CVT_M_FACTOR 600 |
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198 | /* Offset (%) - default 40 */ |
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199 | #define CVT_C_FACTOR 40 |
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200 | /* Blanking time scaling factor - default 128 */ |
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201 | #define CVT_K_FACTOR 128 |
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202 | /* Scaling factor weighting - default 20 */ |
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203 | #define CVT_J_FACTOR 20 |
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204 | #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) |
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205 | #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ |
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206 | CVT_J_FACTOR) |
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207 | /* 12. Find ideal blanking duty cycle from formula */ |
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208 | hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * |
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209 | hperiod / 1000; |
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210 | /* 13. Blanking time */ |
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211 | if (hblank_percentage < 20 * HV_FACTOR) |
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212 | hblank_percentage = 20 * HV_FACTOR; |
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213 | hblank = drm_mode->hdisplay * hblank_percentage / |
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214 | (100 * HV_FACTOR - hblank_percentage); |
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215 | hblank -= hblank % (2 * CVT_H_GRANULARITY); |
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216 | /* 14. find the total pixes per line */ |
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217 | drm_mode->htotal = drm_mode->hdisplay + hblank; |
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218 | drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; |
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219 | drm_mode->hsync_start = drm_mode->hsync_end - |
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220 | (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; |
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221 | drm_mode->hsync_start += CVT_H_GRANULARITY - |
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222 | drm_mode->hsync_start % CVT_H_GRANULARITY; |
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223 | /* fill the Vsync values */ |
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224 | drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; |
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225 | drm_mode->vsync_end = drm_mode->vsync_start + vsync; |
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226 | } else { |
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227 | /* Reduced blanking */ |
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228 | /* Minimum vertical blanking interval time (µs)- default 460 */ |
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229 | #define CVT_RB_MIN_VBLANK 460 |
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230 | /* Fixed number of clocks for horizontal sync */ |
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231 | #define CVT_RB_H_SYNC 32 |
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232 | /* Fixed number of clocks for horizontal blanking */ |
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233 | #define CVT_RB_H_BLANK 160 |
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234 | /* Fixed number of lines for vertical front porch - default 3*/ |
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235 | #define CVT_RB_VFPORCH 3 |
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236 | int vbilines; |
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237 | int tmp1, tmp2; |
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238 | /* 8. Estimate Horizontal period. */ |
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239 | tmp1 = HV_FACTOR * 1000000 - |
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240 | CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; |
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241 | tmp2 = vdisplay_rnd + 2 * vmargin; |
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242 | hperiod = tmp1 / (tmp2 * vfieldrate); |
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243 | /* 9. Find number of lines in vertical blanking */ |
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244 | vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; |
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245 | /* 10. Check if vertical blanking is sufficient */ |
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246 | if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) |
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247 | vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; |
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248 | /* 11. Find total number of lines in vertical field */ |
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249 | drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; |
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250 | /* 12. Find total number of pixels in a line */ |
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251 | drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; |
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252 | /* Fill in HSync values */ |
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253 | drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; |
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1963 | serge | 254 | drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; |
255 | /* Fill in VSync values */ |
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256 | drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; |
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257 | drm_mode->vsync_end = drm_mode->vsync_start + vsync; |
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1179 | serge | 258 | } |
259 | /* 15/13. Find pixel clock frequency (kHz for xf86) */ |
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260 | drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; |
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261 | drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; |
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262 | /* 18/16. Find actual vertical frame frequency */ |
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263 | /* ignore - just set the mode flag for interlaced */ |
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1963 | serge | 264 | if (interlaced) { |
1179 | serge | 265 | drm_mode->vtotal *= 2; |
1963 | serge | 266 | drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; |
267 | } |
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1179 | serge | 268 | /* Fill the mode line name */ |
269 | drm_mode_set_name(drm_mode); |
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270 | if (reduced) |
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271 | drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | |
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272 | DRM_MODE_FLAG_NVSYNC); |
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273 | else |
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274 | drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | |
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275 | DRM_MODE_FLAG_NHSYNC); |
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276 | |||
277 | return drm_mode; |
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278 | } |
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279 | EXPORT_SYMBOL(drm_cvt_mode); |
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280 | |||
281 | /** |
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1963 | serge | 282 | * drm_gtf_mode_complex - create the modeline based on full GTF algorithm |
1179 | serge | 283 | * |
284 | * @dev :drm device |
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285 | * @hdisplay :hdisplay size |
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286 | * @vdisplay :vdisplay size |
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287 | * @vrefresh :vrefresh rate. |
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288 | * @interlaced :whether the interlace is supported |
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1963 | serge | 289 | * @margins :desired margin size |
290 | * @GTF_[MCKJ] :extended GTF formula parameters |
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1179 | serge | 291 | * |
292 | * LOCKING. |
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293 | * none. |
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294 | * |
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1963 | serge | 295 | * return the modeline based on full GTF algorithm. |
1179 | serge | 296 | * |
1963 | serge | 297 | * GTF feature blocks specify C and J in multiples of 0.5, so we pass them |
298 | * in here multiplied by two. For a C of 40, pass in 80. |
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1179 | serge | 299 | */ |
1963 | serge | 300 | struct drm_display_mode * |
301 | drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, |
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302 | int vrefresh, bool interlaced, int margins, |
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303 | int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) |
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304 | { /* 1) top/bottom margin size (% of height) - default: 1.8, */ |
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1179 | serge | 305 | #define GTF_MARGIN_PERCENTAGE 18 |
306 | /* 2) character cell horizontal granularity (pixels) - default 8 */ |
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307 | #define GTF_CELL_GRAN 8 |
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308 | /* 3) Minimum vertical porch (lines) - default 3 */ |
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309 | #define GTF_MIN_V_PORCH 1 |
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310 | /* width of vsync in lines */ |
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311 | #define V_SYNC_RQD 3 |
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312 | /* width of hsync as % of total line */ |
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313 | #define H_SYNC_PERCENT 8 |
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314 | /* min time of vsync + back porch (microsec) */ |
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315 | #define MIN_VSYNC_PLUS_BP 550 |
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316 | /* C' and M' are part of the Blanking Duty Cycle computation */ |
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1963 | serge | 317 | #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) |
1179 | serge | 318 | #define GTF_M_PRIME (GTF_K * GTF_M / 256) |
319 | struct drm_display_mode *drm_mode; |
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320 | unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; |
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321 | int top_margin, bottom_margin; |
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322 | int interlace; |
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323 | unsigned int hfreq_est; |
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324 | int vsync_plus_bp, vback_porch; |
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325 | unsigned int vtotal_lines, vfieldrate_est, hperiod; |
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326 | unsigned int vfield_rate, vframe_rate; |
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327 | int left_margin, right_margin; |
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328 | unsigned int total_active_pixels, ideal_duty_cycle; |
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329 | unsigned int hblank, total_pixels, pixel_freq; |
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330 | int hsync, hfront_porch, vodd_front_porch_lines; |
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331 | unsigned int tmp1, tmp2; |
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332 | |||
333 | drm_mode = drm_mode_create(dev); |
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334 | if (!drm_mode) |
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335 | return NULL; |
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336 | |||
337 | /* 1. In order to give correct results, the number of horizontal |
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338 | * pixels requested is first processed to ensure that it is divisible |
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339 | * by the character size, by rounding it to the nearest character |
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340 | * cell boundary: |
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341 | */ |
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342 | hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; |
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343 | hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; |
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344 | |||
345 | /* 2. If interlace is requested, the number of vertical lines assumed |
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346 | * by the calculation must be halved, as the computation calculates |
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347 | * the number of vertical lines per field. |
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348 | */ |
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349 | if (interlaced) |
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350 | vdisplay_rnd = vdisplay / 2; |
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351 | else |
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352 | vdisplay_rnd = vdisplay; |
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353 | |||
354 | /* 3. Find the frame rate required: */ |
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355 | if (interlaced) |
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356 | vfieldrate_rqd = vrefresh * 2; |
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357 | else |
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358 | vfieldrate_rqd = vrefresh; |
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359 | |||
360 | /* 4. Find number of lines in Top margin: */ |
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361 | top_margin = 0; |
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362 | if (margins) |
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363 | top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / |
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364 | 1000; |
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365 | /* 5. Find number of lines in bottom margin: */ |
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366 | bottom_margin = top_margin; |
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367 | |||
368 | /* 6. If interlace is required, then set variable interlace: */ |
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369 | if (interlaced) |
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370 | interlace = 1; |
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371 | else |
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372 | interlace = 0; |
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373 | |||
374 | /* 7. Estimate the Horizontal frequency */ |
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375 | { |
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376 | tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; |
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377 | tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * |
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378 | 2 + interlace; |
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379 | hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; |
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380 | } |
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381 | |||
382 | /* 8. Find the number of lines in V sync + back porch */ |
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383 | /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ |
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384 | vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; |
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385 | vsync_plus_bp = (vsync_plus_bp + 500) / 1000; |
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386 | /* 9. Find the number of lines in V back porch alone: */ |
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387 | vback_porch = vsync_plus_bp - V_SYNC_RQD; |
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388 | /* 10. Find the total number of lines in Vertical field period: */ |
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389 | vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + |
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390 | vsync_plus_bp + GTF_MIN_V_PORCH; |
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391 | /* 11. Estimate the Vertical field frequency: */ |
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392 | vfieldrate_est = hfreq_est / vtotal_lines; |
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393 | /* 12. Find the actual horizontal period: */ |
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394 | hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); |
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395 | |||
396 | /* 13. Find the actual Vertical field frequency: */ |
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397 | vfield_rate = hfreq_est / vtotal_lines; |
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398 | /* 14. Find the Vertical frame frequency: */ |
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399 | if (interlaced) |
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400 | vframe_rate = vfield_rate / 2; |
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401 | else |
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402 | vframe_rate = vfield_rate; |
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403 | /* 15. Find number of pixels in left margin: */ |
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404 | if (margins) |
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405 | left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / |
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406 | 1000; |
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407 | else |
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408 | left_margin = 0; |
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409 | |||
410 | /* 16.Find number of pixels in right margin: */ |
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411 | right_margin = left_margin; |
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412 | /* 17.Find total number of active pixels in image and left and right */ |
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413 | total_active_pixels = hdisplay_rnd + left_margin + right_margin; |
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414 | /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ |
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415 | ideal_duty_cycle = GTF_C_PRIME * 1000 - |
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416 | (GTF_M_PRIME * 1000000 / hfreq_est); |
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417 | /* 19.Find the number of pixels in the blanking time to the nearest |
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418 | * double character cell: */ |
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419 | hblank = total_active_pixels * ideal_duty_cycle / |
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420 | (100000 - ideal_duty_cycle); |
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421 | hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); |
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422 | hblank = hblank * 2 * GTF_CELL_GRAN; |
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423 | /* 20.Find total number of pixels: */ |
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424 | total_pixels = total_active_pixels + hblank; |
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425 | /* 21.Find pixel clock frequency: */ |
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426 | pixel_freq = total_pixels * hfreq_est / 1000; |
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427 | /* Stage 1 computations are now complete; I should really pass |
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428 | * the results to another function and do the Stage 2 computations, |
||
429 | * but I only need a few more values so I'll just append the |
||
430 | * computations here for now */ |
||
431 | /* 17. Find the number of pixels in the horizontal sync period: */ |
||
432 | hsync = H_SYNC_PERCENT * total_pixels / 100; |
||
433 | hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; |
||
434 | hsync = hsync * GTF_CELL_GRAN; |
||
435 | /* 18. Find the number of pixels in horizontal front porch period */ |
||
436 | hfront_porch = hblank / 2 - hsync; |
||
437 | /* 36. Find the number of lines in the odd front porch period: */ |
||
438 | vodd_front_porch_lines = GTF_MIN_V_PORCH ; |
||
439 | |||
440 | /* finally, pack the results in the mode struct */ |
||
441 | drm_mode->hdisplay = hdisplay_rnd; |
||
442 | drm_mode->hsync_start = hdisplay_rnd + hfront_porch; |
||
443 | drm_mode->hsync_end = drm_mode->hsync_start + hsync; |
||
444 | drm_mode->htotal = total_pixels; |
||
445 | drm_mode->vdisplay = vdisplay_rnd; |
||
446 | drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; |
||
447 | drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; |
||
448 | drm_mode->vtotal = vtotal_lines; |
||
449 | |||
450 | drm_mode->clock = pixel_freq; |
||
451 | |||
452 | if (interlaced) { |
||
453 | drm_mode->vtotal *= 2; |
||
454 | drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; |
||
455 | } |
||
456 | |||
1963 | serge | 457 | drm_mode_set_name(drm_mode); |
458 | if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) |
||
459 | drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; |
||
460 | else |
||
461 | drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; |
||
462 | |||
1179 | serge | 463 | return drm_mode; |
464 | } |
||
1963 | serge | 465 | EXPORT_SYMBOL(drm_gtf_mode_complex); |
466 | |||
467 | /** |
||
468 | * drm_gtf_mode - create the modeline based on GTF algorithm |
||
469 | * |
||
470 | * @dev :drm device |
||
471 | * @hdisplay :hdisplay size |
||
472 | * @vdisplay :vdisplay size |
||
473 | * @vrefresh :vrefresh rate. |
||
474 | * @interlaced :whether the interlace is supported |
||
475 | * @margins :whether the margin is supported |
||
476 | * |
||
477 | * LOCKING. |
||
478 | * none. |
||
479 | * |
||
480 | * return the modeline based on GTF algorithm |
||
481 | * |
||
482 | * This function is to create the modeline based on the GTF algorithm. |
||
483 | * Generalized Timing Formula is derived from: |
||
484 | * GTF Spreadsheet by Andy Morrish (1/5/97) |
||
485 | * available at http://www.vesa.org |
||
486 | * |
||
487 | * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. |
||
488 | * What I have done is to translate it by using integer calculation. |
||
489 | * I also refer to the function of fb_get_mode in the file of |
||
490 | * drivers/video/fbmon.c |
||
491 | * |
||
492 | * Standard GTF parameters: |
||
493 | * M = 600 |
||
494 | * C = 40 |
||
495 | * K = 128 |
||
496 | * J = 20 |
||
497 | */ |
||
498 | struct drm_display_mode * |
||
499 | drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, |
||
500 | bool lace, int margins) |
||
501 | { |
||
502 | return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, |
||
503 | margins, 600, 40 * 2, 128, 20 * 2); |
||
504 | } |
||
1179 | serge | 505 | EXPORT_SYMBOL(drm_gtf_mode); |
1963 | serge | 506 | |
3746 | Serge | 507 | #ifdef CONFIG_VIDEOMODE_HELPERS |
3480 | Serge | 508 | int drm_display_mode_from_videomode(const struct videomode *vm, |
509 | struct drm_display_mode *dmode) |
||
510 | { |
||
511 | dmode->hdisplay = vm->hactive; |
||
512 | dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; |
||
513 | dmode->hsync_end = dmode->hsync_start + vm->hsync_len; |
||
514 | dmode->htotal = dmode->hsync_end + vm->hback_porch; |
||
515 | |||
516 | dmode->vdisplay = vm->vactive; |
||
517 | dmode->vsync_start = dmode->vdisplay + vm->vfront_porch; |
||
518 | dmode->vsync_end = dmode->vsync_start + vm->vsync_len; |
||
519 | dmode->vtotal = dmode->vsync_end + vm->vback_porch; |
||
520 | |||
521 | dmode->clock = vm->pixelclock / 1000; |
||
522 | |||
523 | dmode->flags = 0; |
||
3746 | Serge | 524 | if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH) |
3480 | Serge | 525 | dmode->flags |= DRM_MODE_FLAG_PHSYNC; |
3746 | Serge | 526 | else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW) |
3480 | Serge | 527 | dmode->flags |= DRM_MODE_FLAG_NHSYNC; |
3746 | Serge | 528 | if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH) |
3480 | Serge | 529 | dmode->flags |= DRM_MODE_FLAG_PVSYNC; |
3746 | Serge | 530 | else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW) |
3480 | Serge | 531 | dmode->flags |= DRM_MODE_FLAG_NVSYNC; |
3746 | Serge | 532 | if (vm->flags & DISPLAY_FLAGS_INTERLACED) |
3480 | Serge | 533 | dmode->flags |= DRM_MODE_FLAG_INTERLACE; |
3746 | Serge | 534 | if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN) |
3480 | Serge | 535 | dmode->flags |= DRM_MODE_FLAG_DBLSCAN; |
4075 | Serge | 536 | if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) |
537 | dmode->flags |= DRM_MODE_FLAG_DBLCLK; |
||
3480 | Serge | 538 | drm_mode_set_name(dmode); |
539 | |||
540 | return 0; |
||
541 | } |
||
542 | EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode); |
||
543 | |||
3746 | Serge | 544 | #ifdef CONFIG_OF |
1179 | serge | 545 | /** |
3480 | Serge | 546 | * of_get_drm_display_mode - get a drm_display_mode from devicetree |
547 | * @np: device_node with the timing specification |
||
548 | * @dmode: will be set to the return value |
||
549 | * @index: index into the list of display timings in devicetree |
||
550 | * |
||
551 | * This function is expensive and should only be used, if only one mode is to be |
||
552 | * read from DT. To get multiple modes start with of_get_display_timings and |
||
553 | * work with that instead. |
||
554 | */ |
||
555 | int of_get_drm_display_mode(struct device_node *np, |
||
556 | struct drm_display_mode *dmode, int index) |
||
557 | { |
||
558 | struct videomode vm; |
||
559 | int ret; |
||
560 | |||
561 | ret = of_get_videomode(np, &vm, index); |
||
562 | if (ret) |
||
563 | return ret; |
||
564 | |||
565 | drm_display_mode_from_videomode(&vm, dmode); |
||
566 | |||
567 | pr_debug("%s: got %dx%d display mode from %s\n", |
||
568 | of_node_full_name(np), vm.hactive, vm.vactive, np->name); |
||
569 | drm_mode_debug_printmodeline(dmode); |
||
570 | |||
571 | return 0; |
||
572 | } |
||
573 | EXPORT_SYMBOL_GPL(of_get_drm_display_mode); |
||
3746 | Serge | 574 | #endif /* CONFIG_OF */ |
575 | #endif /* CONFIG_VIDEOMODE_HELPERS */ |
||
3480 | Serge | 576 | |
577 | /** |
||
1123 | serge | 578 | * drm_mode_set_name - set the name on a mode |
579 | * @mode: name will be set in this mode |
||
580 | * |
||
581 | * LOCKING: |
||
582 | * None. |
||
583 | * |
||
584 | * Set the name of @mode to a standard format. |
||
585 | */ |
||
586 | void drm_mode_set_name(struct drm_display_mode *mode) |
||
587 | { |
||
1963 | serge | 588 | bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); |
589 | |||
590 | snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", |
||
591 | mode->hdisplay, mode->vdisplay, |
||
592 | interlaced ? "i" : ""); |
||
1123 | serge | 593 | } |
594 | EXPORT_SYMBOL(drm_mode_set_name); |
||
595 | |||
596 | /** |
||
597 | * drm_mode_width - get the width of a mode |
||
598 | * @mode: mode |
||
599 | * |
||
600 | * LOCKING: |
||
601 | * None. |
||
602 | * |
||
603 | * Return @mode's width (hdisplay) value. |
||
604 | * |
||
605 | * FIXME: is this needed? |
||
606 | * |
||
607 | * RETURNS: |
||
608 | * @mode->hdisplay |
||
609 | */ |
||
3192 | Serge | 610 | int drm_mode_width(const struct drm_display_mode *mode) |
1123 | serge | 611 | { |
612 | return mode->hdisplay; |
||
613 | |||
614 | } |
||
615 | EXPORT_SYMBOL(drm_mode_width); |
||
616 | |||
617 | /** |
||
618 | * drm_mode_height - get the height of a mode |
||
619 | * @mode: mode |
||
620 | * |
||
621 | * LOCKING: |
||
622 | * None. |
||
623 | * |
||
624 | * Return @mode's height (vdisplay) value. |
||
625 | * |
||
626 | * FIXME: is this needed? |
||
627 | * |
||
628 | * RETURNS: |
||
629 | * @mode->vdisplay |
||
630 | */ |
||
3192 | Serge | 631 | int drm_mode_height(const struct drm_display_mode *mode) |
1123 | serge | 632 | { |
633 | return mode->vdisplay; |
||
634 | } |
||
635 | EXPORT_SYMBOL(drm_mode_height); |
||
636 | |||
1321 | serge | 637 | /** drm_mode_hsync - get the hsync of a mode |
638 | * @mode: mode |
||
639 | * |
||
640 | * LOCKING: |
||
641 | * None. |
||
642 | * |
||
643 | * Return @modes's hsync rate in kHz, rounded to the nearest int. |
||
644 | */ |
||
1963 | serge | 645 | int drm_mode_hsync(const struct drm_display_mode *mode) |
1321 | serge | 646 | { |
647 | unsigned int calc_val; |
||
648 | |||
649 | if (mode->hsync) |
||
650 | return mode->hsync; |
||
651 | |||
652 | if (mode->htotal < 0) |
||
653 | return 0; |
||
654 | |||
655 | calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ |
||
656 | calc_val += 500; /* round to 1000Hz */ |
||
657 | calc_val /= 1000; /* truncate to kHz */ |
||
658 | |||
659 | return calc_val; |
||
660 | } |
||
661 | EXPORT_SYMBOL(drm_mode_hsync); |
||
662 | |||
1123 | serge | 663 | /** |
664 | * drm_mode_vrefresh - get the vrefresh of a mode |
||
665 | * @mode: mode |
||
666 | * |
||
667 | * LOCKING: |
||
668 | * None. |
||
669 | * |
||
1321 | serge | 670 | * Return @mode's vrefresh rate in Hz or calculate it if necessary. |
1123 | serge | 671 | * |
672 | * FIXME: why is this needed? shouldn't vrefresh be set already? |
||
673 | * |
||
674 | * RETURNS: |
||
1179 | serge | 675 | * Vertical refresh rate. It will be the result of actual value plus 0.5. |
676 | * If it is 70.288, it will return 70Hz. |
||
677 | * If it is 59.6, it will return 60Hz. |
||
1123 | serge | 678 | */ |
1963 | serge | 679 | int drm_mode_vrefresh(const struct drm_display_mode *mode) |
1123 | serge | 680 | { |
681 | int refresh = 0; |
||
682 | unsigned int calc_val; |
||
683 | |||
684 | if (mode->vrefresh > 0) |
||
685 | refresh = mode->vrefresh; |
||
686 | else if (mode->htotal > 0 && mode->vtotal > 0) { |
||
1179 | serge | 687 | int vtotal; |
688 | vtotal = mode->vtotal; |
||
1123 | serge | 689 | /* work out vrefresh the value will be x1000 */ |
690 | calc_val = (mode->clock * 1000); |
||
691 | calc_val /= mode->htotal; |
||
1179 | serge | 692 | refresh = (calc_val + vtotal / 2) / vtotal; |
1123 | serge | 693 | |
694 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
||
695 | refresh *= 2; |
||
696 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
||
697 | refresh /= 2; |
||
698 | if (mode->vscan > 1) |
||
699 | refresh /= mode->vscan; |
||
700 | } |
||
701 | return refresh; |
||
702 | } |
||
703 | EXPORT_SYMBOL(drm_mode_vrefresh); |
||
704 | |||
705 | /** |
||
706 | * drm_mode_set_crtcinfo - set CRTC modesetting parameters |
||
707 | * @p: mode |
||
4560 | Serge | 708 | * @adjust_flags: a combination of adjustment flags |
1123 | serge | 709 | * |
710 | * LOCKING: |
||
711 | * None. |
||
712 | * |
||
713 | * Setup the CRTC modesetting parameters for @p, adjusting if necessary. |
||
4560 | Serge | 714 | * |
715 | * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of |
||
716 | * interlaced modes. |
||
717 | * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for |
||
718 | * buffers containing two eyes (only adjust the timings when needed, eg. for |
||
719 | * "frame packing" or "side by side full"). |
||
1123 | serge | 720 | */ |
721 | void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) |
||
722 | { |
||
723 | if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) |
||
724 | return; |
||
725 | |||
4560 | Serge | 726 | p->crtc_clock = p->clock; |
1123 | serge | 727 | p->crtc_hdisplay = p->hdisplay; |
728 | p->crtc_hsync_start = p->hsync_start; |
||
729 | p->crtc_hsync_end = p->hsync_end; |
||
730 | p->crtc_htotal = p->htotal; |
||
731 | p->crtc_hskew = p->hskew; |
||
732 | p->crtc_vdisplay = p->vdisplay; |
||
733 | p->crtc_vsync_start = p->vsync_start; |
||
734 | p->crtc_vsync_end = p->vsync_end; |
||
735 | p->crtc_vtotal = p->vtotal; |
||
736 | |||
737 | if (p->flags & DRM_MODE_FLAG_INTERLACE) { |
||
738 | if (adjust_flags & CRTC_INTERLACE_HALVE_V) { |
||
739 | p->crtc_vdisplay /= 2; |
||
740 | p->crtc_vsync_start /= 2; |
||
741 | p->crtc_vsync_end /= 2; |
||
742 | p->crtc_vtotal /= 2; |
||
743 | } |
||
744 | } |
||
745 | |||
746 | if (p->flags & DRM_MODE_FLAG_DBLSCAN) { |
||
747 | p->crtc_vdisplay *= 2; |
||
748 | p->crtc_vsync_start *= 2; |
||
749 | p->crtc_vsync_end *= 2; |
||
750 | p->crtc_vtotal *= 2; |
||
751 | } |
||
752 | |||
753 | if (p->vscan > 1) { |
||
754 | p->crtc_vdisplay *= p->vscan; |
||
755 | p->crtc_vsync_start *= p->vscan; |
||
756 | p->crtc_vsync_end *= p->vscan; |
||
757 | p->crtc_vtotal *= p->vscan; |
||
758 | } |
||
759 | |||
4560 | Serge | 760 | if (adjust_flags & CRTC_STEREO_DOUBLE) { |
761 | unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; |
||
762 | |||
763 | switch (layout) { |
||
764 | case DRM_MODE_FLAG_3D_FRAME_PACKING: |
||
765 | p->crtc_clock *= 2; |
||
766 | p->crtc_vdisplay += p->crtc_vtotal; |
||
767 | p->crtc_vsync_start += p->crtc_vtotal; |
||
768 | p->crtc_vsync_end += p->crtc_vtotal; |
||
769 | p->crtc_vtotal += p->crtc_vtotal; |
||
770 | break; |
||
771 | } |
||
772 | } |
||
773 | |||
1123 | serge | 774 | p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); |
775 | p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); |
||
776 | p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); |
||
777 | p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); |
||
778 | } |
||
779 | EXPORT_SYMBOL(drm_mode_set_crtcinfo); |
||
780 | |||
781 | |||
782 | /** |
||
3031 | serge | 783 | * drm_mode_copy - copy the mode |
784 | * @dst: mode to overwrite |
||
785 | * @src: mode to copy |
||
786 | * |
||
787 | * LOCKING: |
||
788 | * None. |
||
789 | * |
||
4075 | Serge | 790 | * Copy an existing mode into another mode, preserving the object id and |
791 | * list head of the destination mode. |
||
3031 | serge | 792 | */ |
793 | void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) |
||
794 | { |
||
795 | int id = dst->base.id; |
||
4075 | Serge | 796 | struct list_head head = dst->head; |
3031 | serge | 797 | |
798 | *dst = *src; |
||
799 | dst->base.id = id; |
||
4075 | Serge | 800 | dst->head = head; |
3031 | serge | 801 | } |
802 | EXPORT_SYMBOL(drm_mode_copy); |
||
803 | |||
804 | /** |
||
1123 | serge | 805 | * drm_mode_duplicate - allocate and duplicate an existing mode |
806 | * @m: mode to duplicate |
||
807 | * |
||
808 | * LOCKING: |
||
809 | * None. |
||
810 | * |
||
811 | * Just allocate a new mode, copy the existing mode into it, and return |
||
812 | * a pointer to it. Used to create new instances of established modes. |
||
813 | */ |
||
814 | struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, |
||
1963 | serge | 815 | const struct drm_display_mode *mode) |
1123 | serge | 816 | { |
817 | struct drm_display_mode *nmode; |
||
818 | |||
819 | nmode = drm_mode_create(dev); |
||
820 | if (!nmode) |
||
821 | return NULL; |
||
822 | |||
3031 | serge | 823 | drm_mode_copy(nmode, mode); |
824 | |||
1123 | serge | 825 | return nmode; |
826 | } |
||
827 | EXPORT_SYMBOL(drm_mode_duplicate); |
||
828 | |||
829 | /** |
||
830 | * drm_mode_equal - test modes for equality |
||
831 | * @mode1: first mode |
||
832 | * @mode2: second mode |
||
833 | * |
||
834 | * LOCKING: |
||
835 | * None. |
||
836 | * |
||
837 | * Check to see if @mode1 and @mode2 are equivalent. |
||
838 | * |
||
839 | * RETURNS: |
||
840 | * True if the modes are equal, false otherwise. |
||
841 | */ |
||
3192 | Serge | 842 | bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) |
1123 | serge | 843 | { |
844 | /* do clock check convert to PICOS so fb modes get matched |
||
845 | * the same */ |
||
846 | if (mode1->clock && mode2->clock) { |
||
847 | if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) |
||
848 | return false; |
||
849 | } else if (mode1->clock != mode2->clock) |
||
850 | return false; |
||
851 | |||
4560 | Serge | 852 | if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) != |
853 | (mode2->flags & DRM_MODE_FLAG_3D_MASK)) |
||
854 | return false; |
||
855 | |||
856 | return drm_mode_equal_no_clocks_no_stereo(mode1, mode2); |
||
3746 | Serge | 857 | } |
858 | EXPORT_SYMBOL(drm_mode_equal); |
||
859 | |||
860 | /** |
||
4560 | Serge | 861 | * drm_mode_equal_no_clocks_no_stereo - test modes for equality |
3746 | Serge | 862 | * @mode1: first mode |
863 | * @mode2: second mode |
||
864 | * |
||
865 | * LOCKING: |
||
866 | * None. |
||
867 | * |
||
868 | * Check to see if @mode1 and @mode2 are equivalent, but |
||
4560 | Serge | 869 | * don't check the pixel clocks nor the stereo layout. |
3746 | Serge | 870 | * |
871 | * RETURNS: |
||
872 | * True if the modes are equal, false otherwise. |
||
873 | */ |
||
4560 | Serge | 874 | bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, |
875 | const struct drm_display_mode *mode2) |
||
3746 | Serge | 876 | { |
1123 | serge | 877 | if (mode1->hdisplay == mode2->hdisplay && |
878 | mode1->hsync_start == mode2->hsync_start && |
||
879 | mode1->hsync_end == mode2->hsync_end && |
||
880 | mode1->htotal == mode2->htotal && |
||
881 | mode1->hskew == mode2->hskew && |
||
882 | mode1->vdisplay == mode2->vdisplay && |
||
883 | mode1->vsync_start == mode2->vsync_start && |
||
884 | mode1->vsync_end == mode2->vsync_end && |
||
885 | mode1->vtotal == mode2->vtotal && |
||
886 | mode1->vscan == mode2->vscan && |
||
4560 | Serge | 887 | (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) == |
888 | (mode2->flags & ~DRM_MODE_FLAG_3D_MASK)) |
||
1123 | serge | 889 | return true; |
890 | |||
891 | return false; |
||
892 | } |
||
4560 | Serge | 893 | EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo); |
1123 | serge | 894 | |
895 | /** |
||
896 | * drm_mode_validate_size - make sure modes adhere to size constraints |
||
897 | * @dev: DRM device |
||
898 | * @mode_list: list of modes to check |
||
899 | * @maxX: maximum width |
||
900 | * @maxY: maximum height |
||
901 | * @maxPitch: max pitch |
||
902 | * |
||
903 | * LOCKING: |
||
904 | * Caller must hold a lock protecting @mode_list. |
||
905 | * |
||
906 | * The DRM device (@dev) has size and pitch limits. Here we validate the |
||
907 | * modes we probed for @dev against those limits and set their status as |
||
908 | * necessary. |
||
909 | */ |
||
910 | void drm_mode_validate_size(struct drm_device *dev, |
||
911 | struct list_head *mode_list, |
||
912 | int maxX, int maxY, int maxPitch) |
||
913 | { |
||
914 | struct drm_display_mode *mode; |
||
915 | |||
916 | list_for_each_entry(mode, mode_list, head) { |
||
917 | if (maxPitch > 0 && mode->hdisplay > maxPitch) |
||
918 | mode->status = MODE_BAD_WIDTH; |
||
919 | |||
920 | if (maxX > 0 && mode->hdisplay > maxX) |
||
921 | mode->status = MODE_VIRTUAL_X; |
||
922 | |||
923 | if (maxY > 0 && mode->vdisplay > maxY) |
||
924 | mode->status = MODE_VIRTUAL_Y; |
||
925 | } |
||
926 | } |
||
927 | EXPORT_SYMBOL(drm_mode_validate_size); |
||
928 | |||
929 | /** |
||
930 | * drm_mode_prune_invalid - remove invalid modes from mode list |
||
931 | * @dev: DRM device |
||
932 | * @mode_list: list of modes to check |
||
933 | * @verbose: be verbose about it |
||
934 | * |
||
935 | * LOCKING: |
||
936 | * Caller must hold a lock protecting @mode_list. |
||
937 | * |
||
938 | * Once mode list generation is complete, a caller can use this routine to |
||
939 | * remove invalid modes from a mode list. If any of the modes have a |
||
940 | * status other than %MODE_OK, they are removed from @mode_list and freed. |
||
941 | */ |
||
942 | void drm_mode_prune_invalid(struct drm_device *dev, |
||
943 | struct list_head *mode_list, bool verbose) |
||
944 | { |
||
945 | struct drm_display_mode *mode, *t; |
||
946 | |||
947 | list_for_each_entry_safe(mode, t, mode_list, head) { |
||
948 | if (mode->status != MODE_OK) { |
||
949 | list_del(&mode->head); |
||
950 | if (verbose) { |
||
951 | drm_mode_debug_printmodeline(mode); |
||
1179 | serge | 952 | DRM_DEBUG_KMS("Not using %s mode %d\n", |
1123 | serge | 953 | mode->name, mode->status); |
954 | } |
||
955 | drm_mode_destroy(dev, mode); |
||
956 | } |
||
957 | } |
||
958 | } |
||
959 | EXPORT_SYMBOL(drm_mode_prune_invalid); |
||
960 | |||
961 | /** |
||
962 | * drm_mode_compare - compare modes for favorability |
||
1404 | serge | 963 | * @priv: unused |
1123 | serge | 964 | * @lh_a: list_head for first mode |
965 | * @lh_b: list_head for second mode |
||
966 | * |
||
967 | * LOCKING: |
||
968 | * None. |
||
969 | * |
||
970 | * Compare two modes, given by @lh_a and @lh_b, returning a value indicating |
||
971 | * which is better. |
||
972 | * |
||
973 | * RETURNS: |
||
974 | * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or |
||
975 | * positive if @lh_b is better than @lh_a. |
||
976 | */ |
||
1404 | serge | 977 | static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) |
1123 | serge | 978 | { |
979 | struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); |
||
980 | struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); |
||
981 | int diff; |
||
982 | |||
983 | diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - |
||
984 | ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); |
||
985 | if (diff) |
||
986 | return diff; |
||
987 | diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; |
||
988 | if (diff) |
||
989 | return diff; |
||
4075 | Serge | 990 | |
991 | diff = b->vrefresh - a->vrefresh; |
||
992 | if (diff) |
||
993 | return diff; |
||
994 | |||
1123 | serge | 995 | diff = b->clock - a->clock; |
996 | return diff; |
||
997 | } |
||
998 | |||
999 | /** |
||
1000 | * drm_mode_sort - sort mode list |
||
1001 | * @mode_list: list to sort |
||
1002 | * |
||
1003 | * LOCKING: |
||
1004 | * Caller must hold a lock protecting @mode_list. |
||
1005 | * |
||
1006 | * Sort @mode_list by favorability, putting good modes first. |
||
1007 | */ |
||
1008 | void drm_mode_sort(struct list_head *mode_list) |
||
1009 | { |
||
1404 | serge | 1010 | list_sort(NULL, mode_list, drm_mode_compare); |
1123 | serge | 1011 | } |
1012 | EXPORT_SYMBOL(drm_mode_sort); |
||
1013 | |||
1014 | /** |
||
1015 | * drm_mode_connector_list_update - update the mode list for the connector |
||
1016 | * @connector: the connector to update |
||
1017 | * |
||
1018 | * LOCKING: |
||
1019 | * Caller must hold a lock protecting @mode_list. |
||
1020 | * |
||
1021 | * This moves the modes from the @connector probed_modes list |
||
1022 | * to the actual mode list. It compares the probed mode against the current |
||
1023 | * list and only adds different modes. All modes unverified after this point |
||
1024 | * will be removed by the prune invalid modes. |
||
1025 | */ |
||
1026 | void drm_mode_connector_list_update(struct drm_connector *connector) |
||
1027 | { |
||
1028 | struct drm_display_mode *mode; |
||
1029 | struct drm_display_mode *pmode, *pt; |
||
1030 | int found_it; |
||
1031 | |||
1032 | list_for_each_entry_safe(pmode, pt, &connector->probed_modes, |
||
1033 | head) { |
||
1034 | found_it = 0; |
||
1035 | /* go through current modes checking for the new probed mode */ |
||
1036 | list_for_each_entry(mode, &connector->modes, head) { |
||
1037 | if (drm_mode_equal(pmode, mode)) { |
||
1038 | found_it = 1; |
||
1039 | /* if equal delete the probed mode */ |
||
1040 | mode->status = pmode->status; |
||
1179 | serge | 1041 | /* Merge type bits together */ |
1042 | mode->type |= pmode->type; |
||
1123 | serge | 1043 | list_del(&pmode->head); |
1044 | drm_mode_destroy(connector->dev, pmode); |
||
1045 | break; |
||
1046 | } |
||
1047 | } |
||
1048 | |||
1049 | if (!found_it) { |
||
1050 | list_move_tail(&pmode->head, &connector->modes); |
||
1051 | } |
||
1052 | } |
||
1053 | } |
||
1054 | EXPORT_SYMBOL(drm_mode_connector_list_update);>>>> |