WebSVN – Kolibri OS – Blame – /drivers/video/drm/drm_edid.c

Rev	Author	Line No.	Line
1123	serge	1	/*
		2	* Copyright (c) 2006 Luc Verhaegen (quirks list)
		3	* Copyright (c) 2007-2008 Intel Corporation
		4	* Jesse Barnes
1963	serge	5	* Copyright 2010 Red Hat, Inc.
1123	serge	6	*
		7	* DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
		8	* FB layer.
		9	* Copyright (C) 2006 Dennis Munsie
		10	*
		11	* Permission is hereby granted, free of charge, to any person obtaining a
		12	* copy of this software and associated documentation files (the "Software"),
		13	* to deal in the Software without restriction, including without limitation
		14	* the rights to use, copy, modify, merge, publish, distribute, sub license,
		15	* and/or sell copies of the Software, and to permit persons to whom the
		16	* Software is furnished to do so, subject to the following conditions:
		17	*
		18	* The above copyright notice and this permission notice (including the
		19	* next paragraph) shall be included in all copies or substantial portions
		20	* of the Software.
		21	*
		22	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
		23	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
		24	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
		25	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
		26	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		27	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
		28	* DEALINGS IN THE SOFTWARE.
		29	*/
1221	serge	30	#include
1963	serge	31	#include
3480	Serge	32	#include
1125	serge	33	#include
3031	serge	34	#include
		35	#include
		36	#include
1123	serge	37
1963	serge	38	#define version_greater(edid, maj, min) \
		39	(((edid)->version > (maj)) \|\| \
		40	((edid)->version == (maj) && (edid)->revision > (min)))
1123	serge	41
1963	serge	42	#define EDID_EST_TIMINGS 16
		43	#define EDID_STD_TIMINGS 8
		44	#define EDID_DETAILED_TIMINGS 4
		45
1123	serge	46	/*
		47	* EDID blocks out in the wild have a variety of bugs, try to collect
		48	* them here (note that userspace may work around broken monitors first,
		49	* but fixes should make their way here so that the kernel "just works"
		50	* on as many displays as possible).
		51	*/
		52
		53	/* First detailed mode wrong, use largest 60Hz mode */
		54	#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
		55	/* Reported 135MHz pixel clock is too high, needs adjustment */
		56	#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
		57	/* Prefer the largest mode at 75 Hz */
		58	#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
		59	/* Detail timing is in cm not mm */
		60	#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
		61	/* Detailed timing descriptors have bogus size values, so just take the
		62	* maximum size and use that.
		63	*/
		64	#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
		65	/* Monitor forgot to set the first detailed is preferred bit. */
		66	#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
		67	/* use +hsync +vsync for detailed mode */
		68	#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
3031	serge	69	/* Force reduced-blanking timings for detailed modes */
		70	#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
4539	Serge	71	/* Force 8bpc */
		72	#define EDID_QUIRK_FORCE_8BPC (1 << 8)
1123	serge	73
1963	serge	74	struct detailed_mode_closure {
		75	struct drm_connector *connector;
		76	struct edid *edid;
		77	bool preferred;
		78	u32 quirks;
		79	int modes;
		80	};
1430	serge	81
1179	serge	82	#define LEVEL_DMT 0
		83	#define LEVEL_GTF 1
1963	serge	84	#define LEVEL_GTF2 2
		85	#define LEVEL_CVT 3
1179	serge	86
1123	serge	87	static struct edid_quirk {
3031	serge	88	char vendor[4];
1123	serge	89	int product_id;
		90	u32 quirks;
		91	} edid_quirk_list[] = {
		92	/* Acer AL1706 */
		93	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
		94	/* Acer F51 */
		95	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
		96	/* Unknown Acer */
		97	{ "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
		98
		99	/* Belinea 10 15 55 */
		100	{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
		101	{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
		102
		103	/* Envision Peripherals, Inc. EN-7100e */
		104	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
1963	serge	105	/* Envision EN2028 */
		106	{ "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
1123	serge	107
		108	/* Funai Electronics PM36B */
		109	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 \|
		110	EDID_QUIRK_DETAILED_IN_CM },
		111
		112	/* LG Philips LCD LP154W01-A5 */
		113	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
		114	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
		115
		116	/* Philips 107p5 CRT */
		117	{ "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
		118
		119	/* Proview AY765C */
		120	{ "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
		121
		122	/* Samsung SyncMaster 205BW. Note: irony */
		123	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
		124	/* Samsung SyncMaster 22[5-6]BW */
		125	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
		126	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
3031	serge	127
		128	/* ViewSonic VA2026w */
		129	{ "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
4104	Serge	130
		131	/* Medion MD 30217 PG */
		132	{ "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
4539	Serge	133
		134	/* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
		135	{ "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
1123	serge	136	};
		137
3480	Serge	138	/*
		139	* Autogenerated from the DMT spec.
		140	* This table is copied from xfree86/modes/xf86EdidModes.c.
		141	*/
		142	static const struct drm_display_mode drm_dmt_modes[] = {
		143	/* 640x350@85Hz */
		144	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
		145	736, 832, 0, 350, 382, 385, 445, 0,
		146	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		147	/* 640x400@85Hz */
		148	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
		149	736, 832, 0, 400, 401, 404, 445, 0,
		150	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		151	/* 720x400@85Hz */
		152	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
		153	828, 936, 0, 400, 401, 404, 446, 0,
		154	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		155	/* 640x480@60Hz */
		156	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
		157	752, 800, 0, 480, 489, 492, 525, 0,
		158	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		159	/* 640x480@72Hz */
		160	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
		161	704, 832, 0, 480, 489, 492, 520, 0,
		162	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		163	/* 640x480@75Hz */
		164	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
		165	720, 840, 0, 480, 481, 484, 500, 0,
		166	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		167	/* 640x480@85Hz */
		168	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
		169	752, 832, 0, 480, 481, 484, 509, 0,
		170	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		171	/* 800x600@56Hz */
		172	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
		173	896, 1024, 0, 600, 601, 603, 625, 0,
		174	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		175	/* 800x600@60Hz */
		176	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
		177	968, 1056, 0, 600, 601, 605, 628, 0,
		178	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		179	/* 800x600@72Hz */
		180	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
		181	976, 1040, 0, 600, 637, 643, 666, 0,
		182	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		183	/* 800x600@75Hz */
		184	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
		185	896, 1056, 0, 600, 601, 604, 625, 0,
		186	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		187	/* 800x600@85Hz */
		188	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
		189	896, 1048, 0, 600, 601, 604, 631, 0,
		190	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		191	/* 800x600@120Hz RB */
		192	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
		193	880, 960, 0, 600, 603, 607, 636, 0,
		194	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		195	/* 848x480@60Hz */
		196	{ DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
		197	976, 1088, 0, 480, 486, 494, 517, 0,
		198	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		199	/* 1024x768@43Hz, interlace */
		200	{ DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
		201	1208, 1264, 0, 768, 768, 772, 817, 0,
		202	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
		203	DRM_MODE_FLAG_INTERLACE) },
		204	/* 1024x768@60Hz */
		205	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
		206	1184, 1344, 0, 768, 771, 777, 806, 0,
		207	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		208	/* 1024x768@70Hz */
		209	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
		210	1184, 1328, 0, 768, 771, 777, 806, 0,
		211	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		212	/* 1024x768@75Hz */
		213	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
		214	1136, 1312, 0, 768, 769, 772, 800, 0,
		215	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		216	/* 1024x768@85Hz */
		217	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
		218	1168, 1376, 0, 768, 769, 772, 808, 0,
		219	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		220	/* 1024x768@120Hz RB */
		221	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
		222	1104, 1184, 0, 768, 771, 775, 813, 0,
		223	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		224	/* 1152x864@75Hz */
		225	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
		226	1344, 1600, 0, 864, 865, 868, 900, 0,
		227	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		228	/* 1280x768@60Hz RB */
		229	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
		230	1360, 1440, 0, 768, 771, 778, 790, 0,
		231	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		232	/* 1280x768@60Hz */
		233	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
		234	1472, 1664, 0, 768, 771, 778, 798, 0,
		235	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		236	/* 1280x768@75Hz */
		237	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
		238	1488, 1696, 0, 768, 771, 778, 805, 0,
		239	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		240	/* 1280x768@85Hz */
		241	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
		242	1496, 1712, 0, 768, 771, 778, 809, 0,
		243	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		244	/* 1280x768@120Hz RB */
		245	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
		246	1360, 1440, 0, 768, 771, 778, 813, 0,
		247	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		248	/* 1280x800@60Hz RB */
		249	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
		250	1360, 1440, 0, 800, 803, 809, 823, 0,
		251	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		252	/* 1280x800@60Hz */
		253	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
		254	1480, 1680, 0, 800, 803, 809, 831, 0,
		255	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		256	/* 1280x800@75Hz */
		257	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
		258	1488, 1696, 0, 800, 803, 809, 838, 0,
		259	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		260	/* 1280x800@85Hz */
		261	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
		262	1496, 1712, 0, 800, 803, 809, 843, 0,
		263	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		264	/* 1280x800@120Hz RB */
		265	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
		266	1360, 1440, 0, 800, 803, 809, 847, 0,
		267	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		268	/* 1280x960@60Hz */
		269	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
		270	1488, 1800, 0, 960, 961, 964, 1000, 0,
		271	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		272	/* 1280x960@85Hz */
		273	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
		274	1504, 1728, 0, 960, 961, 964, 1011, 0,
		275	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		276	/* 1280x960@120Hz RB */
		277	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
		278	1360, 1440, 0, 960, 963, 967, 1017, 0,
		279	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		280	/* 1280x1024@60Hz */
		281	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
		282	1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
		283	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		284	/* 1280x1024@75Hz */
		285	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
		286	1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
		287	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		288	/* 1280x1024@85Hz */
		289	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
		290	1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
		291	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		292	/* 1280x1024@120Hz RB */
		293	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
		294	1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
		295	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		296	/* 1360x768@60Hz */
		297	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
		298	1536, 1792, 0, 768, 771, 777, 795, 0,
		299	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		300	/* 1360x768@120Hz RB */
		301	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
		302	1440, 1520, 0, 768, 771, 776, 813, 0,
		303	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		304	/* 1400x1050@60Hz RB */
		305	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
		306	1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
		307	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		308	/* 1400x1050@60Hz */
		309	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
		310	1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
		311	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		312	/* 1400x1050@75Hz */
		313	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
		314	1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
		315	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		316	/* 1400x1050@85Hz */
		317	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
		318	1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
		319	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		320	/* 1400x1050@120Hz RB */
		321	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
		322	1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
		323	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		324	/* 1440x900@60Hz RB */
		325	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
		326	1520, 1600, 0, 900, 903, 909, 926, 0,
		327	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		328	/* 1440x900@60Hz */
		329	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
		330	1672, 1904, 0, 900, 903, 909, 934, 0,
		331	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		332	/* 1440x900@75Hz */
		333	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
		334	1688, 1936, 0, 900, 903, 909, 942, 0,
		335	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		336	/* 1440x900@85Hz */
		337	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
		338	1696, 1952, 0, 900, 903, 909, 948, 0,
		339	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		340	/* 1440x900@120Hz RB */
		341	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
		342	1520, 1600, 0, 900, 903, 909, 953, 0,
		343	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		344	/* 1600x1200@60Hz */
		345	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
		346	1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
		347	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		348	/* 1600x1200@65Hz */
		349	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
		350	1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
		351	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		352	/* 1600x1200@70Hz */
		353	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
		354	1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
		355	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		356	/* 1600x1200@75Hz */
		357	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
		358	1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
		359	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		360	/* 1600x1200@85Hz */
		361	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
		362	1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
		363	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		364	/* 1600x1200@120Hz RB */
		365	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
		366	1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
		367	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		368	/* 1680x1050@60Hz RB */
		369	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
		370	1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
		371	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		372	/* 1680x1050@60Hz */
		373	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
		374	1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
		375	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		376	/* 1680x1050@75Hz */
		377	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
		378	1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
		379	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		380	/* 1680x1050@85Hz */
		381	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
		382	1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
		383	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		384	/* 1680x1050@120Hz RB */
		385	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
		386	1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
		387	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		388	/* 1792x1344@60Hz */
		389	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
		390	2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
		391	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		392	/* 1792x1344@75Hz */
		393	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
		394	2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
		395	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		396	/* 1792x1344@120Hz RB */
		397	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
		398	1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
		399	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		400	/* 1856x1392@60Hz */
		401	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
		402	2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
		403	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		404	/* 1856x1392@75Hz */
		405	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
		406	2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
		407	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		408	/* 1856x1392@120Hz RB */
		409	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
		410	1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
		411	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		412	/* 1920x1200@60Hz RB */
		413	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
		414	2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
		415	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		416	/* 1920x1200@60Hz */
		417	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
		418	2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
		419	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		420	/* 1920x1200@75Hz */
		421	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
		422	2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
		423	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		424	/* 1920x1200@85Hz */
		425	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
		426	2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
		427	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		428	/* 1920x1200@120Hz RB */
		429	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
		430	2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
		431	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		432	/* 1920x1440@60Hz */
		433	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
		434	2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
		435	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		436	/* 1920x1440@75Hz */
		437	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
		438	2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
		439	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		440	/* 1920x1440@120Hz RB */
		441	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
		442	2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
		443	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		444	/* 2560x1600@60Hz RB */
		445	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
		446	2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
		447	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		448	/* 2560x1600@60Hz */
		449	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
		450	3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
		451	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		452	/* 2560x1600@75HZ */
		453	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
		454	3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
		455	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		456	/* 2560x1600@85HZ */
		457	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
		458	3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
		459	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		460	/* 2560x1600@120Hz RB */
		461	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
		462	2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
		463	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		464	};
		465
		466	static const struct drm_display_mode edid_est_modes[] = {
		467	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
		468	968, 1056, 0, 600, 601, 605, 628, 0,
		469	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
		470	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
		471	896, 1024, 0, 600, 601, 603, 625, 0,
		472	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
		473	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
		474	720, 840, 0, 480, 481, 484, 500, 0,
		475	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
		476	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
		477	704, 832, 0, 480, 489, 491, 520, 0,
		478	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
		479	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
		480	768, 864, 0, 480, 483, 486, 525, 0,
		481	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
		482	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
		483	752, 800, 0, 480, 490, 492, 525, 0,
		484	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
		485	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
		486	846, 900, 0, 400, 421, 423, 449, 0,
		487	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
		488	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
		489	846, 900, 0, 400, 412, 414, 449, 0,
		490	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
		491	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
		492	1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
		493	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
		494	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
		495	1136, 1312, 0, 768, 769, 772, 800, 0,
		496	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
		497	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
		498	1184, 1328, 0, 768, 771, 777, 806, 0,
		499	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
		500	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
		501	1184, 1344, 0, 768, 771, 777, 806, 0,
		502	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
		503	{ DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
		504	1208, 1264, 0, 768, 768, 776, 817, 0,
		505	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \| DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
		506	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
		507	928, 1152, 0, 624, 625, 628, 667, 0,
		508	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
		509	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
		510	896, 1056, 0, 600, 601, 604, 625, 0,
		511	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
		512	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
		513	976, 1040, 0, 600, 637, 643, 666, 0,
		514	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
		515	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
		516	1344, 1600, 0, 864, 865, 868, 900, 0,
		517	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
		518	};
		519
		520	struct minimode {
		521	short w;
		522	short h;
		523	short r;
		524	short rb;
		525	};
		526
		527	static const struct minimode est3_modes[] = {
		528	/* byte 6 */
		529	{ 640, 350, 85, 0 },
		530	{ 640, 400, 85, 0 },
		531	{ 720, 400, 85, 0 },
		532	{ 640, 480, 85, 0 },
		533	{ 848, 480, 60, 0 },
		534	{ 800, 600, 85, 0 },
		535	{ 1024, 768, 85, 0 },
		536	{ 1152, 864, 75, 0 },
		537	/* byte 7 */
		538	{ 1280, 768, 60, 1 },
		539	{ 1280, 768, 60, 0 },
		540	{ 1280, 768, 75, 0 },
		541	{ 1280, 768, 85, 0 },
		542	{ 1280, 960, 60, 0 },
		543	{ 1280, 960, 85, 0 },
		544	{ 1280, 1024, 60, 0 },
		545	{ 1280, 1024, 85, 0 },
		546	/* byte 8 */
		547	{ 1360, 768, 60, 0 },
		548	{ 1440, 900, 60, 1 },
		549	{ 1440, 900, 60, 0 },
		550	{ 1440, 900, 75, 0 },
		551	{ 1440, 900, 85, 0 },
		552	{ 1400, 1050, 60, 1 },
		553	{ 1400, 1050, 60, 0 },
		554	{ 1400, 1050, 75, 0 },
		555	/* byte 9 */
		556	{ 1400, 1050, 85, 0 },
		557	{ 1680, 1050, 60, 1 },
		558	{ 1680, 1050, 60, 0 },
		559	{ 1680, 1050, 75, 0 },
		560	{ 1680, 1050, 85, 0 },
		561	{ 1600, 1200, 60, 0 },
		562	{ 1600, 1200, 65, 0 },
		563	{ 1600, 1200, 70, 0 },
		564	/* byte 10 */
		565	{ 1600, 1200, 75, 0 },
		566	{ 1600, 1200, 85, 0 },
		567	{ 1792, 1344, 60, 0 },
		568	{ 1792, 1344, 85, 0 },
		569	{ 1856, 1392, 60, 0 },
		570	{ 1856, 1392, 75, 0 },
		571	{ 1920, 1200, 60, 1 },
		572	{ 1920, 1200, 60, 0 },
		573	/* byte 11 */
		574	{ 1920, 1200, 75, 0 },
		575	{ 1920, 1200, 85, 0 },
		576	{ 1920, 1440, 60, 0 },
		577	{ 1920, 1440, 75, 0 },
		578	};
		579
		580	static const struct minimode extra_modes[] = {
		581	{ 1024, 576, 60, 0 },
		582	{ 1366, 768, 60, 0 },
		583	{ 1600, 900, 60, 0 },
		584	{ 1680, 945, 60, 0 },
		585	{ 1920, 1080, 60, 0 },
		586	{ 2048, 1152, 60, 0 },
		587	{ 2048, 1536, 60, 0 },
		588	};
		589
		590	/*
		591	* Probably taken from CEA-861 spec.
		592	* This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
		593	*/
		594	static const struct drm_display_mode edid_cea_modes[] = {
		595	/* 1 - 640x480@60Hz */
		596	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
		597	752, 800, 0, 480, 490, 492, 525, 0,
3746	Serge	598	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		599	.vrefresh = 60, },
3480	Serge	600	/* 2 - 720x480@60Hz */
		601	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
		602	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	603	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		604	.vrefresh = 60, },
3480	Serge	605	/* 3 - 720x480@60Hz */
		606	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
		607	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	608	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		609	.vrefresh = 60, },
3480	Serge	610	/* 4 - 1280x720@60Hz */
		611	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
		612	1430, 1650, 0, 720, 725, 730, 750, 0,
3746	Serge	613	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		614	.vrefresh = 60, },
3480	Serge	615	/* 5 - 1920x1080i@60Hz */
		616	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
		617	2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
		618	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
3746	Serge	619	DRM_MODE_FLAG_INTERLACE),
		620	.vrefresh = 60, },
3480	Serge	621	/* 6 - 1440x480i@60Hz */
		622	{ DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
		623	1602, 1716, 0, 480, 488, 494, 525, 0,
		624	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	625	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
		626	.vrefresh = 60, },
3480	Serge	627	/* 7 - 1440x480i@60Hz */
		628	{ DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
		629	1602, 1716, 0, 480, 488, 494, 525, 0,
		630	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	631	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
		632	.vrefresh = 60, },
3480	Serge	633	/* 8 - 1440x240@60Hz */
		634	{ DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
		635	1602, 1716, 0, 240, 244, 247, 262, 0,
		636	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	637	DRM_MODE_FLAG_DBLCLK),
		638	.vrefresh = 60, },
3480	Serge	639	/* 9 - 1440x240@60Hz */
		640	{ DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
		641	1602, 1716, 0, 240, 244, 247, 262, 0,
		642	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	643	DRM_MODE_FLAG_DBLCLK),
		644	.vrefresh = 60, },
3480	Serge	645	/* 10 - 2880x480i@60Hz */
		646	{ DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
		647	3204, 3432, 0, 480, 488, 494, 525, 0,
		648	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	649	DRM_MODE_FLAG_INTERLACE),
		650	.vrefresh = 60, },
3480	Serge	651	/* 11 - 2880x480i@60Hz */
		652	{ DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
		653	3204, 3432, 0, 480, 488, 494, 525, 0,
		654	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	655	DRM_MODE_FLAG_INTERLACE),
		656	.vrefresh = 60, },
3480	Serge	657	/* 12 - 2880x240@60Hz */
		658	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
		659	3204, 3432, 0, 240, 244, 247, 262, 0,
3746	Serge	660	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		661	.vrefresh = 60, },
3480	Serge	662	/* 13 - 2880x240@60Hz */
		663	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
		664	3204, 3432, 0, 240, 244, 247, 262, 0,
3746	Serge	665	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		666	.vrefresh = 60, },
3480	Serge	667	/* 14 - 1440x480@60Hz */
		668	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
		669	1596, 1716, 0, 480, 489, 495, 525, 0,
3746	Serge	670	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		671	.vrefresh = 60, },
3480	Serge	672	/* 15 - 1440x480@60Hz */
		673	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
		674	1596, 1716, 0, 480, 489, 495, 525, 0,
3746	Serge	675	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		676	.vrefresh = 60, },
3480	Serge	677	/* 16 - 1920x1080@60Hz */
		678	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
		679	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	680	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		681	.vrefresh = 60, },
3480	Serge	682	/* 17 - 720x576@50Hz */
		683	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
		684	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	685	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		686	.vrefresh = 50, },
3480	Serge	687	/* 18 - 720x576@50Hz */
		688	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
		689	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	690	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		691	.vrefresh = 50, },
3480	Serge	692	/* 19 - 1280x720@50Hz */
		693	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
		694	1760, 1980, 0, 720, 725, 730, 750, 0,
3746	Serge	695	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		696	.vrefresh = 50, },
3480	Serge	697	/* 20 - 1920x1080i@50Hz */
		698	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
		699	2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
		700	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
3746	Serge	701	DRM_MODE_FLAG_INTERLACE),
		702	.vrefresh = 50, },
3480	Serge	703	/* 21 - 1440x576i@50Hz */
		704	{ DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
		705	1590, 1728, 0, 576, 580, 586, 625, 0,
		706	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	707	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
		708	.vrefresh = 50, },
3480	Serge	709	/* 22 - 1440x576i@50Hz */
		710	{ DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
		711	1590, 1728, 0, 576, 580, 586, 625, 0,
		712	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	713	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
		714	.vrefresh = 50, },
3480	Serge	715	/* 23 - 1440x288@50Hz */
		716	{ DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
		717	1590, 1728, 0, 288, 290, 293, 312, 0,
		718	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	719	DRM_MODE_FLAG_DBLCLK),
		720	.vrefresh = 50, },
3480	Serge	721	/* 24 - 1440x288@50Hz */
		722	{ DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
		723	1590, 1728, 0, 288, 290, 293, 312, 0,
		724	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	725	DRM_MODE_FLAG_DBLCLK),
		726	.vrefresh = 50, },
3480	Serge	727	/* 25 - 2880x576i@50Hz */
		728	{ DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
		729	3180, 3456, 0, 576, 580, 586, 625, 0,
		730	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	731	DRM_MODE_FLAG_INTERLACE),
		732	.vrefresh = 50, },
3480	Serge	733	/* 26 - 2880x576i@50Hz */
		734	{ DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
		735	3180, 3456, 0, 576, 580, 586, 625, 0,
		736	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	737	DRM_MODE_FLAG_INTERLACE),
		738	.vrefresh = 50, },
3480	Serge	739	/* 27 - 2880x288@50Hz */
		740	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
		741	3180, 3456, 0, 288, 290, 293, 312, 0,
3746	Serge	742	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		743	.vrefresh = 50, },
3480	Serge	744	/* 28 - 2880x288@50Hz */
		745	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
		746	3180, 3456, 0, 288, 290, 293, 312, 0,
3746	Serge	747	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		748	.vrefresh = 50, },
3480	Serge	749	/* 29 - 1440x576@50Hz */
		750	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
		751	1592, 1728, 0, 576, 581, 586, 625, 0,
3746	Serge	752	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		753	.vrefresh = 50, },
3480	Serge	754	/* 30 - 1440x576@50Hz */
		755	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
		756	1592, 1728, 0, 576, 581, 586, 625, 0,
3746	Serge	757	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		758	.vrefresh = 50, },
3480	Serge	759	/* 31 - 1920x1080@50Hz */
		760	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
		761	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	762	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		763	.vrefresh = 50, },
3480	Serge	764	/* 32 - 1920x1080@24Hz */
		765	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
		766	2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	767	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		768	.vrefresh = 24, },
3480	Serge	769	/* 33 - 1920x1080@25Hz */
		770	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
		771	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	772	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		773	.vrefresh = 25, },
3480	Serge	774	/* 34 - 1920x1080@30Hz */
		775	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
		776	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	777	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		778	.vrefresh = 30, },
3480	Serge	779	/* 35 - 2880x480@60Hz */
		780	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
		781	3192, 3432, 0, 480, 489, 495, 525, 0,
3746	Serge	782	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		783	.vrefresh = 60, },
3480	Serge	784	/* 36 - 2880x480@60Hz */
		785	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
		786	3192, 3432, 0, 480, 489, 495, 525, 0,
3746	Serge	787	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		788	.vrefresh = 60, },
3480	Serge	789	/* 37 - 2880x576@50Hz */
		790	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
		791	3184, 3456, 0, 576, 581, 586, 625, 0,
3746	Serge	792	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		793	.vrefresh = 50, },
3480	Serge	794	/* 38 - 2880x576@50Hz */
		795	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
		796	3184, 3456, 0, 576, 581, 586, 625, 0,
3746	Serge	797	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		798	.vrefresh = 50, },
3480	Serge	799	/* 39 - 1920x1080i@50Hz */
		800	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
		801	2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
		802	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	803	DRM_MODE_FLAG_INTERLACE),
		804	.vrefresh = 50, },
3480	Serge	805	/* 40 - 1920x1080i@100Hz */
		806	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
		807	2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
		808	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
3746	Serge	809	DRM_MODE_FLAG_INTERLACE),
		810	.vrefresh = 100, },
3480	Serge	811	/* 41 - 1280x720@100Hz */
		812	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
		813	1760, 1980, 0, 720, 725, 730, 750, 0,
3746	Serge	814	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		815	.vrefresh = 100, },
3480	Serge	816	/* 42 - 720x576@100Hz */
		817	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
		818	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	819	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		820	.vrefresh = 100, },
3480	Serge	821	/* 43 - 720x576@100Hz */
		822	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
		823	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	824	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		825	.vrefresh = 100, },
3480	Serge	826	/* 44 - 1440x576i@100Hz */
		827	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
		828	1590, 1728, 0, 576, 580, 586, 625, 0,
		829	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	830	DRM_MODE_FLAG_DBLCLK),
		831	.vrefresh = 100, },
3480	Serge	832	/* 45 - 1440x576i@100Hz */
		833	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
		834	1590, 1728, 0, 576, 580, 586, 625, 0,
		835	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	836	DRM_MODE_FLAG_DBLCLK),
		837	.vrefresh = 100, },
3480	Serge	838	/* 46 - 1920x1080i@120Hz */
		839	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
		840	2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
		841	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
3746	Serge	842	DRM_MODE_FLAG_INTERLACE),
		843	.vrefresh = 120, },
3480	Serge	844	/* 47 - 1280x720@120Hz */
		845	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
		846	1430, 1650, 0, 720, 725, 730, 750, 0,
3746	Serge	847	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		848	.vrefresh = 120, },
3480	Serge	849	/* 48 - 720x480@120Hz */
		850	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
		851	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	852	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		853	.vrefresh = 120, },
3480	Serge	854	/* 49 - 720x480@120Hz */
		855	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
		856	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	857	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		858	.vrefresh = 120, },
3480	Serge	859	/* 50 - 1440x480i@120Hz */
		860	{ DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
		861	1602, 1716, 0, 480, 488, 494, 525, 0,
		862	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	863	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
		864	.vrefresh = 120, },
3480	Serge	865	/* 51 - 1440x480i@120Hz */
		866	{ DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
		867	1602, 1716, 0, 480, 488, 494, 525, 0,
		868	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	869	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
		870	.vrefresh = 120, },
3480	Serge	871	/* 52 - 720x576@200Hz */
		872	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
		873	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	874	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		875	.vrefresh = 200, },
3480	Serge	876	/* 53 - 720x576@200Hz */
		877	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
		878	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	879	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		880	.vrefresh = 200, },
3480	Serge	881	/* 54 - 1440x576i@200Hz */
		882	{ DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
		883	1590, 1728, 0, 576, 580, 586, 625, 0,
		884	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	885	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
		886	.vrefresh = 200, },
3480	Serge	887	/* 55 - 1440x576i@200Hz */
		888	{ DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
		889	1590, 1728, 0, 576, 580, 586, 625, 0,
		890	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	891	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
		892	.vrefresh = 200, },
3480	Serge	893	/* 56 - 720x480@240Hz */
		894	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
		895	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	896	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		897	.vrefresh = 240, },
3480	Serge	898	/* 57 - 720x480@240Hz */
		899	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
		900	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	901	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
		902	.vrefresh = 240, },
3480	Serge	903	/* 58 - 1440x480i@240 */
		904	{ DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
		905	1602, 1716, 0, 480, 488, 494, 525, 0,
		906	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	907	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
		908	.vrefresh = 240, },
3480	Serge	909	/* 59 - 1440x480i@240 */
		910	{ DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
		911	1602, 1716, 0, 480, 488, 494, 525, 0,
		912	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	913	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
		914	.vrefresh = 240, },
3480	Serge	915	/* 60 - 1280x720@24Hz */
		916	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
		917	3080, 3300, 0, 720, 725, 730, 750, 0,
3746	Serge	918	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		919	.vrefresh = 24, },
3480	Serge	920	/* 61 - 1280x720@25Hz */
		921	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
		922	3740, 3960, 0, 720, 725, 730, 750, 0,
3746	Serge	923	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		924	.vrefresh = 25, },
3480	Serge	925	/* 62 - 1280x720@30Hz */
		926	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
		927	3080, 3300, 0, 720, 725, 730, 750, 0,
3746	Serge	928	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		929	.vrefresh = 30, },
3480	Serge	930	/* 63 - 1920x1080@120Hz */
		931	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
		932	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	933	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		934	.vrefresh = 120, },
3480	Serge	935	/* 64 - 1920x1080@100Hz */
		936	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
		937	2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
3746	Serge	938	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		939	.vrefresh = 100, },
3480	Serge	940	};
		941
4104	Serge	942	/*
		943	* HDMI 1.4 4k modes.
		944	*/
		945	static const struct drm_display_mode edid_4k_modes[] = {
		946	/* 1 - 3840x2160@30Hz */
		947	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
		948	3840, 4016, 4104, 4400, 0,
		949	2160, 2168, 2178, 2250, 0,
		950	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		951	.vrefresh = 30, },
		952	/* 2 - 3840x2160@25Hz */
		953	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
		954	3840, 4896, 4984, 5280, 0,
		955	2160, 2168, 2178, 2250, 0,
		956	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		957	.vrefresh = 25, },
		958	/* 3 - 3840x2160@24Hz */
		959	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
		960	3840, 5116, 5204, 5500, 0,
		961	2160, 2168, 2178, 2250, 0,
		962	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		963	.vrefresh = 24, },
		964	/* 4 - 4096x2160@24Hz (SMPTE) */
		965	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
		966	4096, 5116, 5204, 5500, 0,
		967	2160, 2168, 2178, 2250, 0,
		968	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		969	.vrefresh = 24, },
		970	};
		971
1963	serge	972	/* DDC fetch and block validation */
1123	serge	973
1221	serge	974	static const u8 edid_header[] = {
		975	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
		976	};
1123	serge	977
2160	serge	978	/*
		979	* Sanity check the header of the base EDID block. Return 8 if the header
		980	* is perfect, down to 0 if it's totally wrong.
		981	*/
		982	int drm_edid_header_is_valid(const u8 *raw_edid)
		983	{
		984	int i, score = 0;
		985
		986	for (i = 0; i < sizeof(edid_header); i++)
		987	if (raw_edid[i] == edid_header[i])
		988	score++;
		989
		990	return score;
		991	}
		992	EXPORT_SYMBOL(drm_edid_header_is_valid);
		993
3031	serge	994	static int edid_fixup __read_mostly = 6;
3480	Serge	995	module_param_named(edid_fixup, edid_fixup, int, 0400);
		996	MODULE_PARM_DESC(edid_fixup,
		997	"Minimum number of valid EDID header bytes (0-8, default 6)");
2160	serge	998
1963	serge	999	/*
		1000	* Sanity check the EDID block (base or extension). Return 0 if the block
		1001	* doesn't check out, or 1 if it's valid.
1123	serge	1002	*/
3031	serge	1003	bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
1123	serge	1004	{
1963	serge	1005	int i;
1123	serge	1006	u8 csum = 0;
1963	serge	1007	struct edid edid = (struct edid )raw_edid;
1123	serge	1008
4075	Serge	1009	if (WARN_ON(!raw_edid))
		1010	return false;
		1011
3031	serge	1012	if (edid_fixup > 8 \|\| edid_fixup < 0)
		1013	edid_fixup = 6;
		1014
		1015	if (block == 0) {
2160	serge	1016	int score = drm_edid_header_is_valid(raw_edid);
4539	Serge	1017	if (score == 8) ;
		1018	else if (score >= edid_fixup) {
		1019	DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
		1020	memcpy(raw_edid, edid_header, sizeof(edid_header));
1963	serge	1021	} else {
4539	Serge	1022	goto bad;
1963	serge	1023	}
		1024	}
1123	serge	1025
		1026	for (i = 0; i < EDID_LENGTH; i++)
		1027	csum += raw_edid[i];
		1028	if (csum) {
3120	serge	1029	if (print_bad_edid) {
1123	serge	1030	DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
3120	serge	1031	}
1963	serge	1032
		1033	/* allow CEA to slide through, switches mangle this */
		1034	if (raw_edid[0] != 0x02)
1123	serge	1035	goto bad;
		1036	}
		1037
1963	serge	1038	/* per-block-type checks */
		1039	switch (raw_edid[0]) {
		1040	case 0: /* base */
1321	serge	1041	if (edid->version != 1) {
		1042	DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
		1043	goto bad;
		1044	}
		1045
		1046	if (edid->revision > 4)
		1047	DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1963	serge	1048	break;
1321	serge	1049
1963	serge	1050	default:
		1051	break;
		1052	}
		1053
4075	Serge	1054	return true;
1123	serge	1055
		1056	bad:
4075	Serge	1057	if (print_bad_edid) {
2004	serge	1058	printk(KERN_ERR "Raw EDID:\n");
3480	Serge	1059	print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
		1060	raw_edid, EDID_LENGTH, false);
1123	serge	1061	}
4075	Serge	1062	return false;
1123	serge	1063	}
3031	serge	1064	EXPORT_SYMBOL(drm_edid_block_valid);
1963	serge	1065
		1066	/**
		1067	* drm_edid_is_valid - sanity check EDID data
		1068	* @edid: EDID data
		1069	*
		1070	* Sanity-check an entire EDID record (including extensions)
		1071	*/
		1072	bool drm_edid_is_valid(struct edid *edid)
		1073	{
		1074	int i;
		1075	u8 raw = (u8 )edid;
		1076
		1077	if (!edid)
		1078	return false;
		1079
		1080	for (i = 0; i <= edid->extensions; i++)
3031	serge	1081	if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
1963	serge	1082	return false;
		1083
		1084	return true;
		1085	}
1430	serge	1086	EXPORT_SYMBOL(drm_edid_is_valid);
1123	serge	1087
1963	serge	1088	#define DDC_SEGMENT_ADDR 0x30
1123	serge	1089	/**
1963	serge	1090	* Get EDID information via I2C.
		1091	*
		1092	* \param adapter : i2c device adaptor
		1093	* \param buf : EDID data buffer to be filled
		1094	* \param len : EDID data buffer length
		1095	* \return 0 on success or -1 on failure.
		1096	*
		1097	* Try to fetch EDID information by calling i2c driver function.
		1098	*/
		1099	static int
		1100	drm_do_probe_ddc_edid(struct i2c_adapter adapter, unsigned char buf,
		1101	int block, int len)
		1102	{
		1103	unsigned char start = block * EDID_LENGTH;
3031	serge	1104	unsigned char segment = block >> 1;
		1105	unsigned char xfers = segment ? 3 : 2;
1963	serge	1106	int ret, retries = 5;
		1107
		1108	/* The core i2c driver will automatically retry the transfer if the
		1109	* adapter reports EAGAIN. However, we find that bit-banging transfers
		1110	* are susceptible to errors under a heavily loaded machine and
		1111	* generate spurious NAKs and timeouts. Retrying the transfer
		1112	* of the individual block a few times seems to overcome this.
		1113	*/
		1114	do {
		1115	struct i2c_msg msgs[] = {
		1116	{
3031	serge	1117	.addr = DDC_SEGMENT_ADDR,
		1118	.flags = 0,
		1119	.len = 1,
		1120	.buf = &segment,
		1121	}, {
1963	serge	1122	.addr = DDC_ADDR,
		1123	.flags = 0,
		1124	.len = 1,
		1125	.buf = &start,
		1126	}, {
		1127	.addr = DDC_ADDR,
		1128	.flags = I2C_M_RD,
		1129	.len = len,
		1130	.buf = buf,
		1131	}
		1132	};
		1133
3031	serge	1134	/*
		1135	* Avoid sending the segment addr to not upset non-compliant ddc
		1136	* monitors.
		1137	*/
		1138	ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
		1139
		1140	if (ret == -ENXIO) {
		1141	DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
		1142	adapter->name);
		1143	break;
		1144	}
		1145	} while (ret != xfers && --retries);
		1146
		1147	return ret == xfers ? 0 : -1;
1963	serge	1148	}
		1149
2004	serge	1150	static bool drm_edid_is_zero(u8 *in_edid, int length)
		1151	{
3480	Serge	1152	if (memchr_inv(in_edid, 0, length))
		1153	return false;
2004	serge	1154
		1155	return true;
		1156	}
		1157
1963	serge	1158	static u8 *
		1159	drm_do_get_edid(struct drm_connector connector, struct i2c_adapter adapter)
		1160	{
		1161	int i, j = 0, valid_extensions = 0;
		1162	u8 block, new;
3031	serge	1163	bool print_bad_edid = !connector->bad_edid_counter \|\| (drm_debug & DRM_UT_KMS);
1963	serge	1164
		1165	if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
		1166	return NULL;
		1167
		1168	/* base block fetch */
		1169	for (i = 0; i < 4; i++) {
		1170	if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
4539	Serge	1171	goto out;
3031	serge	1172	if (drm_edid_block_valid(block, 0, print_bad_edid))
1963	serge	1173	break;
2004	serge	1174	if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
		1175	connector->null_edid_counter++;
		1176	goto carp;
		1177	}
1963	serge	1178	}
		1179	if (i == 4)
		1180	goto carp;
		1181
		1182	/* if there's no extensions, we're done */
		1183	if (block[0x7e] == 0)
		1184	return block;
		1185
3480	Serge	1186	new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1963	serge	1187	if (!new)
		1188	goto out;
		1189	block = new;
		1190
		1191	for (j = 1; j <= block[0x7e]; j++) {
		1192	for (i = 0; i < 4; i++) {
		1193	if (drm_do_probe_ddc_edid(adapter,
		1194	block + (valid_extensions + 1) * EDID_LENGTH,
		1195	j, EDID_LENGTH))
		1196	goto out;
3031	serge	1197	if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1963	serge	1198	valid_extensions++;
		1199	break;
		1200	}
		1201	}
3480	Serge	1202
		1203	if (i == 4 && print_bad_edid) {
1963	serge	1204	dev_warn(connector->dev->dev,
		1205	"%s: Ignoring invalid EDID block %d.\n",
		1206	drm_get_connector_name(connector), j);
3480	Serge	1207
		1208	connector->bad_edid_counter++;
		1209	}
1963	serge	1210	}
		1211
		1212	if (valid_extensions != block[0x7e]) {
		1213	block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
		1214	block[0x7e] = valid_extensions;
3480	Serge	1215	new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1963	serge	1216	if (!new)
		1217	goto out;
		1218	block = new;
		1219	}
		1220
		1221	return block;
		1222
		1223	carp:
3031	serge	1224	if (print_bad_edid) {
1963	serge	1225	dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
		1226	drm_get_connector_name(connector), j);
3031	serge	1227	}
		1228	connector->bad_edid_counter++;
1963	serge	1229
		1230	out:
		1231	kfree(block);
		1232	return NULL;
		1233	}
		1234
		1235	/**
		1236	* Probe DDC presence.
		1237	*
		1238	* \param adapter : i2c device adaptor
		1239	* \return 1 on success
		1240	*/
3031	serge	1241	bool
1963	serge	1242	drm_probe_ddc(struct i2c_adapter *adapter)
		1243	{
		1244	unsigned char out;
		1245
		1246	return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
		1247	}
3031	serge	1248	EXPORT_SYMBOL(drm_probe_ddc);
1963	serge	1249
		1250	/**
		1251	* drm_get_edid - get EDID data, if available
		1252	* @connector: connector we're probing
		1253	* @adapter: i2c adapter to use for DDC
		1254	*
		1255	* Poke the given i2c channel to grab EDID data if possible. If found,
		1256	* attach it to the connector.
		1257	*
		1258	* Return edid data or NULL if we couldn't find any.
		1259	*/
		1260	struct edid drm_get_edid(struct drm_connector connector,
		1261	struct i2c_adapter *adapter)
		1262	{
		1263	struct edid *edid = NULL;
		1264
		1265	if (drm_probe_ddc(adapter))
		1266	edid = (struct edid *)drm_do_get_edid(connector, adapter);
		1267
		1268	return edid;
		1269	}
		1270	EXPORT_SYMBOL(drm_get_edid);
		1271
		1272	/* EDID parsing */
		1273
		1274	/**
1123	serge	1275	* edid_vendor - match a string against EDID's obfuscated vendor field
		1276	* @edid: EDID to match
		1277	* @vendor: vendor string
		1278	*
		1279	* Returns true if @vendor is in @edid, false otherwise
		1280	*/
		1281	static bool edid_vendor(struct edid edid, char vendor)
		1282	{
		1283	char edid_vendor[3];
		1284
		1285	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
		1286	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) \|
		1287	((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
		1288	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
		1289
		1290	return !strncmp(edid_vendor, vendor, 3);
		1291	}
		1292
		1293	/**
		1294	* edid_get_quirks - return quirk flags for a given EDID
		1295	* @edid: EDID to process
		1296	*
		1297	* This tells subsequent routines what fixes they need to apply.
		1298	*/
		1299	static u32 edid_get_quirks(struct edid *edid)
		1300	{
		1301	struct edid_quirk *quirk;
		1302	int i;
		1303
		1304	for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
		1305	quirk = &edid_quirk_list[i];
		1306
		1307	if (edid_vendor(edid, quirk->vendor) &&
		1308	(EDID_PRODUCT_ID(edid) == quirk->product_id))
		1309	return quirk->quirks;
		1310	}
		1311
		1312	return 0;
		1313	}
		1314
		1315	#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
		1316	#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
		1317
		1318	/**
		1319	* edid_fixup_preferred - set preferred modes based on quirk list
		1320	* @connector: has mode list to fix up
		1321	* @quirks: quirks list
		1322	*
		1323	* Walk the mode list for @connector, clearing the preferred status
		1324	* on existing modes and setting it anew for the right mode ala @quirks.
		1325	*/
		1326	static void edid_fixup_preferred(struct drm_connector *connector,
		1327	u32 quirks)
		1328	{
		1329	struct drm_display_mode t, cur_mode, *preferred_mode;
		1330	int target_refresh = 0;
		1331
		1332	if (list_empty(&connector->probed_modes))
		1333	return;
		1334
		1335	if (quirks & EDID_QUIRK_PREFER_LARGE_60)
		1336	target_refresh = 60;
		1337	if (quirks & EDID_QUIRK_PREFER_LARGE_75)
		1338	target_refresh = 75;
		1339
		1340	preferred_mode = list_first_entry(&connector->probed_modes,
		1341	struct drm_display_mode, head);
		1342
		1343	list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
		1344	cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
		1345
		1346	if (cur_mode == preferred_mode)
		1347	continue;
		1348
		1349	/* Largest mode is preferred */
		1350	if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
		1351	preferred_mode = cur_mode;
		1352
		1353	/* At a given size, try to get closest to target refresh */
		1354	if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
		1355	MODE_REFRESH_DIFF(cur_mode, target_refresh) <
		1356	MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
		1357	preferred_mode = cur_mode;
		1358	}
		1359	}
		1360
		1361	preferred_mode->type \|= DRM_MODE_TYPE_PREFERRED;
		1362	}
		1363
3031	serge	1364	static bool
		1365	mode_is_rb(const struct drm_display_mode *mode)
		1366	{
		1367	return (mode->htotal - mode->hdisplay == 160) &&
		1368	(mode->hsync_end - mode->hdisplay == 80) &&
		1369	(mode->hsync_end - mode->hsync_start == 32) &&
		1370	(mode->vsync_start - mode->vdisplay == 3);
		1371	}
		1372
		1373	/*
		1374	* drm_mode_find_dmt - Create a copy of a mode if present in DMT
		1375	* @dev: Device to duplicate against
		1376	* @hsize: Mode width
		1377	* @vsize: Mode height
		1378	* @fresh: Mode refresh rate
		1379	* @rb: Mode reduced-blanking-ness
		1380	*
		1381	* Walk the DMT mode list looking for a match for the given parameters.
		1382	* Return a newly allocated copy of the mode, or NULL if not found.
		1383	*/
1963	serge	1384	struct drm_display_mode drm_mode_find_dmt(struct drm_device dev,
3031	serge	1385	int hsize, int vsize, int fresh,
		1386	bool rb)
1179	serge	1387	{
1321	serge	1388	int i;
1179	serge	1389
3480	Serge	1390	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1963	serge	1391	const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3031	serge	1392	if (hsize != ptr->hdisplay)
		1393	continue;
		1394	if (vsize != ptr->vdisplay)
		1395	continue;
		1396	if (fresh != drm_mode_vrefresh(ptr))
		1397	continue;
		1398	if (rb != mode_is_rb(ptr))
		1399	continue;
		1400
		1401	return drm_mode_duplicate(dev, ptr);
1179	serge	1402	}
3031	serge	1403
		1404	return NULL;
1179	serge	1405	}
1963	serge	1406	EXPORT_SYMBOL(drm_mode_find_dmt);
1221	serge	1407
1963	serge	1408	typedef void detailed_cb(struct detailed_timing timing, void closure);
		1409
		1410	static void
		1411	cea_for_each_detailed_block(u8 ext, detailed_cb cb, void *closure)
		1412	{
		1413	int i, n = 0;
3031	serge	1414	u8 d = ext[0x02];
1963	serge	1415	u8 *det_base = ext + d;
		1416
3031	serge	1417	n = (127 - d) / 18;
1963	serge	1418	for (i = 0; i < n; i++)
		1419	cb((struct detailed_timing )(det_base + 18 i), closure);
		1420	}
		1421
		1422	static void
		1423	vtb_for_each_detailed_block(u8 ext, detailed_cb cb, void *closure)
		1424	{
		1425	unsigned int i, n = min((int)ext[0x02], 6);
		1426	u8 *det_base = ext + 5;
		1427
		1428	if (ext[0x01] != 1)
		1429	return; /* unknown version */
		1430
		1431	for (i = 0; i < n; i++)
		1432	cb((struct detailed_timing )(det_base + 18 i), closure);
		1433	}
		1434
		1435	static void
		1436	drm_for_each_detailed_block(u8 raw_edid, detailed_cb cb, void *closure)
		1437	{
		1438	int i;
		1439	struct edid edid = (struct edid )raw_edid;
		1440
		1441	if (edid == NULL)
		1442	return;
		1443
		1444	for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
		1445	cb(&(edid->detailed_timings[i]), closure);
		1446
		1447	for (i = 1; i <= raw_edid[0x7e]; i++) {
		1448	u8 ext = raw_edid + (i EDID_LENGTH);
		1449	switch (*ext) {
		1450	case CEA_EXT:
		1451	cea_for_each_detailed_block(ext, cb, closure);
		1452	break;
		1453	case VTB_EXT:
		1454	vtb_for_each_detailed_block(ext, cb, closure);
		1455	break;
		1456	default:
		1457	break;
		1458	}
		1459	}
		1460	}
		1461
		1462	static void
		1463	is_rb(struct detailed_timing t, void data)
		1464	{
		1465	u8 r = (u8 )t;
		1466	if (r[3] == EDID_DETAIL_MONITOR_RANGE)
		1467	if (r[15] & 0x10)
		1468	(bool )data = true;
		1469	}
		1470
		1471	/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
		1472	static bool
		1473	drm_monitor_supports_rb(struct edid *edid)
		1474	{
		1475	if (edid->revision >= 4) {
3031	serge	1476	bool ret = false;
1963	serge	1477	drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
		1478	return ret;
		1479	}
		1480
		1481	return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
		1482	}
		1483
		1484	static void
		1485	find_gtf2(struct detailed_timing t, void data)
		1486	{
		1487	u8 r = (u8 )t;
		1488	if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
		1489	(u8 *)data = r;
		1490	}
		1491
		1492	/* Secondary GTF curve kicks in above some break frequency */
		1493	static int
		1494	drm_gtf2_hbreak(struct edid *edid)
		1495	{
		1496	u8 *r = NULL;
		1497	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
		1498	return r ? (r[12] * 2) : 0;
		1499	}
		1500
		1501	static int
		1502	drm_gtf2_2c(struct edid *edid)
		1503	{
		1504	u8 *r = NULL;
		1505	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
		1506	return r ? r[13] : 0;
		1507	}
		1508
		1509	static int
		1510	drm_gtf2_m(struct edid *edid)
		1511	{
		1512	u8 *r = NULL;
		1513	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
		1514	return r ? (r[15] << 8) + r[14] : 0;
		1515	}
		1516
		1517	static int
		1518	drm_gtf2_k(struct edid *edid)
		1519	{
		1520	u8 *r = NULL;
		1521	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
		1522	return r ? r[16] : 0;
		1523	}
		1524
		1525	static int
		1526	drm_gtf2_2j(struct edid *edid)
		1527	{
		1528	u8 *r = NULL;
		1529	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
		1530	return r ? r[17] : 0;
		1531	}
		1532
		1533	/**
		1534	* standard_timing_level - get std. timing level(CVT/GTF/DMT)
		1535	* @edid: EDID block to scan
		1536	*/
		1537	static int standard_timing_level(struct edid *edid)
		1538	{
		1539	if (edid->revision >= 2) {
		1540	if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
		1541	return LEVEL_CVT;
		1542	if (drm_gtf2_hbreak(edid))
		1543	return LEVEL_GTF2;
		1544	return LEVEL_GTF;
		1545	}
		1546	return LEVEL_DMT;
		1547	}
		1548
1221	serge	1549	/*
		1550	* 0 is reserved. The spec says 0x01 fill for unused timings. Some old
		1551	* monitors fill with ascii space (0x20) instead.
		1552	*/
		1553	static int
		1554	bad_std_timing(u8 a, u8 b)
		1555	{
		1556	return (a == 0x00 && b == 0x00) \|\|
		1557	(a == 0x01 && b == 0x01) \|\|
		1558	(a == 0x20 && b == 0x20);
		1559	}
		1560
1123	serge	1561	/**
		1562	* drm_mode_std - convert standard mode info (width, height, refresh) into mode
		1563	* @t: standard timing params
1221	serge	1564	* @timing_level: standard timing level
1123	serge	1565	*
		1566	* Take the standard timing params (in this case width, aspect, and refresh)
1221	serge	1567	* and convert them into a real mode using CVT/GTF/DMT.
1123	serge	1568	*/
1963	serge	1569	static struct drm_display_mode *
		1570	drm_mode_std(struct drm_connector connector, struct edid edid,
		1571	struct std_timing *t, int revision)
1123	serge	1572	{
1963	serge	1573	struct drm_device *dev = connector->dev;
		1574	struct drm_display_mode m, mode = NULL;
1179	serge	1575	int hsize, vsize;
		1576	int vrefresh_rate;
1123	serge	1577	unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
		1578	>> EDID_TIMING_ASPECT_SHIFT;
1179	serge	1579	unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
		1580	>> EDID_TIMING_VFREQ_SHIFT;
1963	serge	1581	int timing_level = standard_timing_level(edid);
1123	serge	1582
1221	serge	1583	if (bad_std_timing(t->hsize, t->vfreq_aspect))
		1584	return NULL;
		1585
1179	serge	1586	/* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
		1587	hsize = t->hsize * 8 + 248;
		1588	/* vrefresh_rate = vfreq + 60 */
		1589	vrefresh_rate = vfreq + 60;
		1590	/* the vdisplay is calculated based on the aspect ratio */
1221	serge	1591	if (aspect_ratio == 0) {
		1592	if (revision < 3)
		1593	vsize = hsize;
		1594	else
1123	serge	1595	vsize = (hsize * 10) / 16;
1221	serge	1596	} else if (aspect_ratio == 1)
1123	serge	1597	vsize = (hsize * 3) / 4;
		1598	else if (aspect_ratio == 2)
		1599	vsize = (hsize * 4) / 5;
		1600	else
		1601	vsize = (hsize * 9) / 16;
1963	serge	1602
		1603	/* HDTV hack, part 1 */
		1604	if (vrefresh_rate == 60 &&
		1605	((hsize == 1360 && vsize == 765) \|\|
		1606	(hsize == 1368 && vsize == 769))) {
		1607	hsize = 1366;
		1608	vsize = 768;
		1609	}
		1610
		1611	/*
		1612	* If this connector already has a mode for this size and refresh
		1613	* rate (because it came from detailed or CVT info), use that
		1614	* instead. This way we don't have to guess at interlace or
		1615	* reduced blanking.
		1616	*/
		1617	list_for_each_entry(m, &connector->probed_modes, head)
		1618	if (m->hdisplay == hsize && m->vdisplay == vsize &&
		1619	drm_mode_vrefresh(m) == vrefresh_rate)
		1620	return NULL;
		1621
		1622	/* HDTV hack, part 2 */
		1623	if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
		1624	mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1221	serge	1625	false);
1179	serge	1626	mode->hdisplay = 1366;
1963	serge	1627	mode->hsync_start = mode->hsync_start - 1;
		1628	mode->hsync_end = mode->hsync_end - 1;
1179	serge	1629	return mode;
		1630	}
1963	serge	1631
1179	serge	1632	/* check whether it can be found in default mode table */
3031	serge	1633	if (drm_monitor_supports_rb(edid)) {
		1634	mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
		1635	true);
		1636	if (mode)
		1637	return mode;
		1638	}
		1639	mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1179	serge	1640	if (mode)
		1641	return mode;
1123	serge	1642
3031	serge	1643	/* okay, generate it */
1179	serge	1644	switch (timing_level) {
		1645	case LEVEL_DMT:
		1646	break;
		1647	case LEVEL_GTF:
		1648	mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
		1649	break;
1963	serge	1650	case LEVEL_GTF2:
		1651	/*
		1652	* This is potentially wrong if there's ever a monitor with
		1653	* more than one ranges section, each claiming a different
		1654	* secondary GTF curve. Please don't do that.
		1655	*/
		1656	mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
3031	serge	1657	if (!mode)
		1658	return NULL;
1963	serge	1659	if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
3031	serge	1660	drm_mode_destroy(dev, mode);
1963	serge	1661	mode = drm_gtf_mode_complex(dev, hsize, vsize,
		1662	vrefresh_rate, 0, 0,
		1663	drm_gtf2_m(edid),
		1664	drm_gtf2_2c(edid),
		1665	drm_gtf2_k(edid),
		1666	drm_gtf2_2j(edid));
		1667	}
		1668	break;
1179	serge	1669	case LEVEL_CVT:
1221	serge	1670	mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
		1671	false);
1179	serge	1672	break;
		1673	}
1123	serge	1674	return mode;
		1675	}
		1676
1428	serge	1677	/*
		1678	* EDID is delightfully ambiguous about how interlaced modes are to be
		1679	* encoded. Our internal representation is of frame height, but some
		1680	* HDTV detailed timings are encoded as field height.
		1681	*
		1682	* The format list here is from CEA, in frame size. Technically we
		1683	* should be checking refresh rate too. Whatever.
		1684	*/
		1685	static void
		1686	drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
		1687	struct detailed_pixel_timing *pt)
		1688	{
		1689	int i;
		1690	static const struct {
		1691	int w, h;
		1692	} cea_interlaced[] = {
		1693	{ 1920, 1080 },
		1694	{ 720, 480 },
		1695	{ 1440, 480 },
		1696	{ 2880, 480 },
		1697	{ 720, 576 },
		1698	{ 1440, 576 },
		1699	{ 2880, 576 },
		1700	};
		1701
		1702	if (!(pt->misc & DRM_EDID_PT_INTERLACED))
		1703	return;
		1704
1963	serge	1705	for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1428	serge	1706	if ((mode->hdisplay == cea_interlaced[i].w) &&
		1707	(mode->vdisplay == cea_interlaced[i].h / 2)) {
		1708	mode->vdisplay *= 2;
		1709	mode->vsync_start *= 2;
		1710	mode->vsync_end *= 2;
		1711	mode->vtotal *= 2;
		1712	mode->vtotal \|= 1;
		1713	}
		1714	}
		1715
		1716	mode->flags \|= DRM_MODE_FLAG_INTERLACE;
		1717	}
		1718
1123	serge	1719	/**
		1720	* drm_mode_detailed - create a new mode from an EDID detailed timing section
		1721	* @dev: DRM device (needed to create new mode)
		1722	* @edid: EDID block
		1723	* @timing: EDID detailed timing info
		1724	* @quirks: quirks to apply
		1725	*
		1726	* An EDID detailed timing block contains enough info for us to create and
		1727	* return a new struct drm_display_mode.
		1728	*/
		1729	static struct drm_display_mode drm_mode_detailed(struct drm_device dev,
		1730	struct edid *edid,
		1731	struct detailed_timing *timing,
		1732	u32 quirks)
		1733	{
		1734	struct drm_display_mode *mode;
		1735	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
		1736	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 \| pt->hactive_lo;
		1737	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 \| pt->vactive_lo;
		1738	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 \| pt->hblank_lo;
		1739	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 \| pt->vblank_lo;
		1740	unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 \| pt->hsync_offset_lo;
		1741	unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 \| pt->hsync_pulse_width_lo;
3480	Serge	1742	unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 \| pt->vsync_offset_pulse_width_lo >> 4;
1123	serge	1743	unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 \| (pt->vsync_offset_pulse_width_lo & 0xf);
		1744
		1745	/* ignore tiny modes */
		1746	if (hactive < 64 \|\| vactive < 64)
		1747	return NULL;
		1748
		1749	if (pt->misc & DRM_EDID_PT_STEREO) {
4075	Serge	1750	DRM_DEBUG_KMS("stereo mode not supported\n");
1123	serge	1751	return NULL;
		1752	}
		1753	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
4075	Serge	1754	DRM_DEBUG_KMS("composite sync not supported\n");
1123	serge	1755	}
		1756
1246	serge	1757	/* it is incorrect if hsync/vsync width is zero */
		1758	if (!hsync_pulse_width \|\| !vsync_pulse_width) {
		1759	DRM_DEBUG_KMS("Incorrect Detailed timing. "
		1760	"Wrong Hsync/Vsync pulse width\n");
		1761	return NULL;
		1762	}
3031	serge	1763
		1764	if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
		1765	mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
		1766	if (!mode)
		1767	return NULL;
		1768
		1769	goto set_size;
		1770	}
		1771
1123	serge	1772	mode = drm_mode_create(dev);
		1773	if (!mode)
		1774	return NULL;
		1775
		1776	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
		1777	timing->pixel_clock = cpu_to_le16(1088);
		1778
		1779	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
		1780
		1781	mode->hdisplay = hactive;
		1782	mode->hsync_start = mode->hdisplay + hsync_offset;
		1783	mode->hsync_end = mode->hsync_start + hsync_pulse_width;
		1784	mode->htotal = mode->hdisplay + hblank;
		1785
		1786	mode->vdisplay = vactive;
		1787	mode->vsync_start = mode->vdisplay + vsync_offset;
		1788	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
		1789	mode->vtotal = mode->vdisplay + vblank;
		1790
1313	serge	1791	/* Some EDIDs have bogus h/vtotal values */
		1792	if (mode->hsync_end > mode->htotal)
		1793	mode->htotal = mode->hsync_end + 1;
		1794	if (mode->vsync_end > mode->vtotal)
		1795	mode->vtotal = mode->vsync_end + 1;
		1796
1963	serge	1797	drm_mode_do_interlace_quirk(mode, pt);
		1798
1123	serge	1799	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
		1800	pt->misc \|= DRM_EDID_PT_HSYNC_POSITIVE \| DRM_EDID_PT_VSYNC_POSITIVE;
		1801	}
		1802
		1803	mode->flags \|= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
		1804	DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
		1805	mode->flags \|= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
		1806	DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
		1807
3031	serge	1808	set_size:
1123	serge	1809	mode->width_mm = pt->width_mm_lo \| (pt->width_height_mm_hi & 0xf0) << 4;
		1810	mode->height_mm = pt->height_mm_lo \| (pt->width_height_mm_hi & 0xf) << 8;
		1811
		1812	if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
		1813	mode->width_mm *= 10;
		1814	mode->height_mm *= 10;
		1815	}
		1816
		1817	if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
		1818	mode->width_mm = edid->width_cm * 10;
		1819	mode->height_mm = edid->height_cm * 10;
		1820	}
		1821
3031	serge	1822	mode->type = DRM_MODE_TYPE_DRIVER;
3480	Serge	1823	mode->vrefresh = drm_mode_vrefresh(mode);
3031	serge	1824	drm_mode_set_name(mode);
		1825
1123	serge	1826	return mode;
		1827	}
		1828
1963	serge	1829	static bool
		1830	mode_in_hsync_range(const struct drm_display_mode *mode,
		1831	struct edid edid, u8 t)
		1832	{
		1833	int hsync, hmin, hmax;
		1834
		1835	hmin = t[7];
		1836	if (edid->revision >= 4)
		1837	hmin += ((t[4] & 0x04) ? 255 : 0);
		1838	hmax = t[8];
		1839	if (edid->revision >= 4)
		1840	hmax += ((t[4] & 0x08) ? 255 : 0);
		1841	hsync = drm_mode_hsync(mode);
		1842
		1843	return (hsync <= hmax && hsync >= hmin);
		1844	}
		1845
		1846	static bool
		1847	mode_in_vsync_range(const struct drm_display_mode *mode,
		1848	struct edid edid, u8 t)
		1849	{
		1850	int vsync, vmin, vmax;
		1851
		1852	vmin = t[5];
		1853	if (edid->revision >= 4)
		1854	vmin += ((t[4] & 0x01) ? 255 : 0);
		1855	vmax = t[6];
		1856	if (edid->revision >= 4)
		1857	vmax += ((t[4] & 0x02) ? 255 : 0);
		1858	vsync = drm_mode_vrefresh(mode);
		1859
		1860	return (vsync <= vmax && vsync >= vmin);
		1861	}
		1862
		1863	static u32
		1864	range_pixel_clock(struct edid edid, u8 t)
		1865	{
		1866	/* unspecified */
		1867	if (t[9] == 0 \|\| t[9] == 255)
		1868	return 0;
		1869
		1870	/* 1.4 with CVT support gives us real precision, yay */
		1871	if (edid->revision >= 4 && t[10] == 0x04)
		1872	return (t[9] * 10000) - ((t[12] >> 2) * 250);
		1873
		1874	/* 1.3 is pathetic, so fuzz up a bit */
		1875	return t[9] * 10000 + 5001;
		1876	}
		1877
		1878	static bool
		1879	mode_in_range(const struct drm_display_mode mode, struct edid edid,
		1880	struct detailed_timing *timing)
		1881	{
		1882	u32 max_clock;
		1883	u8 t = (u8 )timing;
		1884
		1885	if (!mode_in_hsync_range(mode, edid, t))
		1886	return false;
		1887
		1888	if (!mode_in_vsync_range(mode, edid, t))
		1889	return false;
		1890
		1891	if ((max_clock = range_pixel_clock(edid, t)))
		1892	if (mode->clock > max_clock)
		1893	return false;
		1894
		1895	/* 1.4 max horizontal check */
		1896	if (edid->revision >= 4 && t[10] == 0x04)
		1897	if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
		1898	return false;
		1899
		1900	if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
		1901	return false;
		1902
		1903	return true;
		1904	}
		1905
3031	serge	1906	static bool valid_inferred_mode(const struct drm_connector *connector,
		1907	const struct drm_display_mode *mode)
		1908	{
		1909	struct drm_display_mode *m;
		1910	bool ok = false;
		1911
		1912	list_for_each_entry(m, &connector->probed_modes, head) {
		1913	if (mode->hdisplay == m->hdisplay &&
		1914	mode->vdisplay == m->vdisplay &&
		1915	drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
		1916	return false; /* duplicated */
		1917	if (mode->hdisplay <= m->hdisplay &&
		1918	mode->vdisplay <= m->vdisplay)
		1919	ok = true;
		1920	}
		1921	return ok;
		1922	}
		1923
1963	serge	1924	static int
3031	serge	1925	drm_dmt_modes_for_range(struct drm_connector connector, struct edid edid,
1963	serge	1926	struct detailed_timing *timing)
		1927	{
		1928	int i, modes = 0;
		1929	struct drm_display_mode *newmode;
		1930	struct drm_device *dev = connector->dev;
1123	serge	1931
3480	Serge	1932	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
3031	serge	1933	if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
		1934	valid_inferred_mode(connector, drm_dmt_modes + i)) {
1963	serge	1935	newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
		1936	if (newmode) {
		1937	drm_mode_probed_add(connector, newmode);
		1938	modes++;
		1939	}
		1940	}
		1941	}
1123	serge	1942
1963	serge	1943	return modes;
		1944	}
		1945
3031	serge	1946	/* fix up 1366x768 mode from 1368x768;
		1947	* GFT/CVT can't express 1366 width which isn't dividable by 8
		1948	*/
		1949	static void fixup_mode_1366x768(struct drm_display_mode *mode)
		1950	{
		1951	if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
		1952	mode->hdisplay = 1366;
		1953	mode->hsync_start--;
		1954	mode->hsync_end--;
		1955	drm_mode_set_name(mode);
		1956	}
		1957	}
		1958
		1959	static int
		1960	drm_gtf_modes_for_range(struct drm_connector connector, struct edid edid,
		1961	struct detailed_timing *timing)
		1962	{
		1963	int i, modes = 0;
		1964	struct drm_display_mode *newmode;
		1965	struct drm_device *dev = connector->dev;
		1966
3480	Serge	1967	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
3031	serge	1968	const struct minimode *m = &extra_modes[i];
		1969	newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
		1970	if (!newmode)
		1971	return modes;
		1972
		1973	fixup_mode_1366x768(newmode);
		1974	if (!mode_in_range(newmode, edid, timing) \|\|
		1975	!valid_inferred_mode(connector, newmode)) {
		1976	drm_mode_destroy(dev, newmode);
		1977	continue;
		1978	}
		1979
		1980	drm_mode_probed_add(connector, newmode);
		1981	modes++;
		1982	}
		1983
		1984	return modes;
		1985	}
		1986
		1987	static int
		1988	drm_cvt_modes_for_range(struct drm_connector connector, struct edid edid,
		1989	struct detailed_timing *timing)
		1990	{
		1991	int i, modes = 0;
		1992	struct drm_display_mode *newmode;
		1993	struct drm_device *dev = connector->dev;
		1994	bool rb = drm_monitor_supports_rb(edid);
		1995
3480	Serge	1996	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
3031	serge	1997	const struct minimode *m = &extra_modes[i];
		1998	newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
		1999	if (!newmode)
		2000	return modes;
		2001
		2002	fixup_mode_1366x768(newmode);
		2003	if (!mode_in_range(newmode, edid, timing) \|\|
		2004	!valid_inferred_mode(connector, newmode)) {
		2005	drm_mode_destroy(dev, newmode);
		2006	continue;
		2007	}
		2008
		2009	drm_mode_probed_add(connector, newmode);
		2010	modes++;
		2011	}
		2012
		2013	return modes;
		2014	}
		2015
1963	serge	2016	static void
		2017	do_inferred_modes(struct detailed_timing timing, void c)
		2018	{
		2019	struct detailed_mode_closure *closure = c;
		2020	struct detailed_non_pixel *data = &timing->data.other_data;
3031	serge	2021	struct detailed_data_monitor_range *range = &data->data.range;
1963	serge	2022
3031	serge	2023	if (data->type != EDID_DETAIL_MONITOR_RANGE)
		2024	return;
		2025
		2026	closure->modes += drm_dmt_modes_for_range(closure->connector,
		2027	closure->edid,
		2028	timing);
		2029
		2030	if (!version_greater(closure->edid, 1, 1))
		2031	return; /* GTF not defined yet */
		2032
		2033	switch (range->flags) {
		2034	case 0x02: /* secondary gtf, XXX could do more */
		2035	case 0x00: /* default gtf */
1963	serge	2036	closure->modes += drm_gtf_modes_for_range(closure->connector,
		2037	closure->edid,
		2038	timing);
3031	serge	2039	break;
		2040	case 0x04: /* cvt, only in 1.4+ */
		2041	if (!version_greater(closure->edid, 1, 3))
		2042	break;
		2043
		2044	closure->modes += drm_cvt_modes_for_range(closure->connector,
		2045	closure->edid,
		2046	timing);
		2047	break;
		2048	case 0x01: /* just the ranges, no formula */
		2049	default:
		2050	break;
		2051	}
1963	serge	2052	}
		2053
		2054	static int
		2055	add_inferred_modes(struct drm_connector connector, struct edid edid)
		2056	{
		2057	struct detailed_mode_closure closure = {
		2058	connector, edid, 0, 0, 0
		2059	};
		2060
		2061	if (version_greater(edid, 1, 0))
		2062	drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
		2063	&closure);
		2064
		2065	return closure.modes;
		2066	}
		2067
		2068	static int
		2069	drm_est3_modes(struct drm_connector connector, struct detailed_timing timing)
		2070	{
		2071	int i, j, m, modes = 0;
		2072	struct drm_display_mode *mode;
		2073	u8 est = ((u8 )timing) + 5;
		2074
		2075	for (i = 0; i < 6; i++) {
		2076	for (j = 7; j > 0; j--) {
		2077	m = (i * 8) + (7 - j);
		2078	if (m >= ARRAY_SIZE(est3_modes))
		2079	break;
		2080	if (est[i] & (1 << j)) {
		2081	mode = drm_mode_find_dmt(connector->dev,
		2082	est3_modes[m].w,
		2083	est3_modes[m].h,
3031	serge	2084	est3_modes[m].r,
		2085	est3_modes[m].rb);
1963	serge	2086	if (mode) {
		2087	drm_mode_probed_add(connector, mode);
		2088	modes++;
		2089	}
		2090	}
		2091	}
		2092	}
		2093
		2094	return modes;
		2095	}
		2096
		2097	static void
		2098	do_established_modes(struct detailed_timing timing, void c)
		2099	{
		2100	struct detailed_mode_closure *closure = c;
		2101	struct detailed_non_pixel *data = &timing->data.other_data;
		2102
		2103	if (data->type == EDID_DETAIL_EST_TIMINGS)
		2104	closure->modes += drm_est3_modes(closure->connector, timing);
		2105	}
		2106
1123	serge	2107	/**
		2108	* add_established_modes - get est. modes from EDID and add them
		2109	* @edid: EDID block to scan
		2110	*
		2111	* Each EDID block contains a bitmap of the supported "established modes" list
		2112	* (defined above). Tease them out and add them to the global modes list.
		2113	*/
1963	serge	2114	static int
		2115	add_established_modes(struct drm_connector connector, struct edid edid)
1123	serge	2116	{
		2117	struct drm_device *dev = connector->dev;
		2118	unsigned long est_bits = edid->established_timings.t1 \|
		2119	(edid->established_timings.t2 << 8) \|
		2120	((edid->established_timings.mfg_rsvd & 0x80) << 9);
		2121	int i, modes = 0;
1963	serge	2122	struct detailed_mode_closure closure = {
		2123	connector, edid, 0, 0, 0
		2124	};
1123	serge	2125
1963	serge	2126	for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1123	serge	2127	if (est_bits & (1<
		2128	struct drm_display_mode *newmode;
		2129	newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
		2130	if (newmode) {
1963	serge	2131	drm_mode_probed_add(connector, newmode);
1123	serge	2132	modes++;
		2133	}
		2134	}
1963	serge	2135	}
1123	serge	2136
1963	serge	2137	if (version_greater(edid, 1, 0))
		2138	drm_for_each_detailed_block((u8 *)edid,
		2139	do_established_modes, &closure);
		2140
		2141	return modes + closure.modes;
1123	serge	2142	}
1963	serge	2143
		2144	static void
		2145	do_standard_modes(struct detailed_timing timing, void c)
1179	serge	2146	{
1963	serge	2147	struct detailed_mode_closure *closure = c;
		2148	struct detailed_non_pixel *data = &timing->data.other_data;
		2149	struct drm_connector *connector = closure->connector;
		2150	struct edid *edid = closure->edid;
		2151
		2152	if (data->type == EDID_DETAIL_STD_MODES) {
		2153	int i;
		2154	for (i = 0; i < 6; i++) {
		2155	struct std_timing *std;
		2156	struct drm_display_mode *newmode;
		2157
		2158	std = &data->data.timings[i];
		2159	newmode = drm_mode_std(connector, edid, std,
		2160	edid->revision);
		2161	if (newmode) {
		2162	drm_mode_probed_add(connector, newmode);
		2163	closure->modes++;
		2164	}
		2165	}
		2166	}
1179	serge	2167	}
1123	serge	2168
		2169	/**
		2170	* add_standard_modes - get std. modes from EDID and add them
		2171	* @edid: EDID block to scan
		2172	*
1963	serge	2173	* Standard modes can be calculated using the appropriate standard (DMT,
		2174	* GTF or CVT. Grab them from @edid and add them to the list.
1123	serge	2175	*/
1963	serge	2176	static int
		2177	add_standard_modes(struct drm_connector connector, struct edid edid)
1123	serge	2178	{
		2179	int i, modes = 0;
1963	serge	2180	struct detailed_mode_closure closure = {
		2181	connector, edid, 0, 0, 0
		2182	};
1123	serge	2183
		2184	for (i = 0; i < EDID_STD_TIMINGS; i++) {
		2185	struct drm_display_mode *newmode;
		2186
1963	serge	2187	newmode = drm_mode_std(connector, edid,
		2188	&edid->standard_timings[i],
		2189	edid->revision);
1123	serge	2190	if (newmode) {
		2191	drm_mode_probed_add(connector, newmode);
		2192	modes++;
		2193	}
		2194	}
		2195
1963	serge	2196	if (version_greater(edid, 1, 0))
		2197	drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
		2198	&closure);
1123	serge	2199
1963	serge	2200	/* XXX should also look for standard codes in VTB blocks */
1321	serge	2201
1963	serge	2202	return modes + closure.modes;
1321	serge	2203	}
		2204
		2205	static int drm_cvt_modes(struct drm_connector *connector,
		2206	struct detailed_timing *timing)
		2207	{
1123	serge	2208	int i, j, modes = 0;
1321	serge	2209	struct drm_display_mode *newmode;
		2210	struct drm_device *dev = connector->dev;
		2211	struct cvt_timing *cvt;
		2212	const int rates[] = { 60, 85, 75, 60, 50 };
1404	serge	2213	const u8 empty[3] = { 0, 0, 0 };
1123	serge	2214
1321	serge	2215	for (i = 0; i < 4; i++) {
1404	serge	2216	int uninitialized_var(width), height;
1321	serge	2217	cvt = &(timing->data.other_data.data.cvt[i]);
1179	serge	2218
1404	serge	2219	if (!memcmp(cvt->code, empty, 3))
1963	serge	2220	continue;
1404	serge	2221
		2222	height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
		2223	switch (cvt->code[1] & 0x0c) {
1321	serge	2224	case 0x00:
		2225	width = height * 4 / 3;
		2226	break;
1404	serge	2227	case 0x04:
1321	serge	2228	width = height * 16 / 9;
		2229	break;
1404	serge	2230	case 0x08:
1321	serge	2231	width = height * 16 / 10;
		2232	break;
1404	serge	2233	case 0x0c:
1321	serge	2234	width = height * 15 / 9;
		2235	break;
		2236	}
		2237
		2238	for (j = 1; j < 5; j++) {
		2239	if (cvt->code[2] & (1 << j)) {
		2240	newmode = drm_cvt_mode(dev, width, height,
		2241	rates[j], j == 0,
		2242	false, false);
		2243	if (newmode) {
		2244	drm_mode_probed_add(connector, newmode);
		2245	modes++;
		2246	}
		2247	}
		2248	}
1963	serge	2249	}
1321	serge	2250
		2251	return modes;
		2252	}
		2253
1963	serge	2254	static void
		2255	do_cvt_mode(struct detailed_timing timing, void c)
1321	serge	2256	{
1963	serge	2257	struct detailed_mode_closure *closure = c;
		2258	struct detailed_non_pixel *data = &timing->data.other_data;
1123	serge	2259
1963	serge	2260	if (data->type == EDID_DETAIL_CVT_3BYTE)
		2261	closure->modes += drm_cvt_modes(closure->connector, timing);
		2262	}
1321	serge	2263
1963	serge	2264	static int
		2265	add_cvt_modes(struct drm_connector connector, struct edid edid)
4539	Serge	2266	{
1963	serge	2267	struct detailed_mode_closure closure = {
		2268	connector, edid, 0, 0, 0
		2269	};
1321	serge	2270
1963	serge	2271	if (version_greater(edid, 1, 2))
		2272	drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
1321	serge	2273
1963	serge	2274	/* XXX should also look for CVT codes in VTB blocks */
1123	serge	2275
1963	serge	2276	return closure.modes;
1321	serge	2277	}
		2278
1963	serge	2279	static void
		2280	do_detailed_mode(struct detailed_timing timing, void c)
1321	serge	2281	{
1963	serge	2282	struct detailed_mode_closure *closure = c;
		2283	struct drm_display_mode *newmode;
1321	serge	2284
1963	serge	2285	if (timing->pixel_clock) {
		2286	newmode = drm_mode_detailed(closure->connector->dev,
		2287	closure->edid, timing,
		2288	closure->quirks);
		2289	if (!newmode)
		2290	return;
1321	serge	2291
1963	serge	2292	if (closure->preferred)
		2293	newmode->type \|= DRM_MODE_TYPE_PREFERRED;
1123	serge	2294
1963	serge	2295	drm_mode_probed_add(closure->connector, newmode);
		2296	closure->modes++;
		2297	closure->preferred = 0;
		2298	}
1179	serge	2299	}
1321	serge	2300
1963	serge	2301	/*
		2302	* add_detailed_modes - Add modes from detailed timings
1179	serge	2303	* @connector: attached connector
1963	serge	2304	* @edid: EDID block to scan
1179	serge	2305	* @quirks: quirks to apply
		2306	*/
1963	serge	2307	static int
		2308	add_detailed_modes(struct drm_connector connector, struct edid edid,
		2309	u32 quirks)
1179	serge	2310	{
1963	serge	2311	struct detailed_mode_closure closure = {
		2312	connector,
		2313	edid,
		2314	1,
		2315	quirks,
		2316
		2317	};
1179	serge	2318
1963	serge	2319	if (closure.preferred && !version_greater(edid, 1, 3))
		2320	closure.preferred =
		2321	(edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1179	serge	2322
1963	serge	2323	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1179	serge	2324
1963	serge	2325	return closure.modes;
		2326	}
1179	serge	2327
1963	serge	2328	#define AUDIO_BLOCK 0x01
3031	serge	2329	#define VIDEO_BLOCK 0x02
1963	serge	2330	#define VENDOR_BLOCK 0x03
3031	serge	2331	#define SPEAKER_BLOCK 0x04
3480	Serge	2332	#define VIDEO_CAPABILITY_BLOCK 0x07
1963	serge	2333	#define EDID_BASIC_AUDIO (1 << 6)
3031	serge	2334	#define EDID_CEA_YCRCB444 (1 << 5)
		2335	#define EDID_CEA_YCRCB422 (1 << 4)
3480	Serge	2336	#define EDID_CEA_VCDB_QS (1 << 6)
1179	serge	2337
4104	Serge	2338	/*
1963	serge	2339	* Search EDID for CEA extension block.
1123	serge	2340	*/
4104	Serge	2341	static u8 drm_find_cea_extension(struct edid edid)
1123	serge	2342	{
1963	serge	2343	u8 *edid_ext = NULL;
1321	serge	2344	int i;
1123	serge	2345
1963	serge	2346	/* No EDID or EDID extensions */
		2347	if (edid == NULL \|\| edid->extensions == 0)
		2348	return NULL;
1321	serge	2349
1963	serge	2350	/* Find CEA extension */
		2351	for (i = 0; i < edid->extensions; i++) {
		2352	edid_ext = (u8 )edid + EDID_LENGTH (i + 1);
		2353	if (edid_ext[0] == CEA_EXT)
		2354	break;
1123	serge	2355	}
		2356
1963	serge	2357	if (i == edid->extensions)
		2358	return NULL;
1123	serge	2359
1963	serge	2360	return edid_ext;
1123	serge	2361	}
		2362
4075	Serge	2363	/*
		2364	* Calculate the alternate clock for the CEA mode
		2365	* (60Hz vs. 59.94Hz etc.)
		2366	*/
		2367	static unsigned int
		2368	cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
		2369	{
		2370	unsigned int clock = cea_mode->clock;
		2371
		2372	if (cea_mode->vrefresh % 6 != 0)
		2373	return clock;
		2374
		2375	/*
		2376	* edid_cea_modes contains the 59.94Hz
		2377	* variant for 240 and 480 line modes,
		2378	* and the 60Hz variant otherwise.
		2379	*/
		2380	if (cea_mode->vdisplay == 240 \|\| cea_mode->vdisplay == 480)
		2381	clock = clock * 1001 / 1000;
		2382	else
		2383	clock = DIV_ROUND_UP(clock * 1000, 1001);
		2384
		2385	return clock;
		2386	}
		2387
3480	Serge	2388	/**
		2389	* drm_match_cea_mode - look for a CEA mode matching given mode
		2390	* @to_match: display mode
		2391	*
		2392	* Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
		2393	* mode.
3192	Serge	2394	*/
3480	Serge	2395	u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
3192	Serge	2396	{
		2397	u8 mode;
		2398
3746	Serge	2399	if (!to_match->clock)
		2400	return 0;
		2401
3480	Serge	2402	for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
3746	Serge	2403	const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
		2404	unsigned int clock1, clock2;
3192	Serge	2405
3746	Serge	2406	/* Check both 60Hz and 59.94Hz */
4075	Serge	2407	clock1 = cea_mode->clock;
		2408	clock2 = cea_mode_alternate_clock(cea_mode);
3746	Serge	2409
		2410	if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) \|\|
		2411	KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
		2412	drm_mode_equal_no_clocks(to_match, cea_mode))
3192	Serge	2413	return mode + 1;
		2414	}
		2415	return 0;
		2416	}
		2417	EXPORT_SYMBOL(drm_match_cea_mode);
		2418
4104	Serge	2419	/*
		2420	* Calculate the alternate clock for HDMI modes (those from the HDMI vendor
		2421	* specific block).
		2422	*
		2423	* It's almost like cea_mode_alternate_clock(), we just need to add an
		2424	* exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
		2425	* one.
		2426	*/
		2427	static unsigned int
		2428	hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
		2429	{
		2430	if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
		2431	return hdmi_mode->clock;
		2432
		2433	return cea_mode_alternate_clock(hdmi_mode);
		2434	}
		2435
		2436	/*
		2437	* drm_match_hdmi_mode - look for a HDMI mode matching given mode
		2438	* @to_match: display mode
		2439	*
		2440	* An HDMI mode is one defined in the HDMI vendor specific block.
		2441	*
		2442	* Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
		2443	*/
		2444	static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
		2445	{
		2446	u8 mode;
		2447
		2448	if (!to_match->clock)
		2449	return 0;
		2450
		2451	for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
		2452	const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
		2453	unsigned int clock1, clock2;
		2454
		2455	/* Make sure to also match alternate clocks */
		2456	clock1 = hdmi_mode->clock;
		2457	clock2 = hdmi_mode_alternate_clock(hdmi_mode);
		2458
		2459	if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) \|\|
		2460	KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
		2461	drm_mode_equal_no_clocks(to_match, hdmi_mode))
		2462	return mode + 1;
		2463	}
		2464	return 0;
		2465	}
		2466
4075	Serge	2467	static int
		2468	add_alternate_cea_modes(struct drm_connector connector, struct edid edid)
		2469	{
		2470	struct drm_device *dev = connector->dev;
		2471	struct drm_display_mode mode, tmp;
		2472	LIST_HEAD(list);
		2473	int modes = 0;
3192	Serge	2474
4075	Serge	2475	/* Don't add CEA modes if the CEA extension block is missing */
		2476	if (!drm_find_cea_extension(edid))
		2477	return 0;
		2478
		2479	/*
		2480	* Go through all probed modes and create a new mode
		2481	* with the alternate clock for certain CEA modes.
		2482	*/
		2483	list_for_each_entry(mode, &connector->probed_modes, head) {
4104	Serge	2484	const struct drm_display_mode *cea_mode = NULL;
4075	Serge	2485	struct drm_display_mode *newmode;
4104	Serge	2486	u8 mode_idx = drm_match_cea_mode(mode) - 1;
4075	Serge	2487	unsigned int clock1, clock2;
		2488
4104	Serge	2489	if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
		2490	cea_mode = &edid_cea_modes[mode_idx];
		2491	clock2 = cea_mode_alternate_clock(cea_mode);
		2492	} else {
		2493	mode_idx = drm_match_hdmi_mode(mode) - 1;
		2494	if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
		2495	cea_mode = &edid_4k_modes[mode_idx];
		2496	clock2 = hdmi_mode_alternate_clock(cea_mode);
		2497	}
		2498	}
		2499
		2500	if (!cea_mode)
4075	Serge	2501	continue;
		2502
		2503	clock1 = cea_mode->clock;
		2504
		2505	if (clock1 == clock2)
		2506	continue;
		2507
		2508	if (mode->clock != clock1 && mode->clock != clock2)
		2509	continue;
		2510
		2511	newmode = drm_mode_duplicate(dev, cea_mode);
		2512	if (!newmode)
		2513	continue;
		2514
		2515	/*
		2516	* The current mode could be either variant. Make
		2517	* sure to pick the "other" clock for the new mode.
		2518	*/
		2519	if (mode->clock != clock1)
		2520	newmode->clock = clock1;
		2521	else
		2522	newmode->clock = clock2;
		2523
		2524	list_add_tail(&newmode->head, &list);
		2525	}
		2526
		2527	list_for_each_entry_safe(mode, tmp, &list, head) {
		2528	list_del(&mode->head);
		2529	drm_mode_probed_add(connector, mode);
		2530	modes++;
		2531	}
		2532
		2533	return modes;
		2534	}
		2535
3031	serge	2536	static int
4104	Serge	2537	do_cea_modes(struct drm_connector connector, const u8 db, u8 len)
3031	serge	2538	{
		2539	struct drm_device *dev = connector->dev;
4104	Serge	2540	const u8 *mode;
		2541	u8 cea_mode;
3031	serge	2542	int modes = 0;
		2543
		2544	for (mode = db; mode < db + len; mode++) {
		2545	cea_mode = (mode & 127) - 1; / CEA modes are numbered 1..127 */
3480	Serge	2546	if (cea_mode < ARRAY_SIZE(edid_cea_modes)) {
3031	serge	2547	struct drm_display_mode *newmode;
		2548	newmode = drm_mode_duplicate(dev,
		2549	&edid_cea_modes[cea_mode]);
		2550	if (newmode) {
3746	Serge	2551	newmode->vrefresh = 0;
3031	serge	2552	drm_mode_probed_add(connector, newmode);
		2553	modes++;
		2554	}
		2555	}
		2556	}
		2557
		2558	return modes;
		2559	}
		2560
4104	Serge	2561	/*
		2562	* do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
		2563	* @connector: connector corresponding to the HDMI sink
		2564	* @db: start of the CEA vendor specific block
		2565	* @len: length of the CEA block payload, ie. one can access up to db[len]
		2566	*
		2567	* Parses the HDMI VSDB looking for modes to add to @connector.
		2568	*/
3031	serge	2569	static int
4104	Serge	2570	do_hdmi_vsdb_modes(struct drm_connector connector, const u8 db, u8 len)
		2571	{
		2572	struct drm_device *dev = connector->dev;
		2573	int modes = 0, offset = 0, i;
		2574	u8 vic_len;
		2575
		2576	if (len < 8)
		2577	goto out;
		2578
		2579	/* no HDMI_Video_Present */
		2580	if (!(db[8] & (1 << 5)))
		2581	goto out;
		2582
		2583	/* Latency_Fields_Present */
		2584	if (db[8] & (1 << 7))
		2585	offset += 2;
		2586
		2587	/* I_Latency_Fields_Present */
		2588	if (db[8] & (1 << 6))
		2589	offset += 2;
		2590
		2591	/* the declared length is not long enough for the 2 first bytes
		2592	* of additional video format capabilities */
		2593	offset += 2;
		2594	if (len < (8 + offset))
		2595	goto out;
		2596
		2597	vic_len = db[8 + offset] >> 5;
		2598
		2599	for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
		2600	struct drm_display_mode *newmode;
		2601	u8 vic;
		2602
		2603	vic = db[9 + offset + i];
		2604
		2605	vic--; /* VICs start at 1 */
		2606	if (vic >= ARRAY_SIZE(edid_4k_modes)) {
		2607	DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
		2608	continue;
		2609	}
		2610
		2611	newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
		2612	if (!newmode)
		2613	continue;
		2614
		2615	drm_mode_probed_add(connector, newmode);
		2616	modes++;
		2617	}
		2618
		2619	out:
		2620	return modes;
		2621	}
		2622
		2623	static int
3031	serge	2624	cea_db_payload_len(const u8 *db)
		2625	{
		2626	return db[0] & 0x1f;
		2627	}
		2628
		2629	static int
		2630	cea_db_tag(const u8 *db)
		2631	{
		2632	return db[0] >> 5;
		2633	}
		2634
		2635	static int
		2636	cea_revision(const u8 *cea)
		2637	{
		2638	return cea[1];
		2639	}
		2640
		2641	static int
		2642	cea_db_offsets(const u8 cea, int start, int *end)
		2643	{
		2644	/* Data block offset in CEA extension block */
		2645	*start = 4;
		2646	*end = cea[2];
		2647	if (*end == 0)
		2648	*end = 127;
		2649	if (end < 4 \|\| end > 127)
		2650	return -ERANGE;
		2651	return 0;
		2652	}
		2653
4104	Serge	2654	static bool cea_db_is_hdmi_vsdb(const u8 *db)
		2655	{
		2656	int hdmi_id;
		2657
		2658	if (cea_db_tag(db) != VENDOR_BLOCK)
		2659	return false;
		2660
		2661	if (cea_db_payload_len(db) < 5)
		2662	return false;
		2663
		2664	hdmi_id = db[1] \| (db[2] << 8) \| (db[3] << 16);
		2665
		2666	return hdmi_id == HDMI_IEEE_OUI;
		2667	}
		2668
3031	serge	2669	#define for_each_cea_db(cea, i, start, end) \
		2670	for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
		2671
		2672	static int
		2673	add_cea_modes(struct drm_connector connector, struct edid edid)
		2674	{
4104	Serge	2675	const u8 *cea = drm_find_cea_extension(edid);
		2676	const u8 *db;
		2677	u8 dbl;
3031	serge	2678	int modes = 0;
		2679
		2680	if (cea && cea_revision(cea) >= 3) {
		2681	int i, start, end;
		2682
		2683	if (cea_db_offsets(cea, &start, &end))
		2684	return 0;
		2685
		2686	for_each_cea_db(cea, i, start, end) {
		2687	db = &cea[i];
		2688	dbl = cea_db_payload_len(db);
		2689
		2690	if (cea_db_tag(db) == VIDEO_BLOCK)
4539	Serge	2691	modes += do_cea_modes(connector, db + 1, dbl);
4104	Serge	2692	else if (cea_db_is_hdmi_vsdb(db))
		2693	modes += do_hdmi_vsdb_modes(connector, db, dbl);
3031	serge	2694	}
		2695	}
		2696
		2697	return modes;
		2698	}
		2699
		2700	static void
		2701	parse_hdmi_vsdb(struct drm_connector connector, const u8 db)
		2702	{
		2703	u8 len = cea_db_payload_len(db);
		2704
		2705	if (len >= 6) {
		2706	connector->eld[5] \|= (db[6] >> 7) << 1; /* Supports_AI */
		2707	connector->dvi_dual = db[6] & 1;
		2708	}
		2709	if (len >= 7)
		2710	connector->max_tmds_clock = db[7] * 5;
		2711	if (len >= 8) {
		2712	connector->latency_present[0] = db[8] >> 7;
		2713	connector->latency_present[1] = (db[8] >> 6) & 1;
		2714	}
		2715	if (len >= 9)
		2716	connector->video_latency[0] = db[9];
		2717	if (len >= 10)
		2718	connector->audio_latency[0] = db[10];
		2719	if (len >= 11)
		2720	connector->video_latency[1] = db[11];
		2721	if (len >= 12)
		2722	connector->audio_latency[1] = db[12];
		2723
3192	Serge	2724	DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3031	serge	2725	"max TMDS clock %d, "
		2726	"latency present %d %d, "
		2727	"video latency %d %d, "
		2728	"audio latency %d %d\n",
		2729	connector->dvi_dual,
		2730	connector->max_tmds_clock,
		2731	(int) connector->latency_present[0],
		2732	(int) connector->latency_present[1],
		2733	connector->video_latency[0],
		2734	connector->video_latency[1],
		2735	connector->audio_latency[0],
		2736	connector->audio_latency[1]);
		2737	}
		2738
		2739	static void
		2740	monitor_name(struct detailed_timing t, void data)
		2741	{
		2742	if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
		2743	(u8 *)data = t->data.other_data.data.str.str;
		2744	}
		2745
1123	serge	2746	/**
3031	serge	2747	* drm_edid_to_eld - build ELD from EDID
		2748	* @connector: connector corresponding to the HDMI/DP sink
		2749	* @edid: EDID to parse
		2750	*
		2751	* Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
		2752	* Some ELD fields are left to the graphics driver caller:
		2753	* - Conn_Type
		2754	* - HDCP
		2755	* - Port_ID
		2756	*/
		2757	void drm_edid_to_eld(struct drm_connector connector, struct edid edid)
		2758	{
		2759	uint8_t *eld = connector->eld;
		2760	u8 *cea;
		2761	u8 *name;
		2762	u8 *db;
		2763	int sad_count = 0;
		2764	int mnl;
		2765	int dbl;
		2766
		2767	memset(eld, 0, sizeof(connector->eld));
		2768
		2769	cea = drm_find_cea_extension(edid);
		2770	if (!cea) {
		2771	DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
		2772	return;
		2773	}
		2774
		2775	name = NULL;
		2776	drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
		2777	for (mnl = 0; name && mnl < 13; mnl++) {
		2778	if (name[mnl] == 0x0a)
		2779	break;
		2780	eld[20 + mnl] = name[mnl];
		2781	}
		2782	eld[4] = (cea[1] << 5) \| mnl;
		2783	DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
		2784
		2785	eld[0] = 2 << 3; /* ELD version: 2 */
		2786
		2787	eld[16] = edid->mfg_id[0];
		2788	eld[17] = edid->mfg_id[1];
		2789	eld[18] = edid->prod_code[0];
		2790	eld[19] = edid->prod_code[1];
		2791
		2792	if (cea_revision(cea) >= 3) {
		2793	int i, start, end;
		2794
		2795	if (cea_db_offsets(cea, &start, &end)) {
		2796	start = 0;
		2797	end = 0;
		2798	}
		2799
		2800	for_each_cea_db(cea, i, start, end) {
		2801	db = &cea[i];
		2802	dbl = cea_db_payload_len(db);
4539	Serge	2803
3031	serge	2804	switch (cea_db_tag(db)) {
		2805	case AUDIO_BLOCK:
		2806	/* Audio Data Block, contains SADs */
		2807	sad_count = dbl / 3;
		2808	if (dbl >= 1)
		2809	memcpy(eld + 20 + mnl, &db[1], dbl);
		2810	break;
		2811	case SPEAKER_BLOCK:
		2812	/* Speaker Allocation Data Block */
		2813	if (dbl >= 1)
		2814	eld[7] = db[1];
		2815	break;
		2816	case VENDOR_BLOCK:
		2817	/* HDMI Vendor-Specific Data Block */
		2818	if (cea_db_is_hdmi_vsdb(db))
		2819	parse_hdmi_vsdb(connector, db);
		2820	break;
		2821	default:
		2822	break;
		2823	}
		2824	}
		2825	}
		2826	eld[5] \|= sad_count << 4;
		2827	eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
		2828
		2829	DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
		2830	}
		2831	EXPORT_SYMBOL(drm_edid_to_eld);
		2832
		2833	/**
3746	Serge	2834	* drm_edid_to_sad - extracts SADs from EDID
		2835	* @edid: EDID to parse
		2836	* @sads: pointer that will be set to the extracted SADs
		2837	*
		2838	* Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
		2839	* Note: returned pointer needs to be kfreed
		2840	*
		2841	* Return number of found SADs or negative number on error.
		2842	*/
		2843	int drm_edid_to_sad(struct edid edid, struct cea_sad *sads)
		2844	{
		2845	int count = 0;
		2846	int i, start, end, dbl;
		2847	u8 *cea;
		2848
		2849	cea = drm_find_cea_extension(edid);
		2850	if (!cea) {
		2851	DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
		2852	return -ENOENT;
		2853	}
		2854
		2855	if (cea_revision(cea) < 3) {
		2856	DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
		2857	return -ENOTSUPP;
		2858	}
		2859
		2860	if (cea_db_offsets(cea, &start, &end)) {
		2861	DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
		2862	return -EPROTO;
		2863	}
		2864
		2865	for_each_cea_db(cea, i, start, end) {
		2866	u8 *db = &cea[i];
		2867
		2868	if (cea_db_tag(db) == AUDIO_BLOCK) {
		2869	int j;
		2870	dbl = cea_db_payload_len(db);
		2871
		2872	count = dbl / 3; /* SAD is 3B */
		2873	sads = kcalloc(count, sizeof(*sads), GFP_KERNEL);
		2874	if (!*sads)
		2875	return -ENOMEM;
		2876	for (j = 0; j < count; j++) {
		2877	u8 sad = &db[1 + j 3];
		2878
		2879	(*sads)[j].format = (sad[0] & 0x78) >> 3;
		2880	(*sads)[j].channels = sad[0] & 0x7;
		2881	(*sads)[j].freq = sad[1] & 0x7F;
		2882	(*sads)[j].byte2 = sad[2];
		2883	}
		2884	break;
		2885	}
		2886	}
		2887
		2888	return count;
		2889	}
		2890	EXPORT_SYMBOL(drm_edid_to_sad);
		2891
		2892	/**
4104	Serge	2893	* drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
		2894	* @edid: EDID to parse
		2895	* @sadb: pointer to the speaker block
		2896	*
		2897	* Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
		2898	* Note: returned pointer needs to be kfreed
		2899	*
		2900	* Return number of found Speaker Allocation Blocks or negative number on error.
		2901	*/
		2902	int drm_edid_to_speaker_allocation(struct edid edid, u8 *sadb)
		2903	{
		2904	int count = 0;
		2905	int i, start, end, dbl;
		2906	const u8 *cea;
		2907
		2908	cea = drm_find_cea_extension(edid);
		2909	if (!cea) {
		2910	DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
		2911	return -ENOENT;
		2912	}
		2913
		2914	if (cea_revision(cea) < 3) {
		2915	DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
		2916	return -ENOTSUPP;
		2917	}
		2918
		2919	if (cea_db_offsets(cea, &start, &end)) {
		2920	DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
		2921	return -EPROTO;
		2922	}
		2923
		2924	for_each_cea_db(cea, i, start, end) {
		2925	const u8 *db = &cea[i];
		2926
		2927	if (cea_db_tag(db) == SPEAKER_BLOCK) {
		2928	dbl = cea_db_payload_len(db);
		2929
		2930	/* Speaker Allocation Data Block */
		2931	if (dbl == 3) {
		2932	*sadb = kmalloc(dbl, GFP_KERNEL);
		2933	if (!*sadb)
		2934	return -ENOMEM;
		2935	memcpy(*sadb, &db[1], dbl);
		2936	count = dbl;
		2937	break;
		2938	}
		2939	}
		2940	}
		2941
		2942	return count;
		2943	}
		2944	EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
		2945
		2946	/**
3031	serge	2947	* drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
		2948	* @connector: connector associated with the HDMI/DP sink
		2949	* @mode: the display mode
		2950	*/
		2951	int drm_av_sync_delay(struct drm_connector *connector,
		2952	struct drm_display_mode *mode)
		2953	{
		2954	int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
		2955	int a, v;
		2956
		2957	if (!connector->latency_present[0])
		2958	return 0;
		2959	if (!connector->latency_present[1])
		2960	i = 0;
		2961
		2962	a = connector->audio_latency[i];
		2963	v = connector->video_latency[i];
		2964
		2965	/*
		2966	* HDMI/DP sink doesn't support audio or video?
		2967	*/
		2968	if (a == 255 \|\| v == 255)
		2969	return 0;
		2970
		2971	/*
		2972	* Convert raw EDID values to millisecond.
		2973	* Treat unknown latency as 0ms.
		2974	*/
		2975	if (a)
		2976	a = min(2 * (a - 1), 500);
		2977	if (v)
		2978	v = min(2 * (v - 1), 500);
		2979
		2980	return max(v - a, 0);
		2981	}
		2982	EXPORT_SYMBOL(drm_av_sync_delay);
		2983
		2984	/**
		2985	* drm_select_eld - select one ELD from multiple HDMI/DP sinks
		2986	* @encoder: the encoder just changed display mode
		2987	* @mode: the adjusted display mode
		2988	*
		2989	* It's possible for one encoder to be associated with multiple HDMI/DP sinks.
		2990	* The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
		2991	*/
		2992	struct drm_connector drm_select_eld(struct drm_encoder encoder,
		2993	struct drm_display_mode *mode)
		2994	{
		2995	struct drm_connector *connector;
		2996	struct drm_device *dev = encoder->dev;
		2997
		2998	list_for_each_entry(connector, &dev->mode_config.connector_list, head)
		2999	if (connector->encoder == encoder && connector->eld[0])
		3000	return connector;
		3001
		3002	return NULL;
		3003	}
		3004	EXPORT_SYMBOL(drm_select_eld);
		3005
		3006	/**
1123	serge	3007	* drm_detect_hdmi_monitor - detect whether monitor is hdmi.
		3008	* @edid: monitor EDID information
		3009	*
		3010	* Parse the CEA extension according to CEA-861-B.
		3011	* Return true if HDMI, false if not or unknown.
		3012	*/
		3013	bool drm_detect_hdmi_monitor(struct edid *edid)
		3014	{
1963	serge	3015	u8 *edid_ext;
3031	serge	3016	int i;
1123	serge	3017	int start_offset, end_offset;
		3018
1963	serge	3019	edid_ext = drm_find_cea_extension(edid);
		3020	if (!edid_ext)
3031	serge	3021	return false;
1123	serge	3022
3031	serge	3023	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
		3024	return false;
1123	serge	3025
		3026	/*
		3027	* Because HDMI identifier is in Vendor Specific Block,
		3028	* search it from all data blocks of CEA extension.
		3029	*/
3031	serge	3030	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
		3031	if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
		3032	return true;
1123	serge	3033	}
		3034
3031	serge	3035	return false;
1123	serge	3036	}
		3037	EXPORT_SYMBOL(drm_detect_hdmi_monitor);
		3038
		3039	/**
1963	serge	3040	* drm_detect_monitor_audio - check monitor audio capability
		3041	*
		3042	* Monitor should have CEA extension block.
		3043	* If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
		3044	* audio' only. If there is any audio extension block and supported
		3045	* audio format, assume at least 'basic audio' support, even if 'basic
		3046	* audio' is not defined in EDID.
		3047	*
		3048	*/
		3049	bool drm_detect_monitor_audio(struct edid *edid)
		3050	{
		3051	u8 *edid_ext;
		3052	int i, j;
		3053	bool has_audio = false;
		3054	int start_offset, end_offset;
		3055
		3056	edid_ext = drm_find_cea_extension(edid);
		3057	if (!edid_ext)
		3058	goto end;
		3059
		3060	has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
		3061
		3062	if (has_audio) {
		3063	DRM_DEBUG_KMS("Monitor has basic audio support\n");
		3064	goto end;
		3065	}
		3066
3031	serge	3067	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
		3068	goto end;
1963	serge	3069
3031	serge	3070	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
		3071	if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
1963	serge	3072	has_audio = true;
3031	serge	3073	for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
1963	serge	3074	DRM_DEBUG_KMS("CEA audio format %d\n",
		3075	(edid_ext[i + j] >> 3) & 0xf);
		3076	goto end;
		3077	}
		3078	}
		3079	end:
		3080	return has_audio;
		3081	}
		3082	EXPORT_SYMBOL(drm_detect_monitor_audio);
		3083
		3084	/**
3480	Serge	3085	* drm_rgb_quant_range_selectable - is RGB quantization range selectable?
		3086	*
		3087	* Check whether the monitor reports the RGB quantization range selection
		3088	* as supported. The AVI infoframe can then be used to inform the monitor
		3089	* which quantization range (full or limited) is used.
		3090	*/
		3091	bool drm_rgb_quant_range_selectable(struct edid *edid)
		3092	{
		3093	u8 *edid_ext;
		3094	int i, start, end;
		3095
		3096	edid_ext = drm_find_cea_extension(edid);
		3097	if (!edid_ext)
		3098	return false;
		3099
		3100	if (cea_db_offsets(edid_ext, &start, &end))
		3101	return false;
		3102
		3103	for_each_cea_db(edid_ext, i, start, end) {
		3104	if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
		3105	cea_db_payload_len(&edid_ext[i]) == 2) {
		3106	DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
		3107	return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
		3108	}
		3109	}
		3110
		3111	return false;
		3112	}
		3113	EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
		3114
		3115	/**
1963	serge	3116	* drm_add_display_info - pull display info out if present
		3117	* @edid: EDID data
		3118	* @info: display info (attached to connector)
		3119	*
		3120	* Grab any available display info and stuff it into the drm_display_info
		3121	* structure that's part of the connector. Useful for tracking bpp and
		3122	* color spaces.
		3123	*/
		3124	static void drm_add_display_info(struct edid *edid,
		3125	struct drm_display_info *info)
		3126	{
2160	serge	3127	u8 *edid_ext;
		3128
1963	serge	3129	info->width_mm = edid->width_cm * 10;
		3130	info->height_mm = edid->height_cm * 10;
		3131
		3132	/* driver figures it out in this case */
		3133	info->bpc = 0;
		3134	info->color_formats = 0;
		3135
3031	serge	3136	if (edid->revision < 3)
1963	serge	3137	return;
		3138
		3139	if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
		3140	return;
		3141
3031	serge	3142	/* Get data from CEA blocks if present */
		3143	edid_ext = drm_find_cea_extension(edid);
		3144	if (edid_ext) {
		3145	info->cea_rev = edid_ext[1];
		3146
		3147	/* The existence of a CEA block should imply RGB support */
		3148	info->color_formats = DRM_COLOR_FORMAT_RGB444;
		3149	if (edid_ext[3] & EDID_CEA_YCRCB444)
		3150	info->color_formats \|= DRM_COLOR_FORMAT_YCRCB444;
		3151	if (edid_ext[3] & EDID_CEA_YCRCB422)
		3152	info->color_formats \|= DRM_COLOR_FORMAT_YCRCB422;
		3153	}
		3154
		3155	/* Only defined for 1.4 with digital displays */
		3156	if (edid->revision < 4)
		3157	return;
		3158
1963	serge	3159	switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
		3160	case DRM_EDID_DIGITAL_DEPTH_6:
		3161	info->bpc = 6;
		3162	break;
		3163	case DRM_EDID_DIGITAL_DEPTH_8:
		3164	info->bpc = 8;
		3165	break;
		3166	case DRM_EDID_DIGITAL_DEPTH_10:
		3167	info->bpc = 10;
		3168	break;
		3169	case DRM_EDID_DIGITAL_DEPTH_12:
		3170	info->bpc = 12;
		3171	break;
		3172	case DRM_EDID_DIGITAL_DEPTH_14:
		3173	info->bpc = 14;
		3174	break;
		3175	case DRM_EDID_DIGITAL_DEPTH_16:
		3176	info->bpc = 16;
		3177	break;
		3178	case DRM_EDID_DIGITAL_DEPTH_UNDEF:
		3179	default:
		3180	info->bpc = 0;
		3181	break;
		3182	}
		3183
3031	serge	3184	info->color_formats \|= DRM_COLOR_FORMAT_RGB444;
		3185	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
		3186	info->color_formats \|= DRM_COLOR_FORMAT_YCRCB444;
		3187	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
		3188	info->color_formats \|= DRM_COLOR_FORMAT_YCRCB422;
1963	serge	3189	}
		3190
		3191	/**
1123	serge	3192	* drm_add_edid_modes - add modes from EDID data, if available
		3193	* @connector: connector we're probing
		3194	* @edid: edid data
		3195	*
		3196	* Add the specified modes to the connector's mode list.
		3197	*
		3198	* Return number of modes added or 0 if we couldn't find any.
		3199	*/
		3200	int drm_add_edid_modes(struct drm_connector connector, struct edid edid)
		3201	{
		3202	int num_modes = 0;
		3203	u32 quirks;
		3204
		3205	if (edid == NULL) {
		3206	return 0;
		3207	}
1430	serge	3208	if (!drm_edid_is_valid(edid)) {
1963	serge	3209	dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
1246	serge	3210	drm_get_connector_name(connector));
1123	serge	3211	return 0;
		3212	}
		3213
		3214	quirks = edid_get_quirks(edid);
		3215
1963	serge	3216	/*
		3217	* EDID spec says modes should be preferred in this order:
		3218	* - preferred detailed mode
		3219	* - other detailed modes from base block
		3220	* - detailed modes from extension blocks
		3221	* - CVT 3-byte code modes
		3222	* - standard timing codes
		3223	* - established timing codes
		3224	* - modes inferred from GTF or CVT range information
		3225	*
		3226	* We get this pretty much right.
		3227	*
		3228	* XXX order for additional mode types in extension blocks?
		3229	*/
		3230	num_modes += add_detailed_modes(connector, edid, quirks);
		3231	num_modes += add_cvt_modes(connector, edid);
		3232	num_modes += add_standard_modes(connector, edid);
1123	serge	3233	num_modes += add_established_modes(connector, edid);
3480	Serge	3234	if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
1963	serge	3235	num_modes += add_inferred_modes(connector, edid);
3031	serge	3236	num_modes += add_cea_modes(connector, edid);
4075	Serge	3237	num_modes += add_alternate_cea_modes(connector, edid);
1123	serge	3238
		3239	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 \| EDID_QUIRK_PREFER_LARGE_75))
		3240	edid_fixup_preferred(connector, quirks);
		3241
1963	serge	3242	drm_add_display_info(edid, &connector->display_info);
1123	serge	3243
4539	Serge	3244	if (quirks & EDID_QUIRK_FORCE_8BPC)
		3245	connector->display_info.bpc = 8;
		3246
1123	serge	3247	return num_modes;
		3248	}
		3249	EXPORT_SYMBOL(drm_add_edid_modes);
1179	serge	3250
		3251	/**
		3252	* drm_add_modes_noedid - add modes for the connectors without EDID
		3253	* @connector: connector we're probing
		3254	* @hdisplay: the horizontal display limit
		3255	* @vdisplay: the vertical display limit
		3256	*
		3257	* Add the specified modes to the connector's mode list. Only when the
		3258	* hdisplay/vdisplay is not beyond the given limit, it will be added.
		3259	*
		3260	* Return number of modes added or 0 if we couldn't find any.
		3261	*/
		3262	int drm_add_modes_noedid(struct drm_connector *connector,
		3263	int hdisplay, int vdisplay)
		3264	{
		3265	int i, count, num_modes = 0;
1963	serge	3266	struct drm_display_mode *mode;
1179	serge	3267	struct drm_device *dev = connector->dev;
		3268
		3269	count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
		3270	if (hdisplay < 0)
		3271	hdisplay = 0;
		3272	if (vdisplay < 0)
		3273	vdisplay = 0;
		3274
		3275	for (i = 0; i < count; i++) {
1963	serge	3276	const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1179	serge	3277	if (hdisplay && vdisplay) {
		3278	/*
		3279	* Only when two are valid, they will be used to check
		3280	* whether the mode should be added to the mode list of
		3281	* the connector.
		3282	*/
		3283	if (ptr->hdisplay > hdisplay \|\|
		3284	ptr->vdisplay > vdisplay)
		3285	continue;
		3286	}
1321	serge	3287	if (drm_mode_vrefresh(ptr) > 61)
		3288	continue;
1179	serge	3289	mode = drm_mode_duplicate(dev, ptr);
		3290	if (mode) {
		3291	drm_mode_probed_add(connector, mode);
		3292	num_modes++;
		3293	}
		3294	}
		3295	return num_modes;
		3296	}
		3297	EXPORT_SYMBOL(drm_add_modes_noedid);
3192	Serge	3298
		3299	/**
3480	Serge	3300	* drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
		3301	* data from a DRM display mode
		3302	* @frame: HDMI AVI infoframe
		3303	* @mode: DRM display mode
3192	Serge	3304	*
3480	Serge	3305	* Returns 0 on success or a negative error code on failure.
3192	Serge	3306	*/
3480	Serge	3307	int
		3308	drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
		3309	const struct drm_display_mode *mode)
3192	Serge	3310	{
3480	Serge	3311	int err;
3192	Serge	3312
3480	Serge	3313	if (!frame \|\| !mode)
		3314	return -EINVAL;
3192	Serge	3315
3480	Serge	3316	err = hdmi_avi_infoframe_init(frame);
		3317	if (err < 0)
		3318	return err;
		3319
4104	Serge	3320	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
		3321	frame->pixel_repeat = 1;
		3322
3480	Serge	3323	frame->video_code = drm_match_cea_mode(mode);
		3324
		3325	frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
		3326	frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
		3327
3192	Serge	3328	return 0;
		3329	}
3480	Serge	3330	EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
4104	Serge	3331
		3332	/**
		3333	* drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
		3334	* data from a DRM display mode
		3335	* @frame: HDMI vendor infoframe
		3336	* @mode: DRM display mode
		3337	*
		3338	* Note that there's is a need to send HDMI vendor infoframes only when using a
		3339	* 4k or stereoscopic 3D mode. So when giving any other mode as input this
		3340	* function will return -EINVAL, error that can be safely ignored.
		3341	*
		3342	* Returns 0 on success or a negative error code on failure.
		3343	*/
		3344	int
		3345	drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
		3346	const struct drm_display_mode *mode)
		3347	{
		3348	int err;
		3349	u8 vic;
		3350
		3351	if (!frame \|\| !mode)
		3352	return -EINVAL;
		3353
		3354	vic = drm_match_hdmi_mode(mode);
		3355	if (!vic)
		3356	return -EINVAL;
		3357
		3358	err = hdmi_vendor_infoframe_init(frame);
		3359	if (err < 0)
		3360	return err;
		3361
		3362	frame->vic = vic;
		3363
		3364	return 0;
		3365	}
		3366	EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/drm_edid.c – Rev 4539