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4104 Serge 1
/**************************************************************************
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 *
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 * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
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 * All Rights Reserved.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the
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 * "Software"), to deal in the Software without restriction, including
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * distribute, sub license, and/or sell copies of the Software, and to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the
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 * next paragraph) shall be included in all copies or substantial portions
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 * of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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 * USE OR OTHER DEALINGS IN THE SOFTWARE.
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 *
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 **************************************************************************/
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/*
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 * Authors: Thomas Hellström 
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 */
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#include 
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#include 
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#include 
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extern int x86_clflush_size;
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static inline void clflush(volatile void *__p)
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{
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    asm volatile("clflush %0" : "+m" (*(volatile char*)__p));
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}
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#if 0
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static void
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drm_clflush_page(struct page *page)
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{
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	uint8_t *page_virtual;
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	unsigned int i;
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	const int size = boot_cpu_data.x86_clflush_size;
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	if (unlikely(page == NULL))
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		return;
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	page_virtual = kmap_atomic(page);
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	for (i = 0; i < PAGE_SIZE; i += size)
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		clflush(page_virtual + i);
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	kunmap_atomic(page_virtual);
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}
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static void drm_cache_flush_clflush(struct page *pages[],
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				    unsigned long num_pages)
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{
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	unsigned long i;
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	mb();
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	for (i = 0; i < num_pages; i++)
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		drm_clflush_page(*pages++);
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	mb();
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}
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static void
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drm_clflush_ipi_handler(void *null)
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{
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	wbinvd();
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}
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#endif
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void
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drm_clflush_pages(struct page *pages[], unsigned long num_pages)
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{
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    uint8_t *pva;
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    unsigned int i, j;
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    pva = AllocKernelSpace(4096);
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    if(pva != NULL)
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    {
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        dma_addr_t *src, *dst;
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        u32 count;
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        for (i = 0; i < num_pages; i++)
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        {
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            mb();
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            MapPage(pva, page_to_phys(pages[i]), 0x001);
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            for (j = 0; j < PAGE_SIZE; j += x86_clflush_size)
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                clflush(pva + j);
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        }
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        FreeKernelSpace(pva);
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    }
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    mb();
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}
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EXPORT_SYMBOL(drm_clflush_pages);
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void
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drm_clflush_sg(struct sg_table *st)
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{
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    struct sg_page_iter sg_iter;
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    struct page *page;
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    uint8_t *pva;
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    unsigned int i;
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    pva = AllocKernelSpace(4096);
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    if( pva != NULL)
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    {
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        mb();
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        for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)
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        {
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            page = sg_page_iter_page(&sg_iter);
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            MapPage(pva,page_to_phys(page), 0x001);
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            for (i = 0; i < PAGE_SIZE; i += x86_clflush_size)
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                clflush(pva + i);
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        };
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        FreeKernelSpace(pva);
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    };
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    mb();
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}
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EXPORT_SYMBOL(drm_clflush_sg);
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#if 0
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void
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drm_clflush_virt_range(char *addr, unsigned long length)
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{
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#if defined(CONFIG_X86)
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	if (cpu_has_clflush) {
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		char *end = addr + length;
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		mb();
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		for (; addr < end; addr += boot_cpu_data.x86_clflush_size)
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			clflush(addr);
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		clflush(end - 1);
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		mb();
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		return;
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	}
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	if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
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		printk(KERN_ERR "Timed out waiting for cache flush.\n");
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#else
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	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
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	WARN_ON_ONCE(1);
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#endif
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}
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EXPORT_SYMBOL(drm_clflush_virt_range);
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#endif