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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 3263 | Serge | 1 | |
| 2 | #include |
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| 3 | |||
| 4 | |||
| 5 | |||
| 6 | unsigned int *ecx, unsigned int *edx) |
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| 7 | { |
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| 8 | /* ecx is often an input as well as an output. */ |
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| 9 | asm volatile("cpuid" |
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| 10 | : "=a" (*eax), |
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| 11 | "=b" (*ebx), |
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| 12 | "=c" (*ecx), |
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| 13 | "=d" (*edx) |
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| 14 | : "0" (*eax), "2" (*ecx) |
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| 15 | : "memory"); |
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| 16 | } |
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| 17 | |||
| 18 | |||
| 19 | static inline void cpuid_count(unsigned int op, int count, |
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| 20 | unsigned int *eax, unsigned int *ebx, |
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| 21 | unsigned int *ecx, unsigned int *edx) |
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| 22 | { |
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| 23 | *eax = op; |
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| 24 | *ecx = count; |
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| 25 | native_cpuid(eax, ebx, ecx, edx); |
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| 26 | } |
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| 27 | |||
| 28 | |||
| 29 | |||
| 30 | CACHE_TYPE_NULL = 0, |
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| 31 | CACHE_TYPE_DATA = 1, |
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| 32 | CACHE_TYPE_INST = 2, |
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| 33 | CACHE_TYPE_UNIFIED = 3 |
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| 34 | }; |
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| 35 | |||
| 36 | |||
| 37 | |||
| 38 | struct { |
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| 39 | enum _cache_type type:5; |
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| 40 | unsigned int level:3; |
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| 41 | unsigned int is_self_initializing:1; |
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| 42 | unsigned int is_fully_associative:1; |
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| 43 | unsigned int reserved:4; |
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| 44 | unsigned int num_threads_sharing:12; |
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| 45 | unsigned int num_cores_on_die:6; |
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| 46 | } split; |
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| 47 | uint32_t full; |
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| 48 | }; |
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| 49 | |||
| 50 | |||
| 51 | struct { |
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| 52 | unsigned int coherency_line_size:12; |
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| 53 | unsigned int physical_line_partition:10; |
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| 54 | unsigned int ways_of_associativity:10; |
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| 55 | } split; |
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| 56 | uint32_t full; |
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| 57 | }; |
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| 58 | |||
| 59 | |||
| 60 | struct { |
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| 61 | unsigned int number_of_sets:32; |
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| 62 | } split; |
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| 63 | uint32_t full; |
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| 64 | }; |
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| 65 | |||
| 66 | |||
| 67 | union _cpuid4_leaf_eax eax; |
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| 68 | union _cpuid4_leaf_ebx ebx; |
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| 69 | union _cpuid4_leaf_ecx ecx; |
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| 70 | unsigned long size; |
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| 71 | }; |
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| 72 | |||
| 73 | |||
| 74 | cpuid4_cache_lookup_regs(int index, |
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| 75 | struct _cpuid4_info_regs *this_leaf) |
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| 76 | { |
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| 77 | union _cpuid4_leaf_eax eax; |
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| 78 | union _cpuid4_leaf_ebx ebx; |
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| 79 | union _cpuid4_leaf_ecx ecx; |
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| 80 | unsigned edx; |
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| 81 | |||
| 82 | |||
| 83 | |||
| 84 | |||
| 85 | return -1; /* better error ? */ |
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| 86 | |||
| 87 | |||
| 88 | this_leaf->ebx = ebx; |
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| 89 | this_leaf->ecx = ecx; |
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| 90 | this_leaf->size = (ecx.split.number_of_sets + 1) * |
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| 91 | (ebx.split.coherency_line_size + 1) * |
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| 92 | (ebx.split.physical_line_partition + 1) * |
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| 93 | (ebx.split.ways_of_associativity + 1); |
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| 94 | return 0; |
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| 95 | } |
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| 96 | |||
| 97 | |||
| 98 | { |
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| 99 | unsigned int eax, ebx, ecx, edx, op; |
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| 100 | union _cpuid4_leaf_eax cache_eax; |
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| 101 | int i = -1; |
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| 102 | |||
| 103 | |||
| 104 | ++i; |
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| 105 | /* Do cpuid(op) loop to find out num_cache_leaves */ |
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| 106 | cpuid_count(4, i, &eax, &ebx, &ecx, &edx); |
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| 107 | cache_eax.full = eax; |
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| 108 | } while (cache_eax.split.type != CACHE_TYPE_NULL); |
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| 109 | return i; |
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| 110 | }; |
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| 111 | |||
| 112 | |||
| 113 | { |
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| 114 | unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */ |
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| 115 | unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */ |
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| 116 | unsigned int num_cache_leaves; |
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| 117 | |||
| 118 | |||
| 119 | |||
| 120 | |||
| 121 | { |
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| 122 | struct _cpuid4_info_regs this_leaf; |
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| 123 | int retval; |
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| 124 | |||
| 125 | |||
| 126 | if (retval >= 0) { |
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| 127 | switch (this_leaf.eax.split.level) |
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| 128 | { |
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| 129 | case 1: |
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| 130 | if (this_leaf.eax.split.type == CACHE_TYPE_DATA) |
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| 131 | new_l1d = this_leaf.size; |
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| 132 | else if (this_leaf.eax.split.type == CACHE_TYPE_INST) |
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| 133 | new_l1i = this_leaf.size; |
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| 134 | break; |
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| 135 | case 2: |
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| 136 | new_l2 = this_leaf.size; |
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| 137 | break; |
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| 138 | case 3: |
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| 139 | new_l3 = this_leaf.size; |
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| 140 | break; |
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| 141 | default: |
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| 142 | break; |
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| 143 | } |
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| 144 | } |
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| 145 | } |
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| 146 | printf("l2 cache %d l3 cache %d\n", new_l2, new_l3); |
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| 147 | |||
| 148 | |||
| 149 | }; |
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| 150 |