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Rev | Author | Line No. | Line |
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1029 | serge | 1 | |
2 | #define UHCI_USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */ |
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1605 | serge | 3 | #define UHCI_USBLEGSUP_RWC 0x8f00 /* the R/WC bits */ |
4 | #define UHCI_USBLEGSUP_RO 0x5040 /* R/O and reserved bits */ |
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5 | |||
6 | |||
7 | |||
1029 | serge | 8 | #define UHCI_USBINTR 4 /* interrupt register */ |
9 | #define UHCI_USBCMD_RUN 0x0001 /* RUN/STOP bit */ |
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10 | #define UHCI_USBCMD_HCRESET 0x0002 /* Host Controller reset */ |
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11 | #define UHCI_USBCMD_EGSM 0x0008 /* Global Suspend Mode */ |
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12 | #define UHCI_USBCMD_CONFIGURE 0x0040 /* Config Flag */ |
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13 | #define UHCI_USBINTR_RESUME 0x0002 /* Resume interrupt enable */ |
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14 | |||
15 | |||
16 | |||
17 | #define USBCMD_RS 0x0001 /* Run/Stop */ |
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18 | #define USBCMD_HCRESET 0x0002 /* Host reset */ |
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19 | #define USBCMD_GRESET 0x0004 /* Global reset */ |
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20 | #define USBCMD_EGSM 0x0008 /* Global Suspend Mode */ |
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21 | #define USBCMD_FGR 0x0010 /* Force Global Resume */ |
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22 | #define USBCMD_SWDBG 0x0020 /* SW Debug mode */ |
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23 | #define USBCMD_CF 0x0040 /* Config Flag (sw only) */ |
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24 | #define USBCMD_MAXP 0x0080 /* Max Packet (0 = 32, 1 = 64) */ |
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25 | |||
26 | |||
27 | #define USBSTS_USBINT 0x0001 /* Interrupt due to IOC */ |
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28 | #define USBSTS_ERROR 0x0002 /* Interrupt due to error */ |
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29 | #define USBSTS_RD 0x0004 /* Resume Detect */ |
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30 | #define USBSTS_HSE 0x0008 /* Host System Error: PCI problems */ |
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31 | #define USBSTS_HCPE 0x0010 /* Host Controller Process Error: |
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32 | * the schedule is buggy */ |
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33 | #define USBSTS_HCH 0x0020 /* HC Halted */ |
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34 | |||
35 | |||
36 | |||
37 | #define USBFLBASEADD 8 |
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38 | #define USBSOF 12 |
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39 | #define USBSOF_DEFAULT 64 /* Frame length is exactly 1 ms */ |
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40 | |||
41 | |||
42 | #define USBPORTSC2 18 |
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43 | |||
44 | |||
45 | |||
46 | |||
47 | |||
48 | * Make sure the controller is completely inactive, unable to |
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49 | * generate interrupts or do DMA. |
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50 | */ |
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51 | void uhci_reset_hc(hc_t *hc) |
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52 | { |
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53 | /* Turn off PIRQ enable and SMI enable. (This also turns off the |
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54 | * BIOS's USB Legacy Support.) Turn off all the R/WC bits too. |
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55 | */ |
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56 | |||
2111 | serge | 57 | |
58 | out16(hc->iobase + UHCI_USBINTR, 0); |
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59 | |||
60 | |||
1029 | serge | 61 | |
62 | |||
63 | * new notification of any already connected |
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64 | * ports due to the virtual disconnect that it |
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65 | * implies. |
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66 | */ |
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67 | out16(hc->iobase + UHCI_USBCMD, UHCI_USBCMD_HCRESET); |
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68 | __asm__ __volatile__ ("":::"memory"); |
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69 | |||
70 | |||
71 | |||
72 | |||
73 | dbgprintf("HCRESET not completed yet!\n"); |
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74 | |||
75 | |||
76 | * make sure the controller is stopped. |
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77 | */ |
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78 | out16(hc->iobase + UHCI_USBINTR, 0); |
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79 | out16(hc->iobase + UHCI_USBCMD, 0); |
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80 | }; |
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81 | |||
82 | |||
83 | { |
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84 | u16_t legsup; |
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85 | unsigned int cmd, intr; |
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86 | |||
87 | |||
88 | * When restarting a suspended controller, we expect all the |
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89 | * settings to be the same as we left them: |
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90 | * |
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91 | * PIRQ and SMI disabled, no R/W bits set in USBLEGSUP; |
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92 | * Controller is stopped and configured with EGSM set; |
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93 | * No interrupts enabled except possibly Resume Detect. |
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94 | * |
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95 | * If any of these conditions are violated we do a complete reset. |
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96 | */ |
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97 | legsup = pciReadWord(hc->PciTag, UHCI_USBLEGSUP); |
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98 | if (legsup & ~(UHCI_USBLEGSUP_RO | UHCI_USBLEGSUP_RWC)) { |
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99 | dbgprintf("%s: legsup = 0x%04x\n",__FUNCTION__, legsup); |
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100 | goto reset_needed; |
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101 | } |
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102 | |||
103 | |||
104 | if ( (cmd & UHCI_USBCMD_RUN) || |
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105 | !(cmd & UHCI_USBCMD_CONFIGURE) || |
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106 | !(cmd & UHCI_USBCMD_EGSM)) |
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107 | { |
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108 | dbgprintf("%s: cmd = 0x%04x\n", __FUNCTION__, cmd); |
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109 | goto reset_needed; |
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110 | } |
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111 | |||
112 | |||
113 | if (intr & (~UHCI_USBINTR_RESUME)) |
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114 | { |
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115 | dbgprintf("%s: intr = 0x%04x\n", __FUNCTION__, intr); |
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116 | goto reset_needed; |
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117 | } |
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118 | return 0; |
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119 | |||
120 | |||
121 | dbgprintf("Performing full reset\n"); |
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122 | uhci_reset_hc(hc); |
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123 | return 1; |
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124 | } |
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125 | |||
126 | |||
2111 | serge | 127 | { |
1605 | serge | 128 | hc_t *hc = (hc_t*)data; |
2111 | serge | 129 | |
1029 | serge | 130 | |
2111 | serge | 131 | |
1605 | serge | 132 | |
2111 | serge | 133 | u16_t status; |
134 | |||
1605 | serge | 135 | |
2111 | serge | 136 | if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ |
137 | return 0; |
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138 | |||
1605 | serge | 139 | |
2111 | serge | 140 | |
1613 | serge | 141 | |
2111 | serge | 142 | |
1605 | serge | 143 | |
2111 | serge | 144 | { |
145 | request_t *rtmp; |
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146 | td_t *td; |
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147 | |||
1613 | serge | 148 | |
2111 | serge | 149 | rq = (request_t*)rq->list.next; |
150 | |||
1613 | serge | 151 | |
2111 | serge | 152 | |
1613 | serge | 153 | |
2111 | serge | 154 | continue; |
155 | |||
1613 | serge | 156 | |
2111 | serge | 157 | |
1613 | serge | 158 | |
2111 | serge | 159 | }; |
160 | |||
1613 | serge | 161 | |
2111 | serge | 162 | }; |
1605 | serge | 163 | |
164 | |||
165 | |||
166 | |||
1600 | serge | 167 | { |
1029 | serge | 168 | int port; |
1600 | serge | 169 | u32_t ifl; |
170 | u16_t dev_status; |
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171 | td_t *td; |
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1605 | serge | 172 | int i; |
1029 | serge | 173 | |
174 | |||
175 | |||
176 | |||
177 | { |
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178 | if(hc->ioBase[i]){ |
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179 | hc->iobase = hc->ioBase[i]; |
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180 | // dbgprintf("Io base_%d 0x%x\n", i,hc->ioBase[i]); |
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181 | break; |
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182 | }; |
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183 | }; |
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184 | |||
185 | |||
186 | * they may have more but gives no way to determine how many there |
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187 | * are. However according to the UHCI spec, Bit 7 of the port |
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188 | * status and control register is always set to 1. So we try to |
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189 | * use this to our advantage. Another common failure mode when |
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190 | * a nonexistent register is addressed is to return all ones, so |
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191 | * we test for that also. |
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192 | */ |
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193 | for (port = 0; port < 2; port++) |
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194 | { |
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195 | u32_t status; |
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196 | |||
197 | |||
198 | dbgprintf("port%d status %x\n", port, status); |
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199 | if (!(status & 0x0080) || status == 0xffff) |
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200 | break; |
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201 | } |
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202 | dbgprintf("detected %d ports\n\n", port); |
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203 | |||
204 | |||
205 | |||
206 | |||
207 | * isn't already safely quiescent. |
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208 | */ |
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209 | uhci_check_and_reset_hc(hc); |
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210 | |||
211 | |||
212 | hc->frame_dma = GetPgAddr(hc->frame_base); |
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213 | hc->frame_number = 0; |
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214 | |||
215 | |||
1616 | serge | 216 | sizeof(td_t), 16, 0); |
217 | if (!hc->td_pool) |
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218 | { |
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219 | dbgprintf("unable to create td dma_pool\n"); |
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220 | goto err_create_td_pool; |
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221 | } |
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222 | |||
1605 | serge | 223 | |
224 | { |
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225 | qh_t *qh = alloc_qh(); |
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1029 | serge | 226 | |
227 | |||
228 | qh->qelem = 1; |
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229 | |||
230 | |||
1605 | serge | 231 | } |
232 | for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i) |
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233 | hc->qh[i]->qlink = hc->qh[SKEL_ASYNC]->dma | 2; |
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234 | |||
1029 | serge | 235 | |
1605 | serge | 236 | { |
237 | int qnum; |
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238 | |||
1029 | serge | 239 | |
1605 | serge | 240 | |
241 | |||
242 | qnum = 9; |
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243 | |||
244 | |||
245 | } |
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246 | |||
247 | |||
248 | |||
249 | |||
1029 | serge | 250 | out8(hc->iobase + USBSOF, USBSOF_DEFAULT); |
251 | |||
252 | |||
253 | out32(hc->iobase + USBFLBASEADD, hc->frame_dma); |
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254 | |||
255 | |||
256 | out16(hc->iobase + USBFRNUM, 0); |
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257 | |||
258 | |||
259 | |||
1605 | serge | 260 | |
261 | |||
262 | |||
2111 | serge | 263 | delay(100/10); |
264 | AttachIntHandler(hc->irq_line, hc_interrupt, hc); |
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265 | printf("done\n"); |
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266 | |||
1605 | serge | 267 | |
2111 | serge | 268 | |
269 | |||
270 | |||
1605 | serge | 271 | |
272 | |||
1029 | serge | 273 | USBCMD_MAXP); |
274 | |||
275 | |||
276 | out16(hc->iobase + USBPORTSC1 + (port * 2), 0x200); |
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277 | |||
278 | |||
279 | { |
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280 | time_t timeout; |
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281 | |||
282 | |||
1875 | serge | 283 | |
284 | |||
1029 | serge | 285 | dbgprintf("port%d status %x\n", port, status); |
286 | |||
287 | |||
288 | |||
289 | |||
290 | while(timeout--) |
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291 | { |
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292 | delay(10/10); |
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293 | status = in16(hc->iobase + USBPORTSC1 + (port * 2)); |
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294 | if(status & 1) |
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295 | { |
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296 | udev_t *dev = kmalloc(sizeof(udev_t),0); |
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1600 | serge | 297 | |
1029 | serge | 298 | |
299 | |||
300 | |||
301 | |||
302 | |||
303 | status = in16(hc->iobase + USBPORTSC1 + (port * 2)); |
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304 | dbgprintf("port%d status %x\n", port, status); |
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305 | |||
306 | |||
1600 | serge | 307 | |
308 | |||
1029 | serge | 309 | dev->port = port; |
310 | dev->ep0_size = 8; |
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311 | dev->status = status; |
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312 | |||
313 | |||
314 | if(status & 4) |
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315 | dbgprintf(" enabled"); |
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316 | else |
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317 | dbgprintf(" disabled"); |
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318 | if(status & 0x100){ |
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319 | dev->speed = 0x4000000; |
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320 | dbgprintf(" low speed\n"); |
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321 | } else { |
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322 | dev->speed = 0; |
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323 | dbgprintf(" full speed\n"); |
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324 | }; |
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325 | |||
326 | |||
327 | list_add_tail(&dev->list, &newdev_list); |
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1600 | serge | 328 | hc->port_map |= 1< |
1029 | serge | 329 | } |
330 | else { |
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331 | free(dev); |
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332 | out16(hc->iobase + USBPORTSC1 + (port * 2), 0); |
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333 | } |
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334 | break; |
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335 | }; |
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336 | }; |
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337 | }; |
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338 | return true; |
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1600 | serge | 339 | |
1616 | serge | 340 | |
341 | |||
342 | |||
343 | |||
344 | |||
345 | }; |
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1029 | serge | 346 | |
347 | |||
348 | req_descr[4] = {0x0680,0x0100,0x0000,8}; |
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349 | |||
350 | |||
351 | IN(69) OUT(E1) SETUP(2D) |
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352 | SETUP(0) IN(1) |
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353 | SETUP(0) OUT(1) OUT(0) OUT(1)...IN(1) |
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354 | SETUP(0) IN(1) IN(0) IN(1)...OUT(0) |
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355 | */ |
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356 | |||
357 | |||
358 | |||
1600 | serge | 359 | { |
1029 | serge | 360 | static udev_id = 0; |
361 | static udev_addr = 0; |
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362 | static u16_t __attribute__((aligned(16))) |
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363 | req_addr[4] = {0x0500,0x0001,0x0000,0x0000}; |
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364 | |||
365 | |||
366 | req_descr[4] = {0x0680,0x0100,0x0000,8}; |
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367 | |||
368 | |||
369 | |||
370 | |||
371 | td_t *td0, *td1, *td2; |
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372 | u32_t dev_status; |
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373 | count_t timeout; |
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374 | int address; |
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375 | |||
376 | |||
377 | |||
378 | |||
379 | |||
380 | |||
381 | return false; |
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1600 | serge | 382 | |
1029 | serge | 383 | |
384 | dev->id = (++udev_id << 8) | address; |
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385 | |||
386 | |||
387 | |||
388 | |||
389 | data[1] = 0; |
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390 | |||
391 | |||
392 | return false; |
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1600 | serge | 393 | |
1029 | serge | 394 | |
395 | dev->ep0_size = descr->bMaxPacketSize0; |
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396 | |||
397 | |||
1600 | serge | 398 | } |
1029 | serge | 399 | |
400 | |||
1875 | serge | 401 | |
402 | |||
403 | |||
404 | |||
405 | size_t data_size) |
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406 | { |
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1029 | serge | 407 | size_t packet_size = dev->ep0_size; |
1875 | serge | 408 | int dsize = data_size; |
409 | size_t buf_size; |
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410 | |||
411 | |||
412 | addr_t td_dma; |
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1616 | serge | 413 | addr_t data_dma; |
1875 | serge | 414 | |
1029 | serge | 415 | |
1875 | serge | 416 | |
1029 | serge | 417 | |
1875 | serge | 418 | int td_count = 0; |
419 | |||
420 | |||
421 | { |
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422 | td_count++; |
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423 | dsize-= packet_size; |
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424 | }; |
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425 | |||
426 | |||
427 | td_count*sizeof(td_t); |
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428 | |||
429 | |||
430 | memset(rq, 0, buf_size); |
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431 | |||
432 | |||
433 | td_dma = data_dma + ALIGN16(data_size); |
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434 | |||
435 | |||
1600 | serge | 436 | |
1029 | serge | 437 | |
1875 | serge | 438 | td = MakePtr(td_t*, rq->data, ALIGN16(data_size)); |
439 | rq->td_head = td; |
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440 | rq->size = data_size; |
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441 | rq->dev = dev; |
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1600 | serge | 442 | |
1029 | serge | 443 | |
444 | |||
445 | |||
1875 | serge | 446 | |
447 | |||
448 | { |
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1029 | serge | 449 | if ( dsize < packet_size) |
1875 | serge | 450 | { |
1600 | serge | 451 | packet_size = dsize; |
1875 | serge | 452 | }; |
1600 | serge | 453 | |
454 | |||
1616 | serge | 455 | |
456 | |||
1600 | serge | 457 | |
1029 | serge | 458 | |
459 | td_prev->link = td->dma | 4; |
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460 | td->status = TD_CTRL_ACTIVE | dev->speed; |
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1605 | serge | 461 | td->token = TOKEN(packet_size,enp->toggle,enp->address, |
1600 | serge | 462 | dev->addr,dir); |
1029 | serge | 463 | td->buffer = data_dma; |
464 | td->bk = td_prev; |
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465 | |||
466 | |||
467 | |||
468 | |||
1875 | serge | 469 | td_dma+= sizeof(td_t); |
470 | data_dma+= packet_size; |
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1600 | serge | 471 | |
1875 | serge | 472 | |
473 | enp->toggle ^= DATA1; |
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1029 | serge | 474 | }; |
1605 | serge | 475 | |
476 | |||
1875 | serge | 477 | rq->td_tail = td_prev; |
478 | |||
1613 | serge | 479 | |
480 | |||
481 | |||
482 | printf("%s: epic fail\n", __FUNCTION__); |
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483 | |||
484 | |||
485 | rq->event.data[0] = (addr_t)rq; |
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486 | |||
487 | |||
1029 | serge | 488 | } |
489 | |||
490 | |||
1600 | serge | 491 | void *data, size_t req_size) |
1029 | serge | 492 | { |
493 | size_t packet_size = dev->ep0_size; |
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494 | size_t size = req_size; |
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495 | u32_t toggle = DATA1; |
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496 | |||
497 | |||
498 | qh_t *qh; |
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499 | addr_t data_dma = 0; |
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500 | hc_t *hc = dev->host; |
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1616 | serge | 501 | |
502 | |||
503 | |||
504 | |||
1600 | serge | 505 | |
1029 | serge | 506 | |
1613 | serge | 507 | |
508 | |||
509 | |||
510 | |||
511 | |||
512 | rq->size = req_size; |
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513 | rq->dev = dev; |
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514 | |||
515 | |||
1616 | serge | 516 | td0->dma = td_dma; |
517 | |||
1029 | serge | 518 | |
1875 | serge | 519 | |
1616 | serge | 520 | |
1029 | serge | 521 | td0->token = TOKEN( 8, DATA0, 0, dev->addr, 0x2D); |
522 | td0->buffer = DMA(req); |
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523 | td0->bk = NULL; |
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524 | |||
525 | |||
526 | data_dma = DMA(data); |
||
527 | |||
528 | |||
529 | |||
530 | |||
1600 | serge | 531 | { |
1029 | serge | 532 | if ( size < packet_size) |
1600 | serge | 533 | { |
534 | packet_size = size; |
||
535 | }; |
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536 | |||
537 | |||
1616 | serge | 538 | td->dma = td_dma; |
539 | |||
540 | |||
1875 | serge | 541 | |
1616 | serge | 542 | |
1029 | serge | 543 | td->status = TD_CTRL_ACTIVE | dev->speed; |
1605 | serge | 544 | td->token = TOKEN(packet_size, toggle, 0,dev->addr, pid); |
1029 | serge | 545 | td->buffer = data_dma; |
546 | td->bk = td_prev; |
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547 | |||
548 | |||
549 | |||
550 | |||
551 | size-= packet_size; |
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552 | toggle ^= DATA1; |
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553 | } |
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554 | |||
555 | |||
1616 | serge | 556 | td->dma = td_dma; |
557 | |||
558 | |||
1875 | serge | 559 | |
1616 | serge | 560 | |
1029 | serge | 561 | |
562 | |||
563 | |||
564 | |||
565 | td->status = TD_CTRL_ACTIVE | TD_CTRL_IOC | dev->speed ; |
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1605 | serge | 566 | td->token = (0x7FF<<21)|DATA1|(dev->addr<<8)|pid; |
1029 | serge | 567 | td->buffer = 0; |
568 | td->bk = td_prev; |
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569 | |||
570 | |||
1613 | serge | 571 | rq->td_tail = td; |
572 | |||
573 | |||
574 | |||
575 | |||
576 | printf("%s: epic fail\n", __FUNCTION__); |
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577 | |||
578 | |||
579 | rq->event.data[0] = (addr_t)rq; |
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580 | |||
581 | |||
582 | |||
583 | |||
1875 | serge | 584 | |
1613 | serge | 585 | |
1605 | serge | 586 | |
1029 | serge | 587 | |
588 | |||
589 | |||
1605 | serge | 590 | |
591 | |||
1613 | serge | 592 | |
1029 | serge | 593 | |
2111 | serge | 594 | |
1613 | serge | 595 | |
596 | dbgprintf("td status 0x%0x\n", td->status); |
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597 | |||
598 | |||
1029 | serge | 599 | (td_prev->status & TD_ANY_ERROR) || |
600 | (td->status & TD_ANY_ERROR)) |
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601 | { |
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602 | u32_t dev_status = in16(dev->host->iobase + USBSTS); |
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603 | |||
604 | |||
605 | in16(dev->host->iobase + USBFRNUM), |
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606 | in16(dev->host->iobase + USBCMD), |
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607 | dev_status); |
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608 | dbgprintf("td0 status %x\n",td0->status); |
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609 | dbgprintf("td_prev status %x\n",td_prev->status); |
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610 | dbgprintf("td status %x\n",td->status); |
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611 | dbgprintf("qh %x \n", qh->qelem); |
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612 | |||
613 | |||
1600 | serge | 614 | } else retval = true; |
615 | |||
1029 | serge | 616 | |
1613 | serge | 617 | |
618 | |||
619 | |||
620 | |||
1029 | serge | 621 | { |
622 | td_prev = td->bk; |
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623 | dma_pool_free(hc->td_pool, td, td->dma); |
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1616 | serge | 624 | td = td_prev; |
1029 | serge | 625 | }while( td != NULL); |
626 | |||
627 | |||
1613 | serge | 628 | delete event; |
629 | */ |
||
630 | kfree(rq); |
||
631 | |||
632 | |||
1029 | serge | 633 | }; |
634 | |||
635 | |||
636 | |||
1600 | serge | 637 | { |
1029 | serge | 638 | static u16_t __attribute__((aligned(16))) |
639 | req_descr[4] = {0x0680,0x0100,0x0000,18}; |
||
640 | |||
641 | |||
642 | req_conf[4] = {0x0680,0x0200,0x0000,9}; |
||
643 | |||
644 | |||
645 | |||
646 | |||
647 | |||
648 | |||
649 | |||
650 | |||
651 | conf_descr_t *conf; |
||
652 | |||
653 | |||
654 | dev->id, dev->host->pciId, dev->port); |
||
655 | |||
656 | |||
657 | { |
||
1613 | serge | 658 | dbgprintf("%s epic fail\n",__FUNCTION__); |
659 | return; |
||
1029 | serge | 660 | }; |
1613 | serge | 661 | |
1029 | serge | 662 | |
663 | |||
664 | |||
665 | "bLength %d\n" |
||
666 | "bDescriptorType %d\n" |
||
667 | "bcdUSB %x\n" |
||
668 | "bDeviceClass %x\n" |
||
669 | "bDeviceSubClass %x\n" |
||
670 | "bDeviceProtocol %x\n" |
||
671 | "bMaxPacketSize0 %d\n" |
||
672 | "idVendor %x\n" |
||
673 | "idProduct %x\n" |
||
674 | "bcdDevice %x\n" |
||
675 | "iManufacturer %x\n" |
||
676 | "iProduct %x\n" |
||
677 | "iSerialNumber %x\n" |
||
678 | "bNumConfigurations %d\n\n", |
||
679 | descr.bLength, descr.bDescriptorType, |
||
680 | descr.bcdUSB, descr.bDeviceClass, |
||
681 | descr.bDeviceSubClass, descr.bDeviceProtocol, |
||
682 | descr.bMaxPacketSize0, descr.idVendor, |
||
683 | descr.idProduct, descr.bcdDevice, |
||
684 | descr.iManufacturer, descr.iProduct, |
||
685 | descr.iSerialNumber, descr.bNumConfigurations); |
||
686 | |||
687 | |||
688 | if( !ctrl_request(dev, req_conf, DIN, &data, 8)) |
||
689 | return; |
||
690 | |||
691 | |||
692 | |||
693 | |||
694 | |||
695 | |||
696 | conf = malloc(conf_size); |
||
697 | |||
698 | |||
699 | return; |
||
700 | |||
701 | |||
702 | dptr+= conf->bLength; |
||
703 | |||
704 | |||
705 | "bLength %d\n" |
||
706 | "bDescriptorType %d\n" |
||
707 | "wTotalLength %d\n" |
||
708 | "bNumInterfaces %d\n" |
||
709 | "bConfigurationValue %x\n" |
||
710 | "iConfiguration %d\n" |
||
711 | "bmAttributes %x\n" |
||
712 | "bMaxPower %dmA\n\n", |
||
713 | conf->bLength, |
||
714 | conf->bDescriptorType, |
||
715 | conf->wTotalLength, |
||
716 | conf->bNumInterfaces, |
||
717 | conf->bConfigurationValue, |
||
718 | conf->iConfiguration, |
||
719 | conf->bmAttributes, |
||
720 | conf->bMaxPower*2); |
||
721 | |||
722 | |||
723 | |||
724 | |||
725 | { |
||
726 | case USB_CLASS_AUDIO: |
||
727 | dbgprintf( "audio device\n"); |
||
728 | break; |
||
729 | case USB_CLASS_HID: |
||
730 | dev->conf = conf; |
||
731 | list_del(&dev->list); |
||
1600 | serge | 732 | return init_hid(dev); |
1029 | serge | 733 | |
734 | |||
735 | dbgprintf("printer\n"); |
||
736 | break; |
||
737 | case USB_CLASS_MASS_STORAGE: |
||
738 | dbgprintf("mass storage device\n"); |
||
739 | break; |
||
740 | case USB_CLASS_HUB: |
||
741 | dbgprintf("hub device\n"); |
||
742 | break; |
||
743 | default: |
||
744 | dbgprintf("unknown device\n"); |
||
745 | }; |
||
746 | };8)|pid; |
||
747 | ><8)|pid; |