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1029 serge 1
 
2
3
 
4
5
 
6
typedef struct RHDRec       *RHDPtr;
7
8
 
9
    int			frameX0;
10
    int			frameY0;
11
    int			virtualX;
12
    int			virtualY;
13
    int			depth;
14
    int			fbbpp;
15
  //  rgb     weight;
16
  //  rgb     blackColour;
17
  //  rgb     whiteColour;
18
    int			defaultVisual;
19
    char **		modes;
20
    pointer		options;
21
} DispRec, *DispPtr;
22
23
 
24
 
25
{
26
    int       scrnIndex;
27
    RHDPtr    rhdPtr;
28
//    int     driverVersion;
29
    char *		driverName;		/* canonical name used in */
30
						/* the config file */
31
//    ScreenPtr   pScreen;    /* Pointer to the ScreenRec */
32
//    int     scrnIndex;    /* Number of this screen */
33
//    Bool    configured;   /* Is this screen valid */
34
//    int     origIndex;    /* initial number assigned to
35
//             * this screen before
36
//             * finalising the number of
37
//             * available screens */
38
39
 
40
//    int     imageByteOrder;
41
//    int     bitmapScanlineUnit;
42
//    int     bitmapScanlinePad;
43
//    int     bitmapBitOrder;
44
//    int     numFormats;
45
//    PixmapFormatRec formats[MAXFORMATS];
46
//    PixmapFormatRec fbFormat;
47
48
 
49
//    Pix24Flags    pixmap24;          /* pixmap pref for depth 24 */
50
    int     depth;                   /* depth of default visual */
51
//    MessageType   depthFrom;         /* set from config? */
52
//    MessageType   bitsPerPixelFrom; /* set from config? */
53
//    rgb     weight;     /* r/g/b weights */
54
//    rgb     mask;     /* rgb masks */
55
//    rgb     offset;     /* rgb offsets */
56
//    int     rgbBits;    /* Number of bits in r/g/b */
57
//    Gamma   gamma;      /* Gamma of the monitor */
58
//    int     defaultVisual;    /* default visual class */
59
    int     maxHValue;               /* max horizontal timing */
60
    int     maxVValue;               /* max vertical timing value */
61
    int     virtualX;                /* Virtual width */
62
    int     virtualY;                /* Virtual height */
63
    int     xInc;                    /* Horizontal timing increment */
64
//    MessageType   virtualFrom;    /* set from config? */
65
    int     displayWidth;            /* memory pitch */
66
    int     frameX0;                 /* viewport position */
67
    int			frameY0;
68
    int			frameX1;
69
    int			frameY1;
70
    int     zoomLocked;              /* Disallow mode changes */
71
    DisplayModePtr  modePool;        /* list of compatible modes */
72
    DisplayModePtr  modes;           /* list of actual modes */
73
    DisplayModePtr  currentMode;     /* current mode
74
						 * This was previously
75
						 * overloaded with the modes
76
						 * field, which is a pointer
77
						 * into a circular list */
78
//    confScreenPtr confScreen;   /* Screen config info */
79
//    MonPtr    monitor;    /* Monitor information */
80
    DispPtr   display;               /* Display information */
81
//    int *   entityList;   /* List of device entities */
82
//    int     numEntities;
83
    int     widthmm;                 /* physical display dimensions in mm */
84
    int			heightmm;
85
    int     xDpi;                    /* width DPI */
86
    int     yDpi;                    /* height DPI */
87
    char *    name;                  /* Name to prefix messages */
88
//    pointer   driverPrivate;    /* Driver private area */
89
//    DevUnion *    privates;   /* Other privates can hook in
90
//             * here */
91
//    DriverPtr   drv;      /* xf86DriverList[] entry */
92
//    pointer   module;     /* Pointer to module head */
93
//    int     colorKey;
94
//    int     overlayFlags;
95
96
 
97
98
 
99
//    char *    ramdac;     /* ramdac name */
100
//    char *    clockchip;    /* clock name */
101
 //   Bool    progClock;    /* clock is programmable */
102
//    int     numClocks;    /* number of clocks */
103
//    int     clock[MAXCLOCKS]; /* list of clock frequencies */
104
//    int     videoRam;   /* amount of video ram (kb) */
105
//    unsigned long biosBase;   /* Base address of video BIOS */
106
//    unsigned long memPhysBase;    /* Physical address of FB */
107
//    unsigned long   fbOffset;   /* Offset of FB in the above */
108
//    IOADDRESS     domainIOBase;   /* Domain I/O base address */
109
//    int     memClk;     /* memory clock */
110
//    int     textClockFreq;    /* clock of text mode */
111
//    Bool    flipPixels;   /* swap default black/white */
112
//    pointer   options;
113
114
 
115
//    int     chipRev;
116
//    int     racMemFlags;
117
//    int     racIoFlags;
118
//    pointer   access;
119
//    xf86CurrentAccessPtr CurrentAccess;
120
//    resType   resourceType;
121
//    pointer   busAccess;
122
123
 
124
//    Bool    vtSema;
125
//    DevUnion    pixmapPrivate;    /* saved devPrivate from pixmap */
126
127
 
128
//    Bool    silkenMouse;
129
130
 
131
//    ClockRangesPtr  clockRanges;
132
//    int     adjustFlags;
133
134
 
135
     * These can be used when the minor ABI version is incremented.
136
     * The NUM_* parameters must be reduced appropriately to keep the
137
     * structure size and alignment unchanged.
138
     */
139
//    int     reservedInt[NUM_RESERVED_INTS];
140
141
 
142
//    pointer   reservedPtr[NUM_RESERVED_POINTERS];
143
144
 
145
     * Driver entry points.
146
     *
147
     */
148
149
 
150
    xf86ProbeProc			*Probe;
151
    xf86PreInitProc			*PreInit;
152
    xf86ScreenInitProc			*ScreenInit;
153
    xf86SwitchModeProc			*SwitchMode;
154
    xf86AdjustFrameProc			*AdjustFrame;
155
    xf86EnterVTProc			*EnterVT;
156
    xf86LeaveVTProc			*LeaveVT;
157
    xf86FreeScreenProc			*FreeScreen;
158
    xf86ValidModeProc			*ValidMode;
159
    xf86EnableDisableFBAccessProc	*EnableDisableFBAccess;
160
    xf86SetDGAModeProc			*SetDGAMode;
161
    xf86ChangeGammaProc			*ChangeGamma;
162
    xf86PointerMovedProc		*PointerMoved;
163
    xf86PMEventProc			*PMEvent;
164
    xf86HandleMessageProc		*HandleMessage;
165
    xf86DPMSSetProc			*DPMSSet;
166
    xf86LoadPaletteProc			*LoadPalette;
167
    xf86SetOverscanProc			*SetOverscan;
168
    xorgRRFuncProc			*RRFunc;
169
*/
170
    /*
171
     * This can be used when the minor ABI version is incremented.
172
     * The NUM_* parameter must be reduced appropriately to keep the
173
     * structure size and alignment unchanged.
174
     */
175
//    funcPointer   reservedFuncs[NUM_RESERVED_FUNCS];
176
177
 
178
179
 
180
 
181
 
182
typedef struct
183
{
184
  CARD16 device;
185
  CARD16 family;
186
}PciChipset_t;
187
#pragma pack(pop)
188
189
 
190
191
 
192
    RHD_UNKNOWN = 0,
193
    /* R500 */
194
    RHD_RV505,
195
    RHD_RV515,
196
    RHD_RV516,
197
    RHD_R520,
198
    RHD_RV530,
199
    RHD_RV535,
200
    RHD_RV550,
201
    RHD_RV560,
202
    RHD_RV570,
203
    RHD_R580,
204
    /* R500 Mobility */
205
    RHD_M52,
206
    RHD_M54,
207
    RHD_M56,
208
    RHD_M58,
209
    RHD_M62,
210
    RHD_M64,
211
    RHD_M66,
212
    RHD_M68,
213
    RHD_M71,
214
    /* R500 integrated */
215
    RHD_RS600,
216
    RHD_RS690,
217
    RHD_RS740,
218
    /* R600 */
219
    RHD_R600,
220
    RHD_RV610,
221
    RHD_RV630,
222
    /* R600 Mobility */
223
    RHD_M72,
224
    RHD_M74,
225
    RHD_M76,
226
    /* RV670 came into existence after RV6x0 and M7x */
227
    RHD_RV670,
228
    RHD_M88,
229
    RHD_R680,
230
    RHD_RV620,
231
    RHD_M82,
232
    RHD_RV635,
233
    RHD_M86,
234
    RHD_RS780,
235
    RHD_RV770,
236
    RHD_R700,
237
    RHD_M98,
238
    RHD_RV730,
239
    RHD_M96,
240
    RHD_RV710,
241
    RHD_CHIP_END
242
};
243
244
 
245
    RHD_FAMILY_UNKNOWN = 0,
246
    RHD_FAMILY_RV515,
247
    RHD_FAMILY_R520,
248
    RHD_FAMILY_RV530,
249
    RHD_FAMILY_RV560,
250
    RHD_FAMILY_RV570,
251
    RHD_FAMILY_R580,
252
    RHD_FAMILY_RS690,
253
    RHD_FAMILY_R600,
254
    RHD_FAMILY_RV610,
255
    RHD_FAMILY_RV630,
256
    RHD_FAMILY_RV670,
257
    RHD_FAMILY_RV620,
258
    RHD_FAMILY_RV635,
259
    RHD_FAMILY_RS780
260
};
261
262
 
263
    RHD_HPD_USAGE_AUTO = 0,
264
    RHD_HPD_USAGE_OFF,
265
    RHD_HPD_USAGE_NORMAL,
266
    RHD_HPD_USAGE_SWAP,
267
    RHD_HPD_USAGE_AUTO_SWAP,
268
    RHD_HPD_USAGE_AUTO_OFF
269
};
270
271
 
272
    RHD_TV_NONE = 0,
273
    RHD_TV_NTSC = 1,
274
    RHD_TV_NTSCJ = 1 << 2,
275
    RHD_TV_PAL = 1 << 3,
276
    RHD_TV_PALM = 1 << 4,
277
    RHD_TV_PALCN = 1 << 5,
278
    RHD_TV_PALN = 1 << 6,
279
    RHD_TV_PAL60 = 1 << 7,
280
    RHD_TV_SECAM = 1 << 8,
281
    RHD_TV_CV = 1 << 9
282
};
283
284
 
285
    rhdPropertyCheck,
286
    rhdPropertyGet,
287
    rhdPropertySet
288
};
289
290
 
291
{
292
    CARD32 integer;
293
    char *string;
294
    Bool Bool;
295
};
296
297
 
298
299
 
300
 * locations as soon as cards with a different BAR layout arrives.
301
 */
302
#define RHD_FB_BAR   0
303
#define RHD_MMIO_BAR 2
304
305
 
306
#define RHD_POWER_ON       0
307
#define RHD_POWER_RESET    1   /* off temporarily */
308
#define RHD_POWER_SHUTDOWN 2   /* long term shutdown */
309
#define RHD_POWER_UNKNOWN  3   /* initial state */
310
311
 
312
#define RHD_MEM_FB         2
313
314
 
315
 
316
    RHD_CARD_NONE,
317
    RHD_CARD_AGP,
318
    RHD_CARD_PCIE
319
};
320
321
 
322
    RHD_PCI_CAPID_AGP    = 0x02,
323
    RHD_PCI_CAPID_PCIE   = 0x10
324
};
325
326
 
327
typedef struct _rhdI2CRec *rhdI2CPtr;
328
typedef struct _atomBiosHandle *atomBiosHandlePtr;
329
typedef struct _rhdShadowRec *rhdShadowPtr;
330
331
 
332
    Bool set;
333
    union  {
334
        Bool bool;
335
        int integer;
336
        unsigned long uslong;
337
        double real;
338
        double freq;
339
        char *string;
340
    } val;
341
} RHDOpt, *RHDOptPtr;
342
343
 
344
 
345
typedef enum
346
{
347
    CONNECTOR_NONE,            // 0
348
    CONNECTOR_VGA,             // 1
349
    CONNECTOR_DVI_I,           // 2
350
    CONNECTOR_DVI_D,           // 3
351
    CONNECTOR_DVI_A,           // 4
352
    CONNECTOR_STV,             // 5
353
    CONNECTOR_CTV,             // 6
354
    CONNECTOR_LVDS,            // 7
355
    CONNECTOR_DIGITAL,         // 8
356
    CONNECTOR_SCART,           // 9
357
    CONNECTOR_HDMI_TYPE_A,     // 10
358
    CONNECTOR_HDMI_TYPE_B,     // 11
359
    CONNECTOR_0XC,             // 12
360
    CONNECTOR_0XD,             // 13
361
    CONNECTOR_DIN,             // 14
362
    CONNECTOR_DISPLAY_PORT,    // 15
363
    CONNECTOR_UNSUPPORTED
364
} RADEONConnectorType;
365
366
 
367
{
368
    DAC_NONE    = 0,
369
    DAC_PRIMARY = 1,
370
    DAC_TVDAC   = 2,
371
    DAC_EXT     = 3
372
} RADEONDacType;
373
374
 
375
{
376
    TMDS_NONE    = 0,
377
    TMDS_INT     = 1,
378
    TMDS_EXT     = 2,
379
    TMDS_LVTMA   = 3,
380
    TMDS_DDIA    = 4
381
} RADEONTmdsType;
382
383
 
384
{
385
    Bool   valid;
386
    CARD32 mask_clk_reg;
387
    CARD32 mask_data_reg;
388
    CARD32 put_clk_reg;
389
    CARD32 put_data_reg;
390
    CARD32 get_clk_reg;
391
    CARD32 get_data_reg;
392
    CARD32 mask_clk_mask;
393
    CARD32 mask_data_mask;
394
    CARD32 put_clk_mask;
395
    CARD32 put_data_mask;
396
    CARD32 get_clk_mask;
397
    CARD32 get_data_mask;
398
} RADEONI2CBusRec, *RADEONI2CBusPtr;
399
400
 
401
    RADEONDacType DACType;
402
    RADEONTmdsType TMDSType;
403
    RADEONConnectorType ConnectorType;
404
    Bool valid;
405
    int output_id;
406
    int devices;
407
    int hpd_mask;
408
    RADEONI2CBusRec ddc_i2c;
409
} RADEONBIOSConnector;
410
411
 
412
413
 
414
 
415
 
416
{
417
  ScrnInfoPtr            pScrn;
418
  int                    scrnIndex;
419
420
 
421
  CARD32                 MMIOMapSize;
422
  CARD32                 videoRam;
423
424
 
425
  RHDOpt                 forceReduced;
426
427
 
428
  CARD32                 FbIntAddress;      /* card internal address of FB */
429
 CARD32                  FbIntSize;         /* card internal FB aperture size */
430
431
 
432
433
 
434
  CARD32                 FbFreeSize;
435
436
 
437
  unsigned int           FbScanoutStart;
438
  unsigned int           FbScanoutSize;
439
440
 
441
442
 
443
  struct rhdCard         *Card;
444
  char                   *chipset_name;
445
446
 
447
  Bool                   IsIGP;
448
  Bool                   HasCRTC2;
449
  Bool                   HasSingleDAC;
450
  Bool                   InternalTVOut;
451
452
 
453
  u32_t                  devfn;
454
455
 
456
  PCITAG                 NBPciTag;
457
458
 
459
  enum rhdCardType       cardType;
460
461
 
462
  CARD16                 subdevice_id;
463
  pciVideoRec            pci;
464
465
 
466
  atomBiosHandlePtr      atomBIOS;           /* handle for AtomBIOS */
467
468
 
469
  struct rhdVGA         *VGA;
470
  struct rhdCrtc        *Crtc[2];
471
  struct rhdPLL         *PLLs[2];            /* Pixelclock PLLs */
472
473
 
474
  struct rhdLUT         *LUT[2];
475
476
 
477
478
 
479
480
 
481
  enum RHD_TV_MODE       tvMode;
482
  struct rhdMonitor     *ConfigMonitor;
483
484
 
485
  struct mem_block      *gart_heap;
486
487
 
488
489
 
490
491
 
492
 
493
  RHDOpt                 UseAtomBIOS;
494
  CARD32                 UseAtomFlags;
495
496
 
497
}RHD_t;
498
499
 
500
    int			token;		/* id of the token */
501
    const char *	name;		/* token name */
502
} SymTabRec, *SymTabPtr;
503
504
 
505
{
506
  return *(volatile CARD32 *)((CARD8*)(rhdPtr->MMIOBase + offset));
507
}
508
509
 
510
_RHDRegWrite(RHDPtr rhdPtr, CARD16 offset, CARD32 value)
511
{
512
  *(volatile CARD32 *)((CARD8 *)(rhdPtr->MMIOBase + offset)) = value;
513
}
514
515
 
516
_RHDRegMask(RHDPtr rhdPtr, CARD16 offset, CARD32 value, CARD32 mask)
517
{
518
  CARD32 tmp;
519
520
 
521
  tmp &= ~mask;
522
  tmp |= (value & mask);
523
  _RHDRegWrite(rhdPtr, offset, tmp);
524
};
525
526
 
527
_RHDReadPLL(RHDPtr rhdPtr, CARD16 offset)
528
{
529
  _RHDRegWrite(rhdPtr, CLOCK_CNTL_INDEX, (offset & PLL_ADDR));
530
  return _RHDRegRead(rhdPtr, CLOCK_CNTL_DATA);
531
}
532
533
 
534
_RHDWritePLL(RHDPtr rhdPtr, CARD16 offset, CARD32 data)
535
{
536
  _RHDRegWrite(rhdPtr, CLOCK_CNTL_INDEX, (offset & PLL_ADDR) | PLL_WR_EN);
537
  _RHDRegWrite(rhdPtr, CLOCK_CNTL_DATA, data);
538
}
539
540
 
541
 
542
543
 
544
#define RHDReadMC(ptr,addr) _RHDReadMC((int)(ptr),(addr))
545
546
 
547
#define RHDWriteMC(ptr,addr,value) _RHDWriteMC((int)(ptr),(addr),(value))
548
549
 
550
        _RHDRegRead((RHDPtr)((ptr)->scrnIndex), (offset))
551
552
 
553
        _RHDRegWrite((RHDPtr)((ptr)->scrnIndex), (offset), (value))
554
555
 
556
        _RHDRegMask((RHDPtr)((ptr)->scrnIndex), (offset), (value), (mask))
557
558
 
559
        RHDRegMask(ptr, offset, value, mask)
560
561
 
562
563
 
564
 
565
 
566
567
 
568
#define  X_WARNING    1
569
#define  X_INFO       2
570
#define  X_NONE       3
571
#define  X_PROBED     4
572
573
 
574
#ifdef DBG_ALL
575
 #undef  DBG_CALL
576
 #undef  DBG_MSG
577
 #undef  DBG_CAIL
578
579
 
580
 #define DBG_MSG
581
 #define DBG_CAIL
582
#endif
583
*/
584
585
 
586
 
587
  #define RHDFUNC(ptr) dbgprintf("FUNCTION: %s\n", __func__)
588
#else
589
  #define RHDFUNC(ptr)
590
#endif
591
592
 
593
  #define xf86Msg(a, format,...)            dbgprintf(format,##__VA_ARGS__)
594
  #define xf86MsgVerb(a,b,format,...)       dbgprintf(format,##__VA_ARGS__)
595
  #define xf86DrvMsg(a,b,format,...)        dbgprintf(format,##__VA_ARGS__)
596
  #define xf86DrvMsgVerb(a,b,c,format,...)  dbgprintf(format,##__VA_ARGS__)
597
  #define xf86VDrvMsgVerb(a,b,c,format,...) dbgprintf(format,##__VA_ARGS__)
598
599
 
600
  #define RHDDebugCont(format,...)          dbgprintf(format,##__VA_ARGS__)
601
  #define RHDDebugVerb(a,b,format,...)      dbgprintf(format,##__VA_ARGS__)
602
#else
603
  #define xf86Msg(a, format,...)
604
  #define xf86MsgVerb(a,b,format,...)
605
  #define xf86DrvMsg(a,b,format,...)
606
  #define xf86DrvMsgVerb(a,b,c,format,...)
607
  #define xf86VDrvMsgVerb(a,b,c,format,...)
608
609
 
610
  #define RHDDebugCont(format,...)
611
  #define RHDDebugVerb(a,b,format,...)
612
#endif
613
614
 
615
  #define CAILFUNC(a)             dbgprintf("CAIL: %s\n", __func__)
616
  #define CailDebug(a,format,...) dbgprintf(format,##__VA_ARGS__)
617
#else
618
  #define CAILFUNC(a)
619
  #define CailDebug(a,format,...)
620
#endif
621
622
 
623
#define ErrorF dbgprintf
624
625
 
626
627
 
628
629
 
630
#define RHDPTR(p)   ((p)->rhdPtr)
631
632
 
633
634
 
635
    atomUsageCrtc,
636
    atomUsagePLL,
637
    atomUsageOutput,
638
    atomUsageAny
639
};
640
641
 
642
643
 
644
//git://anongit.freedesktop.org/git/nouveau/xf86-video-nouveau
645