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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1029 | serge | 1 | |
| 2 | |||
| 3 | u32_t *ring; |
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| 4 | |||
| 5 | local_pixmap_t *dstpixmap; |
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| 6 | |||
| 7 | dstpixmap = (io->dstpix == (void*)-1) ? &scr_pixmap : io->dstpix ; |
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| 8 | |||
| 9 | lock_device(); |
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| 10 | |||
| 11 | #if R300_PIO |
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| 12 | |||
| 13 | FIFOWait(6); |
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| 14 | |||
| 15 | OUTREG(R5XX_DP_GUI_MASTER_CNTL, |
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| 16 | |||
| 17 | RADEON_GMC_BRUSH_SOLID_COLOR | |
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| 18 | RADEON_GMC_DST_32BPP | |
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| 19 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 20 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
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| 21 | R5XX_GMC_WR_MSK_DIS | |
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| 22 | R5XX_ROP3_P |
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| 23 | ); |
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| 24 | |||
| 25 | OUTREG(R5XX_DP_BRUSH_FRGD_CLR, io->color); |
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| 26 | |||
| 27 | OUTREG(R5XX_DST_PITCH_OFFSET, dstpixmap->pitch_offset); |
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| 28 | OUTREG(R5XX_DST_Y_X, 0); |
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| 29 | OUTREG(R5XX_DST_WIDTH_HEIGHT,(dstpixmap->width<<16)|dstpixmap->height); |
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| 30 | |||
| 31 | #else |
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| 32 | |||
| 33 | |||
| 34 | OUT_RING(CP_PACKET3(RADEON_CNTL_PAINT_MULTI, 4)); |
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| 35 | |||
| 36 | OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL | |
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| 37 | |||
| 38 | RADEON_GMC_DST_32BPP | |
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| 39 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 40 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
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| 41 | R5XX_GMC_WR_MSK_DIS | |
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| 42 | R5XX_ROP3_P |
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| 43 | ); |
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| 44 | |||
| 45 | OUT_RING(dstpixmap->pitch_offset); |
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| 46 | |||
| 47 | OUT_RING( 0 ); |
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| 48 | OUT_RING((dstpixmap->width<<16)|dstpixmap->height); |
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| 49 | COMMIT_RING(); |
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| 50 | |||
| 51 | #endif |
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| 52 | |||
| 53 | unlock_device(); |
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| 54 | |||
| 55 | return ERR_OK; |
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| 56 | |||
| 57 | |||
| 58 | |||
| 59 | |||
| 60 | |||
| 61 | local_pixmap_t *dstpixmap; |
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| 62 | clip_t clip; |
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| 63 | int x0, y0, x1, y1; |
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| 64 | |||
| 65 | dstpixmap = (draw->dstpix == (void*)-1) ? &scr_pixmap : draw->dstpix ; |
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| 66 | |||
| 67 | x0 = draw->x0; |
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| 68 | |||
| 69 | |||
| 70 | x1 = draw->x1; |
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| 71 | |||
| 72 | |||
| 73 | clip.xmin = 0; |
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| 74 | |||
| 75 | clip.xmax = dstpixmap->width-1; |
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| 76 | clip.ymax = dstpixmap->height-1; |
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| 77 | |||
| 78 | if ( !LineClip(&clip, &x0, &y0, &x1, &y1 )) |
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| 79 | |||
| 80 | u32_t *ring, write; |
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| 81 | |||
| 82 | lock_device(); |
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| 83 | |||
| 84 | #if R300_PIO |
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| 85 | |||
| 86 | FIFOWait(6); |
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| 87 | |||
| 88 | OUTREG(R5XX_DP_GUI_MASTER_CNTL, |
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| 89 | |||
| 90 | RADEON_GMC_BRUSH_SOLID_COLOR | |
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| 91 | RADEON_GMC_DST_32BPP | |
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| 92 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 93 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
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| 94 | R5XX_GMC_WR_MSK_DIS | |
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| 95 | R5XX_ROP3_P |
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| 96 | ); |
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| 97 | |||
| 98 | OUTREG(R5XX_DST_LINE_PATCOUNT, 0x55 << R5XX_BRES_CNTL_SHIFT); |
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| 99 | |||
| 100 | OUTREG(R5XX_DP_BRUSH_FRGD_CLR, draw->color); |
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| 101 | |||
| 102 | |||
| 103 | OUTREG(R5XX_DST_LINE_START,(y0<<16)|x0); |
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| 104 | |||
| 105 | #else |
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| 106 | BEGIN_RING(6); |
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| 107 | |||
| 108 | OUT_RING(CP_PACKET3(RADEON_CNTL_PAINT_POLYLINE, 4)); |
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| 109 | |||
| 110 | RADEON_GMC_BRUSH_SOLID_COLOR | |
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| 111 | RADEON_GMC_DST_32BPP | |
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| 112 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 113 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
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| 114 | R5XX_GMC_WR_MSK_DIS | |
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| 115 | R5XX_ROP3_P); |
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| 116 | |||
| 117 | OUT_RING(dstpixmap->pitch_offset); |
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| 118 | |||
| 119 | OUT_RING((y0<<16)|x0); |
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| 120 | OUT_RING((y1<<16)|x1); |
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| 121 | COMMIT_RING(); |
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| 122 | #endif |
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| 123 | |||
| 124 | unlock_device(); |
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| 125 | |||
| 126 | return ERR_OK; |
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| 127 | } |
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| 128 | |||
| 129 | int DrawRect(io_draw_t* draw) |
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| 130 | |||
| 131 | int x0, y0, x1, y1, xend, yend; |
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| 132 | |||
| 133 | local_pixmap_t *dstpixmap; |
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| 134 | |||
| 135 | |||
| 136 | dstpixmap = (draw->dstpix == (void*)-1) ? &scr_pixmap : draw->dstpix ; |
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| 137 | |||
| 138 | x0 = draw->x0; |
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| 139 | |||
| 140 | |||
| 141 | x1 = xend = x0 + draw->w - 1; |
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| 142 | |||
| 143 | |||
| 144 | dst_clip.xmin = 0; |
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| 145 | |||
| 146 | dst_clip.xmax = dstpixmap->width-1; |
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| 147 | dst_clip.ymax = dstpixmap->height-1; |
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| 148 | |||
| 149 | |||
| 150 | |||
| 151 | |||
| 152 | |||
| 153 | if( ! BlockClip( &dst_clip, &x0, &y0, &x1, &y1)) |
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| 154 | |||
| 155 | u32_t *ring; |
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| 156 | int w, h; |
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| 157 | |||
| 158 | w = x1 - x0 + 1; |
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| 159 | |||
| 160 | |||
| 161 | lock_device(); |
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| 162 | |||
| 163 | #if R300_PIO |
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| 164 | |||
| 165 | FIFOWait(7); |
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| 166 | |||
| 167 | OUTREG(R5XX_DP_GUI_MASTER_CNTL, |
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| 168 | |||
| 169 | RADEON_GMC_BRUSH_SOLID_COLOR | |
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| 170 | RADEON_GMC_DST_32BPP | |
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| 171 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 172 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
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| 173 | R5XX_GMC_WR_MSK_DIS | |
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| 174 | R5XX_ROP3_P |
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| 175 | ); |
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| 176 | |||
| 177 | OUTREG(R5XX_DP_BRUSH_FRGD_CLR, draw->color); |
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| 178 | |||
| 179 | OUTREG(R5XX_DST_PITCH_OFFSET, dstpixmap->pitch_offset); |
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| 180 | OUTREG(R5XX_DST_Y_X,(y0<<16)|x0); |
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| 181 | OUTREG(R5XX_DST_WIDTH_HEIGHT,(w<<16)|h); |
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| 182 | |||
| 183 | if( draw->color != draw->border) |
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| 184 | |||
| 185 | OUTREG(R5XX_DP_BRUSH_FRGD_CLR, draw->border); |
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| 186 | |||
| 187 | if( y0 == draw->y0) |
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| 188 | |||
| 189 | FIFOWait(2); |
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| 190 | |||
| 191 | OUTREG(R5XX_DST_Y_X,(y0<<16)|x0); |
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| 192 | |||
| 193 | y0++; |
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| 194 | h--; |
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| 195 | } |
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| 196 | if( y1 == yend ) |
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| 197 | { |
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| 198 | FIFOWait(2); |
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| 199 | |||
| 200 | OUTREG(R5XX_DST_Y_X,(y1<<16)|x0); |
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| 201 | |||
| 202 | h--; |
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| 203 | } |
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| 204 | if( (h > 0) && (x0 == draw->x0)) |
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| 205 | { |
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| 206 | FIFOWait(2); |
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| 207 | |||
| 208 | OUTREG(R5XX_DST_Y_X,(y0<<16)|x0); |
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| 209 | |||
| 210 | } |
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| 211 | if( (h > 0) && (x1 == xend)) |
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| 212 | { |
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| 213 | FIFOWait(2); |
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| 214 | |||
| 215 | OUTREG(R5XX_DST_Y_X,(y0<<16)|x1); |
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| 216 | |||
| 217 | } |
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| 218 | }; |
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| 219 | #else |
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| 220 | |||
| 221 | BEGIN_RING(64); |
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| 222 | |||
| 223 | OUT_RING(CP_PACKET3(RADEON_CNTL_PAINT_MULTI, 4)); |
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| 224 | |||
| 225 | OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL | |
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| 226 | |||
| 227 | RADEON_GMC_DST_32BPP | |
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| 228 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 229 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
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| 230 | R5XX_GMC_WR_MSK_DIS | |
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| 231 | R5XX_ROP3_P |
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| 232 | ); |
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| 233 | |||
| 234 | OUT_RING(dstpixmap->pitch_offset); |
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| 235 | |||
| 236 | OUT_RING((x0<<16)|y0); |
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| 237 | OUT_RING((w<<16)|h); |
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| 238 | OUT_RING(CP_PACKET2()); |
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| 239 | OUT_RING(CP_PACKET2()); |
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| 240 | |||
| 241 | if( draw->color != draw->border) |
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| 242 | |||
| 243 | if( y0 == draw->y0) { |
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| 244 | OUT_RING(CP_PACKET3(RADEON_CNTL_PAINT_MULTI, 4)); |
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| 245 | OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL | |
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| 246 | RADEON_GMC_BRUSH_SOLID_COLOR | |
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| 247 | RADEON_GMC_DST_32BPP | |
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| 248 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 249 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
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| 250 | R5XX_GMC_WR_MSK_DIS | |
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| 251 | R5XX_ROP3_P |
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| 252 | ); |
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| 253 | |||
| 254 | OUT_RING(dstpixmap->pitch_offset); |
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| 255 | |||
| 256 | OUT_RING((x0<<16)|y0); |
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| 257 | OUT_RING((w<<16)|1); |
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| 258 | OUT_RING(CP_PACKET2()); |
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| 259 | OUT_RING(CP_PACKET2()); |
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| 260 | |||
| 261 | // y0++; |
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| 262 | |||
| 263 | } |
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| 264 | if( y1 == yend ) { |
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| 265 | OUT_RING(CP_PACKET3(RADEON_CNTL_PAINT_MULTI, 4)); |
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| 266 | OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL | |
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| 267 | RADEON_GMC_BRUSH_SOLID_COLOR | |
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| 268 | RADEON_GMC_DST_32BPP | |
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| 269 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 270 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
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| 271 | R5XX_GMC_WR_MSK_DIS | |
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| 272 | R5XX_ROP3_P |
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| 273 | ); |
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| 274 | |||
| 275 | OUT_RING(dstpixmap->pitch_offset); |
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| 276 | |||
| 277 | OUT_RING((x0<<16)|y1); |
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| 278 | OUT_RING((w<<16)|1); |
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| 279 | OUT_RING(CP_PACKET2()); |
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| 280 | OUT_RING(CP_PACKET2()); |
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| 281 | // h--; |
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| 282 | } |
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| 283 | if( (h > 0) && (x0 == draw->x0)) { |
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| 284 | OUT_RING(CP_PACKET3(RADEON_CNTL_PAINT_MULTI, 4)); |
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| 285 | OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL | |
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| 286 | RADEON_GMC_BRUSH_SOLID_COLOR | |
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| 287 | RADEON_GMC_DST_32BPP | |
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| 288 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 289 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
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| 290 | R5XX_GMC_WR_MSK_DIS | |
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| 291 | R5XX_ROP3_P |
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| 292 | ); |
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| 293 | |||
| 294 | OUT_RING(dstpixmap->pitch_offset); |
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| 295 | |||
| 296 | OUT_RING((x0<<16)|y0); |
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| 297 | OUT_RING((1<<16)|h); |
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| 298 | OUT_RING(CP_PACKET2()); |
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| 299 | OUT_RING(CP_PACKET2()); |
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| 300 | } |
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| 301 | if( (h > 0) && (x1 == xend)) { |
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| 302 | OUT_RING(CP_PACKET3(RADEON_CNTL_PAINT_MULTI, 4)); |
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| 303 | OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL | |
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| 304 | RADEON_GMC_BRUSH_SOLID_COLOR | |
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| 305 | RADEON_GMC_DST_32BPP | |
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| 306 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 307 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
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| 308 | R5XX_GMC_WR_MSK_DIS | |
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| 309 | R5XX_ROP3_P |
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| 310 | ); |
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| 311 | |||
| 312 | OUT_RING(dstpixmap->pitch_offset); |
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| 313 | |||
| 314 | OUT_RING((x1<<16)|y0); |
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| 315 | OUT_RING((1<<16)|h); |
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| 316 | OUT_RING(CP_PACKET2()); |
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| 317 | OUT_RING(CP_PACKET2()); |
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| 318 | } |
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| 319 | }; |
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| 320 | |||
| 321 | /* |
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| 322 | |||
| 323 | CP_REG(R5XX_DP_GUI_MASTER_CNTL, |
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| 324 | |||
| 325 | RADEON_GMC_BRUSH_SOLID_COLOR | |
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| 326 | RADEON_GMC_DST_32BPP | |
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| 327 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 328 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
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| 329 | R5XX_GMC_WR_MSK_DIS | |
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| 330 | R5XX_ROP3_P |
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| 331 | ); |
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| 332 | CP_REG(R5XX_DP_BRUSH_FRGD_CLR, draw->color); |
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| 333 | CP_REG(R5XX_DP_CNTL, R5XX_DST_X_LEFT_TO_RIGHT | R5XX_DST_Y_TOP_TO_BOTTOM); |
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| 334 | |||
| 335 | CP_REG(R5XX_DST_PITCH_OFFSET, dstpixmap->pitch_offset); |
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| 336 | |||
| 337 | CP_REG(R5XX_DST_WIDTH_HEIGHT,(w<<16)|h); |
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| 338 | if( draw->color != draw->border) |
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| 339 | { |
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| 340 | CP_REG(R5XX_DP_GUI_MASTER_CNTL, |
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| 341 | RADEON_GMC_DST_PITCH_OFFSET_CNTL | |
||
| 342 | RADEON_GMC_BRUSH_SOLID_COLOR | |
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| 343 | RADEON_GMC_DST_32BPP | |
||
| 344 | RADEON_GMC_SRC_DATATYPE_COLOR | |
||
| 345 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
||
| 346 | R5XX_GMC_WR_MSK_DIS | |
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| 347 | R5XX_ROP3_P |
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| 348 | ); |
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| 349 | CP_REG(R5XX_DP_BRUSH_FRGD_CLR, draw->border); |
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| 350 | CP_REG(R5XX_DP_CNTL, R5XX_DST_X_LEFT_TO_RIGHT | R5XX_DST_Y_TOP_TO_BOTTOM); |
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| 351 | |||
| 352 | CP_REG(R5XX_DST_PITCH_OFFSET, dstpixmap->pitch_offset); |
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| 353 | |||
| 354 | |||
| 355 | |||
| 356 | |||
| 357 | CP_REG(R5XX_DST_WIDTH_HEIGHT,(w<<16)|1); |
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| 358 | y0++; |
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| 359 | h--; |
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| 360 | } |
||
| 361 | if( y1 == yend ) { |
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| 362 | CP_REG(R5XX_DST_Y_X,(y1<<16)|x0); |
||
| 363 | CP_REG(R5XX_DST_WIDTH_HEIGHT,(w<<16)|1); |
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| 364 | h--; |
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| 365 | } |
||
| 366 | if( (h > 0) && (x0 == draw->x0)) { |
||
| 367 | CP_REG(R5XX_DST_Y_X,(y0<<16)|x0); |
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| 368 | CP_REG(R5XX_DST_WIDTH_HEIGHT,(1<<16)|h); |
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| 369 | } |
||
| 370 | if( (h > 0) && (x1 == xend)) { |
||
| 371 | CP_REG(R5XX_DST_Y_X,(y0<<16)|x1); |
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| 372 | CP_REG(R5XX_DST_WIDTH_HEIGHT,(1<<16)|h); |
||
| 373 | } |
||
| 374 | }; |
||
| 375 | */ |
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| 376 | |||
| 377 | COMMIT_RING(); |
||
| 378 | |||
| 379 | unlock_device(); |
||
| 380 | }; |
||
| 381 | return ERR_OK; |
||
| 382 | } |
||
| 383 | |||
| 384 | int FillRect(io_fill_t *fill) |
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| 385 | |||
| 386 | local_pixmap_t *dstpixmap; |
||
| 387 | clip_t dst_clip; |
||
| 388 | int x0, y0, x1, y1, xend, yend; |
||
| 389 | |||
| 390 | dstpixmap = (fill->dstpix == (void*)-1) ? &scr_pixmap : fill->dstpix ; |
||
| 391 | |||
| 392 | x0 = fill->x; |
||
| 393 | |||
| 394 | |||
| 395 | xend = x1 = x0 + fill->w - 1; |
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| 396 | |||
| 397 | |||
| 398 | dst_clip.xmin = 0; |
||
| 399 | |||
| 400 | dst_clip.xmax = dstpixmap->width-1; |
||
| 401 | dst_clip.ymax = dstpixmap->height-1; |
||
| 402 | |||
| 403 | // dbgprintf("fill rect x0:%d, y0:%d, x1:%d, y1:%d\n", |
||
| 404 | |||
| 405 | |||
| 406 | if( ! BlockClip(&dst_clip, &x0, &y0, &x1, &y1)) |
||
| 407 | |||
| 408 | u32_t *ring, write; |
||
| 409 | |||
| 410 | int w = x1 - x0 + 1; |
||
| 411 | |||
| 412 | |||
| 413 | lock_device(); |
||
| 414 | |||
| 415 | #if R300_PIO |
||
| 416 | |||
| 417 | FIFOWait(9); |
||
| 418 | |||
| 419 | OUTREG(R5XX_DP_GUI_MASTER_CNTL, |
||
| 420 | |||
| 421 | R5XX_GMC_BRUSH_8X8_MONO_FG_BG | |
||
| 422 | RADEON_GMC_DST_32BPP | |
||
| 423 | R5XX_GMC_SRC_DATATYPE_COLOR | |
||
| 424 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
||
| 425 | R5XX_GMC_WR_MSK_DIS | |
||
| 426 | R5XX_ROP3_P |
||
| 427 | ); |
||
| 428 | |||
| 429 | OUTREG(R5XX_DP_BRUSH_BKGD_CLR, fill->bkcolor); |
||
| 430 | |||
| 431 | |||
| 432 | OUTREG(R5XX_BRUSH_DATA0, fill->bmp0); |
||
| 433 | |||
| 434 | |||
| 435 | OUTREG(R5XX_DP_CNTL, R5XX_DST_X_LEFT_TO_RIGHT | R5XX_DST_Y_TOP_TO_BOTTOM); |
||
| 436 | |||
| 437 | |||
| 438 | OUTREG(R5XX_DST_Y_X,(y0<<16)|x0); |
||
| 439 | |||
| 440 | |||
| 441 | if( (fill->border & 0xFF000000) != 0) |
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| 442 | |||
| 443 | FIFOWait(2); |
||
| 444 | |||
| 445 | OUTREG(R5XX_DP_GUI_MASTER_CNTL, |
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| 446 | |||
| 447 | RADEON_GMC_BRUSH_SOLID_COLOR | |
||
| 448 | RADEON_GMC_DST_32BPP | |
||
| 449 | RADEON_GMC_SRC_DATATYPE_COLOR | |
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| 450 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
||
| 451 | R5XX_GMC_WR_MSK_DIS | |
||
| 452 | R5XX_ROP3_P |
||
| 453 | ); |
||
| 454 | |||
| 455 | OUTREG(R5XX_DP_BRUSH_FRGD_CLR, fill->border); |
||
| 456 | |||
| 457 | if( y0 == fill->y) |
||
| 458 | |||
| 459 | FIFOWait(2); |
||
| 460 | |||
| 461 | OUTREG(R5XX_DST_Y_X,(y0<<16)|x0); |
||
| 462 | |||
| 463 | y0++; |
||
| 464 | h--; |
||
| 465 | } |
||
| 466 | if( y1 == yend ) |
||
| 467 | { |
||
| 468 | FIFOWait(2); |
||
| 469 | |||
| 470 | OUTREG(R5XX_DST_Y_X,(y1<<16)|x0); |
||
| 471 | |||
| 472 | h--; |
||
| 473 | } |
||
| 474 | if( (h > 0) && (x0 == fill->x)) |
||
| 475 | { |
||
| 476 | FIFOWait(2); |
||
| 477 | |||
| 478 | OUTREG(R5XX_DST_Y_X,(y0<<16)|x0); |
||
| 479 | |||
| 480 | } |
||
| 481 | if( (h > 0) && (x1 == xend)) |
||
| 482 | { |
||
| 483 | FIFOWait(2); |
||
| 484 | |||
| 485 | OUTREG(R5XX_DST_Y_X,(y0<<16)|x1); |
||
| 486 | |||
| 487 | } |
||
| 488 | }; |
||
| 489 | |||
| 490 | |||
| 491 | |||
| 492 | |||
| 493 | |||
| 494 | OUT_RING(CP_PACKET3(RADEON_CNTL_PAINT, 7)); |
||
| 495 | |||
| 496 | R5XX_GMC_BRUSH_8X8_MONO_FG_BG | |
||
| 497 | RADEON_GMC_DST_32BPP | |
||
| 498 | RADEON_GMC_SRC_DATATYPE_COLOR | |
||
| 499 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
||
| 500 | R5XX_GMC_WR_MSK_DIS | |
||
| 501 | R5XX_ROP3_P |
||
| 502 | ); |
||
| 503 | |||
| 504 | OUT_RING(dstpixmap->pitch_offset); |
||
| 505 | |||
| 506 | OUT_RING(fill->fcolor); |
||
| 507 | |||
| 508 | OUT_RING(fill->bmp0); |
||
| 509 | |||
| 510 | |||
| 511 | OUT_RING((y0<<16)|x0); |
||
| 512 | |||
| 513 | |||
| 514 | if( (fill->border & 0xFF000000) != 0) |
||
| 515 | |||
| 516 | CP_REG(R5XX_DP_GUI_MASTER_CNTL, |
||
| 517 | RADEON_GMC_DST_PITCH_OFFSET_CNTL | |
||
| 518 | RADEON_GMC_BRUSH_SOLID_COLOR | |
||
| 519 | RADEON_GMC_DST_32BPP | |
||
| 520 | RADEON_GMC_SRC_DATATYPE_COLOR | |
||
| 521 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
||
| 522 | R5XX_GMC_WR_MSK_DIS | |
||
| 523 | R5XX_ROP3_P |
||
| 524 | ); |
||
| 525 | |||
| 526 | CP_REG(R5XX_DP_BRUSH_FRGD_CLR, fill->border); |
||
| 527 | |||
| 528 | if( y0 == fill->y) |
||
| 529 | |||
| 530 | CP_REG(R5XX_DST_Y_X,(y0<<16)|x0); |
||
| 531 | CP_REG(R5XX_DST_WIDTH_HEIGHT,(w<<16)|1); |
||
| 532 | y0++; |
||
| 533 | h--; |
||
| 534 | } |
||
| 535 | if( y1 == yend ) |
||
| 536 | { |
||
| 537 | CP_REG(R5XX_DST_Y_X,(y1<<16)|x0); |
||
| 538 | CP_REG(R5XX_DST_WIDTH_HEIGHT,(w<<16)|1); |
||
| 539 | h--; |
||
| 540 | } |
||
| 541 | if( (h > 0) && (x0 == fill->x)) |
||
| 542 | { |
||
| 543 | CP_REG(R5XX_DST_Y_X,(y0<<16)|x0); |
||
| 544 | CP_REG(R5XX_DST_WIDTH_HEIGHT,(1<<16)|h); |
||
| 545 | } |
||
| 546 | if( (h > 0) && (x1 == xend)) |
||
| 547 | { |
||
| 548 | CP_REG(R5XX_DST_Y_X,(y0<<16)|x1); |
||
| 549 | CP_REG(R5XX_DST_WIDTH_HEIGHT,(1<<16)|h); |
||
| 550 | } |
||
| 551 | }; |
||
| 552 | |||
| 553 | COMMIT_RING(); |
||
| 554 | |||
| 555 | #endif |
||
| 556 | |||
| 557 | }; |
||
| 558 | return ERR_OK; |
||
| 559 | }; |
||
| 560 | |||
| 561 | |||
| 562 | |||
| 563 | |||
| 564 | |||
| 565 | |||
| 566 | |||
| 567 | int w, int h, int srcpitch, Bool trans, color_t key) |
||
| 568 | { |
||
| 569 | u32_t dp_cntl; |
||
| 570 | color_t *src_addr; |
||
| 571 | |||
| 572 | lock_device(); |
||
| 573 | |||
| 574 | #if R300_PIO |
||
| 575 | |||
| 576 | dp_cntl = RADEON_GMC_DST_PITCH_OFFSET_CNTL | |
||
| 577 | |||
| 578 | RADEON_GMC_DST_32BPP | |
||
| 579 | RADEON_GMC_SRC_DATATYPE_COLOR | |
||
| 580 | RADEON_DP_SRC_SOURCE_HOST_DATA | |
||
| 581 | R5XX_GMC_WR_MSK_DIS | |
||
| 582 | R5XX_ROP3_S; |
||
| 583 | |||
| 584 | if( trans == FALSE ) |
||
| 585 | |||
| 586 | dp_cntl|= R5XX_GMC_CLR_CMP_CNTL_DIS; |
||
| 587 | FIFOWait(5); |
||
| 588 | } |
||
| 589 | else |
||
| 590 | FIFOWait(8); |
||
| 591 | |||
| 592 | OUTREG(R5XX_DP_GUI_MASTER_CNTL, dp_cntl); |
||
| 593 | |||
| 594 | OUTREG(R5XX_DP_CNTL, R5XX_DST_X_LEFT_TO_RIGHT | |
||
| 595 | |||
| 596 | |||
| 597 | OUTREG(R5XX_DST_PITCH_OFFSET, dstpitch); |
||
| 598 | |||
| 599 | if( trans ) |
||
| 600 | |||
| 601 | OUTREG(R5XX_CLR_CMP_CLR_SRC, key); |
||
| 602 | OUTREG(R5XX_CLR_CMP_MASK, R5XX_CLR_CMP_MSK); |
||
| 603 | OUTREG(R5XX_CLR_CMP_CNTL, R5XX_SRC_CMP_EQ_COLOR | |
||
| 604 | R5XX_CLR_CMP_SRC_SOURCE); |
||
| 605 | }; |
||
| 606 | |||
| 607 | OUTREG(RADEON_DST_Y_X, (dsty << 16) | (dstx & 0xffff)); |
||
| 608 | |||
| 609 | |||
| 610 | src_addr = &((color_t*)src)[srcpitch*srcy/4+srcx]; |
||
| 611 | |||
| 612 | while ( h-- ) |
||
| 613 | |||
| 614 | color_t *tmp_src = src_addr; |
||
| 615 | src_addr += srcpitch/4; |
||
| 616 | |||
| 617 | int left = w; |
||
| 618 | |||
| 619 | while( left ) |
||
| 620 | |||
| 621 | volatile u32_t *d; |
||
| 622 | |||
| 623 | if( left > 8 ) |
||
| 624 | |||
| 625 | int i; |
||
| 626 | |||
| 627 | R5xxFIFOWait(8); |
||
| 628 | |||
| 629 | |||
| 630 | /* Unrolling doesn't improve performance */ |
||
| 631 | |||
| 632 | *d++ = *tmp_src++; |
||
| 633 | left -= 8; |
||
| 634 | } |
||
| 635 | else |
||
| 636 | { |
||
| 637 | R5xxFIFOWait(left); |
||
| 638 | |||
| 639 | if( h ) |
||
| 640 | |||
| 641 | else |
||
| 642 | d = ADDRREG(RADEON_HOST_DATA_LAST) - (left - 1); |
||
| 643 | |||
| 644 | for ( ; left; --left) |
||
| 645 | |||
| 646 | left = 0; |
||
| 647 | }; |
||
| 648 | }; |
||
| 649 | }; |
||
| 650 | |||
| 651 | #endif |
||
| 652 | |||
| 653 | unlock_device(); |
||
| 654 | |||
| 655 | return ERR_OK; |
||
| 656 | |||
| 657 | |||
| 658 | |||
| 659 | |||
| 660 | |||
| 661 | clip_t src_clip, dst_clip; |
||
| 662 | |||
| 663 | local_pixmap_t *srcpixmap; |
||
| 664 | |||
| 665 | |||
| 666 | u32_t srcpitchoffset; |
||
| 667 | |||
| 668 | |||
| 669 | dstpixmap = (blit->dstpix == (void*)-1) ? &scr_pixmap : blit->dstpix ; |
||
| 670 | |||
| 671 | |||
| 672 | src_clip.xmin = 0; |
||
| 673 | |||
| 674 | src_clip.xmax = srcpixmap->width-1; |
||
| 675 | src_clip.ymax = srcpixmap->height-1; |
||
| 676 | |||
| 677 | dst_clip.xmin = 0; |
||
| 678 | |||
| 679 | dst_clip.xmax = dstpixmap->width-1; |
||
| 680 | dst_clip.ymax = dstpixmap->height-1; |
||
| 681 | |||
| 682 | if( !blit_clip(&dst_clip, &blit->dst_x, &blit->dst_y, |
||
| 683 | |||
| 684 | &blit->w, &blit->h) ) |
||
| 685 | { |
||
| 686 | u32_t *ring, write; |
||
| 687 | /* |
||
| 688 | if( (srcpixmap->flags & PX_MEM_MASK)==PX_MEM_SYSTEM) |
||
| 689 | return blit_host(dstpixmap->pitch_offset, |
||
| 690 | blit->dst_x, blit->dst_y, |
||
| 691 | srcpixmap->mapped, |
||
| 692 | blit->src_x, blit->src_y, |
||
| 693 | blit->w, blit->h, |
||
| 694 | srcpixmap->pitch, |
||
| 695 | FALSE, 0 ); |
||
| 696 | */ |
||
| 697 | |||
| 698 | // if( (srcpixmap->flags & PX_MEM_MASK)==PX_MEM_SYSTEM) |
||
| 699 | |||
| 700 | // srcpitchoffset = bind_pixmap(srcpixmap); |
||
| 701 | // need_sync = TRUE; |
||
| 702 | // } |
||
| 703 | // else |
||
| 704 | srcpitchoffset = srcpixmap->pitch_offset; |
||
| 705 | |||
| 706 | lock_device(); |
||
| 707 | |||
| 708 | #if R300_PIO |
||
| 709 | |||
| 710 | FIFOWait(7); |
||
| 711 | |||
| 712 | OUTREG(R5XX_DP_GUI_MASTER_CNTL, |
||
| 713 | |||
| 714 | RADEON_GMC_DST_PITCH_OFFSET_CNTL | |
||
| 715 | RADEON_GMC_BRUSH_NONE | |
||
| 716 | RADEON_GMC_DST_32BPP | |
||
| 717 | RADEON_GMC_SRC_DATATYPE_COLOR | |
||
| 718 | RADEON_DP_SRC_SOURCE_MEMORY | |
||
| 719 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
||
| 720 | R5XX_GMC_WR_MSK_DIS | |
||
| 721 | R5XX_ROP3_S |
||
| 722 | ); |
||
| 723 | |||
| 724 | OUTREG(R5XX_DP_CNTL, R5XX_DST_X_LEFT_TO_RIGHT | R5XX_DST_Y_TOP_TO_BOTTOM); |
||
| 725 | |||
| 726 | OUTREG(R5XX_DST_PITCH_OFFSET, dstpixmap->pitch_offset); |
||
| 727 | |||
| 728 | |||
| 729 | OUTREG(R5XX_SRC_Y_X,(blit->src_y<<16)|blit->src_x); |
||
| 730 | |||
| 731 | OUTREG(R5XX_DST_HEIGHT_WIDTH,(blit->h<<16)|blit->w); |
||
| 732 | |||
| 733 | #else |
||
| 734 | |||
| 735 | |||
| 736 | OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT, 5)); |
||
| 737 | |||
| 738 | OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL | |
||
| 739 | |||
| 740 | RADEON_GMC_BRUSH_NONE | |
||
| 741 | RADEON_GMC_DST_32BPP | |
||
| 742 | RADEON_GMC_SRC_DATATYPE_COLOR | |
||
| 743 | RADEON_DP_SRC_SOURCE_MEMORY | |
||
| 744 | R5XX_GMC_CLR_CMP_CNTL_DIS | |
||
| 745 | R5XX_GMC_WR_MSK_DIS | |
||
| 746 | R5XX_ROP3_S |
||
| 747 | ); |
||
| 748 | |||
| 749 | OUT_RING(srcpitchoffset); |
||
| 750 | |||
| 751 | |||
| 752 | OUT_RING((blit->src_x<<16)|blit->src_y); |
||
| 753 | |||
| 754 | OUT_RING((blit->w<<16)|blit->h); |
||
| 755 | COMMIT_RING(); |
||
| 756 | |||
| 757 | #endif |
||
| 758 | |||
| 759 | if( need_sync == TRUE ) |
||
| 760 | |||
| 761 | |||
| 762 | unlock_device(); |
||
| 763 | |||
| 764 | }; |
||
| 765 | |||
| 766 | }; |
||
| 767 | |||
| 768 | |||
| 769 | |||
| 770 | |||
| 771 | clip_t src_clip, dst_clip; |
||
| 772 | |||
| 773 | local_pixmap_t *srcpixmap; |
||
| 774 | |||
| 775 | |||
| 776 | u32_t srcpitchoffset; |
||
| 777 | |||
| 778 | |||
| 779 | // dbgprintf("Transblit src: %x dst: %x\n",blit->srcpix, blit->dstpix); |
||
| 780 | |||
| 781 | dstpixmap = (blit->dstpix == (void*)-1) ? &scr_pixmap : blit->dstpix ; |
||
| 782 | |||
| 783 | |||
| 784 | //dbgprintf("srcpixmap: %x dstpixmap: %x\n",srcpixmap, dstpixmap); |
||
| 785 | |||
| 786 | //dbgprintf("dst.width: %d dst.height: %d\n", dstpixmap->width,dstpixmap->height); |
||
| 787 | |||
| 788 | //dbgprintf("srcpitch: %x dstpitch: %x\n", |
||
| 789 | // srcpixmap->pitch_offset,dstpixmap->pitch_offset); |
||
| 790 | src_clip.xmin = 0; |
||
| 791 | src_clip.ymin = 0; |
||
| 792 | src_clip.xmax = srcpixmap->width-1; |
||
| 793 | src_clip.ymax = srcpixmap->height-1; |
||
| 794 | |||
| 795 | dst_clip.xmin = 0; |
||
| 796 | |||
| 797 | dst_clip.xmax = dstpixmap->width-1; |
||
| 798 | dst_clip.ymax = dstpixmap->height-1; |
||
| 799 | |||
| 800 | if( !blit_clip(&dst_clip, &blit->dst_x, &blit->dst_y, |
||
| 801 | |||
| 802 | &blit->w, &blit->h) ) |
||
| 803 | { |
||
| 804 | u32_t *ring, write; |
||
| 805 | |||
| 806 | |||
| 807 | |||
| 808 | |||
| 809 | // srcpitchoffset = bind_pixmap(srcpixmap); |
||
| 810 | // need_sync = TRUE; |
||
| 811 | // } |
||
| 812 | // else |
||
| 813 | srcpitchoffset = srcpixmap->pitch_offset; |
||
| 814 | |||
| 815 | lock_device(); |
||
| 816 | |||
| 817 | #if R300_PIO |
||
| 818 | |||
| 819 | FIFOWait(10); |
||
| 820 | |||
| 821 | OUTREG(R5XX_DP_GUI_MASTER_CNTL, |
||
| 822 | |||
| 823 | RADEON_GMC_DST_PITCH_OFFSET_CNTL | |
||
| 824 | RADEON_GMC_BRUSH_NONE | |
||
| 825 | RADEON_GMC_DST_32BPP | |
||
| 826 | RADEON_GMC_SRC_DATATYPE_COLOR | |
||
| 827 | RADEON_DP_SRC_SOURCE_MEMORY | |
||
| 828 | R5XX_GMC_WR_MSK_DIS | |
||
| 829 | R5XX_ROP3_S |
||
| 830 | ); |
||
| 831 | |||
| 832 | OUTREG(R5XX_DP_CNTL, R5XX_DST_X_LEFT_TO_RIGHT | R5XX_DST_Y_TOP_TO_BOTTOM); |
||
| 833 | |||
| 834 | OUTREG(R5XX_CLR_CMP_CLR_SRC, blit->key); |
||
| 835 | |||
| 836 | OUTREG(R5XX_CLR_CMP_CNTL, R5XX_SRC_CMP_EQ_COLOR | R5XX_CLR_CMP_SRC_SOURCE); |
||
| 837 | |||
| 838 | OUTREG(R5XX_DST_PITCH_OFFSET, dstpixmap->pitch_offset); |
||
| 839 | |||
| 840 | |||
| 841 | OUTREG(R5XX_SRC_Y_X,(blit->src_y<<16)|blit->src_x); |
||
| 842 | |||
| 843 | OUTREG(R5XX_DST_HEIGHT_WIDTH,(blit->h<<16)|blit->w); |
||
| 844 | |||
| 845 | #else |
||
| 846 | |||
| 847 | BEGIN_RING(10); |
||
| 848 | |||
| 849 | OUT_RING(CP_PACKET3(RADEON_CNTL_TRANBLT, 8)); |
||
| 850 | |||
| 851 | OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL | |
||
| 852 | |||
| 853 | RADEON_GMC_BRUSH_NONE | |
||
| 854 | RADEON_GMC_DST_32BPP | |
||
| 855 | RADEON_GMC_SRC_DATATYPE_COLOR | |
||
| 856 | RADEON_DP_SRC_SOURCE_MEMORY | |
||
| 857 | R5XX_GMC_WR_MSK_DIS | |
||
| 858 | R5XX_ROP3_S |
||
| 859 | ); |
||
| 860 | |||
| 861 | OUT_RING(srcpitchoffset); |
||
| 862 | |||
| 863 | |||
| 864 | OUT_RING(R5XX_CLR_CMP_SRC_SOURCE | R5XX_SRC_CMP_EQ_COLOR); |
||
| 865 | |||
| 866 | OUT_RING(0xFFFFFFFF); |
||
| 867 | |||
| 868 | OUT_RING((blit->src_x<<16)|blit->src_y); |
||
| 869 | |||
| 870 | OUT_RING((blit->w<<16)|blit->h); |
||
| 871 | |||
| 872 | COMMIT_RING(); |
||
| 873 | |||
| 874 | #endif |
||
| 875 | |||
| 876 | if( need_sync == TRUE ) |
||
| 877 | |||
| 878 | |||
| 879 | unlock_device(); |
||
| 880 | |||
| 881 | |||
| 882 | |||
| 883 | |||
| 884 | } |
||
| 885 | > |
||
| 886 | > |
||
| 887 | |||
| 888 | |||
| 889 |