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Rev | Author | Line No. | Line |
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3545 | hidnplayr | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
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4467 | hidnplayr | 3 | ;; Copyright (C) KolibriOS team 2004-2014. All rights reserved. ;; |
3545 | hidnplayr | 4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
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6 | ;; i8254x driver for KolibriOS ;; |
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7 | ;; ;; |
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8 | ;; based on i8254x.asm from baremetal os ;; |
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9 | ;; ;; |
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10 | ;; Written by hidnplayr (hidnplayr@gmail.com) ;; |
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11 | ;; ;; |
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12 | ;; GNU GENERAL PUBLIC LICENSE ;; |
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13 | ;; Version 2, June 1991 ;; |
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14 | ;; ;; |
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15 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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16 | |||
17 | format MS COFF |
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18 | |||
19 | API_VERSION = 0x01000100 |
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20 | DRIVER_VERSION = 5 |
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21 | |||
22 | MAX_DEVICES = 16 |
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23 | |||
24 | DEBUG = 1 |
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25 | __DEBUG__ = 1 |
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3855 | hidnplayr | 26 | __DEBUG_LEVEL__ = 2 ; 1 = verbose, 2 = errors only |
3545 | hidnplayr | 27 | |
4512 | hidnplayr | 28 | MAX_PKT_SIZE = 4096 ; Maximum packet size |
3545 | hidnplayr | 29 | |
4519 | hidnplayr | 30 | RX_RING_SIZE = 8 ; Must be a power of 2, and minimum 8 |
31 | TX_RING_SIZE = 8 ; Must be a power of 2, and minimum 8 |
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4512 | hidnplayr | 32 | |
4467 | hidnplayr | 33 | include '../struct.inc' |
34 | include '../macros.inc' |
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3545 | hidnplayr | 35 | include '../proc32.inc' |
36 | include '../imports.inc' |
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37 | include '../fdo.inc' |
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38 | include '../netdrv.inc' |
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39 | |||
40 | public START |
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41 | public service_proc |
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42 | public version |
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43 | |||
44 | |||
45 | |||
46 | ; Register list |
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47 | REG_CTRL = 0x0000 ; Control Register |
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48 | REG_STATUS = 0x0008 ; Device Status Register |
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49 | REG_CTRLEXT = 0x0018 ; Extended Control Register |
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50 | REG_MDIC = 0x0020 ; MDI Control Register |
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51 | REG_FCAL = 0x0028 ; Flow Control Address Low |
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52 | REG_FCAH = 0x002C ; Flow Control Address High |
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53 | REG_FCT = 0x0030 ; Flow Control Type |
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54 | REG_VET = 0x0038 ; VLAN Ether Type |
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55 | REG_ICR = 0x00C0 ; Interrupt Cause Read |
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56 | REG_ITR = 0x00C4 ; Interrupt Throttling Register |
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57 | REG_ICS = 0x00C8 ; Interrupt Cause Set Register |
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58 | REG_IMS = 0x00D0 ; Interrupt Mask Set/Read Register |
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59 | REG_IMC = 0x00D8 ; Interrupt Mask Clear Register |
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60 | REG_RCTL = 0x0100 ; Receive Control Register |
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61 | REG_FCTTV = 0x0170 ; Flow Control Transmit Timer Value |
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62 | REG_TXCW = 0x0178 ; Transmit Configuration Word |
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63 | REG_RXCW = 0x0180 ; Receive Configuration Word |
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64 | REG_TCTL = 0x0400 ; Transmit Control Register |
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65 | REG_TIPG = 0x0410 ; Transmit Inter Packet Gap |
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66 | |||
67 | REG_LEDCTL = 0x0E00 ; LED Control |
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68 | REG_PBA = 0x1000 ; Packet Buffer Allocation |
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69 | |||
70 | REG_RDBAL = 0x2800 ; RX Descriptor Base Address Low |
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71 | REG_RDBAH = 0x2804 ; RX Descriptor Base Address High |
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72 | REG_RDLEN = 0x2808 ; RX Descriptor Length |
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73 | REG_RDH = 0x2810 ; RX Descriptor Head |
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74 | REG_RDT = 0x2818 ; RX Descriptor Tail |
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75 | REG_RDTR = 0x2820 ; RX Delay Timer Register |
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76 | REG_RXDCTL = 0x3828 ; RX Descriptor Control |
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77 | REG_RADV = 0x282C ; RX Int. Absolute Delay Timer |
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78 | REG_RSRPD = 0x2C00 ; RX Small Packet Detect Interrupt |
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79 | |||
80 | REG_TXDMAC = 0x3000 ; TX DMA Control |
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81 | REG_TDBAL = 0x3800 ; TX Descriptor Base Address Low |
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82 | REG_TDBAH = 0x3804 ; TX Descriptor Base Address High |
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83 | REG_TDLEN = 0x3808 ; TX Descriptor Length |
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84 | REG_TDH = 0x3810 ; TX Descriptor Head |
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85 | REG_TDT = 0x3818 ; TX Descriptor Tail |
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86 | REG_TIDV = 0x3820 ; TX Interrupt Delay Value |
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87 | REG_TXDCTL = 0x3828 ; TX Descriptor Control |
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88 | REG_TADV = 0x382C ; TX Absolute Interrupt Delay Value |
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89 | REG_TSPMT = 0x3830 ; TCP Segmentation Pad & Min Threshold |
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90 | |||
91 | REG_RXCSUM = 0x5000 ; RX Checksum Control |
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92 | |||
93 | ; Register list for i8254x |
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94 | I82542_REG_RDTR = 0x0108 ; RX Delay Timer Register |
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95 | I82542_REG_RDBAL = 0x0110 ; RX Descriptor Base Address Low |
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96 | I82542_REG_RDBAH = 0x0114 ; RX Descriptor Base Address High |
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97 | I82542_REG_RDLEN = 0x0118 ; RX Descriptor Length |
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98 | I82542_REG_RDH = 0x0120 ; RDH for i82542 |
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99 | I82542_REG_RDT = 0x0128 ; RDT for i82542 |
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100 | I82542_REG_TDBAL = 0x0420 ; TX Descriptor Base Address Low |
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101 | I82542_REG_TDBAH = 0x0424 ; TX Descriptor Base Address Low |
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102 | I82542_REG_TDLEN = 0x0428 ; TX Descriptor Length |
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103 | I82542_REG_TDH = 0x0430 ; TDH for i82542 |
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104 | I82542_REG_TDT = 0x0438 ; TDT for i82542 |
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105 | |||
106 | ; CTRL - Control Register (0x0000) |
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107 | CTRL_FD = 0x00000001 ; Full Duplex |
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108 | CTRL_LRST = 0x00000008 ; Link Reset |
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109 | CTRL_ASDE = 0x00000020 ; Auto-speed detection |
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110 | CTRL_SLU = 0x00000040 ; Set Link Up |
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111 | CTRL_ILOS = 0x00000080 ; Invert Loss of Signal |
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112 | CTRL_SPEED_MASK = 0x00000300 ; Speed selection |
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113 | CTRL_SPEED_SHIFT = 8 |
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114 | CTRL_FRCSPD = 0x00000800 ; Force Speed |
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115 | CTRL_FRCDPLX = 0x00001000 ; Force Duplex |
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116 | CTRL_SDP0_DATA = 0x00040000 ; SDP0 data |
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117 | CTRL_SDP1_DATA = 0x00080000 ; SDP1 data |
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118 | CTRL_SDP0_IODIR = 0x00400000 ; SDP0 direction |
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119 | CTRL_SDP1_IODIR = 0x00800000 ; SDP1 direction |
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120 | CTRL_RST = 0x04000000 ; Device Reset |
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121 | CTRL_RFCE = 0x08000000 ; RX Flow Ctrl Enable |
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122 | CTRL_TFCE = 0x10000000 ; TX Flow Ctrl Enable |
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123 | CTRL_VME = 0x40000000 ; VLAN Mode Enable |
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124 | CTRL_PHY_RST = 0x80000000 ; PHY reset |
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125 | |||
126 | ; STATUS - Device Status Register (0x0008) |
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127 | STATUS_FD = 0x00000001 ; Full Duplex |
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128 | STATUS_LU = 0x00000002 ; Link Up |
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129 | STATUS_TXOFF = 0x00000010 ; Transmit paused |
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130 | STATUS_TBIMODE = 0x00000020 ; TBI Mode |
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131 | STATUS_SPEED_MASK = 0x000000C0 ; Link Speed setting |
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132 | STATUS_SPEED_SHIFT = 6 |
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133 | STATUS_ASDV_MASK = 0x00000300 ; Auto Speed Detection |
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134 | STATUS_ASDV_SHIFT = 8 |
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135 | STATUS_PCI66 = 0x00000800 ; PCI bus speed |
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136 | STATUS_BUS64 = 0x00001000 ; PCI bus width |
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137 | STATUS_PCIX_MODE = 0x00002000 ; PCI-X mode |
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138 | STATUS_PCIXSPD_MASK = 0x0000C000 ; PCI-X speed |
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139 | STATUS_PCIXSPD_SHIFT = 14 |
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140 | |||
141 | ; CTRL_EXT - Extended Device Control Register (0x0018) |
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142 | CTRLEXT_PHY_INT = 0x00000020 ; PHY interrupt |
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143 | CTRLEXT_SDP6_DATA = 0x00000040 ; SDP6 data |
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144 | CTRLEXT_SDP7_DATA = 0x00000080 ; SDP7 data |
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145 | CTRLEXT_SDP6_IODIR = 0x00000400 ; SDP6 direction |
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146 | CTRLEXT_SDP7_IODIR = 0x00000800 ; SDP7 direction |
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147 | CTRLEXT_ASDCHK = 0x00001000 ; Auto-Speed Detect Chk |
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148 | CTRLEXT_EE_RST = 0x00002000 ; EEPROM reset |
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149 | CTRLEXT_SPD_BYPS = 0x00008000 ; Speed Select Bypass |
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150 | CTRLEXT_RO_DIS = 0x00020000 ; Relaxed Ordering Dis. |
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151 | CTRLEXT_LNKMOD_MASK = 0x00C00000 ; Link Mode |
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152 | CTRLEXT_LNKMOD_SHIFT = 22 |
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153 | |||
154 | ; MDIC - MDI Control Register (0x0020) |
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155 | MDIC_DATA_MASK = 0x0000FFFF ; Data |
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156 | MDIC_REG_MASK = 0x001F0000 ; PHY Register |
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157 | MDIC_REG_SHIFT = 16 |
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158 | MDIC_PHY_MASK = 0x03E00000 ; PHY Address |
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159 | MDIC_PHY_SHIFT = 21 |
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160 | MDIC_OP_MASK = 0x0C000000 ; Opcode |
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161 | MDIC_OP_SHIFT = 26 |
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162 | MDIC_R = 0x10000000 ; Ready |
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163 | MDIC_I = 0x20000000 ; Interrupt Enable |
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164 | MDIC_E = 0x40000000 ; Error |
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165 | |||
166 | ; ICR - Interrupt Cause Read (0x00c0) |
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167 | ICR_TXDW = 0x00000001 ; TX Desc Written back |
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168 | ICR_TXQE = 0x00000002 ; TX Queue Empty |
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169 | ICR_LSC = 0x00000004 ; Link Status Change |
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170 | ICR_RXSEQ = 0x00000008 ; RX Sence Error |
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171 | ICR_RXDMT0 = 0x00000010 ; RX Desc min threshold reached |
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172 | ICR_RXO = 0x00000040 ; RX Overrun |
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173 | ICR_RXT0 = 0x00000080 ; RX Timer Interrupt |
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174 | ICR_MDAC = 0x00000200 ; MDIO Access Complete |
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175 | ICR_RXCFG = 0x00000400 |
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176 | ICR_PHY_INT = 0x00001000 ; PHY Interrupt |
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177 | ICR_GPI_SDP6 = 0x00002000 ; GPI on SDP6 |
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178 | ICR_GPI_SDP7 = 0x00004000 ; GPI on SDP7 |
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179 | ICR_TXD_LOW = 0x00008000 ; TX Desc low threshold hit |
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180 | ICR_SRPD = 0x00010000 ; Small RX packet detected |
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181 | |||
182 | ; RCTL - Receive Control Register (0x0100) |
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183 | RCTL_EN = 0x00000002 ; Receiver Enable |
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184 | RCTL_SBP = 0x00000004 ; Store Bad Packets |
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185 | RCTL_UPE = 0x00000008 ; Unicast Promiscuous Enabled |
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186 | RCTL_MPE = 0x00000010 ; Xcast Promiscuous Enabled |
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187 | RCTL_LPE = 0x00000020 ; Long Packet Reception Enable |
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188 | RCTL_LBM_MASK = 0x000000C0 ; Loopback Mode |
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189 | RCTL_LBM_SHIFT = 6 |
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190 | RCTL_RDMTS_MASK = 0x00000300 ; RX Desc Min Threshold Size |
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191 | RCTL_RDMTS_SHIFT = 8 |
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192 | RCTL_MO_MASK = 0x00003000 ; Multicast Offset |
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193 | RCTL_MO_SHIFT = 12 |
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194 | RCTL_BAM = 0x00008000 ; Broadcast Accept Mode |
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195 | RCTL_BSIZE_MASK = 0x00030000 ; RX Buffer Size |
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196 | RCTL_BSIZE_SHIFT = 16 |
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197 | RCTL_VFE = 0x00040000 ; VLAN Filter Enable |
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198 | RCTL_CFIEN = 0x00080000 ; CFI Enable |
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199 | RCTL_CFI = 0x00100000 ; Canonical Form Indicator Bit |
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200 | RCTL_DPF = 0x00400000 ; Discard Pause Frames |
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201 | RCTL_PMCF = 0x00800000 ; Pass MAC Control Frames |
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202 | RCTL_BSEX = 0x02000000 ; Buffer Size Extension |
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203 | RCTL_SECRC = 0x04000000 ; Strip Ethernet CRC |
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204 | |||
205 | ; TCTL - Transmit Control Register (0x0400) |
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206 | TCTL_EN = 0x00000002 ; Transmit Enable |
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207 | TCTL_PSP = 0x00000008 ; Pad short packets |
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208 | TCTL_SWXOFF = 0x00400000 ; Software XOFF Transmission |
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209 | |||
210 | ; PBA - Packet Buffer Allocation (0x1000) |
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211 | PBA_RXA_MASK = 0x0000FFFF ; RX Packet Buffer |
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212 | PBA_RXA_SHIFT = 0 |
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213 | PBA_TXA_MASK = 0xFFFF0000 ; TX Packet Buffer |
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214 | PBA_TXA_SHIFT = 16 |
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215 | |||
216 | ; Flow Control Type |
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217 | FCT_TYPE_DEFAULT = 0x8808 |
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218 | |||
219 | |||
4519 | hidnplayr | 220 | |
221 | ; === TX Descriptor === |
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222 | |||
223 | struct TDESC |
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224 | addr_l dd ? |
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225 | addr_h dd ? |
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226 | |||
227 | length_cso_cmd dd ? ; 16 bits length + 8 bits cso + 8 bits cmd |
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228 | status dd ? ; status, checksum start field, special |
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229 | ends |
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230 | |||
3545 | hidnplayr | 231 | ; TX Packet Length (word 2) |
232 | TXDESC_LEN_MASK = 0x0000ffff |
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233 | |||
234 | ; TX Descriptor CMD field (word 2) |
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235 | TXDESC_IDE = 0x80000000 ; Interrupt Delay Enable |
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236 | TXDESC_VLE = 0x40000000 ; VLAN Packet Enable |
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237 | TXDESC_DEXT = 0x20000000 ; Extension |
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238 | TXDESC_RPS = 0x10000000 ; Report Packet Sent |
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239 | TXDESC_RS = 0x08000000 ; Report Status |
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240 | TXDESC_IC = 0x04000000 ; Insert Checksum |
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241 | TXDESC_IFCS = 0x02000000 ; Insert FCS |
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242 | TXDESC_EOP = 0x01000000 ; End Of Packet |
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243 | |||
244 | ; TX Descriptor STA field (word 3) |
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245 | TXDESC_TU = 0x00000008 ; Transmit Underrun |
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246 | TXDESC_LC = 0x00000004 ; Late Collision |
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247 | TXDESC_EC = 0x00000002 ; Excess Collisions |
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248 | TXDESC_DD = 0x00000001 ; Descriptor Done |
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249 | |||
250 | |||
4519 | hidnplayr | 251 | |
252 | ; === RX Descriptor === |
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253 | |||
254 | struct RDESC |
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255 | addr_l dd ? |
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256 | addr_h dd ? |
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257 | status_l dd ? |
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258 | status_h dd ? |
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259 | ends |
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260 | |||
3545 | hidnplayr | 261 | ; RX Packet Length (word 2) |
262 | RXDESC_LEN_MASK = 0x0000ffff |
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263 | |||
264 | ; RX Descriptor STA field (word 3) |
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265 | RXDESC_PIF = 0x00000080 ; Passed In-exact Filter |
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266 | RXDESC_IPCS = 0x00000040 ; IP cksum calculated |
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267 | RXDESC_TCPCS = 0x00000020 ; TCP cksum calculated |
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268 | RXDESC_VP = 0x00000008 ; Packet is 802.1Q |
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269 | RXDESC_IXSM = 0x00000004 ; Ignore cksum indication |
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270 | RXDESC_EOP = 0x00000002 ; End Of Packet |
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271 | RXDESC_DD = 0x00000001 ; Descriptor Done |
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272 | |||
273 | virtual at ebx |
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274 | device: |
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275 | ETH_DEVICE |
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276 | |||
277 | .mmio_addr dd ? |
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278 | .pci_bus dd ? |
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279 | .pci_dev dd ? |
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280 | .irq_line db ? |
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281 | |||
4512 | hidnplayr | 282 | .cur_rx dd ? |
3545 | hidnplayr | 283 | .cur_tx dd ? |
284 | .last_tx dd ? |
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285 | |||
4519 | hidnplayr | 286 | rb 0x100 - (($ - device) and 0xff) ; align 256 |
287 | .rx_desc rb RX_RING_SIZE*sizeof.RDESC*2 |
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3545 | hidnplayr | 288 | |
4519 | hidnplayr | 289 | rb 0x100 - (($ - device) and 0xff) ; align 256 |
290 | .tx_desc rb TX_RING_SIZE*sizeof.TDESC*2 |
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3545 | hidnplayr | 291 | |
292 | sizeof.device_struct = $ - device |
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293 | |||
294 | end virtual |
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295 | |||
4512 | hidnplayr | 296 | |
3545 | hidnplayr | 297 | section '.flat' code readable align 16 |
298 | |||
299 | |||
300 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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301 | ;; ;; |
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302 | ;; proc START ;; |
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303 | ;; ;; |
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304 | ;; (standard driver proc) ;; |
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305 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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306 | |||
307 | align 4 |
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308 | proc START stdcall, state:dword |
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309 | |||
310 | cmp [state], 1 |
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311 | jne .exit |
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312 | |||
313 | .entry: |
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314 | |||
3855 | hidnplayr | 315 | DEBUGF 1,"Loading driver\n" |
3545 | hidnplayr | 316 | stdcall RegService, my_service, service_proc |
317 | ret |
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318 | |||
319 | .fail: |
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320 | .exit: |
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321 | xor eax, eax |
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322 | ret |
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323 | |||
324 | endp |
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325 | |||
326 | |||
327 | |||
328 | |||
329 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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330 | ;; ;; |
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331 | ;; proc SERVICE_PROC ;; |
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332 | ;; ;; |
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333 | ;; (standard driver proc) ;; |
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334 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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335 | |||
336 | align 4 |
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337 | proc service_proc stdcall, ioctl:dword |
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338 | |||
339 | mov edx, [ioctl] |
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4470 | hidnplayr | 340 | mov eax, [edx + IOCTL.io_code] |
3545 | hidnplayr | 341 | |
342 | ;------------------------------------------------------ |
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343 | |||
344 | cmp eax, 0 ;SRV_GETVERSION |
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345 | jne @F |
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346 | |||
4470 | hidnplayr | 347 | cmp [edx + IOCTL.out_size], 4 |
3545 | hidnplayr | 348 | jb .fail |
4470 | hidnplayr | 349 | mov eax, [edx + IOCTL.output] |
3545 | hidnplayr | 350 | mov [eax], dword API_VERSION |
351 | |||
352 | xor eax, eax |
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353 | ret |
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354 | |||
355 | ;------------------------------------------------------ |
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356 | @@: |
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357 | cmp eax, 1 ;SRV_HOOK |
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358 | jne .fail |
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359 | |||
4470 | hidnplayr | 360 | cmp [edx + IOCTL.inp_size], 3 ; Data input must be at least 3 bytes |
3545 | hidnplayr | 361 | jb .fail |
362 | |||
4470 | hidnplayr | 363 | mov eax, [edx + IOCTL.input] |
3545 | hidnplayr | 364 | cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given |
365 | jne .fail ; other types arent supported for this card yet |
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366 | |||
367 | ; check if the device is already listed |
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368 | |||
369 | mov esi, device_list |
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370 | mov ecx, [devices] |
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371 | test ecx, ecx |
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372 | jz .firstdevice |
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373 | |||
4470 | hidnplayr | 374 | ; mov eax, [edx + IOCTL.input] ; get the pci bus and device numbers |
3545 | hidnplayr | 375 | mov ax, [eax+1] ; |
376 | .nextdevice: |
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377 | mov ebx, [esi] |
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378 | cmp al, byte [device.pci_bus] |
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379 | jne .next |
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380 | cmp ah, byte [device.pci_dev] |
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381 | je .find_devicenum ; Device is already loaded, let's find it's device number |
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382 | .next: |
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383 | add esi, 4 |
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384 | loop .nextdevice |
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385 | |||
386 | |||
387 | ; This device doesnt have its own eth_device structure yet, lets create one |
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388 | .firstdevice: |
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389 | cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card |
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390 | jae .fail |
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391 | |||
392 | allocate_and_clear ebx, sizeof.device_struct, .fail ; Allocate the buffer for device structure |
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393 | |||
394 | ; Fill in the direct call addresses into the struct |
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395 | |||
396 | mov [device.reset], reset |
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397 | mov [device.transmit], transmit |
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398 | mov [device.unload], unload |
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399 | mov [device.name], my_service |
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400 | |||
401 | ; save the pci bus and device numbers |
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402 | |||
4470 | hidnplayr | 403 | mov eax, [edx + IOCTL.input] |
3545 | hidnplayr | 404 | movzx ecx, byte [eax+1] |
405 | mov [device.pci_bus], ecx |
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406 | movzx ecx, byte [eax+2] |
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407 | mov [device.pci_dev], ecx |
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408 | |||
409 | ; Now, it's time to find the base mmio addres of the PCI device |
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410 | |||
411 | PCI_find_mmio32 |
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412 | |||
413 | ; Create virtual mapping of the physical memory |
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414 | |||
415 | push 1Bh ; PG_SW+PG_NOCACHE |
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416 | push 10000h ; size of the map |
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417 | push eax |
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418 | call MapIoMem |
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419 | mov [device.mmio_addr], eax |
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420 | |||
421 | ; We've found the mmio address, find IRQ now |
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422 | |||
423 | PCI_find_irq |
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424 | |||
425 | DEBUGF 1,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\ |
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426 | [device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.mmio_addr]:8 |
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427 | |||
428 | ; Ok, the eth_device structure is ready, let's probe the device |
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429 | call probe ; this function will output in eax |
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430 | test eax, eax |
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431 | jnz .err ; If an error occured, exit |
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432 | |||
433 | mov eax, [devices] ; Add the device structure to our device list |
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434 | mov [device_list+4*eax], ebx ; (IRQ handler uses this list to find device) |
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435 | inc [devices] ; |
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436 | |||
437 | call start_i8254x |
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438 | |||
439 | mov [device.type], NET_TYPE_ETH |
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440 | call NetRegDev |
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441 | |||
442 | cmp eax, -1 |
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443 | je .destroy |
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444 | |||
445 | ret |
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446 | |||
447 | ; If the device was already loaded, find the device number and return it in eax |
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448 | |||
449 | .find_devicenum: |
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450 | DEBUGF 1,"Trying to find device number of already registered device\n" |
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451 | call NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
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452 | ; into a device number in edi |
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453 | mov eax, edi ; Application wants it in eax instead |
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454 | DEBUGF 1,"Kernel says: %u\n", eax |
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455 | ret |
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456 | |||
457 | ; If an error occured, remove all allocated data and exit (returning -1 in eax) |
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458 | |||
459 | .destroy: |
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460 | ; todo: reset device into virgin state |
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461 | |||
462 | .err: |
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463 | stdcall KernelFree, ebx |
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464 | |||
465 | .fail: |
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466 | or eax, -1 |
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467 | ret |
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468 | |||
469 | ;------------------------------------------------------ |
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470 | endp |
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471 | |||
472 | |||
473 | ;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;; |
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474 | ;; ;; |
||
475 | ;; Actual Hardware dependent code starts here ;; |
||
476 | ;; ;; |
||
477 | ;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;; |
||
478 | |||
479 | |||
480 | align 4 |
||
481 | unload: |
||
482 | ; TODO: (in this particular order) |
||
483 | ; |
||
484 | ; - Stop the device |
||
485 | ; - Detach int handler |
||
486 | ; - Remove device from local list (device_list) |
||
487 | ; - call unregister function in kernel |
||
488 | ; - Remove all allocated structures and buffers the card used |
||
489 | |||
490 | or eax, -1 |
||
491 | |||
492 | ret |
||
493 | |||
494 | |||
495 | |||
496 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
||
497 | ;; |
||
498 | ;; probe: enables the device (if it really is I8254X) |
||
499 | ;; |
||
500 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
||
501 | align 4 |
||
502 | probe: |
||
503 | |||
504 | DEBUGF 1,"Probe\n" |
||
505 | |||
506 | PCI_make_bus_master |
||
507 | |||
508 | ; TODO: validate the device |
||
509 | |||
510 | call read_mac |
||
511 | |||
512 | movzx eax, [device.irq_line] |
||
513 | DEBUGF 1,"Attaching int handler to irq %x\n", eax:1 |
||
514 | stdcall AttachIntHandler, eax, int_handler, dword 0 |
||
515 | test eax, eax |
||
516 | jnz @f |
||
3855 | hidnplayr | 517 | DEBUGF 2,"Could not attach int handler!\n" |
4519 | hidnplayr | 518 | or eax, -1 |
519 | ret |
||
3545 | hidnplayr | 520 | @@: |
521 | |||
522 | |||
523 | reset_dontstart: |
||
524 | DEBUGF 1,"Reset\n" |
||
525 | |||
526 | mov esi, [device.mmio_addr] |
||
527 | |||
4512 | hidnplayr | 528 | or dword[esi + REG_CTRL], CTRL_RST ; reset device |
3545 | hidnplayr | 529 | .loop: |
530 | push esi |
||
531 | xor esi, esi |
||
532 | inc esi |
||
533 | call Sleep |
||
534 | pop esi |
||
4512 | hidnplayr | 535 | test dword[esi + REG_CTRL], CTRL_RST |
3545 | hidnplayr | 536 | jnz .loop |
537 | |||
4519 | hidnplayr | 538 | mov dword[esi + REG_IMC], 0xffffffff ; Disable all interrupt causes |
3545 | hidnplayr | 539 | mov eax, dword [esi + REG_ICR] ; Clear any pending interrupts |
4519 | hidnplayr | 540 | mov dword[esi + REG_ITR], 0 ; Disable interrupt throttling logic |
3545 | hidnplayr | 541 | |
4519 | hidnplayr | 542 | mov dword[esi + REG_PBA], 0x00000004 ; PBA: set the RX buffer size to 4KB (TX buffer is calculated as 64-RX buffer) |
543 | mov dword[esi + REG_RDTR], 0 ; RDTR: set no delay |
||
3545 | hidnplayr | 544 | |
4519 | hidnplayr | 545 | mov dword[esi + REG_TXCW], 0x08008060 ; TXCW: set ANE, TxConfigWord (Half/Full duplex, Next Page Reqest) |
3545 | hidnplayr | 546 | |
547 | mov eax, [esi + REG_CTRL] |
||
548 | or eax, 1 shl 6 + 1 shl 5 |
||
549 | and eax, not (1 shl 3 + 1 shl 7 + 1 shl 30 + 1 shl 31) |
||
550 | mov dword [esi + REG_CTRL], eax ; CTRL: clear LRST, set SLU and ASDE, clear RSTPHY, VME, and ILOS |
||
551 | |||
552 | lea edi, [esi + 0x5200] ; MTA: reset |
||
553 | mov eax, 0xffffffff |
||
554 | stosd |
||
555 | stosd |
||
556 | stosd |
||
557 | stosd |
||
558 | |||
4512 | hidnplayr | 559 | call init_rx |
560 | call init_tx |
||
561 | |||
562 | xor eax, eax |
||
563 | ret |
||
564 | |||
565 | |||
566 | |||
567 | align 4 |
||
568 | init_rx: |
||
569 | |||
570 | lea edi, [device.rx_desc] |
||
571 | mov ecx, RX_RING_SIZE |
||
572 | .loop: |
||
573 | push ecx |
||
574 | push edi |
||
575 | stdcall KernelAlloc, MAX_PKT_SIZE |
||
576 | DEBUGF 1,"RX buffer: 0x%x\n", eax |
||
577 | pop edi |
||
4519 | hidnplayr | 578 | mov dword[edi + RX_RING_SIZE*sizeof.RDESC], eax |
4512 | hidnplayr | 579 | push edi |
3545 | hidnplayr | 580 | GetRealAddr |
4512 | hidnplayr | 581 | pop edi |
4519 | hidnplayr | 582 | mov [edi + RDESC.addr_l], eax |
583 | mov [edi + RDESC.addr_h], 0 |
||
584 | mov [edi + RDESC.status_l], 0 |
||
585 | mov [edi + RDESC.status_h], 0 |
||
586 | add edi, sizeof.RDESC |
||
4512 | hidnplayr | 587 | pop ecx |
588 | dec ecx |
||
589 | jnz .loop |
||
3545 | hidnplayr | 590 | |
4512 | hidnplayr | 591 | mov [device.cur_rx], 0 |
592 | |||
3545 | hidnplayr | 593 | lea eax, [device.rx_desc] |
594 | GetRealAddr |
||
4519 | hidnplayr | 595 | mov dword[esi + REG_RDBAL], eax ; Receive Descriptor Base Address Low |
596 | mov dword[esi + REG_RDBAH], 0 ; Receive Descriptor Base Address High |
||
597 | mov dword[esi + REG_RDLEN], RX_RING_SIZE*sizeof.RDESC ; Receive Descriptor Length |
||
598 | mov dword[esi + REG_RDH], 0 ; Receive Descriptor Head |
||
599 | mov dword[esi + REG_RDT], RX_RING_SIZE-1 ; Receive Descriptor Tail |
||
4512 | hidnplayr | 600 | mov dword[esi + REG_RCTL], RCTL_SBP or RCTL_BAM or RCTL_SECRC or RCTL_UPE or RCTL_MPE |
601 | ; Store Bad Packets, Broadcast Accept Mode, Strip Ethernet CRC from incoming packet, Promiscuous mode |
||
3545 | hidnplayr | 602 | |
4512 | hidnplayr | 603 | ret |
3545 | hidnplayr | 604 | |
4512 | hidnplayr | 605 | |
606 | |||
607 | align 4 |
||
608 | init_tx: |
||
609 | |||
4519 | hidnplayr | 610 | lea edi, [device.tx_desc] |
611 | mov ecx, TX_RING_SIZE |
||
612 | .loop: |
||
613 | mov [edi + TDESC.addr_l], eax |
||
614 | mov [edi + TDESC.addr_h], 0 |
||
615 | mov [edi + TDESC.length_cso_cmd], 0 |
||
616 | mov [edi + TDESC.status], 0 |
||
617 | add edi, sizeof.TDESC |
||
618 | dec ecx |
||
619 | jnz .loop |
||
4512 | hidnplayr | 620 | |
4519 | hidnplayr | 621 | mov [device.cur_tx], 0 |
622 | mov [device.last_tx], 0 |
||
623 | |||
3545 | hidnplayr | 624 | lea eax, [device.tx_desc] |
625 | GetRealAddr |
||
4519 | hidnplayr | 626 | mov dword[esi + REG_TDBAL], eax ; Transmit Descriptor Base Address Low |
627 | mov dword[esi + REG_TDBAH], 0 ; Transmit Descriptor Base Address High |
||
628 | mov dword[esi + REG_TDLEN], RX_RING_SIZE*sizeof.TDESC ; Transmit Descriptor Length |
||
629 | mov dword[esi + REG_TDH], 0 ; Transmit Descriptor Head |
||
630 | mov dword[esi + REG_TDT], 0 ; Transmit Descriptor Tail |
||
631 | mov dword[esi + REG_TCTL], 0x010400fa ; Enabled, Pad Short Packets, 15 retrys, 64-byte COLD, Re-transmit on Late Collision |
||
632 | mov dword[esi + REG_TIPG], 0x0060200A ; IPGT 10, IPGR1 8, IPGR2 6 |
||
3545 | hidnplayr | 633 | |
634 | ret |
||
635 | |||
4512 | hidnplayr | 636 | |
3545 | hidnplayr | 637 | align 4 |
638 | reset: |
||
639 | call reset_dontstart |
||
640 | |||
641 | start_i8254x: |
||
642 | |||
4512 | hidnplayr | 643 | mov esi, [device.mmio_addr] |
4519 | hidnplayr | 644 | or dword[esi + REG_RCTL], RCTL_EN ; Enable the receiver |
4512 | hidnplayr | 645 | |
3545 | hidnplayr | 646 | xor eax, eax |
647 | mov [esi + REG_RDTR], eax ; Clear the Receive Delay Timer Register |
||
648 | mov [esi + REG_RADV], eax ; Clear the Receive Interrupt Absolute Delay Timer |
||
649 | mov [esi + REG_RSRPD], eax ; Clear the Receive Small Packet Detect Interrupt |
||
650 | |||
4512 | hidnplayr | 651 | mov dword[esi + REG_IMS], 0x1F6DC ; Enable interrupt types |
652 | mov eax, [esi + REG_ICR] ; Clear pending interrupts |
||
653 | |||
3545 | hidnplayr | 654 | mov [device.mtu], 1514 |
4519 | hidnplayr | 655 | mov [device.state], ETH_LINK_UNKOWN ; Set link state to unknown |
3545 | hidnplayr | 656 | |
657 | xor eax, eax |
||
658 | ret |
||
659 | |||
660 | |||
661 | |||
662 | |||
663 | align 4 |
||
664 | read_mac: |
||
665 | |||
666 | DEBUGF 1,"Read MAC\n" |
||
667 | |||
668 | mov esi, [device.mmio_addr] |
||
669 | |||
670 | mov eax, [esi+0x5400] ; RAL |
||
671 | test eax, eax |
||
672 | jz .try_eeprom |
||
673 | |||
4519 | hidnplayr | 674 | mov dword[device.mac], eax |
3545 | hidnplayr | 675 | mov eax, [esi+0x5404] ; RAH |
4519 | hidnplayr | 676 | mov word[device.mac+4], ax |
3545 | hidnplayr | 677 | |
678 | jmp .mac_ok |
||
679 | |||
680 | .try_eeprom: |
||
4519 | hidnplayr | 681 | mov dword[esi+0x14], 0x00000001 |
3545 | hidnplayr | 682 | mov eax, [esi+0x14] |
683 | shr eax, 16 |
||
4519 | hidnplayr | 684 | mov word[device.mac], ax |
3545 | hidnplayr | 685 | |
4519 | hidnplayr | 686 | mov dword[esi+0x14], 0x00000101 |
3545 | hidnplayr | 687 | mov eax, [esi+0x14] |
688 | shr eax, 16 |
||
4519 | hidnplayr | 689 | mov word[device.mac+2], ax |
3545 | hidnplayr | 690 | |
4519 | hidnplayr | 691 | mov dword[esi+0x14], 0x00000201 |
3545 | hidnplayr | 692 | mov eax, [esi+0x14] |
693 | shr eax, 16 |
||
4519 | hidnplayr | 694 | mov word[device.mac+4], ax |
3545 | hidnplayr | 695 | |
696 | .mac_ok: |
||
697 | DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n",\ |
||
698 | [device.mac+0]:2,[device.mac+1]:2,[device.mac+2]:2,[device.mac+3]:2,[device.mac+4]:2,[device.mac+5]:2 |
||
699 | |||
700 | ret |
||
701 | |||
702 | |||
703 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
||
704 | ;; ;; |
||
705 | ;; Transmit ;; |
||
706 | ;; ;; |
||
4512 | hidnplayr | 707 | ;; In: pointer to device structure in ebx ;; |
3545 | hidnplayr | 708 | ;; ;; |
709 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
||
4512 | hidnplayr | 710 | |
711 | proc transmit stdcall bufferptr, buffersize |
||
712 | |||
4519 | hidnplayr | 713 | pushf |
714 | cli |
||
715 | |||
4512 | hidnplayr | 716 | DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [bufferptr], [buffersize] |
717 | mov eax, [bufferptr] |
||
3788 | hidnplayr | 718 | DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\ |
3545 | hidnplayr | 719 | [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\ |
720 | [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\ |
||
721 | [eax+13]:2,[eax+12]:2 |
||
722 | |||
4512 | hidnplayr | 723 | cmp [buffersize], 1514 |
3545 | hidnplayr | 724 | ja .fail |
4512 | hidnplayr | 725 | cmp [buffersize], 60 |
3545 | hidnplayr | 726 | jb .fail |
727 | |||
728 | ; Program the descriptor (use legacy mode) |
||
4519 | hidnplayr | 729 | mov edi, [device.cur_tx] |
730 | DEBUGF 1, "Using TX desc: %u\n", edi |
||
731 | shl edi, 4 ; edi = edi * sizeof.TDESC |
||
732 | lea edi, [device.tx_desc + edi] |
||
733 | mov dword[edi + TX_RING_SIZE*sizeof.TDESC], eax ; Store the data location (for driver) |
||
734 | GetRealAddr |
||
735 | mov [edi + TDESC.addr_l], eax ; Data location (for hardware) |
||
736 | mov [edi + TDESC.addr_h], 0 |
||
3545 | hidnplayr | 737 | |
4512 | hidnplayr | 738 | mov ecx, [buffersize] |
4519 | hidnplayr | 739 | or ecx, TXDESC_EOP + TXDESC_IFCS + TXDESC_RS |
740 | mov [edi + TDESC.length_cso_cmd], ecx |
||
741 | mov [edi + TDESC.status], 0 |
||
3545 | hidnplayr | 742 | |
743 | ; Tell i8254x wich descriptor(s) we programmed |
||
744 | mov edi, [device.mmio_addr] |
||
4519 | hidnplayr | 745 | mov eax, [device.cur_tx] |
746 | inc eax |
||
747 | and eax, TX_RING_SIZE-1 |
||
748 | mov [device.cur_tx], eax |
||
749 | mov dword[edi + REG_TDT], eax ; TDT - Transmit Descriptor Tail |
||
3545 | hidnplayr | 750 | |
751 | ; Update stats |
||
752 | inc [device.packets_tx] |
||
4512 | hidnplayr | 753 | mov eax, [buffersize] |
754 | add dword[device.bytes_tx], eax |
||
755 | adc dword[device.bytes_tx + 4], 0 |
||
3545 | hidnplayr | 756 | |
4521 | hidnplayr | 757 | popf |
4334 | hidnplayr | 758 | xor eax, eax |
4512 | hidnplayr | 759 | ret |
3545 | hidnplayr | 760 | |
761 | .fail: |
||
3788 | hidnplayr | 762 | DEBUGF 2,"Send failed\n" |
4512 | hidnplayr | 763 | stdcall KernelFree, [bufferptr] |
4521 | hidnplayr | 764 | popf |
4334 | hidnplayr | 765 | or eax, -1 |
4512 | hidnplayr | 766 | ret |
3545 | hidnplayr | 767 | |
4512 | hidnplayr | 768 | endp |
3545 | hidnplayr | 769 | |
4512 | hidnplayr | 770 | |
3545 | hidnplayr | 771 | ;;;;;;;;;;;;;;;;;;;;;;; |
772 | ;; ;; |
||
773 | ;; Interrupt handler ;; |
||
774 | ;; ;; |
||
775 | ;;;;;;;;;;;;;;;;;;;;;;; |
||
776 | |||
777 | align 4 |
||
778 | int_handler: |
||
779 | |||
780 | push ebx esi edi |
||
781 | |||
3855 | hidnplayr | 782 | DEBUGF 1,"INT\n" |
3545 | hidnplayr | 783 | ;------------------------------------------- |
784 | ; Find pointer of device wich made IRQ occur |
||
785 | |||
786 | mov ecx, [devices] |
||
787 | test ecx, ecx |
||
788 | jz .nothing |
||
789 | mov esi, device_list |
||
790 | .nextdevice: |
||
791 | mov ebx, [esi] |
||
792 | |||
793 | mov edi, [device.mmio_addr] |
||
794 | mov eax, [edi + REG_ICR] |
||
795 | test eax, eax |
||
796 | jnz .got_it |
||
797 | .continue: |
||
798 | add esi, 4 |
||
799 | dec ecx |
||
800 | jnz .nextdevice |
||
801 | .nothing: |
||
802 | pop edi esi ebx |
||
803 | xor eax, eax |
||
804 | |||
805 | ret |
||
806 | |||
807 | .got_it: |
||
808 | |||
4512 | hidnplayr | 809 | DEBUGF 1,"Device: %x Status: %x\n", ebx, eax |
3545 | hidnplayr | 810 | |
811 | ;--------- |
||
812 | ; RX done? |
||
813 | |||
4512 | hidnplayr | 814 | test eax, ICR_RXDMT0 + ICR_RXT0 |
3545 | hidnplayr | 815 | jz .no_rx |
816 | |||
817 | push eax ebx |
||
4512 | hidnplayr | 818 | .retaddr: |
819 | pop ebx eax |
||
3545 | hidnplayr | 820 | ; Get last descriptor addr |
4512 | hidnplayr | 821 | mov esi, [device.cur_rx] |
4519 | hidnplayr | 822 | shl esi, 4 ; esi = esi * sizeof.RDESC |
4512 | hidnplayr | 823 | lea esi, [device.rx_desc + esi] |
4519 | hidnplayr | 824 | cmp byte[esi + RDESC.status_h], 0 ; Check status field |
4512 | hidnplayr | 825 | je .no_rx |
3545 | hidnplayr | 826 | |
4512 | hidnplayr | 827 | push eax ebx |
828 | push .retaddr |
||
829 | movzx ecx, word[esi + 8] ; Get the packet length |
||
3788 | hidnplayr | 830 | DEBUGF 1,"got %u bytes\n", ecx |
3545 | hidnplayr | 831 | push ecx |
4519 | hidnplayr | 832 | push dword[esi + RX_RING_SIZE*sizeof.RDESC] ; Get packet pointer |
3545 | hidnplayr | 833 | |
834 | ; Update stats |
||
4512 | hidnplayr | 835 | add dword[device.bytes_rx], ecx |
836 | adc dword[device.bytes_rx + 4], 0 |
||
4519 | hidnplayr | 837 | inc [device.packets_rx] |
3545 | hidnplayr | 838 | |
4512 | hidnplayr | 839 | ; Allocate new descriptor |
840 | push esi |
||
841 | stdcall KernelAlloc, MAX_PKT_SIZE |
||
842 | pop esi |
||
4519 | hidnplayr | 843 | mov dword[esi + RX_RING_SIZE*sizeof.RDESC], eax |
3545 | hidnplayr | 844 | GetRealAddr |
4519 | hidnplayr | 845 | mov [esi + RDESC.addr_l], eax |
846 | mov [esi + RDESC.status_l], 0 |
||
847 | mov [esi + RDESC.status_h], 0 |
||
3545 | hidnplayr | 848 | |
4512 | hidnplayr | 849 | ; Move the receive descriptor tail |
3545 | hidnplayr | 850 | mov esi, [device.mmio_addr] |
4512 | hidnplayr | 851 | mov eax, [device.cur_rx] |
852 | mov [esi + REG_RDT], eax |
||
3545 | hidnplayr | 853 | |
4512 | hidnplayr | 854 | ; Move to next rx desc |
855 | inc [device.cur_rx] |
||
856 | and [device.cur_rx], RX_RING_SIZE-1 |
||
857 | |||
3545 | hidnplayr | 858 | jmp Eth_input |
859 | .no_rx: |
||
860 | |||
861 | ;-------------- |
||
862 | ; Link Changed? |
||
863 | |||
864 | test eax, ICR_LSC |
||
865 | jz .no_link |
||
866 | |||
4512 | hidnplayr | 867 | DEBUGF 2,"Link Changed\n" |
3545 | hidnplayr | 868 | |
869 | .no_link: |
||
870 | |||
871 | ;--------------- |
||
872 | ; Transmit done? |
||
873 | |||
874 | test eax, ICR_TXDW |
||
875 | jz .no_tx |
||
876 | |||
3788 | hidnplayr | 877 | DEBUGF 1,"Transmit done\n" |
3545 | hidnplayr | 878 | |
4519 | hidnplayr | 879 | .txdesc_loop: |
880 | mov edi, [device.last_tx] |
||
881 | shl edi, 4 ; edi = edi * sizeof.TDESC |
||
882 | lea edi, [device.tx_desc + edi] |
||
883 | test [edi + TDESC.status], TXDESC_DD ; Descriptor done? |
||
884 | jz .no_tx |
||
885 | cmp dword[edi + TX_RING_SIZE*sizeof.TDESC], 0 |
||
886 | je .no_tx |
||
887 | |||
888 | DEBUGF 1,"Cleaning up TX desc: 0x%x\n", edi |
||
889 | |||
890 | push ebx |
||
891 | push dword[edi + TX_RING_SIZE*sizeof.TDESC] |
||
892 | mov dword[edi + TX_RING_SIZE*sizeof.TDESC], 0 |
||
3545 | hidnplayr | 893 | call KernelFree |
4519 | hidnplayr | 894 | pop ebx |
3545 | hidnplayr | 895 | |
4519 | hidnplayr | 896 | inc [device.last_tx] |
897 | and [device.last_tx], TX_RING_SIZE-1 |
||
898 | jmp .txdesc_loop |
||
899 | |||
3545 | hidnplayr | 900 | .no_tx: |
901 | pop edi esi ebx |
||
902 | xor eax, eax |
||
903 | inc eax |
||
904 | |||
905 | ret |
||
906 | |||
907 | |||
908 | |||
909 | |||
910 | ; End of code |
||
911 | |||
912 | section '.data' data readable writable align 16 |
||
913 | align 4 |
||
914 | |||
915 | devices dd 0 |
||
916 | version dd (DRIVER_VERSION shl 16) or (API_VERSION and 0xFFFF) |
||
917 | my_service db 'I8254X',0 ; max 16 chars include zero |
||
918 | |||
919 | include_debug_strings ; All data wich FDO uses will be included here |
||
920 | |||
921 | device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling |
||
922 |