Rev 1628 | Rev 1633 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
1627 | serge | 1 | |
2 | #include |
||
3 | #include |
||
4 | #include |
||
5 | #include |
||
6 | |||
7 | |||
8 | |||
1628 | serge | 9 | #define PCIBIOS_SUCCESSFUL 0x00 |
10 | |||
1627 | serge | 11 | |
12 | .name = "PCI IO", |
||
13 | .start = 0, |
||
14 | .end = IO_SPACE_LIMIT, |
||
15 | .flags = IORESOURCE_IO, |
||
16 | }; |
||
17 | |||
18 | |||
19 | .name = "PCI mem", |
||
20 | .start = 0, |
||
21 | .end = -1, |
||
22 | .flags = IORESOURCE_MEM, |
||
23 | }; |
||
24 | |||
25 | |||
1628 | serge | 26 | |
1627 | serge | 27 | |
1628 | serge | 28 | u8 pos, int cap, int *ttl) |
29 | { |
||
1627 | serge | 30 | u8 id; |
1628 | serge | 31 | |
32 | |||
33 | pci_bus_read_config_byte(bus, devfn, pos, &pos); |
||
34 | if (pos < 0x40) |
||
35 | break; |
||
36 | pos &= ~3; |
||
37 | pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_ID, |
||
38 | &id); |
||
39 | if (id == 0xff) |
||
40 | break; |
||
41 | if (id == cap) |
||
42 | return pos; |
||
43 | pos += PCI_CAP_LIST_NEXT; |
||
44 | } |
||
45 | return 0; |
||
46 | } |
||
1627 | serge | 47 | |
48 | |||
1628 | serge | 49 | u8 pos, int cap) |
50 | { |
||
51 | int ttl = PCI_FIND_CAP_TTL; |
||
52 | |||
53 | |||
54 | } |
||
55 | static int __pci_bus_find_cap_start(struct pci_bus *bus, |
||
56 | unsigned int devfn, u8 hdr_type) |
||
57 | { |
||
58 | u16 status; |
||
59 | |||
60 | |||
61 | if (!(status & PCI_STATUS_CAP_LIST)) |
||
62 | return 0; |
||
63 | |||
64 | |||
65 | case PCI_HEADER_TYPE_NORMAL: |
||
66 | case PCI_HEADER_TYPE_BRIDGE: |
||
67 | return PCI_CAPABILITY_LIST; |
||
68 | case PCI_HEADER_TYPE_CARDBUS: |
||
69 | return PCI_CB_CAPABILITY_LIST; |
||
70 | default: |
||
71 | return 0; |
||
72 | } |
||
73 | |||
74 | |||
75 | } |
||
76 | |||
77 | |||
78 | |||
79 | * pci_find_capability - query for devices' capabilities |
||
80 | * @dev: PCI device to query |
||
81 | * @cap: capability code |
||
82 | * |
||
83 | * Tell if a device supports a given PCI capability. |
||
84 | * Returns the address of the requested capability structure within the |
||
85 | * device's PCI configuration space or 0 in case the device does not |
||
86 | * support it. Possible values for @cap: |
||
87 | * |
||
88 | * %PCI_CAP_ID_PM Power Management |
||
89 | * %PCI_CAP_ID_AGP Accelerated Graphics Port |
||
90 | * %PCI_CAP_ID_VPD Vital Product Data |
||
91 | * %PCI_CAP_ID_SLOTID Slot Identification |
||
92 | * %PCI_CAP_ID_MSI Message Signalled Interrupts |
||
93 | * %PCI_CAP_ID_CHSWP CompactPCI HotSwap |
||
94 | * %PCI_CAP_ID_PCIX PCI-X |
||
95 | * %PCI_CAP_ID_EXP PCI Express |
||
96 | */ |
||
97 | int pci_find_capability(struct pci_dev *dev, int cap) |
||
98 | { |
||
99 | int pos; |
||
100 | |||
101 | |||
102 | if (pos) |
||
103 | pos = __pci_find_next_cap(dev->bus, dev->devfn, pos, cap); |
||
104 | |||
105 | |||
106 | } |
||
107 | |||
108 | |||
109 | |||
1627 | serge | 110 | { |
111 | struct pci_bus* child; |
||
112 | struct list_head *tmp; |
||
113 | |||
114 | |||
115 | return bus; |
||
116 | |||
117 | |||
118 | child = pci_do_find_bus(pci_bus_b(tmp), busnr); |
||
119 | if(child) |
||
120 | return child; |
||
121 | } |
||
122 | return NULL; |
||
123 | } |
||
124 | |||
125 | |||
126 | |||
127 | * pci_find_bus - locate PCI bus from a given domain and bus number |
||
128 | * @domain: number of PCI domain to search |
||
129 | * @busnr: number of desired PCI bus |
||
130 | * |
||
131 | * Given a PCI bus number and domain number, the desired PCI bus is located |
||
132 | * in the global list of PCI buses. If the bus is found, a pointer to its |
||
133 | * data structure is returned. If no bus is found, %NULL is returned. |
||
134 | */ |
||
135 | struct pci_bus * pci_find_bus(int domain, int busnr) |
||
136 | { |
||
137 | struct pci_bus *bus = NULL; |
||
138 | struct pci_bus *tmp_bus; |
||
139 | |||
140 | |||
141 | if (pci_domain_nr(bus) != domain) |
||
142 | continue; |
||
143 | tmp_bus = pci_do_find_bus(bus, busnr); |
||
144 | if (tmp_bus) |
||
145 | return tmp_bus; |
||
146 | } |
||
147 | return NULL; |
||
148 | } |
||
149 | |||
150 | |||
151 | * pci_find_next_bus - begin or continue searching for a PCI bus |
||
152 | * @from: Previous PCI bus found, or %NULL for new search. |
||
153 | * |
||
154 | * Iterates through the list of known PCI busses. A new search is |
||
155 | * initiated by passing %NULL as the @from argument. Otherwise if |
||
156 | * @from is not %NULL, searches continue from next device on the |
||
157 | * global list. |
||
158 | */ |
||
159 | struct pci_bus * |
||
160 | pci_find_next_bus(const struct pci_bus *from) |
||
161 | { |
||
162 | struct list_head *n; |
||
163 | struct pci_bus *b = NULL; |
||
164 | |||
165 | |||
166 | // down_read(&pci_bus_sem); |
||
167 | n = from ? from->node.next : pci_root_buses.next; |
||
168 | if (n != &pci_root_buses) |
||
169 | b = pci_bus_b(n); |
||
170 | // up_read(&pci_bus_sem); |
||
171 | return b; |
||
172 | } |
||
173 | |||
174 | |||
175 | |||
1628 | serge | 176 | * pci_get_slot - locate PCI device for a given PCI slot |
177 | * @bus: PCI bus on which desired PCI device resides |
||
178 | * @devfn: encodes number of PCI slot in which the desired PCI |
||
179 | * device resides and the logical device number within that slot |
||
180 | * in case of multi-function devices. |
||
181 | * |
||
182 | * Given a PCI bus and slot/function number, the desired PCI device |
||
183 | * is located in the list of PCI devices. |
||
184 | * If the device is found, its reference count is increased and this |
||
185 | * function returns a pointer to its data structure. The caller must |
||
186 | * decrement the reference count by calling pci_dev_put(). |
||
187 | * If no device is found, %NULL is returned. |
||
188 | */ |
||
189 | struct pci_dev * pci_get_slot(struct pci_bus *bus, unsigned int devfn) |
||
190 | { |
||
191 | struct list_head *tmp; |
||
192 | struct pci_dev *dev; |
||
193 | |||
194 | |||
195 | // down_read(&pci_bus_sem); |
||
196 | |||
197 | |||
198 | dev = pci_dev_b(tmp); |
||
199 | if (dev->devfn == devfn) |
||
200 | goto out; |
||
201 | } |
||
202 | |||
203 | |||
204 | out: |
||
205 | // pci_dev_get(dev); |
||
206 | // up_read(&pci_bus_sem); |
||
207 | return dev; |
||
208 | } |
||
209 | |||
210 | |||
211 | |||
212 | |||
213 | |||
214 | * pci_find_ext_capability - Find an extended capability |
||
215 | * @dev: PCI device to query |
||
216 | * @cap: capability code |
||
217 | * |
||
218 | * Returns the address of the requested extended capability structure |
||
219 | * within the device's PCI configuration space or 0 if the device does |
||
220 | * not support it. Possible values for @cap: |
||
221 | * |
||
222 | * %PCI_EXT_CAP_ID_ERR Advanced Error Reporting |
||
223 | * %PCI_EXT_CAP_ID_VC Virtual Channel |
||
224 | * %PCI_EXT_CAP_ID_DSN Device Serial Number |
||
225 | * %PCI_EXT_CAP_ID_PWR Power Budgeting |
||
226 | */ |
||
227 | int pci_find_ext_capability(struct pci_dev *dev, int cap) |
||
228 | { |
||
229 | u32 header; |
||
230 | int ttl; |
||
231 | int pos = PCI_CFG_SPACE_SIZE; |
||
232 | |||
233 | |||
234 | ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8; |
||
235 | |||
236 | |||
237 | return 0; |
||
238 | |||
239 | |||
240 | return 0; |
||
241 | |||
242 | |||
243 | * If we have no capabilities, this is indicated by cap ID, |
||
244 | * cap version and next pointer all being 0. |
||
245 | */ |
||
246 | if (header == 0) |
||
247 | return 0; |
||
248 | |||
249 | |||
250 | if (PCI_EXT_CAP_ID(header) == cap) |
||
251 | return pos; |
||
252 | |||
253 | |||
254 | if (pos < PCI_CFG_SPACE_SIZE) |
||
255 | break; |
||
256 | |||
257 | |||
258 | break; |
||
259 | } |
||
260 | |||
261 | |||
262 | } |
||
263 | |||
264 | |||
1631 | serge | 265 | |
266 | |||
267 | |||
268 | |||
269 | #define PCI_NOASSIGN_BARS 0x200000 |
||
270 | |||
271 | |||
272 | { |
||
273 | struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE]; |
||
274 | struct resource *bar_r; |
||
275 | int bar; |
||
276 | |||
277 | |||
278 | /* |
||
279 | * If the BIOS did not assign the BAR, zero out the |
||
280 | * resource so the kernel doesn't attmept to assign |
||
281 | * it later on in pci_assign_unassigned_resources |
||
282 | */ |
||
283 | for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) { |
||
284 | bar_r = &dev->resource[bar]; |
||
285 | if (bar_r->start == 0 && bar_r->end != 0) { |
||
286 | bar_r->flags = 0; |
||
287 | bar_r->end = 0; |
||
288 | } |
||
289 | } |
||
290 | } |
||
291 | |||
292 | |||
293 | if (rom_r->parent) |
||
294 | return; |
||
295 | if (rom_r->start) { |
||
296 | /* we deal with BIOS assigned ROM later */ |
||
297 | return; |
||
298 | } |
||
299 | rom_r->start = rom_r->end = rom_r->flags = 0; |
||
300 | } |
||
301 | } |
||
302 | |||
303 | |||
304 | * Called after each bus is probed, but before its children |
||
305 | * are examined. |
||
306 | */ |
||
307 | |||
308 | |||
309 | { |
||
310 | struct pci_dev *dev; |
||
311 | |||
312 | |||
313 | // if (!b->parent) |
||
314 | // x86_pci_root_bus_res_quirks(b); |
||
315 | pci_read_bridge_bases(b); |
||
316 | list_for_each_entry(dev, &b->devices, bus_list) |
||
317 | pcibios_fixup_device_resources(dev); |
||
318 | } |
||
319 | |||
320 | |||
321 |