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3083 leency 1
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;                                                              ;;
5363 yogev_ezra 3
;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;;
3083 leency 4
;; Distributed under terms of the GNU General Public License    ;;
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;;                                                              ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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5048 Asper 8
format PE DLL native 0.05
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section '.flat' code readable writable executable
3083 leency 10
 
11
DEBUG		equ 1
3498 mario79 12
FDEBUG		equ 0
3083 leency 13
DEBUG_IRQ	equ 0
14
 
5048 Asper 15
USE_SINGLE_MODE equ  0	 ; 1 = Single mode; 0 = Normal mode.
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USE_UNSOL_EV	equ  1	 ; 1 = Use unsolicited events; 0 = Do not use unsolicited events.
3083 leency 17
 
5048 Asper 18
TEST_VERSION_NUMBER  equ '019'
3083 leency 19
 
20
;Asper+ [
5048 Asper 21
SDO_TAG  equ 1	      ;Output stream tag id (any number except 0)
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SDO_IDX  equ 4	      ;Output stream index
3083 leency 23
;According to "Intel® I/O Controller Hub 6 (ICH6) High Definition Audio / AC ’97 Programmer’s Reference Manual (PRM) May 2005 Document"
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;and "Intel® I/O Controller Hub 6 (ICH6) Family Datasheet" SDO0=4,
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;but according to "High Definition Audio Specification Revision 1.0a June 17, 2010" SDO0 depends on the number of SDIs.
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5048 Asper 27
SDO_INT 	equ 1 shl SDO_IDX	;Output stream interrupt (must be power of 2)
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SDO_OFS 	equ 0x80+(SDO_IDX*0x20) ;Output stream offset
3083 leency 29
;Asper+ ]
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31
CURRENT_API	equ   0x0100	  ;1.00
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COMPATIBLE_API	equ   0x0101	  ;1.01
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API_VERSION	equ   (COMPATIBLE_API shl 16) or CURRENT_API
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IRQ_REMAP	equ 0
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IRQ_LINE	equ 0
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CPU_FREQ	equ  2600d
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40
; Vendors
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VID_INTEL	  equ 0x8086
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VID_NVIDIA	  equ 0x10DE
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VID_ATI 	  equ 0x1002
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VID_AMD 	  equ 0x1022
3170 hidnplayr 45
VID_VIA 	  equ 0x1106
3083 leency 46
VID_SIS 	  equ 0x1039
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VID_ULI 	  equ 0x10B9
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VID_CREATIVE	  equ 0x1102
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VID_TERA	  equ 0x6549
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VID_RDC 	  equ 0x17F3
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VID_VMWARE	  equ 0x15AD
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; Devices
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; Intel
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CTRL_INTEL_SCH2 	 equ  0x080a
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CTRL_INTEL_HPT		 equ  0x0c0c
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CTRL_INTEL_CPT		 equ  0x1c20
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CTRL_INTEL_PGB		 equ  0x1d20
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CTRL_INTEL_PPT1 	 equ  0x1e20
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CTRL_INTEL_82801F	 equ  0x2668
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CTRL_INTEL_63XXESB	 equ  0x269a
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CTRL_INTEL_82801G	 equ  0x27d8
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CTRL_INTEL_82801H	 equ  0x284b
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CTRL_INTEL_82801_UNK1	 equ  0x2911
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CTRL_INTEL_82801I	 equ  0x293e
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CTRL_INTEL_82801_UNK2	 equ  0x293f
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CTRL_INTEL_82801JI	 equ  0x3a3e
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CTRL_INTEL_82801JD	 equ  0x3a6e
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CTRL_INTEL_PCH		 equ  0x3b56
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CTRL_INTEL_PCH2 	 equ  0x3b57
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CTRL_INTEL_SCH		 equ  0x811b
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CTRL_INTEL_LPT		 equ  0x8c20
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; Nvidia
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CTRL_NVIDIA_MCP51	 equ  0x026c
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CTRL_NVIDIA_MCP55	 equ  0x0371
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CTRL_NVIDIA_MCP61_1	 equ  0x03e4
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CTRL_NVIDIA_MCP61_2	 equ  0x03f0
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CTRL_NVIDIA_MCP65_1	 equ  0x044a
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CTRL_NVIDIA_MCP65_2	 equ  0x044b
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CTRL_NVIDIA_MCP67_1	 equ  0x055c
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CTRL_NVIDIA_MCP67_2	 equ  0x055d
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CTRL_NVIDIA_MCP78_1	 equ  0x0774
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CTRL_NVIDIA_MCP78_2	 equ  0x0775
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CTRL_NVIDIA_MCP78_3	 equ  0x0776
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CTRL_NVIDIA_MCP78_4	 equ  0x0777
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CTRL_NVIDIA_MCP73_1	 equ  0x07fc
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CTRL_NVIDIA_MCP73_2	 equ  0x07fd
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CTRL_NVIDIA_MCP79_1	 equ  0x0ac0
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CTRL_NVIDIA_MCP79_2	 equ  0x0ac1
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CTRL_NVIDIA_MCP79_3	 equ  0x0ac2
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CTRL_NVIDIA_MCP79_4	 equ  0x0ac3
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CTRL_NVIDIA_0BE2	 equ  0x0be2
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CTRL_NVIDIA_0BE3	 equ  0x0be3
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CTRL_NVIDIA_0BE4	 equ  0x0be4
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CTRL_NVIDIA_GT100	 equ  0x0be5
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CTRL_NVIDIA_GT106	 equ  0x0be9
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CTRL_NVIDIA_GT108	 equ  0x0bea
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CTRL_NVIDIA_GT104	 equ  0x0beb
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CTRL_NVIDIA_GT116	 equ  0x0bee
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CTRL_NVIDIA_MCP89_1	 equ  0x0d94
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CTRL_NVIDIA_MCP89_2	 equ  0x0d95
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CTRL_NVIDIA_MCP89_3	 equ  0x0d96
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CTRL_NVIDIA_MCP89_4	 equ  0x0d97
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CTRL_NVIDIA_GF119	 equ  0x0e08
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CTRL_NVIDIA_GF110_1	 equ  0x0e09
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CTRL_NVIDIA_GF110_2	 equ  0x0e0c
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; ATI
108
CTRL_ATI_SB450		 equ  0x437b
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CTRL_ATI_SB600		 equ  0x4383
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; ATI HDMI
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CTRL_ATI_RS600		 equ  0x793b
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CTRL_ATI_RS690		 equ  0x7919
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CTRL_ATI_RS780		 equ  0x960f
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CTRL_ATI_RS_UNK1	 equ  0x970f
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CTRL_ATI_R600		 equ  0xaa00
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CTRL_ATI_RV630		 equ  0xaa08
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CTRL_ATI_RV610		 equ  0xaa10
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CTRL_ATI_RV670		 equ  0xaa18
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CTRL_ATI_RV635		 equ  0xaa20
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CTRL_ATI_RV620		 equ  0xaa28
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CTRL_ATI_RV770		 equ  0xaa30
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CTRL_ATI_RV730		 equ  0xaa38
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CTRL_ATI_RV710		 equ  0xaa40
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CTRL_ATI_RV740		 equ  0xaa48
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; AMD
126
CTRL_AMD_HUDSON 	 equ  0x780d
127
; VIA
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CTRL_VIA_VT82XX 	 equ  0x3288
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CTRL_VIA_VT61XX 	 equ  0x9140
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CTRL_VIA_VT71XX 	 equ  0x9170
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; SiS
132
CTRL_SIS_966		 equ  0x7502
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; ULI
134
CTRL_ULI_M5461		 equ  0x5461
135
; Creative
136
CTRL_CREATIVE_CA0110_IBG     equ  0x0009
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CTRL_CREATIVE_SOUND_CORE3D_1 equ  0x0010
138
CTRL_CREATIVE_SOUND_CORE3D_2 equ  0x0012
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; Teradici
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CTRL_TERA_UNK1		 equ  0x1200
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; RDC Semiconductor
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CTRL_RDC_R3010		 equ  0x3010
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;VMware
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CTRL_VMWARE_UNK1	 equ  0x1977
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146
 
147
; driver types
148
AZX_DRIVER_ICH		 equ  0
149
AZX_DRIVER_PCH		 equ  1
150
AZX_DRIVER_SCH		 equ  2
151
AZX_DRIVER_ATI		 equ  3
152
AZX_DRIVER_ATIHDMI	 equ  4
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AZX_DRIVER_VIA		 equ  5
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AZX_DRIVER_SIS		 equ  6
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AZX_DRIVER_ULI		 equ  7
156
AZX_DRIVER_NVIDIA	 equ  8
157
AZX_DRIVER_TERA 	 equ  9
158
AZX_DRIVER_CTX		 equ  10
159
AZX_DRIVER_GENERIC	 equ  11
160
AZX_NUM_DRIVERS 	 equ  12
161
 
162
 
163
; registers
164
 
165
ICH6_REG_GCAP		 equ  0x00
166
ICH6_REG_VMIN		 equ  0x02
167
ICH6_REG_VMAJ		 equ  0x03
168
ICH6_REG_OUTPAY 	 equ  0x04
169
ICH6_REG_INPAY		 equ  0x06
170
ICH6_REG_GCTL		 equ  0x08
171
  ICH6_GCTL_RESET	   equ	(1 shl 0)  ; controller reset
172
  ICH6_GCTL_FCNTRL	   equ	(1 shl 1)  ; flush control
173
  ICH6_GCTL_UNSOL	   equ	(1 shl 8)  ; accept unsol. response enable
174
ICH6_REG_WAKEEN 	 equ  0x0c
175
ICH6_REG_STATESTS	 equ  0x0e
176
ICH6_REG_GSTS		 equ  0x10
177
  ICH6_GSTS_FSTS	   equ	(1 shl 1)  ; flush status
178
ICH6_REG_INTCTL 	 equ  0x20
179
ICH6_REG_INTSTS 	 equ  0x24
180
ICH6_REG_WALLCLK	 equ  0x30  ; 24Mhz source
181
ICH6_REG_OLD_SSYNC	 equ  0x34  ; SSYNC for old ICH
182
ICH6_REG_SSYNC		 equ  0x38
183
ICH6_REG_CORBLBASE	 equ  0x40
184
ICH6_REG_CORBUBASE	 equ  0x44
185
ICH6_REG_CORBWP 	 equ  0x48
186
ICH6_REG_CORBRP 	 equ  0x4A
187
  ICH6_CORBRP_RST	   equ	(1 shl 15)  ; read pointer reset
188
ICH6_REG_CORBCTL	 equ  0x4c
189
  ICH6_CORBCTL_RUN	   equ	(1 shl 1)   ; enable DMA
190
  ICH6_CORBCTL_CMEIE	   equ	(1 shl 0)   ; enable memory error irq
191
ICH6_REG_CORBSTS	 equ  0x4d
192
  ICH6_CORBSTS_CMEI	   equ	(1 shl 0)   ; memory error indication
193
ICH6_REG_CORBSIZE	 equ  0x4e
194
 
195
ICH6_REG_RIRBLBASE	 equ  0x50
196
ICH6_REG_RIRBUBASE	 equ  0x54
197
ICH6_REG_RIRBWP 	 equ  0x58
198
  ICH6_RIRBWP_RST	   equ	(1 shl 15)  ; write pointer reset
199
ICH6_REG_RINTCNT	 equ  0x5a
200
ICH6_REG_RIRBCTL	 equ  0x5c
201
  ICH6_RBCTL_IRQ_EN	   equ	(1 shl 0)   ; enable IRQ
202
  ICH6_RBCTL_DMA_EN	   equ	(1 shl 1)   ; enable DMA
203
  ICH6_RBCTL_OVERRUN_EN    equ	(1 shl 2)   ; enable overrun irq
204
ICH6_REG_RIRBSTS	 equ  0x5d
205
  ICH6_RBSTS_IRQ	   equ	(1 shl 0)   ; response irq
206
  ICH6_RBSTS_OVERRUN	   equ	(1 shl 2)   ; overrun irq
207
ICH6_REG_RIRBSIZE	 equ  0x5e
208
 
209
ICH6_REG_IC		 equ  0x60
210
ICH6_REG_IR		 equ  0x64
211
ICH6_REG_IRS		 equ  0x68
212
  ICH6_IRS_VALID	   equ	2
213
  ICH6_IRS_BUSY 	   equ	1
214
 
215
ICH6_REG_DPLBASE	 equ  0x70
216
ICH6_REG_DPUBASE	 equ  0x74
217
  ICH6_DPLBASE_ENABLE	   equ	1     ; Enable position buffer
218
 
219
; SD offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */
220
SDI0_SD_OFFSET	  equ  0x80
221
SDI1_SD_OFFSET	  equ  0xA0
222
SDI2_SD_OFFSET	  equ  0xC0
223
SDI3_SD_OFFSET	  equ  0xE0
224
SDO0_SD_OFFSET	  equ  0x100
225
SDO1_SD_OFFSET	  equ  0x120
226
SDO2_SD_OFFSET	  equ  0X140
227
SDO3_SD_OFFSET	  equ  0x160
228
 
229
; stream register offsets from stream base
230
ICH6_REG_SD_CTL 	 equ  0x00
231
ICH6_REG_SD_STS 	 equ  0x03
232
ICH6_REG_SD_LPIB	 equ  0x04
233
ICH6_REG_SD_CBL 	 equ  0x08
234
ICH6_REG_SD_LVI 	 equ  0x0c
235
ICH6_REG_SD_FIFOW	 equ  0x0e
236
ICH6_REG_SD_FIFOSIZE	 equ  0x10
237
ICH6_REG_SD_FORMAT	 equ  0x12
238
ICH6_REG_SD_BDLPL	 equ  0x18
239
ICH6_REG_SD_BDLPU	 equ  0x1c
240
 
241
; PCI space
242
ICH6_PCIREG_TCSEL	 equ  0x44
243
 
244
; other constants
245
ICH6_RIRB_EX_UNSOL_EV	 equ   (1 shl 4)
246
 
247
; max number of SDs
248
MAX_ICH6_DEV		 equ  8
249
; max number of fragments - we may use more if allocating more pages for BDL
250
AZX_MAX_FRAG		 equ  (4096 / (MAX_ICH6_DEV * 16))
251
; max buffer size - no h/w limit, you can increase as you like
252
AZX_MAX_BUF_SIZE	 equ  (1024*1024*1024)
253
; max number of PCM devices per card
254
AZX_MAX_PCMS		 equ  8
255
 
256
; RIRB int mask: overrun[2], response[0]