WebSVN – Kolibri OS – Blame – /drivers/audio/intel_hda/intel_hda.asm

Rev	Author	Line No.	Line
3083	leency	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		2	;; ;;
		3	;; Copyright (C) KolibriOS team 2004-2012. All rights reserved. ;;
		4	;; Distributed under terms of the GNU General Public License ;;
		5	;; ;;
		6	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		7
5048	Asper	8	format PE DLL native 0.05
		9	section '.flat' code readable writable executable
3083	leency	10
		11	DEBUG equ 1
3498	mario79	12	FDEBUG equ 0
3083	leency	13	DEBUG_IRQ equ 0
		14
5048	Asper	15	USE_SINGLE_MODE equ 0 ; 1 = Single mode; 0 = Normal mode.
		16	USE_UNSOL_EV equ 1 ; 1 = Use unsolicited events; 0 = Do not use unsolicited events.
3083	leency	17
5048	Asper	18	TEST_VERSION_NUMBER equ '019'
3083	leency	19
		20	;Asper+ [
5048	Asper	21	SDO_TAG equ 1 ;Output stream tag id (any number except 0)
		22	SDO_IDX equ 4 ;Output stream index
3083	leency	23	;According to "Intel� I/O Controller Hub 6 (ICH6) High Definition Audio / AC �97 Programmer�s Reference Manual (PRM) May 2005 Document"
		24	;and "Intel� I/O Controller Hub 6 (ICH6) Family Datasheet" SDO0=4,
		25	;but according to "High Definition Audio Specification Revision 1.0a June 17, 2010" SDO0 depends on the number of SDIs.
		26
5048	Asper	27	SDO_INT equ 1 shl SDO_IDX ;Output stream interrupt (must be power of 2)
		28	SDO_OFS equ 0x80+(SDO_IDX*0x20) ;Output stream offset
3083	leency	29	;Asper+ ]
		30
		31	CURRENT_API equ 0x0100 ;1.00
		32	COMPATIBLE_API equ 0x0101 ;1.01
		33	API_VERSION equ (COMPATIBLE_API shl 16) or CURRENT_API
		34
		35	IRQ_REMAP equ 0
		36	IRQ_LINE equ 0
		37
		38	CPU_FREQ equ 2600d
		39
		40	; Vendors
		41	VID_INTEL equ 0x8086
		42	VID_NVIDIA equ 0x10DE
		43	VID_ATI equ 0x1002
		44	VID_AMD equ 0x1022
3170	hidnplayr	45	VID_VIA equ 0x1106
3083	leency	46	VID_SIS equ 0x1039
		47	VID_ULI equ 0x10B9
		48	VID_CREATIVE equ 0x1102
		49	VID_TERA equ 0x6549
		50	VID_RDC equ 0x17F3
		51	VID_VMWARE equ 0x15AD
		52
		53	; Devices
		54	; Intel
		55	CTRL_INTEL_SCH2 equ 0x080a
		56	CTRL_INTEL_HPT equ 0x0c0c
		57	CTRL_INTEL_CPT equ 0x1c20
		58	CTRL_INTEL_PGB equ 0x1d20
		59	CTRL_INTEL_PPT1 equ 0x1e20
		60	CTRL_INTEL_82801F equ 0x2668
		61	CTRL_INTEL_63XXESB equ 0x269a
		62	CTRL_INTEL_82801G equ 0x27d8
		63	CTRL_INTEL_82801H equ 0x284b
		64	CTRL_INTEL_82801_UNK1 equ 0x2911
		65	CTRL_INTEL_82801I equ 0x293e
		66	CTRL_INTEL_82801_UNK2 equ 0x293f
		67	CTRL_INTEL_82801JI equ 0x3a3e
		68	CTRL_INTEL_82801JD equ 0x3a6e
		69	CTRL_INTEL_PCH equ 0x3b56
		70	CTRL_INTEL_PCH2 equ 0x3b57
		71	CTRL_INTEL_SCH equ 0x811b
		72	CTRL_INTEL_LPT equ 0x8c20
		73	; Nvidia
		74	CTRL_NVIDIA_MCP51 equ 0x026c
		75	CTRL_NVIDIA_MCP55 equ 0x0371
		76	CTRL_NVIDIA_MCP61_1 equ 0x03e4
		77	CTRL_NVIDIA_MCP61_2 equ 0x03f0
		78	CTRL_NVIDIA_MCP65_1 equ 0x044a
		79	CTRL_NVIDIA_MCP65_2 equ 0x044b
		80	CTRL_NVIDIA_MCP67_1 equ 0x055c
		81	CTRL_NVIDIA_MCP67_2 equ 0x055d
		82	CTRL_NVIDIA_MCP78_1 equ 0x0774
		83	CTRL_NVIDIA_MCP78_2 equ 0x0775
		84	CTRL_NVIDIA_MCP78_3 equ 0x0776
		85	CTRL_NVIDIA_MCP78_4 equ 0x0777
		86	CTRL_NVIDIA_MCP73_1 equ 0x07fc
		87	CTRL_NVIDIA_MCP73_2 equ 0x07fd
		88	CTRL_NVIDIA_MCP79_1 equ 0x0ac0
		89	CTRL_NVIDIA_MCP79_2 equ 0x0ac1
		90	CTRL_NVIDIA_MCP79_3 equ 0x0ac2
		91	CTRL_NVIDIA_MCP79_4 equ 0x0ac3
		92	CTRL_NVIDIA_0BE2 equ 0x0be2
		93	CTRL_NVIDIA_0BE3 equ 0x0be3
		94	CTRL_NVIDIA_0BE4 equ 0x0be4
		95	CTRL_NVIDIA_GT100 equ 0x0be5
		96	CTRL_NVIDIA_GT106 equ 0x0be9
		97	CTRL_NVIDIA_GT108 equ 0x0bea
		98	CTRL_NVIDIA_GT104 equ 0x0beb
		99	CTRL_NVIDIA_GT116 equ 0x0bee
		100	CTRL_NVIDIA_MCP89_1 equ 0x0d94
		101	CTRL_NVIDIA_MCP89_2 equ 0x0d95
		102	CTRL_NVIDIA_MCP89_3 equ 0x0d96
		103	CTRL_NVIDIA_MCP89_4 equ 0x0d97
		104	CTRL_NVIDIA_GF119 equ 0x0e08
		105	CTRL_NVIDIA_GF110_1 equ 0x0e09
		106	CTRL_NVIDIA_GF110_2 equ 0x0e0c
		107	; ATI
		108	CTRL_ATI_SB450 equ 0x437b
		109	CTRL_ATI_SB600 equ 0x4383
		110	; ATI HDMI
		111	CTRL_ATI_RS600 equ 0x793b
		112	CTRL_ATI_RS690 equ 0x7919
		113	CTRL_ATI_RS780 equ 0x960f
		114	CTRL_ATI_RS_UNK1 equ 0x970f
		115	CTRL_ATI_R600 equ 0xaa00
		116	CTRL_ATI_RV630 equ 0xaa08
		117	CTRL_ATI_RV610 equ 0xaa10
		118	CTRL_ATI_RV670 equ 0xaa18
		119	CTRL_ATI_RV635 equ 0xaa20
		120	CTRL_ATI_RV620 equ 0xaa28
		121	CTRL_ATI_RV770 equ 0xaa30
		122	CTRL_ATI_RV730 equ 0xaa38
		123	CTRL_ATI_RV710 equ 0xaa40
		124	CTRL_ATI_RV740 equ 0xaa48
		125	; AMD
		126	CTRL_AMD_HUDSON equ 0x780d
		127	; VIA
		128	CTRL_VIA_VT82XX equ 0x3288
		129	CTRL_VIA_VT61XX equ 0x9140
		130	CTRL_VIA_VT71XX equ 0x9170
		131	; SiS
		132	CTRL_SIS_966 equ 0x7502
		133	; ULI
		134	CTRL_ULI_M5461 equ 0x5461
		135	; Creative
		136	CTRL_CREATIVE_CA0110_IBG equ 0x0009
		137	CTRL_CREATIVE_SOUND_CORE3D_1 equ 0x0010
		138	CTRL_CREATIVE_SOUND_CORE3D_2 equ 0x0012
		139	; Teradici
		140	CTRL_TERA_UNK1 equ 0x1200
		141	; RDC Semiconductor
		142	CTRL_RDC_R3010 equ 0x3010
		143	;VMware
		144	CTRL_VMWARE_UNK1 equ 0x1977
		145
		146
		147	; driver types
		148	AZX_DRIVER_ICH equ 0
		149	AZX_DRIVER_PCH equ 1
		150	AZX_DRIVER_SCH equ 2
		151	AZX_DRIVER_ATI equ 3
		152	AZX_DRIVER_ATIHDMI equ 4
		153	AZX_DRIVER_VIA equ 5
		154	AZX_DRIVER_SIS equ 6
		155	AZX_DRIVER_ULI equ 7
		156	AZX_DRIVER_NVIDIA equ 8
		157	AZX_DRIVER_TERA equ 9
		158	AZX_DRIVER_CTX equ 10
		159	AZX_DRIVER_GENERIC equ 11
		160	AZX_NUM_DRIVERS equ 12
		161
		162
		163	; registers
		164
		165	ICH6_REG_GCAP equ 0x00
		166	ICH6_REG_VMIN equ 0x02
		167	ICH6_REG_VMAJ equ 0x03
		168	ICH6_REG_OUTPAY equ 0x04
		169	ICH6_REG_INPAY equ 0x06
		170	ICH6_REG_GCTL equ 0x08
		171	ICH6_GCTL_RESET equ (1 shl 0) ; controller reset
		172	ICH6_GCTL_FCNTRL equ (1 shl 1) ; flush control
		173	ICH6_GCTL_UNSOL equ (1 shl 8) ; accept unsol. response enable
		174	ICH6_REG_WAKEEN equ 0x0c
		175	ICH6_REG_STATESTS equ 0x0e
		176	ICH6_REG_GSTS equ 0x10
		177	ICH6_GSTS_FSTS equ (1 shl 1) ; flush status
		178	ICH6_REG_INTCTL equ 0x20
		179	ICH6_REG_INTSTS equ 0x24
		180	ICH6_REG_WALLCLK equ 0x30 ; 24Mhz source
		181	ICH6_REG_OLD_SSYNC equ 0x34 ; SSYNC for old ICH
		182	ICH6_REG_SSYNC equ 0x38
		183	ICH6_REG_CORBLBASE equ 0x40
		184	ICH6_REG_CORBUBASE equ 0x44
		185	ICH6_REG_CORBWP equ 0x48
		186	ICH6_REG_CORBRP equ 0x4A
		187	ICH6_CORBRP_RST equ (1 shl 15) ; read pointer reset
		188	ICH6_REG_CORBCTL equ 0x4c
		189	ICH6_CORBCTL_RUN equ (1 shl 1) ; enable DMA
		190	ICH6_CORBCTL_CMEIE equ (1 shl 0) ; enable memory error irq
		191	ICH6_REG_CORBSTS equ 0x4d
		192	ICH6_CORBSTS_CMEI equ (1 shl 0) ; memory error indication
		193	ICH6_REG_CORBSIZE equ 0x4e
		194
		195	ICH6_REG_RIRBLBASE equ 0x50
		196	ICH6_REG_RIRBUBASE equ 0x54
		197	ICH6_REG_RIRBWP equ 0x58
		198	ICH6_RIRBWP_RST equ (1 shl 15) ; write pointer reset
		199	ICH6_REG_RINTCNT equ 0x5a
		200	ICH6_REG_RIRBCTL equ 0x5c
		201	ICH6_RBCTL_IRQ_EN equ (1 shl 0) ; enable IRQ
		202	ICH6_RBCTL_DMA_EN equ (1 shl 1) ; enable DMA
		203	ICH6_RBCTL_OVERRUN_EN equ (1 shl 2) ; enable overrun irq
		204	ICH6_REG_RIRBSTS equ 0x5d
		205	ICH6_RBSTS_IRQ equ (1 shl 0) ; response irq
		206	ICH6_RBSTS_OVERRUN equ (1 shl 2) ; overrun irq
		207	ICH6_REG_RIRBSIZE equ 0x5e
		208
		209	ICH6_REG_IC equ 0x60
		210	ICH6_REG_IR equ 0x64
		211	ICH6_REG_IRS equ 0x68
		212	ICH6_IRS_VALID equ 2
		213	ICH6_IRS_BUSY equ 1
		214
		215	ICH6_REG_DPLBASE equ 0x70
		216	ICH6_REG_DPUBASE equ 0x74
		217	ICH6_DPLBASE_ENABLE equ 1 ; Enable position buffer
		218
		219	; SD offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */
		220	SDI0_SD_OFFSET equ 0x80
		221	SDI1_SD_OFFSET equ 0xA0
		222	SDI2_SD_OFFSET equ 0xC0
		223	SDI3_SD_OFFSET equ 0xE0
		224	SDO0_SD_OFFSET equ 0x100
		225	SDO1_SD_OFFSET equ 0x120
		226	SDO2_SD_OFFSET equ 0X140
		227	SDO3_SD_OFFSET equ 0x160
		228
		229	; stream register offsets from stream base
		230	ICH6_REG_SD_CTL equ 0x00
		231	ICH6_REG_SD_STS equ 0x03
		232	ICH6_REG_SD_LPIB equ 0x04
		233	ICH6_REG_SD_CBL equ 0x08
		234	ICH6_REG_SD_LVI equ 0x0c
		235	ICH6_REG_SD_FIFOW equ 0x0e
		236	ICH6_REG_SD_FIFOSIZE equ 0x10
		237	ICH6_REG_SD_FORMAT equ 0x12
		238	ICH6_REG_SD_BDLPL equ 0x18
		239	ICH6_REG_SD_BDLPU equ 0x1c
		240
		241	; PCI space
		242	ICH6_PCIREG_TCSEL equ 0x44
		243
		244	; other constants
		245	ICH6_RIRB_EX_UNSOL_EV equ (1 shl 4)
		246
		247	; max number of SDs
		248	MAX_ICH6_DEV equ 8
		249	; max number of fragments - we may use more if allocating more pages for BDL
		250	AZX_MAX_FRAG equ (4096 / (MAX_ICH6_DEV * 16))
		251	; max buffer size - no h/w limit, you can increase as you like
		252	AZX_MAX_BUF_SIZE equ (102410241024)
		253	; max number of PCM devices per card
		254	AZX_MAX_PCMS equ 8
		255
		256	; RIRB int mask: overrun[2], response[0]
		257	RIRB_INT_RESPONSE equ 0x01
		258	RIRB_INT_OVERRUN equ 0x04
		259	RIRB_INT_MASK equ 0x05
		260
		261	; STATESTS int mask: SD2,SD1,SD0
		262	STATESTS_INT_MASK equ 0x07
		263	AZX_MAX_CODECS equ 4
		264
		265	; SD_CTL bits
		266	SD_CTL_STREAM_RESET equ 0x01 ; stream reset bit
		267	SD_CTL_DMA_START equ 0x02 ; stream DMA start bit
		268	SD_CTL_STREAM_TAG_MASK equ (0xf shl 20)
		269	SD_CTL_STREAM_TAG_SHIFT equ 20
		270
		271	; SD_CTL and SD_STS
		272	SD_INT_DESC_ERR equ 0x10 ; descriptor error interrupt
		273	SD_INT_FIFO_ERR equ 0x08 ; FIFO error interrupt
		274	SD_INT_COMPLETE equ 0x04 ; completion interrupt
		275	SD_INT_MASK equ (SD_INT_DESC_ERR or SD_INT_FIFO_ERR or SD_INT_COMPLETE)
		276
		277	; SD_STS
		278	SD_STS_FIFO_READY equ 0x20 ; FIFO ready
		279
		280	; INTCTL and INTSTS
		281	ICH6_INT_ALL_STREAM equ 0xff ; all stream interrupts
		282	ICH6_INT_CTRL_EN equ 0x40000000 ; controller interrupt enable bit
		283	ICH6_INT_GLOBAL_EN equ 0x80000000 ; global interrupt enable bit
		284
		285	; GCTL reset bit
		286	ICH6_GCTL_RESET equ 1
		287
		288	; CORB/RIRB control, read/write pointer
		289	ICH6_RBCTL_DMA_EN equ 0x02 ; enable DMA
		290	ICH6_RBCTL_IRQ_EN equ 0x01 ; enable IRQ
		291	ICH6_RBRWP_CLR equ 0x8000 ; read/write pointer clear
		292	; below are so far hardcoded - should read registers in future
		293	ICH6_MAX_CORB_ENTRIES equ 256
		294	ICH6_MAX_RIRB_ENTRIES equ 256
		295
		296	; position fix mode
5048	Asper	297	POS_FIX_AUTO equ 0
		298	POS_FIX_LPIB equ 1
		299	POS_FIX_POSBUF equ 2
		300	POS_FIX_VIACOMBO equ 4
		301	POS_FIX_COMBO equ 8
3083	leency	302
		303	; Defines for ATI HD Audio support in SB450 south bridge
		304	ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR equ 0x42
		305	ATI_SB450_HDAUDIO_ENABLE_SNOOP equ 0x02
		306
		307	; Defines for Nvidia HDA support
		308	NVIDIA_HDA_TRANSREG_ADDR equ 0x4e
		309	NVIDIA_HDA_ENABLE_COHBITS equ 0x0f
		310	NVIDIA_HDA_ISTRM_COH equ 0x4d
		311	NVIDIA_HDA_OSTRM_COH equ 0x4c
		312	NVIDIA_HDA_ENABLE_COHBIT equ 0x01
		313
		314	; Defines for Intel SCH HDA snoop control
		315	INTEL_SCH_HDA_DEVC equ 0x78
		316	INTEL_SCH_HDA_DEVC_NOSNOOP equ (0x1 shl 11)
		317
		318	; Define IN stream 0 FIFO size offset in VIA controller
		319	VIA_IN_STREAM0_FIFO_SIZE_OFFSET equ 0x90
		320	; Define VIA HD Audio Device ID
		321	VIA_HDAC_DEVICE_ID equ 0x3288
		322
		323	; HD Audio class code
		324	PCI_CLASS_MULTIMEDIA_HD_AUDIO equ 0x0403
		325
		326
		327	SRV_GETVERSION equ 0
		328	DEV_PLAY equ 1
		329	DEV_STOP equ 2
		330	DEV_CALLBACK equ 3
		331	DEV_SET_BUFF equ 4
		332	DEV_NOTIFY equ 5
		333	DEV_SET_MASTERVOL equ 6
		334	DEV_GET_MASTERVOL equ 7
		335	DEV_GET_INFO equ 8
		336	DEV_GET_POS equ 9
		337	DEV_SET_CHANNEL_VOLUME equ 10
		338	DEV_GET_CHANNEL_VOLUME equ 11
		339	;Asper: Non standard system service. For the tests only! [
		340	DEV_EXEC_CODEC_CMD equ 100
		341	;Asper: Non standard system service. For the tests only! ]
		342
		343	struc AC_CNTRL ;AC controller base class
5048	Asper	344	{
		345	.bus dd ?
		346	.devfn dd ?
3083	leency	347
5048	Asper	348	.vendor dw ?
		349	.dev_id dw ?
		350	.pci_cmd dd ?
		351	.pci_stat dd ?
3083	leency	352
5048	Asper	353	.ctrl_io_base dd ?
		354	.ctrl_mem_base dd ?
		355	.cfg_reg dd ?
		356	.int_line dd ?
3083	leency	357
5048	Asper	358	.vendor_ids dd ? ;vendor id string
		359	.ctrl_ids dd ? ;hub id string
3083	leency	360
5048	Asper	361	.buffer dd ?
3083	leency	362
5048	Asper	363	.notify_pos dd ?
		364	.notify_task dd ?
3083	leency	365
5048	Asper	366	.lvi_reg dd ?
		367	.civ_val dd 1
		368	.user_callback dd ?
3083	leency	369
5048	Asper	370	.ctrl_read8 dd ?
		371	.ctrl_read16 dd ?
		372	.ctrl_read32 dd ?
3083	leency	373
5048	Asper	374	.ctrl_write8 dd ?
		375	.ctrl_write16 dd ?
		376	.ctrl_write32 dd ?
3083	leency	377
5048	Asper	378	.codec_mask dd ?
		379	.rb dd ?
		380	.rirb_rp dw 0
		381	.rirb_wp dw 0
		382	.corb_rp dw 0
		383	.corb_wp dw 0
		384	.rirb_cmd dd 0
		385	.rirb_res dd 0
		386	.rirb_error dd 0
		387	.response_reset dd 0
		388	.polling_mode db 0
		389	.poll_count db 0
		390	.posbuf dd ?
		391	.start_wallclk dd ? ; start + minimum wallclk
		392	.period_wallclk dd ? ; wallclk for period
		393	.position_fix db ?
3083	leency	394	}
		395
		396	struc CODEC ;Audio Chip base class
		397	{
5048	Asper	398	.addr dd ? ; codec slot index (codec address)
		399	.afg dd ? ; AFG node id
		400	.mfg dd ? ; MFG node id
3083	leency	401
5048	Asper	402	.function_id dd ?
		403	.subsystem_id dd ?
		404	.revision_id dd ?
		405	.chip_id dw ?
		406	.vendor_id dw ?
3083	leency	407
5048	Asper	408	; widget capabilities cache
		409	.num_nodes dw ?
		410	.start_nid dw ?
		411	.wcaps dd ?
3083	leency	412
5048	Asper	413	.init_pins dd ? ; initial (BIOS) pin configurations
		414	.num_pins dd ? ;Asper + : word is enough, but for align...
		415	.beeper_nid dw ?
		416	.pad dw ?
3083	leency	417
5048	Asper	418	.ac_vendor_ids dd ? ;ac vendor id string
		419	.chip_ids dd ? ;chip model string
3083	leency	420	}
		421
		422	struc CTRL_INFO
5048	Asper	423	{
		424	.pci_cmd dd ?
		425	.irq dd ?
		426	.glob_cntrl dd ?
		427	.glob_sta dd ?
		428	.codec_io_base dd ?
		429	.ctrl_io_base dd ?
		430	.codec_mem_base dd ?
		431	.ctrl_mem_base dd ?
		432	.codec_id dd ?
3083	leency	433	}
		434
		435	struc IOCTL
5048	Asper	436	{
		437	.handle dd ?
		438	.io_code dd ?
		439	.input dd ?
		440	.inp_size dd ?
		441	.output dd ?
		442	.out_size dd ?
3083	leency	443	}
		444
		445	EVENT_NOTIFY equ 0x00000200
		446
3496	Asper	447	; Macroses by CleverMouse
		448	; The following macro assume that we are on uniprocessor machine.
		449	; Serious work is needed for multiprocessor machines.
		450	macro spin_lock_irqsave spinlock
		451	{
		452	pushf
		453	cli
		454	}
		455	macro spin_unlock_irqrestore spinlock
		456	{
		457	popf
		458	}
		459	macro spin_lock_irq spinlock
		460	{
		461	cli
		462	}
		463	macro spin_unlock_irq spinlock
		464	{
		465	sti
		466	}
		467
		468	SPINLOCK_BUSY = 1
		469	SPINLOCK_FREE = 0
		470
		471	macro spin_lock
		472	{
		473	push eax ebx
		474	mov eax, aspinlock
		475	mov ebx, SPINLOCK_BUSY
5048	Asper	476	@@:
3496	Asper	477	lock xchg [eax], ebx
		478	cmp ebx, SPINLOCK_FREE
		479	jnz @b
		480	pop ebx eax
		481	}
		482
		483	macro spin_unlock
		484	{
		485	push eax ebx
		486	mov eax, aspinlock
		487	mov eax, aspinlock
		488	mov ebx, SPINLOCK_FREE
5048	Asper	489	lock xchg [eax], ebx
3496	Asper	490	pop ebx eax
		491	}
		492
5048	Asper	493	data fixups
		494	end data
3083	leency	495
5048	Asper	496	include '../../struct.inc'
		497	include '../../macros.inc'
		498	include '../../proc32.inc'
		499	include '../../peimport.inc'
		500	include 'CODEC_H.INC'
3083	leency	501
5048	Asper	502	entry START
		503	section '.flat' readable writable executable
3083	leency	504
5048	Asper	505	;proc START stdcall, state:dword
		506	proc START c, state:dword, cmdline:dword
		507	push ebx esi ; save used registers to be stdcall
		508	virtual at esp
		509	rd 2 ; saved registers
		510	dd ? ; return address
		511	.reason dd ? ; DRV_ENTRY or DRV_EXIT
		512	.cmdline dd ? ; normally NULL
		513	end virtual
		514	; 1. Check the reason for the call, do nothing unless initializing.
		515	;cmp [.reason], DRV_ENTRY
		516	;jne .stop
3083	leency	517
5048	Asper	518	if DEBUG
		519	mov esi, msgTV
		520	invoke SysMsgBoardStr
3083	leency	521
5048	Asper	522	mov esi, msgInit
		523	invoke SysMsgBoardStr
		524	end if
3083	leency	525
5048	Asper	526	call detect_controller
		527	test eax, eax
		528	jz .fail
3083	leency	529
5048	Asper	530	mov esi,[ctrl.vendor_ids]
		531	invoke SysMsgBoardStr
		532	mov esi, [ctrl.ctrl_ids]
		533	invoke SysMsgBoardStr
3083	leency	534
5048	Asper	535	call init_controller
		536	test eax, eax
		537	jz .fail
3083	leency	538
		539	;Asper This part is from "azx_create" proc. [
5048	Asper	540	mov [ctrl.position_fix], POS_FIX_LPIB
		541	cmp [driver_type], AZX_DRIVER_VIA
		542	je .set_via_patch
		543	cmp [driver_type], AZX_DRIVER_ATI
		544	jne .no_via_patch
		545	.set_via_patch:
		546	or [ctrl.position_fix], POS_FIX_VIACOMBO
		547	.no_via_patch:
		548	; codec detection
		549	mov eax, [ctrl.codec_mask]
		550	test eax, eax
		551	jnz @f
		552	if DEBUG
		553	mov esi, msgNoCodecsFound
		554	jmp .fail_msg
		555	else
		556	jmp .fail
		557	end if
		558	@@:
3083	leency	559	;Asper ]
		560
5048	Asper	561	mov esi, msgPrimBuff
		562	invoke SysMsgBoardStr
		563	call create_primary_buff
		564	mov esi, msgDone
		565	invoke SysMsgBoardStr
3083	leency	566
5048	Asper	567	if IRQ_REMAP
		568	pushf
		569	cli
3083	leency	570
5048	Asper	571	mov ebx, [ctrl.int_line]
		572	in al, 0xA1
		573	mov ah, al
		574	in al, 0x21
		575	test ebx, ebx
		576	jz .skip
		577	bts ax, bx ;mask old line
3083	leency	578	.skip
5048	Asper	579	bts ax, IRQ_LINE ;mask new line
		580	out 0x21, al
		581	mov al, ah
		582	out 0xA1, al
3083	leency	583	;remap IRQ
5048	Asper	584	invoke PciWrite8, 0, 0xF8, 0x61, IRQ_LINE
3083	leency	585
5048	Asper	586	mov dx, 0x4d0 ;8259 ELCR1
		587	in al, dx
		588	bts ax, IRQ_LINE
		589	out dx, al ;set level-triggered mode
		590	mov [ctrl.int_line], IRQ_LINE
		591	popf
		592	mov esi, msgRemap
		593	invoke SysMsgBoardStr
		594	end if
3083	leency	595
5048	Asper	596	mov ebx, [ctrl.int_line]
		597	invoke AttachIntHandler, ebx, hda_irq, dword 0
3083	leency	598
		599	;Asper This part is from "azx_probe" proc. [
5048	Asper	600	call azx_codec_create
		601	cmp eax, 0
		602	jl .fail
3083	leency	603
5048	Asper	604	call azx_codec_configure
		605	cmp eax, 0
		606	jl .fail
3083	leency	607	;] Asper
		608
5048	Asper	609	; create PCM streams
3083	leency	610	;Asper+ [
5048	Asper	611	mov eax, [spec.dac_node]
		612	if DEBUG ;-
		613	push eax esi
		614	mov esi, msgVal
		615	invoke SysMsgBoardStr
		616	stdcall fdword2str, 3
		617	invoke SysMsgBoardStr
		618	pop esi eax
		619	end if
3083	leency	620
5048	Asper	621	test eax, eax
		622	jz .fail
		623	mov ebx, [spec.dac_node+4]
		624	if DEBUG ;-
		625	push eax esi
		626	mov esi, msgVal
		627	invoke SysMsgBoardStr
		628	mov eax, [spec.dac_node+4]
		629	stdcall fdword2str, 3
		630	invoke SysMsgBoardStr
		631	pop esi eax
		632	end if
3083	leency	633
5048	Asper	634	test ebx, ebx
		635	jz @f
		636	cmp eax, ebx
		637	je @f
		638	stdcall hda_codec_setup_stream, ebx, SDO_TAG, 0, 0x11 ; Left & Right channels (Front panel)
		639	@@:
		640	stdcall hda_codec_setup_stream, eax, SDO_TAG, 0, 0x11 ; Left & Right channels (Back panel)
3083	leency	641	;Asper+ ]
		642
5048	Asper	643	if USE_SINGLE_MODE
		644	mov esi, msgSingleMode
		645	invoke SysMsgBoardStr
		646	else
		647	mov esi, msgNormalMode
		648	invoke SysMsgBoardStr
		649	end if
3083	leency	650
		651	.reg:
5048	Asper	652	invoke RegService, sz_sound_srv, service_proc
		653	pop esi ebx
		654	ret
3083	leency	655	.fail:
5048	Asper	656	mov esi, msgFail
3083	leency	657	.fail_msg:
5048	Asper	658	invoke SysMsgBoardStr
		659	pop esi ebx
		660	xor eax, eax
		661	ret
3083	leency	662	.stop:
5048	Asper	663	call stop
		664	pop esi ebx
		665	xor eax, eax
		666	ret
3083	leency	667	endp
		668
		669	handle equ IOCTL.handle
		670	io_code equ IOCTL.io_code
		671	input equ IOCTL.input
		672	inp_size equ IOCTL.inp_size
		673	output equ IOCTL.output
		674	out_size equ IOCTL.out_size
		675
		676	align 4
		677	proc service_proc stdcall, ioctl:dword
5048	Asper	678	mov edi, [ioctl]
		679	mov eax, [edi+io_code]
3083	leency	680
5048	Asper	681	cmp eax, SRV_GETVERSION
		682	jne @F
3083	leency	683
5048	Asper	684	mov eax, [edi+output]
		685	cmp [edi+out_size], 4
		686	jne .fail
3083	leency	687
5048	Asper	688	mov [eax], dword API_VERSION
		689	xor eax, eax
		690	ret
3083	leency	691	@@:
5048	Asper	692	cmp eax, DEV_PLAY
		693	jne @F
		694	if DEBUG
		695	mov esi, msgPlay
		696	invoke SysMsgBoardStr
		697	end if
		698	call play
		699	xor eax, eax
		700	ret
3083	leency	701	@@:
5048	Asper	702	cmp eax, DEV_STOP
		703	jne @F
		704	if DEBUG
		705	mov esi, msgStop
		706	invoke SysMsgBoardStr
		707	end if
		708	call stop
		709	xor eax, eax
		710	ret
3083	leency	711	@@:
5048	Asper	712	cmp eax, DEV_CALLBACK
		713	jne @f
		714	mov ebx, [edi+input]
		715	stdcall set_callback, [ebx]
		716	xor eax, eax
		717	ret
3083	leency	718	@@:
5048	Asper	719	cmp eax, DEV_SET_MASTERVOL
		720	jne @f
		721	mov eax, [edi+input]
		722	mov eax, [eax]
		723	call set_master_vol
		724	xor eax, eax
		725	ret
3083	leency	726	@@:
5048	Asper	727	cmp eax, DEV_GET_MASTERVOL
		728	jne @f
		729	mov ebx, [edi+output]
		730	stdcall get_master_vol, ebx
		731	xor eax, eax
		732	ret
3083	leency	733	;@@:
5048	Asper	734	; cmp eax, DEV_GET_INFO
		735	; jne @f
		736	; mov ebx, [edi+output]
		737	; stdcall get_dev_info, ebx
		738	; xor eax, eax
		739	; ret
3083	leency	740	@@:
5048	Asper	741	cmp eax, DEV_GET_POS
		742	jne @f
		743	stdcall azx_get_position
		744	shr eax, 2
		745	mov ebx, [edi+output]
		746	mov [ebx], eax
		747	xor eax, eax
		748	ret
3083	leency	749	@@:
5048	Asper	750	; cmp eax, DEV_SET_CHANNEL_VOLUME
		751	; jne @f
		752	;if DEBUG
		753	; mov esi, msgSetChannelVolume
		754	; invoke SysMsgBoardStr
		755	;end if
		756	; mov ebx, [edi+input]
		757	; mov cl, byte [ebx] ; cl=channel
		758	; mov eax, dword [ebx+1] ; eax=volume in Db
		759	;if DEBUG
		760	; push eax esi
		761	; mov esi, msgYAHOO1
		762	; invoke SysMsgBoardStr
		763	; stdcall fdword2str, 1
		764	; invoke SysMsgBoardStr
		765	; mov esi, strSemicolon
		766	; invoke SysMsgBoardStr
		767	; movzx eax, cl
		768	; stdcall fdword2str, 3
		769	; invoke SysMsgBoardStr
		770	; pop esi eax
		771	;end if
		772	; ; call set_channel_volume
		773	; xor eax, eax
		774	; ret
3083	leency	775	;@@:
5048	Asper	776	; cmp eax, DEV_GET_CHANNEL_VOLUME
		777	; jne @f
		778	; mov cl, byte [edi+input] ; cl=channel
		779	; call get_channel_volume
		780	; mov ebx, [edi+output]
		781	; mov [ebx], eax
		782	; xor eax, eax
		783	; ret
3083	leency	784	;@@:
		785
		786	;Asper: Non standard system service. For the tests only! [
		787	@@:
5048	Asper	788	cmp eax, DEV_EXEC_CODEC_CMD
		789	jne @f
3083	leency	790
5048	Asper	791	mov eax, [edi+input]
		792	mov eax, [eax]
		793	stdcall codec_exec_verb, eax
		794	xor eax, eax
		795	ret
3083	leency	796	@@:
		797	;Asper: Non standard system service. For the tests only! ]
		798
		799	.fail:
5048	Asper	800	or eax, -1
		801	ret
3083	leency	802	endp
		803
5048	Asper	804	restore handle
		805	restore io_code
		806	restore input
		807	restore inp_size
		808	restore output
		809	restore out_size
3083	leency	810
		811
		812	align 4
		813	proc hda_irq ;+
5048	Asper	814	spin_lock
		815	if DEBUG_IRQ
		816	push eax esi
		817	;mov esi, msgIRQ
		818	;invoke SysMsgBoardStr
		819	call GetTimerTicks
		820	stdcall fdword2str, 2
		821	invoke SysMsgBoardStr
		822	pop esi eax
		823	end if
		824	mov edx, ICH6_REG_INTSTS
		825	call azx_readl
		826	test eax, eax
		827	jnz @f
		828	spin_unlock
		829	ret
		830	@@:
		831	mov ebx, eax ; status
		832	mov eax, SDO_INT
		833	test ebx, eax
		834	jz @f
3083	leency	835
5048	Asper	836	mov edx, ICH6_REG_SD_STS + SDO_OFS
		837	call azx_readb
		838	mov bl, al
3083	leency	839
5048	Asper	840	mov al, SD_INT_MASK
		841	mov edx, ICH6_REG_SD_STS + SDO_OFS
		842	call azx_writeb
3083	leency	843
5048	Asper	844	test bl, SD_INT_COMPLETE
		845	jz @f
3083	leency	846
5048	Asper	847	mov eax, [ctrl.civ_val]
		848	inc eax
		849	and eax, 4-1 ;2-1
		850	mov [ctrl.civ_val], eax
3083	leency	851
5048	Asper	852	mov ebx, dword [buff_list+eax*4]
		853	cmp [ctrl.user_callback], 0
		854	je @f
		855	stdcall [ctrl.user_callback], ebx
		856	@@:
		857	; clear rirb int
		858	mov edx, ICH6_REG_RIRBSTS
		859	call azx_readb
3083	leency	860
5048	Asper	861	test al, RIRB_INT_MASK
		862	jz .l1
		863	test al, RIRB_INT_RESPONSE
		864	jz .l2
3083	leency	865
5048	Asper	866	cmp byte [driver_type], AZX_DRIVER_CTX
		867	jne @f
		868	mov eax, 80 ; wait 80 us
		869	call StallExec
		870	@@:
		871	call azx_update_rirb
		872	.l2:
		873	mov al, RIRB_INT_MASK
		874	mov edx, ICH6_REG_RIRBSTS
		875	call azx_writeb
		876	.l1:
3083	leency	877
		878	;if 0
		879	; clear state status int
5048	Asper	880	mov edx, ICH6_REG_STATESTS
		881	call azx_readb
		882	test al, 0x04
		883	jz @f
3083	leency	884
5048	Asper	885	mov al, 0x04
		886	mov edx, ICH6_REG_STATESTS
		887	call azx_writeb
		888	@@:
3083	leency	889	;end if
5048	Asper	890	or eax, 1
		891	spin_unlock
		892	ret
3083	leency	893	endp
		894
		895
		896	align 4
		897	proc create_primary_buff
		898
5048	Asper	899	invoke KernelAlloc, 4096
		900	mov [ctrl.posbuf], eax
3083	leency	901
5048	Asper	902	invoke KernelAlloc, 0x10000 ;0x8000
		903	mov [ctrl.buffer], eax
3083	leency	904
5048	Asper	905	mov edi, eax
		906	mov ecx, 0x10000/4 ;0x8000/4
		907	xor eax, eax
		908	cld
		909	rep stosd
3083	leency	910
5048	Asper	911	invoke KernelAlloc, 4096
		912	mov [pcmout_bdl], eax
3083	leency	913
5048	Asper	914	mov edi, eax
		915	mov ecx, 4096/4
		916	xor eax, eax
		917	cld
		918	rep stosd
3083	leency	919
5048	Asper	920	; reset BDL address
		921	xor eax, eax
		922	mov edx, ICH6_REG_SD_BDLPL + SDO_OFS
		923	call azx_writel
		924	xor eax, eax
		925	mov edx, ICH6_REG_SD_BDLPU + SDO_OFS
		926	call azx_writel
3083	leency	927
5048	Asper	928	; program the initial BDL entries
		929	mov eax, [ctrl.buffer]
		930	mov ebx, eax
		931	invoke GetPgAddr
		932	and ebx, 0xFFF
		933	add eax, ebx
3083	leency	934
5048	Asper	935	mov ebx, 0x4000 ;buffer size
		936	mov ecx, 8 ;number of periods
		937	mov edi, [pcmout_bdl] ;pcmout_bdl
		938	.next_period:
		939	push eax ecx
		940	mov ecx, 4 ;2 ;number of bdl in a period
		941	.next_bdl:
		942	; program the address field of the BDL entry
		943	mov dword [edi], eax
		944	mov dword [edi+4], 0
		945	; program the size field of the BDL entry
		946	mov dword [edi+8], ebx
		947	; program the IOC to enable interrupt when buffer completes
		948	mov dword [edi+12], 0x01
3083	leency	949
5048	Asper	950	add eax, ebx
		951	add edi, 16
		952	dec ecx
		953	jnz .next_bdl
3083	leency	954
5048	Asper	955	pop ecx eax
		956	dec ecx
		957	jnz .next_period
3083	leency	958
5048	Asper	959	mov edi, buff_list
		960	mov eax, [ctrl.buffer]
		961	mov ecx, 4 ;2
3083	leency	962	@@:
5048	Asper	963	mov [edi], eax
		964	mov [edi+8], eax
		965	mov [edi+16], eax
		966	mov [edi+24], eax
		967	mov [edi+32], eax
		968	mov [edi+40], eax
		969	mov [edi+48], eax
		970	mov [edi+56], eax
3083	leency	971
5048	Asper	972	add eax, ebx
		973	add edi, 4
		974	loop @B
3083	leency	975
5048	Asper	976	; wallclk has 24Mhz clock source
		977	mov [ctrl.period_wallclk], ((0x4000 * 24000) / 48000) * 1000
3083	leency	978
5048	Asper	979	call azx_stream_reset
		980	call azx_setup_controller
		981	ret
3083	leency	982	endp
		983
		984	align 4
		985	proc detect_controller
5048	Asper	986	locals
		987	last_bus dd ?
		988	bus dd ?
		989	devfn dd ?
		990	endl
		991	xor eax, eax
		992	mov [bus], eax
		993	inc eax
		994	invoke PciApi
		995	cmp eax, -1
		996	je .err
3083	leency	997
5048	Asper	998	mov [last_bus], eax
3083	leency	999
5048	Asper	1000	.next_bus:
		1001	and [devfn], 0
		1002	.next_dev:
		1003	invoke PciRead32, [bus], [devfn], dword 0
		1004	test eax, eax
		1005	jz .next
		1006	cmp eax, -1
		1007	je .next
3083	leency	1008
5048	Asper	1009	mov edi, devices
		1010	@@:
		1011	mov ebx, [edi]
		1012	test ebx, ebx
		1013	jz .next
3083	leency	1014
5048	Asper	1015	cmp eax, ebx
		1016	je .found
		1017	add edi, 12
		1018	jmp @b
		1019	.next:
		1020	inc [devfn]
		1021	cmp [devfn], 256
		1022	jb .next_dev
		1023	mov eax, [bus]
		1024	inc eax
		1025	mov [bus], eax
		1026	cmp eax, [last_bus]
		1027	jna .next_bus
		1028	xor eax, eax
		1029	ret
		1030	.found:
		1031	mov ebx, [bus]
		1032	mov [ctrl.bus], ebx
3083	leency	1033
5048	Asper	1034	mov ecx, [devfn]
		1035	mov [ctrl.devfn], ecx
3083	leency	1036
5048	Asper	1037	mov edx, eax
		1038	and edx, 0xFFFF
		1039	mov [ctrl.vendor], dx
		1040	shr eax, 16
		1041	mov [ctrl.dev_id], ax
3083	leency	1042
5048	Asper	1043	mov ebx, [edi+4]
		1044	mov [ctrl.ctrl_ids], ebx
3083	leency	1045
5048	Asper	1046	cmp edx, VID_INTEL
		1047	jne @f
		1048	mov [ctrl.vendor_ids], msg_Intel
		1049	jmp .ok
		1050	@@:
		1051	cmp edx, VID_NVIDIA
		1052	jne @f
		1053	mov [ctrl.vendor_ids], msg_NVidia
		1054	jmp .ok
		1055	@@:
		1056	cmp edx, VID_ATI
		1057	jne @f
		1058	cmp eax, 0x4383
		1059	jg .ati_hdmi
		1060	mov [ctrl.vendor_ids], msg_ATI
		1061	jmp .ok
		1062	.ati_hdmi:
		1063	mov [ctrl.vendor_ids], msg_ATI_HDMI
		1064	jmp .ok
		1065	@@:
		1066	cmp edx, VID_AMD
		1067	jne @f
		1068	mov [ctrl.vendor_ids], msg_AMD
		1069	jmp .ok
		1070	@@:
		1071	cmp edx, VID_VIA
		1072	jne @f
		1073	mov [ctrl.vendor_ids], msg_VIA
		1074	jmp .ok
		1075	@@:
		1076	cmp edx, VID_SIS
		1077	jne @f
		1078	mov [ctrl.vendor_ids], msg_SIS
		1079	jmp .ok
		1080	@@:
		1081	cmp edx, VID_ULI
		1082	jne @f
		1083	mov [ctrl.vendor_ids], msg_ULI
		1084	jmp .ok
		1085	@@:
		1086	cmp edx, VID_TERA
		1087	jne @f
		1088	mov [ctrl.vendor_ids], msg_TERA
		1089	jmp .ok
		1090	@@:
		1091	cmp edx, VID_CREATIVE
		1092	jne @f
		1093	mov [ctrl.vendor_ids], msg_CREATIVE
		1094	jmp .ok
		1095	@@:
		1096	cmp edx, VID_RDC
		1097	jne @f
		1098	mov [ctrl.vendor_ids], msg_RDC
		1099	jmp .ok
		1100	@@:
		1101	cmp edx, VID_VMWARE
		1102	jne @f
		1103	mov [ctrl.vendor_ids], msg_VMWARE
		1104	jmp .ok
		1105	@@:
		1106	.err:
		1107	xor eax, eax
		1108	mov [ctrl.vendor_ids], eax ;something wrong ?
		1109	mov [driver_type], -1
		1110	ret
		1111	.ok:
		1112	mov ebx, [edi+8]
		1113	mov [driver_type], ebx
		1114	ret
3083	leency	1115	endp
		1116
		1117	align 4
		1118	proc init_controller
		1119
5048	Asper	1120	invoke PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
		1121	test eax, 0x4 ; Test Master bit
		1122	jnz @f
		1123	or eax, 0x4 ; Set Master bit
		1124	invoke PciWrite32, [ctrl.bus], [ctrl.devfn], dword 4, eax
		1125	invoke PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
		1126	@@:
		1127	mov ebx, eax
		1128	and eax, 0xFFFF
		1129	mov [ctrl.pci_cmd], eax
		1130	shr ebx, 16
		1131	mov [ctrl.pci_stat], ebx
3083	leency	1132
5048	Asper	1133	mov esi, msgPciCmd
		1134	invoke SysMsgBoardStr
		1135	stdcall fdword2str, 2
		1136	invoke SysMsgBoardStr
3083	leency	1137
5048	Asper	1138	mov esi, msgPciStat
		1139	invoke SysMsgBoardStr
		1140	mov eax, [ctrl.pci_stat]
		1141	stdcall fdword2str, 2
		1142	invoke SysMsgBoardStr
3083	leency	1143
5048	Asper	1144	mov esi, msgHDALowMMIo
		1145	invoke SysMsgBoardStr
		1146	invoke PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x10
		1147	stdcall fdword2str, 2
		1148	invoke SysMsgBoardStr
3083	leency	1149
5048	Asper	1150	and eax, 0xFFFFC000
		1151	mov [ctrl.ctrl_mem_base], eax
3083	leency	1152
5048	Asper	1153	mov esi, msgHDAUpMMIo
		1154	invoke SysMsgBoardStr
		1155	invoke PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x14
		1156	;-mov [ctrl.hda_upper_mem_base], eax
		1157	stdcall fdword2str, 2
		1158	invoke SysMsgBoardStr
3083	leency	1159
5048	Asper	1160	.default:
		1161	invoke PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x3C
		1162	and eax, 0xFF
		1163	@@:
		1164	mov [ctrl.int_line], eax
		1165	mov [ctrl.user_callback], 0
3083	leency	1166
5048	Asper	1167	call set_HDA
3083	leency	1168	;Asper This is from "azx_create" proc. [
5048	Asper	1169	xor eax, eax
		1170	mov edx, ICH6_REG_GCAP
		1171	call azx_readw
		1172	if DEBUG
		1173	mov esi, msgGCap
		1174	invoke SysMsgBoardStr
		1175	stdcall fdword2str, 2
		1176	invoke SysMsgBoardStr
		1177	end if
		1178	; allocate CORB/RIRB
		1179	call azx_alloc_cmd_io
3083	leency	1180
5048	Asper	1181	; initialize chip
		1182	call azx_init_pci
3083	leency	1183
5048	Asper	1184	xor eax, eax
		1185	call azx_init_chip
3083	leency	1186	;] Asper
		1187
5048	Asper	1188	xor eax, eax
		1189	inc eax
		1190	ret
3083	leency	1191	endp
		1192
		1193
		1194
5048	Asper	1195	PG_SW equ 0x003
		1196	PG_NOCACHE equ 0x018
3083	leency	1197
		1198	align 4
		1199	proc set_HDA
5048	Asper	1200	invoke MapIoMem,[ctrl.ctrl_mem_base],0x1000,PG_SW+PG_NOCACHE
		1201	mov [ctrl.ctrl_mem_base], eax
		1202	ret
3083	leency	1203	endp
		1204
		1205
		1206	; in: eax - fullreset_flag
		1207	;
		1208	; reset codec link
		1209	align 4
		1210	proc reset_controller
5048	Asper	1211	locals
		1212	counter dd ?
		1213	endl
3083	leency	1214
5048	Asper	1215	test eax, eax
		1216	jz .skip
3083	leency	1217
5048	Asper	1218	; clear STATESTS
		1219	mov eax, STATESTS_INT_MASK
		1220	mov edx, ICH6_REG_STATESTS
		1221	call azx_writeb
3083	leency	1222
5048	Asper	1223	; reset controller
		1224	mov edx, ICH6_REG_GCTL
		1225	call azx_readl
		1226	mov ebx, ICH6_GCTL_RESET
		1227	xor ebx, -1
		1228	and eax, ebx
		1229	mov edx, ICH6_REG_GCTL
		1230	call azx_writel
3083	leency	1231
5048	Asper	1232	mov [counter], 50 ; total 50*100 us = 0.5s
		1233	.wait0:
3083	leency	1234
5048	Asper	1235	mov edx, ICH6_REG_GCTL
		1236	call azx_readb
		1237	test eax, eax
		1238	jz @f
3083	leency	1239
5048	Asper	1240	mov eax, 100 ; wait 100 us
		1241	call StallExec
3083	leency	1242
5048	Asper	1243	dec [counter]
		1244	jnz .wait0
		1245	@@:
		1246	; delay for >= 100us for codec PLL to settle per spec
		1247	; Rev 0.9 section 5.5.1
		1248	mov eax, 100 ; wait 100 us
		1249	call StallExec
3083	leency	1250
5048	Asper	1251	; Bring controller out of reset
		1252	mov edx, ICH6_REG_GCTL
		1253	call azx_readb
		1254	or eax, ICH6_GCTL_RESET
		1255	mov edx, ICH6_REG_GCTL
		1256	call azx_writeb
3083	leency	1257
5048	Asper	1258	mov [counter], 50 ; total 50*100 us = 0.5s
		1259	.wait1:
3083	leency	1260
5048	Asper	1261	mov edx, ICH6_REG_GCTL
		1262	call azx_readb
		1263	test eax, eax
		1264	jnz @f
3083	leency	1265
5048	Asper	1266	mov eax, 100 ; wait 100 us
		1267	call StallExec
3083	leency	1268
5048	Asper	1269	dec [counter]
		1270	jnz .wait1
		1271	@@:
3083	leency	1272
5048	Asper	1273	; Brent Chartrand said to wait >= 540us for codecs to intialize
		1274	mov eax, 540 ; wait 540 us
		1275	call StallExec
3083	leency	1276
5048	Asper	1277	.skip:
		1278	; check to see if controller is ready
		1279	mov edx, ICH6_REG_GCTL
		1280	call azx_readb
		1281	test eax, eax
		1282	jz .fail
3083	leency	1283
5048	Asper	1284	; Accept unsolicited responses
		1285	if USE_SINGLE_MODE
		1286	else if USE_UNSOL_EV
3083	leency	1287	;UNSUPPORTED YET! [
5048	Asper	1288	mov edx, ICH6_REG_GCTL
		1289	call azx_readl
		1290	or eax, ICH6_GCTL_UNSOL
		1291	mov edx, ICH6_REG_GCTL
		1292	call azx_writel
3083	leency	1293	;UNSUPPORTED YET! ]
5048	Asper	1294	end if
3083	leency	1295
5048	Asper	1296	; detect codecs
		1297	mov eax, [ctrl.codec_mask]
		1298	test ax, ax
		1299	jnz @f
3083	leency	1300
5048	Asper	1301	mov edx, ICH6_REG_STATESTS
		1302	call azx_readw
		1303	mov [ctrl.codec_mask], eax
3083	leency	1304
5048	Asper	1305	if DEBUG
		1306	mov esi, msgCodecMask
		1307	invoke SysMsgBoardStr
		1308	stdcall fdword2str, 2
		1309	invoke SysMsgBoardStr
		1310	end if
3083	leency	1311
5048	Asper	1312	@@:
3083	leency	1313
5048	Asper	1314	.ok:
		1315	clc
		1316	ret
		1317	.fail:
		1318	if DEBUG
		1319	mov esi, msgHDARFail
		1320	invoke SysMsgBoardStr
		1321	end if
		1322	stc
		1323	ret
3083	leency	1324	endp
		1325
		1326
		1327	align 4
		1328	play:
5048	Asper	1329	spin_lock_irq
		1330	mov edx, ICH6_REG_WALLCLK
		1331	call azx_readl
		1332	mov [ctrl.start_wallclk], eax
3083	leency	1333
5048	Asper	1334	call azx_stream_start
		1335	xor eax, eax
		1336	spin_unlock_irq
		1337	ret
3083	leency	1338
		1339	align 4
		1340	stop:
5048	Asper	1341	spin_lock_irq
		1342	;* call azx_stream_stop ;Asper: Hangs system
		1343	;R push ebx ecx edx
		1344	;R ; stop DMA
		1345	;R mov edx, ICH6_REG_SD_CTL
		1346	;R call azx_sd_readb
		1347	;R mov bl, SD_CTL_DMA_START or SD_INT_MASK
		1348	;R xor bl, -1
		1349	;R and al, bl
		1350	;R mov edx, ICH6_REG_SD_CTL
		1351	;R call azx_sd_writeb
		1352	;R mov edx, ICH6_REG_SD_STS
		1353	;R mov al, SD_INT_MASK
		1354	;R call azx_sd_writeb ; to be sure
		1355	; disable SIE
		1356	;N mov edx, ICH6_REG_INTCTL
		1357	;N call azx_readb
		1358	;N mov bl, SDO_INT ;shl azx_dev->index
		1359	;N xor bl, -1
		1360	;N and al, bl
		1361	;N mov edx, ICH6_REG_INTCTL
		1362	;N call azx_writeb
3083	leency	1363
5048	Asper	1364	; int timeout = 5000;
		1365	; while (azx_sd_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START && --timeout) ;
3083	leency	1366	;Asper: Hangs system [
5048	Asper	1367	;* mov ecx, 5000
		1368	;*.l1:
		1369	;* mov edx, ICH6_REG_SD_CTL
		1370	;* call azx_sd_readb
		1371	;* test al, SD_CTL_DMA_START
		1372	;* jz @f
		1373	;* dec ecx
		1374	;* jnz .l1
		1375	;*@@:
3083	leency	1376	;*
5048	Asper	1377	;* pop edx ecx ebx
3083	leency	1378	;Asper ]
		1379
5048	Asper	1380	xor eax, eax
		1381	spin_unlock_irq
		1382	ret
3083	leency	1383
		1384	;align 4
5048	Asper	1385	;proc get_dev_info stdcall, p_info:dword ;deprecated
		1386	;virtual at esi
		1387	; CTRL_INFO CTRL_INFO
		1388	;end virtual
3083	leency	1389	;
5048	Asper	1390	; mov esi, [p_info]
		1391	; mov eax, [ctrl.int_line]
		1392	; mov bx, [ctrl.dev_id]
		1393	; shl ebx, 16
		1394	; and bx, [ctrl.vendor]
		1395	; mov ecx, [ctrl.pci_cmd]
		1396	; mov edx, [ctrl.codec_mem_base] ;[ctrl.hda_lower_mem_base]
		1397	; mov edi, [ctrl.ctrl_mem_base] ;[ctrl.hda_upper_mem_base]
3083	leency	1398	;
5048	Asper	1399	; mov [CTRL_INFO.irq], eax
		1400	; mov [CTRL_INFO.codec_id], ebx
		1401	; mov [CTRL_INFO.pci_cmd], ecx
		1402	; mov [CTRL_INFO.codec_mem_base], edx
		1403	; mov [CTRL_INFO.ctrl_mem_base], edi
3083	leency	1404	;
5048	Asper	1405	; xor eax, eax
		1406	; mov [CTRL_INFO.codec_io_base], eax
		1407	; mov [CTRL_INFO.ctrl_io_base], eax
		1408	; mov [CTRL_INFO.glob_cntrl], eax
		1409	; mov [CTRL_INFO.glob_sta], eax
		1410	; ret
3083	leency	1411	;endp
		1412
		1413	align 4
		1414	proc set_callback stdcall, handler:dword
5048	Asper	1415	mov eax, [handler]
		1416	mov [ctrl.user_callback], eax
		1417	ret
3083	leency	1418	endp
		1419
		1420
		1421
		1422	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		1423	;; Interface for HD codec ;;
		1424	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		1425
		1426	;;;;;;;;;;;;;;;;;;;;;;;;;;;
		1427	;; CORB / RIRB interface ;;
		1428	;;;;;;;;;;;;;;;;;;;;;;;;;;;
		1429
5048	Asper	1430	proc azx_alloc_cmd_io
		1431	push eax ecx edx
		1432	; single page (at least 4096 bytes) must suffice for both ringbuffers
		1433	invoke KernelAlloc, 4096
		1434	mov [ctrl.rb], eax
3083	leency	1435
5048	Asper	1436	mov edi, eax
		1437	mov ecx, 4096/4
		1438	xor eax, eax
		1439	cld
		1440	rep stosd
3083	leency	1441
5048	Asper	1442	pop edx ecx eax
		1443	ret
3083	leency	1444	endp
		1445
5048	Asper	1446	proc azx_init_cmd_io
		1447	spin_lock_irq
		1448	pusha
		1449	; CORB set up
		1450	mov eax, [ctrl.rb]
		1451	mov ebx, eax
		1452	invoke GetPgAddr
		1453	and ebx, 0xFFF
		1454	add eax, ebx
		1455	push eax ; save corb address
		1456	mov edx, ICH6_REG_CORBLBASE
		1457	call azx_writel
		1458	xor eax, eax
		1459	mov edx, ICH6_REG_CORBUBASE
		1460	call azx_writel
3083	leency	1461
5048	Asper	1462	; set the corb size to 256 entries (ULI requires explicitly)
		1463	mov al, 0x02
		1464	mov edx, ICH6_REG_CORBSIZE
		1465	call azx_writeb
		1466	; set the corb write pointer to 0
		1467	xor ax, ax
		1468	mov edx, ICH6_REG_CORBWP
		1469	call azx_writew
		1470	; reset the corb hw read pointer
		1471	mov ax, ICH6_CORBRP_RST
		1472	mov edx, ICH6_REG_CORBRP
		1473	call azx_writew
		1474	; enable corb dma
		1475	mov al, ICH6_CORBCTL_RUN
		1476	mov edx, ICH6_REG_CORBCTL
		1477	call azx_writeb
3083	leency	1478
5048	Asper	1479	; RIRB set up
		1480	mov [ctrl.rirb_rp], 0
		1481	mov [ctrl.rirb_wp], 0
		1482	mov [ctrl.rirb_cmd], 0
3083	leency	1483
5048	Asper	1484	pop eax ; restore corb address
		1485	add eax, 2048
		1486	mov edx, ICH6_REG_RIRBLBASE
		1487	call azx_writel
		1488	xor eax, eax
		1489	mov edx, ICH6_REG_RIRBUBASE
		1490	call azx_writel
3083	leency	1491
5048	Asper	1492	; set the rirb size to 256 entries (ULI requires explicitly)
		1493	mov al, 0x02
		1494	mov edx, ICH6_REG_RIRBSIZE
		1495	call azx_writeb
		1496	; reset the rirb hw write pointer
		1497	mov ax, ICH6_RIRBWP_RST
		1498	mov edx, ICH6_REG_RIRBWP
		1499	call azx_writew
		1500	; set N=1, get RIRB response interrupt for new entry
		1501	xor ax, ax
		1502	cmp byte [driver_type], AZX_DRIVER_CTX
		1503	jne @f
		1504	mov ax, 0xC0-1
3083	leency	1505	@@:
5048	Asper	1506	inc ax
		1507	mov edx, ICH6_REG_RINTCNT
		1508	call azx_writew
		1509	; enable rirb dma and response irq
		1510	mov al, ICH6_RBCTL_DMA_EN or ICH6_RBCTL_IRQ_EN
		1511	mov edx, ICH6_REG_RIRBCTL
		1512	call azx_writeb
3083	leency	1513
5048	Asper	1514	popa
		1515	spin_unlock_irq
		1516	ret
3083	leency	1517	endp
		1518
5048	Asper	1519	proc azx_free_cmd_io
		1520	spin_lock_irq
		1521	push eax edx
		1522	; disable ringbuffer DMAs
		1523	xor al, al
		1524	mov edx, ICH6_REG_RIRBCTL
		1525	call azx_writeb
		1526	mov edx, ICH6_REG_CORBCTL
		1527	call azx_writeb
		1528	pop edx eax
		1529	spin_unlock_irq
		1530	ret
3083	leency	1531	endp
		1532
		1533
		1534	; send a command
5048	Asper	1535	proc azx_corb_send_cmd stdcall, val:dword
		1536	spin_lock_irq
		1537	push edx edi
		1538	xor eax, eax
		1539	; add command to corb
		1540	mov edx, ICH6_REG_CORBWP
		1541	call azx_readb
		1542	inc al
		1543	inc dword [ctrl.rirb_cmd]
		1544	mov edi, dword [ctrl.rb]
3083	leency	1545
5048	Asper	1546	push eax
		1547	shl eax, 2 ;wp=wpsizeof(corb entry)=wp4
		1548	add edi, eax
		1549	mov eax, dword [val]
		1550	stosd
		1551	pop eax
		1552	mov edx, ICH6_REG_CORBWP
		1553	call azx_writel
3083	leency	1554
5048	Asper	1555	pop edi edx
		1556	xor eax, eax ;Asper+
		1557	spin_unlock_irq
		1558	ret
3083	leency	1559	endp
		1560
		1561
		1562	; retrieve RIRB entry - called from interrupt handler
5048	Asper	1563	proc azx_update_rirb
		1564	pusha
		1565	xor eax, eax
		1566	mov edx, ICH6_REG_RIRBWP
		1567	call azx_readb ;call azx_readw
3083	leency	1568
5048	Asper	1569	cmp ax, [ctrl.rirb_wp]
		1570	je .done
		1571	mov [ctrl.rirb_wp], ax
		1572	mov bx, [ctrl.rirb_rp]
3083	leency	1573
5048	Asper	1574	.l1:
		1575	cmp bx, [ctrl.rirb_wp]
		1576	je .l3
3083	leency	1577
5048	Asper	1578	inc bl
		1579	.l2:
		1580	cmp bx, ICH6_MAX_RIRB_ENTRIES
		1581	jl @f
		1582	sub bx, ICH6_MAX_RIRB_ENTRIES
		1583	jmp .l2
		1584	@@:
3083	leency	1585
5048	Asper	1586	movzx edx, bx
		1587	shl edx, 1 + 2 ; an RIRB entry is 8-bytes
		1588	mov esi, dword [ctrl.rb]
		1589	add esi, 2048
		1590	add esi, edx
		1591	lodsd ; res
		1592	mov edx, eax
		1593	lodsd ; res_ex
3083	leency	1594
5048	Asper	1595	test eax, ICH6_RIRB_EX_UNSOL_EV
		1596	jz @f
		1597	stdcall snd_hda_queue_unsol_event, edx, eax
		1598	jmp .l1
		1599	@@:
		1600	mov ecx, [ctrl.rirb_cmd]
		1601	test ecx, ecx
		1602	jz @f
		1603	mov [ctrl.rirb_res], edx
		1604	dec dword [ctrl.rirb_cmd]
		1605	jmp .l1
		1606	@@:
		1607	if DEBUG
		1608	push esi
		1609	mov esi, msgSpuriousResponce
		1610	invoke SysMsgBoardStr
		1611	pop esi
		1612	end if
		1613	jmp .l1
		1614	.l3:
		1615	mov [ctrl.rirb_rp], bx
		1616	.done:
		1617	popa
		1618	ret
3083	leency	1619	endp
		1620
		1621	; receive a response
5048	Asper	1622	proc azx_rirb_get_response
		1623	locals
		1624	do_poll db 0
		1625	endl
3083	leency	1626
5048	Asper	1627	push ebx ecx edx
		1628	.again:
		1629	mov ecx, 1000;+1000
		1630	.next_try:
		1631	mov al, [ctrl.polling_mode]
		1632	test al, al
		1633	jnz .poll
		1634	mov ah, [do_poll]
		1635	test ah, ah
		1636	jz @f
		1637	.poll:
		1638	spin_lock_irq
		1639	call azx_update_rirb
		1640	spin_unlock_irq
		1641	@@:
		1642	mov eax, [ctrl.rirb_cmd]
		1643	test eax, eax
		1644	jnz .l1
		1645	mov [ctrl.rirb_error], 0
		1646	mov al, [do_poll]
		1647	test al, al
		1648	jnz @f
		1649	mov [ctrl.poll_count], 0
		1650	@@:
		1651	mov eax, [ctrl.rirb_res] ; the last value
		1652	jmp .out
		1653	.l1:
		1654	push eax
		1655	mov eax, 2000 ; temporary workaround
		1656	call StallExec
		1657	pop eax
		1658	dec ecx
		1659	jnz .next_try
		1660	.no_next_try:
		1661	mov al, [ctrl.polling_mode]
		1662	test al, al
		1663	jnz .no_poll
3083	leency	1664
5048	Asper	1665	mov al, [ctrl.poll_count]
		1666	cmp al, 2
		1667	jge .poll_count_overflow
		1668	if DEBUG
		1669	push eax esi
		1670	mov esi, msgGetResponceTimeout
		1671	invoke SysMsgBoardStr
		1672	mov esi, msgPollingCodecOnce
		1673	invoke SysMsgBoardStr
		1674	pop esi eax
		1675	end if
		1676	mov [do_poll], 1
		1677	inc [ctrl.poll_count]
		1678	jmp .again
3083	leency	1679
5048	Asper	1680	.poll_count_overflow:
		1681	if DEBUG
		1682	push eax esi
		1683	mov esi, msgGetResponceTimeout
		1684	invoke SysMsgBoardStr
		1685	mov esi, msgSwitchToPollMode
		1686	invoke SysMsgBoardStr
		1687	pop esi eax
		1688	end if
		1689	mov [ctrl.polling_mode], 1
		1690	jmp .again
3083	leency	1691
5048	Asper	1692	.no_poll:
3083	leency	1693
5048	Asper	1694	mov al, [ctrl.polling_mode]
		1695	test al, al
		1696	jz @f
		1697	mov eax, -1
		1698	jmp .out
		1699	@@:
3083	leency	1700
5048	Asper	1701	; a fatal communication error; need either to reset or to fallback
		1702	; to the single_cmd mode
		1703	mov [ctrl.rirb_error], 1
		1704	;Asper~ -? [
		1705	mov [ctrl.response_reset], 1
		1706	mov eax, -1 ; give a chance to retry
		1707	jmp .out
		1708	;Asper~ -? ]
3083	leency	1709
5048	Asper	1710	;-? mov [ctrl.single_cmd], 1
		1711	mov [ctrl.response_reset], 0
3083	leency	1712
5048	Asper	1713	; release CORB/RIRB
		1714	call azx_free_cmd_io
		1715	; disable unsolicited responses
		1716	mov edx, ICH6_REG_GCTL
		1717	call azx_readl
		1718	mov ebx, ICH6_GCTL_UNSOL
		1719	xor ebx, -1
		1720	and eax, ebx
		1721	mov edx, ICH6_REG_GCTL
		1722	call azx_writel
		1723	mov eax, -1
		1724	.out:
		1725	pop edx ecx ebx
		1726	ret
3083	leency	1727	endp
		1728
		1729	;
		1730	; Use the single immediate command instead of CORB/RIRB for simplicity
		1731	;
		1732	; Note: according to Intel, this is not preferred use. The command was
		1733	; intended for the BIOS only, and may get confused with unsolicited
		1734	; responses. So, we shouldn't use it for normal operation from the
		1735	; driver.
		1736	; I left the codes, however, for debugging/testing purposes.
		1737	;
		1738
		1739	; receive a response
5048	Asper	1740	proc azx_single_wait_for_response
		1741	push ecx edx esi
3083	leency	1742
5048	Asper	1743	mov ecx, 50
		1744	.l1:
		1745	test ecx, ecx
		1746	jz .timeout
3083	leency	1747
		1748	; check IRV busy bit
5048	Asper	1749	mov edx, ICH6_REG_IRS
		1750	call azx_readw
		1751	test ax, ICH6_IRS_VALID
		1752	jz @f
3083	leency	1753	; reuse rirb.res as the response return value
5048	Asper	1754	mov edx, ICH6_REG_IR
		1755	call azx_readl
		1756	mov [ctrl.rirb_res], eax
3083	leency	1757
5048	Asper	1758	pop esi edx ecx
		1759	xor eax, eax
3083	leency	1760	ret
5048	Asper	1761	@@:
		1762	xor eax, eax
		1763	inc eax
		1764	call StallExec
3083	leency	1765
5048	Asper	1766	dec ecx
		1767	jmp .l1
		1768	.timeout:
		1769	if DEBUG
		1770	xor eax, eax
		1771	mov edx, ICH6_REG_IRS
		1772	call azx_readw
		1773	mov esi, msgGetResponceTimeout
		1774	invoke SysMsgBoardStr
		1775	mov esi, msgIRS
		1776	invoke SysMsgBoardStr
		1777	stdcall fdword2str, 2
		1778	invoke SysMsgBoardStr
		1779	end if
3083	leency	1780
5048	Asper	1781	pop esi edx ecx
		1782	mov eax, -1
		1783	mov [ctrl.rirb_res], eax
3083	leency	1784	ret
		1785	endp
		1786
		1787	; send a command
5048	Asper	1788	proc azx_single_send_cmd stdcall, val:dword
3083	leency	1789	push ecx edx esi
		1790
		1791	mov ecx, 50
5048	Asper	1792	.l1:
3083	leency	1793	test ecx, ecx
		1794	jz .timeout
		1795
		1796	; check ICB busy bit
5048	Asper	1797	mov edx, ICH6_REG_IRS
		1798	call azx_readw
		1799	test ax, ICH6_IRS_BUSY
		1800	jnz @f
3083	leency	1801	; Clear IRV valid bit
5048	Asper	1802	mov edx, ICH6_REG_IRS
		1803	call azx_readw
		1804	or ax, ICH6_IRS_VALID
		1805	mov edx, ICH6_REG_IRS
		1806	call azx_writew
3083	leency	1807
5048	Asper	1808	mov eax, dword [val]
		1809	mov edx, ICH6_REG_IC
		1810	call azx_writel
3083	leency	1811
5048	Asper	1812	mov edx, ICH6_REG_IRS
		1813	call azx_readw
		1814	or ax, ICH6_IRS_BUSY
		1815	mov edx, ICH6_REG_IRS
		1816	call azx_writew
3083	leency	1817
		1818	stdcall azx_single_wait_for_response
5048	Asper	1819	pop esi edx ecx
3083	leency	1820	ret
5048	Asper	1821	@@:
3083	leency	1822	dec ecx
		1823	jmp .l1
5048	Asper	1824	.timeout:
		1825	if DEBUG
		1826	xor eax, eax
		1827	mov edx, ICH6_REG_IRS
		1828	call azx_readw
		1829	mov esi, msgSendCmdTimeout
		1830	invoke SysMsgBoardStr
		1831	stdcall fdword2str, 2
		1832	invoke SysMsgBoardStr
		1833	mov esi, msgVal
		1834	invoke SysMsgBoardStr
		1835	mov eax, dword [val]
		1836	stdcall fdword2str, 2
		1837	invoke SysMsgBoardStr
		1838	end if
3083	leency	1839
5048	Asper	1840	pop esi edx ecx
		1841	mov eax, -1
3083	leency	1842	ret
		1843	endp
		1844
		1845	; receive a response
5048	Asper	1846	proc azx_single_get_response
		1847	mov eax, [ctrl.rirb_res]
3083	leency	1848	ret
		1849	endp
		1850
		1851	;
		1852	; The below are the main callbacks from hda_codec.
		1853	;
		1854	; They are just the skeleton to call sub-callbacks according to the
		1855	; current setting of chip->single_cmd.
		1856	;
		1857
		1858	; send a command
5048	Asper	1859	proc azx_send_cmd stdcall, val:dword
		1860	if USE_SINGLE_MODE
		1861	stdcall azx_single_send_cmd, [val]
		1862	else
		1863	stdcall azx_corb_send_cmd, [val]
		1864	end if
		1865	ret
3083	leency	1866	endp
		1867
		1868	; get a response
5048	Asper	1869	proc azx_get_response
		1870	if USE_SINGLE_MODE
		1871	call azx_single_get_response
		1872	else
		1873	call azx_rirb_get_response
		1874	end if
		1875	ret
3083	leency	1876	endp
		1877
		1878
		1879	;;;;;;;;;;;;;;;;;;;;;;;;
		1880	;; Lowlevel interface ;;
		1881	;;;;;;;;;;;;;;;;;;;;;;;;
		1882
		1883	; enable interrupts
5048	Asper	1884	proc azx_int_enable
		1885	push eax edx
		1886	; enable controller CIE and GIE
		1887	mov edx, ICH6_REG_INTCTL
		1888	call azx_readl
		1889	or eax, ICH6_INT_CTRL_EN or ICH6_INT_GLOBAL_EN
		1890	mov edx, ICH6_REG_INTCTL
		1891	call azx_writel
		1892	pop edx eax
		1893	ret
3083	leency	1894	endp
		1895
		1896	; disable interrupts
5048	Asper	1897	proc azx_int_disable
		1898	push eax ebx edx
3083	leency	1899
5048	Asper	1900	; disable interrupts in stream descriptor
		1901	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1902	call azx_readb
		1903	mov bl, SD_INT_MASK
		1904	xor bl, -1
		1905	and al, bl
		1906	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1907	call azx_writeb
3083	leency	1908
5048	Asper	1909	; disable SIE for all streams
		1910	xor al, al
		1911	mov edx, ICH6_REG_INTCTL
		1912	call azx_writeb
3083	leency	1913
5048	Asper	1914	; disable controller CIE and GIE
		1915	mov edx, ICH6_REG_INTCTL
		1916	call azx_readl
		1917	mov ebx, ICH6_INT_CTRL_EN or ICH6_INT_GLOBAL_EN
		1918	xor ebx, -1
		1919	and eax, ebx
		1920	call azx_writel
		1921	pop edx ebx eax
		1922	ret
3083	leency	1923	endp
		1924
		1925	; clear interrupts
5048	Asper	1926	proc azx_int_clear
		1927	push eax edx
3083	leency	1928
5048	Asper	1929	; clear stream status
		1930	mov al, SD_INT_MASK
		1931	mov edx, ICH6_REG_SD_STS + SDO_OFS
		1932	call azx_writeb
3083	leency	1933
5048	Asper	1934	; clear STATESTS
		1935	mov al, STATESTS_INT_MASK
		1936	mov edx, ICH6_REG_STATESTS
		1937	call azx_writeb
3083	leency	1938
5048	Asper	1939	; clear rirb status
		1940	mov al, RIRB_INT_MASK
		1941	mov edx, ICH6_REG_RIRBSTS
		1942	call azx_writeb
3083	leency	1943
5048	Asper	1944	; clear int status
		1945	mov eax, ICH6_INT_CTRL_EN or ICH6_INT_ALL_STREAM
		1946	mov edx, ICH6_REG_INTSTS
		1947	call azx_writel
		1948	pop edx eax
		1949	ret
3083	leency	1950	endp
		1951
		1952
		1953	; start a stream
5048	Asper	1954	proc azx_stream_start
		1955	push eax edx
3083	leency	1956
5048	Asper	1957	; enable SIE
		1958	mov edx, ICH6_REG_INTCTL
		1959	call azx_readl
3083	leency	1960
5048	Asper	1961	or eax, 0xC0000000 ;Asper+
		1962	or eax, SDO_INT ; Asper: output stream interrupt index
		1963	mov edx, ICH6_REG_INTCTL
		1964	call azx_writel
		1965	; set DMA start and interrupt mask
		1966	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1967	call azx_readb
3083	leency	1968
5048	Asper	1969	or al, SD_CTL_DMA_START or SD_INT_MASK
3083	leency	1970
5048	Asper	1971	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1972	call azx_writeb
3083	leency	1973
5048	Asper	1974	pop edx eax
		1975	ret
3083	leency	1976	endp
		1977
		1978	; stop DMA
5048	Asper	1979	proc azx_stream_clear
		1980	push eax ebx edx
		1981	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1982	call azx_readb
		1983	mov bl, SD_CTL_DMA_START or SD_INT_MASK
		1984	xor bl, -1
		1985	and al, bl
		1986	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1987	call azx_writeb
		1988	mov al, SD_INT_MASK
		1989	mov edx, ICH6_REG_SD_STS + SDO_OFS
		1990	call azx_writeb
		1991	pop edx ebx eax
		1992	ret
3083	leency	1993	endp
		1994
		1995	; stop a stream
5048	Asper	1996	proc azx_stream_stop
		1997	push eax ebx edx
		1998	call azx_stream_clear
		1999	; disable SIE
		2000	mov edx, ICH6_REG_INTCTL
		2001	call azx_readl
		2002	mov ebx, (SDO_INT)
		2003	xor ebx, -1
		2004	and eax, ebx
		2005	mov edx, ICH6_REG_INTCTL
		2006	call azx_writel
		2007	pop edx ebx eax
		2008	ret
3083	leency	2009	endp
		2010
		2011	;
		2012	;in: eax = full_reset
		2013	;
		2014	; initialize the chip
5048	Asper	2015	proc azx_init_chip
		2016	push eax
3083	leency	2017
5048	Asper	2018	; reset controller
		2019	mov eax, 1 ;full reset
		2020	call reset_controller
3083	leency	2021
5048	Asper	2022	; initialize interrupts
		2023	call azx_int_clear
		2024	call azx_int_enable
3083	leency	2025
5048	Asper	2026	; initialize the codec command I/O
		2027	if USE_SINGLE_MODE
		2028	else
		2029	call azx_init_cmd_io
		2030	end if
3083	leency	2031
5048	Asper	2032	; program the position buffer
		2033	mov eax, dword [ctrl.posbuf]
		2034	mov ebx, eax
		2035	invoke GetPgAddr
		2036	and ebx, 0xFFF
		2037	add eax, ebx
		2038	mov edx, ICH6_REG_DPLBASE
		2039	call azx_writel
		2040	xor eax, eax
		2041	mov edx, ICH6_REG_DPUBASE
		2042	call azx_writel
3083	leency	2043
5048	Asper	2044	pop eax
		2045	ret
3083	leency	2046	endp
		2047
		2048
		2049	; initialize the PCI registers
		2050
		2051	; update bits in a PCI register byte
5048	Asper	2052	proc update_pci_byte stdcall, reg:dword, mask:dword, val:dword
		2053	push ax bx
		2054	invoke PciRead8, [ctrl.bus], [ctrl.devfn], [reg]
		2055	mov bl, byte [mask]
		2056	mov bh, bl
		2057	xor bl, -1
		2058	and al, bl
		2059	shr bx, 8
		2060	and bl, byte [val]
		2061	or al, bl
		2062	invoke PciWrite8, [ctrl.bus], [ctrl.devfn], [reg], eax
		2063	pop bx ax
		2064	ret
3083	leency	2065	endp
		2066
		2067
5048	Asper	2068	proc azx_init_pci
		2069	; Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
		2070	; TCSEL == Traffic Class Select Register, which sets PCI express QOS
		2071	; Ensuring these bits are 0 clears playback static on some HD Audio
		2072	; codecs
		2073	push eax
		2074	stdcall update_pci_byte, ICH6_PCIREG_TCSEL, 0x07, 0
3083	leency	2075
5048	Asper	2076	mov eax, [driver_type]
		2077	cmp eax, AZX_DRIVER_ATI
		2078	jne @f
		2079	; For ATI SB450 azalia HD audio, we need to enable snoop
		2080	stdcall update_pci_byte, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07, ATI_SB450_HDAUDIO_ENABLE_SNOOP
		2081	jmp .done
		2082	@@:
		2083	cmp eax, AZX_DRIVER_NVIDIA
		2084	jne @f
		2085	; For NVIDIA HDA, enable snoop
		2086	stdcall update_pci_byte, NVIDIA_HDA_TRANSREG_ADDR, 0x0f, NVIDIA_HDA_ENABLE_COHBITS
		2087	stdcall update_pci_byte, NVIDIA_HDA_ISTRM_COH, 0x01, NVIDIA_HDA_ENABLE_COHBIT
		2088	stdcall update_pci_byte, NVIDIA_HDA_OSTRM_COH, 0x01, NVIDIA_HDA_ENABLE_COHBIT
		2089	jmp .done
		2090	@@:
		2091	cmp eax, AZX_DRIVER_SCH
		2092	je .l1
		2093	cmp eax, AZX_DRIVER_PCH
		2094	jne @f
		2095	.l1:
		2096	invoke PciRead16, [ctrl.bus], [ctrl.devfn], dword INTEL_SCH_HDA_DEVC
		2097	test ax, INTEL_SCH_HDA_DEVC_NOSNOOP
		2098	jz @f
		2099	push ebx
		2100	mov ebx, INTEL_SCH_HDA_DEVC_NOSNOOP
		2101	xor ebx, -1
		2102	and eax, ebx
		2103	pop ebx
		2104	invoke PciWrite16, [ctrl.bus], [ctrl.devfn], dword INTEL_SCH_HDA_DEVC, eax
		2105	invoke PciRead16, [ctrl.bus], [ctrl.devfn], dword INTEL_SCH_HDA_DEVC
3083	leency	2106
5048	Asper	2107	if DEBUG
		2108	push esi
		2109	mov esi, msgHDASnoopDisabled
		2110	invoke SysMsgBoardStr
		2111	mov esi, msg_OK
		2112	test ax, INTEL_SCH_HDA_DEVC_NOSNOOP
		2113	jz .snoop_ok
		2114	mov esi, msg_Fail
		2115	.snoop_ok:
		2116	invoke SysMsgBoardStr
		2117	pop esi
		2118	end if
		2119	@@:
		2120	.done:
		2121	pop eax
		2122	ret
3083	leency	2123	endp
		2124
		2125
		2126	; reset stream
5048	Asper	2127	proc azx_stream_reset
		2128	push eax ebx ecx edx
3083	leency	2129
5048	Asper	2130	call azx_stream_clear
3083	leency	2131
5048	Asper	2132	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2133	call azx_readb
		2134	or al, SD_CTL_STREAM_RESET
		2135	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2136	call azx_writeb
3083	leency	2137
5048	Asper	2138	mov eax, 3
		2139	call StallExec
3083	leency	2140
5048	Asper	2141	mov ecx, 300
		2142	.l1:
		2143	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2144	call azx_readb
		2145	test al, SD_CTL_STREAM_RESET
		2146	jnz @f
		2147	dec ecx
		2148	jnz .l1
		2149	@@:
		2150	mov bl, SD_CTL_STREAM_RESET
		2151	xor bl, -1
		2152	and al, bl
		2153	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2154	call azx_writeb
3083	leency	2155
5048	Asper	2156	mov eax, 3
		2157	call StallExec
3083	leency	2158
5048	Asper	2159	mov ecx, 300
		2160	; waiting for hardware to report that the stream is out of reset
		2161	.l2:
		2162	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2163	call azx_readb
		2164	test al, SD_CTL_STREAM_RESET
		2165	jnz @f
		2166	dec ecx
		2167	jnz .l2
		2168	@@:
		2169	; reset first position - may not be synced with hw at this time
		2170	mov edx, [ctrl.posbuf]
		2171	mov dword [edx], 0
		2172	pop edx ecx ebx eax
		2173	ret
3083	leency	2174	endp
		2175
		2176
		2177	; set up the SD for streaming
		2178	proc azx_setup_controller
5048	Asper	2179	push eax ebx ecx edx
		2180	; make sure the run bit is zero for SD
		2181	call azx_stream_clear
3083	leency	2182
5048	Asper	2183	; program the stream_tag
		2184	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2185	call azx_readl
		2186	mov ecx, SD_CTL_STREAM_TAG_MASK
		2187	xor ecx, -1
		2188	and eax, ecx
		2189	mov ecx, SDO_TAG
		2190	shl ecx, SD_CTL_STREAM_TAG_SHIFT
		2191	or eax, ecx
		2192	; Asper stream_tag = SDO_TAG
		2193	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2194	call azx_writel
3083	leency	2195
5048	Asper	2196	; program the length of samples in cyclic buffer
		2197	mov eax, 0x4000*32
		2198	mov edx, ICH6_REG_SD_CBL + SDO_OFS
		2199	call azx_writel
3083	leency	2200
5048	Asper	2201	; program the stream format
		2202	; this value needs to be the same as the one programmed
		2203	mov ax, 0x11
		2204	mov edx, ICH6_REG_SD_FORMAT + SDO_OFS
		2205	call azx_writew
3083	leency	2206
5048	Asper	2207	; program the stream LVI (last valid index) of the BDL
		2208	mov eax, 32-1 ;4-1 ;2-1
		2209	mov [ctrl.lvi_reg], eax
		2210	mov edx, ICH6_REG_SD_LVI + SDO_OFS
		2211	call azx_writew
3083	leency	2212
5048	Asper	2213	; program the BDL address
		2214	; lower BDL address
		2215	mov eax, [pcmout_bdl]
		2216	mov ebx, eax
		2217	invoke GetPgAddr
		2218	and ebx, 0xFFF
		2219	add eax, ebx
		2220	mov edx, ICH6_REG_SD_BDLPL + SDO_OFS
		2221	call azx_writel
		2222	; upper BDL address
		2223	xor eax, eax ;upper_32bit(azx_dev->bdl_addr)
		2224	mov edx, ICH6_REG_SD_BDLPU + SDO_OFS
		2225	call azx_writel
3083	leency	2226
5048	Asper	2227	; enable the position buffer
		2228	cmp [ctrl.position_fix], POS_FIX_LPIB
		2229	jz @f
		2230	mov edx, ICH6_REG_DPLBASE
		2231	call azx_readl
		2232	and eax, ICH6_DPLBASE_ENABLE
		2233	jnz @f
		2234	mov eax, dword [ctrl.posbuf]
		2235	mov ebx, eax
		2236	invoke GetPgAddr
		2237	and ebx, 0xFFF
		2238	add eax, ebx
		2239	or eax, ICH6_DPLBASE_ENABLE
		2240	mov edx, ICH6_REG_DPLBASE
		2241	call azx_writel
		2242	@@:
		2243	; set the interrupt enable bits in the descriptor control register
		2244	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2245	call azx_readl
		2246	or eax, SD_INT_MASK
		2247	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2248	call azx_writel
3083	leency	2249
5048	Asper	2250	pop edx ecx ebx eax
		2251	ret
3083	leency	2252	endp
		2253
		2254
		2255	;(...)
		2256
		2257	; Probe the given codec address
		2258	proc probe_codec, addr:dword
5048	Asper	2259	push edx
		2260	mov eax, [addr]
		2261	shl eax, 28
		2262	mov edx, (AC_NODE_ROOT shl 20) or (AC_VERB_PARAMETERS shl 8) or AC_PAR_VENDOR_ID
		2263	or eax, edx
		2264	stdcall azx_send_cmd, eax
		2265	stdcall azx_get_response
3083	leency	2266
5048	Asper	2267	cmp eax, -1
		2268	je .out
		2269	mov eax, [addr]
		2270	mov [codec.addr], eax ;Asper+
		2271	if DEBUG
		2272	push esi
		2273	mov esi, msgCodecOK
		2274	invoke SysMsgBoardStr
		2275	mov esi, msgCAd
		2276	invoke SysMsgBoardStr
		2277	stdcall fdword2str, 3
		2278	invoke SysMsgBoardStr
		2279	pop esi
		2280	end if
		2281	xor eax, eax
		2282	.out:
		2283	pop edx
		2284	ret
3083	leency	2285	endp
		2286
		2287
		2288	proc azx_bus_reset
5048	Asper	2289	call azx_stop_chip
		2290	call azx_init_chip
3083	leency	2291	endp
		2292
		2293
		2294	; Codec initialization
5048	Asper	2295	proc azx_codec_create
		2296	push ebx ecx edx
		2297	;(...)
3083	leency	2298	; First try to probe all given codec slots
		2299	; Asper: We asume for now that max slots for codecs = 4
5048	Asper	2300	xor ecx, ecx
		2301	xor edx, edx
		2302	inc edx
		2303	.next_slot:
		2304	test edx, [ctrl.codec_mask]
		2305	jz @f
		2306	stdcall probe_codec, ecx
		2307	test eax, eax
		2308	jz .init ;@f
		2309	; Some BIOSen give you wrong codec addresses that don't exist
		2310	if DEBUG
		2311	mov esi, msgCodecError
		2312	invoke SysMsgBoardStr
		2313	end if
		2314	mov ebx, edx
		2315	xor ebx, -1
		2316	and [ctrl.codec_mask], ebx
3083	leency	2317
5048	Asper	2318	; More badly, accessing to a non-existing
		2319	; codec often screws up the controller chip,
		2320	; and disturbs the further communications.
		2321	; Thus if an error occurs during probing,
		2322	; better to reset the controller chip to
		2323	; get back to the sanity state.
		2324	;call azx_bus_reset
		2325	@@:
		2326	shl edx, 1
		2327	inc ecx
		2328	;if USE_FIRST_CODEC
		2329	; cmp ecx, 1
		2330	;else
		2331	cmp ecx, 4
		2332	;end if
		2333	jl .next_slot
		2334	mov eax, -1
		2335	jmp .out
		2336	.init:
		2337	push ecx edx
		2338	stdcall snd_hda_codec_init
		2339	pop edx ecx
		2340	test eax, eax
		2341	jnz @b
		2342	.out:
		2343	pop edx ecx ebx
		2344	ret
3083	leency	2345	endp
		2346
		2347
5048	Asper	2348	proc azx_codec_configure
		2349	;(...)
		2350	call snd_hda_codec_configure
		2351	ret
3083	leency	2352	endp
		2353
		2354
5048	Asper	2355	proc azx_get_position
		2356	test [ctrl.position_fix], POS_FIX_LPIB
		2357	jz @f
		2358	; read LPIB
		2359	mov edx, ICH6_REG_SD_LPIB + SDO_OFS
		2360	call azx_readl
		2361	jmp .out
		2362	@@:
		2363	test [ctrl.position_fix], POS_FIX_VIACOMBO
		2364	jz @f
		2365	; call azx_get_via_position
		2366	; jmp .out
		2367	@@:
		2368	; use the position buffer
		2369	push edx
		2370	mov edx, dword [ctrl.posbuf]
		2371	mov eax, dword [edx]
		2372	pop edx
		2373	.out:
		2374	cmp eax, 0x4000 ; bufsize
		2375	jl @f
		2376	xor eax, eax
		2377	@@:
		2378	ret
3083	leency	2379	endp
		2380
		2381
5048	Asper	2382	proc azx_stop_chip
		2383	push eax edx
3083	leency	2384
5048	Asper	2385	; disable interrupts
		2386	call azx_int_disable
		2387	call azx_int_clear
3083	leency	2388
5048	Asper	2389	; disable CORB/RIRB
		2390	call azx_free_cmd_io
		2391
		2392	; disable position buffer
		2393	xor eax, eax
		2394	mov edx, ICH6_REG_DPLBASE
		2395	call azx_writel
		2396	mov edx, ICH6_REG_DPUBASE
		2397	call azx_writel
		2398	pop edx eax
		2399	ret
3083	leency	2400	endp
		2401
		2402
		2403	; in: eax = volume (-10000 - 0)
		2404	align 4
		2405	set_master_vol:
5048	Asper	2406	mov ecx, 3
		2407	call set_channel_volume
		2408	ret
3083	leency	2409
		2410
		2411	; out: [pvol] = volume (-10000 - 0)
		2412	align 4
		2413	proc get_master_vol stdcall, pvol:dword
5048	Asper	2414	xor ecx, ecx
		2415	call get_channel_volume
		2416	mov ebx, [pvol]
		2417	mov [ebx], eax
		2418	xor eax, eax
		2419	ret
3083	leency	2420	endp
		2421
		2422
		2423	; in: ecx = channel mask (1 - Left; 2 - Right; 3-Both)
		2424	; eax = volume (-10000 - 0)
		2425	align 4
		2426	set_channel_volume:
5048	Asper	2427	push eax ebx ecx edx
		2428	mov ebx, [volume.maxDb]
		2429	neg eax
		2430	if DEBUG ;-
		2431	push eax esi
		2432	mov esi, msgNewVolume
		2433	invoke SysMsgBoardStr
		2434	stdcall fdword2str, 2
		2435	invoke SysMsgBoardStr
3083	leency	2436
5048	Asper	2437	mov esi, msgMinVolume
		2438	invoke SysMsgBoardStr
		2439	mov eax, ebx
		2440	stdcall fdword2str, 2
		2441	invoke SysMsgBoardStr
		2442	pop esi eax
		2443	end if
		2444	test ebx, ebx
		2445	jz .err_out
3083	leency	2446
5048	Asper	2447	cmp eax, 0
		2448	jg @f
		2449	xor eax, eax
		2450	jmp .set
		2451	@@:
		2452	cmp eax, ebx
		2453	jng .set
		2454	mov eax, ebx
		2455	.set:
		2456	sub ebx, eax
		2457	mov eax, ebx
		2458	;cdq
		2459	xor edx, edx
		2460	push eax
		2461	movzx eax, [volume.step_size]
		2462	imul eax, (100/4)
		2463	mov ebx, eax
		2464	pop eax
		2465	xor edx, edx
		2466	idiv ebx
3083	leency	2467
5048	Asper	2468	mov edx, [volume.out_amp_node]
		2469	test edx, edx
		2470	jz .out
		2471	movzx ebx, [edx+HDA_GNODE.nid]
3083	leency	2472
5048	Asper	2473	test ecx, 1 ; Left channel ?
		2474	jz @f
		2475	stdcall put_volume_mute, ebx, 0, HDA_OUTPUT, 0, eax
		2476	@@:
		2477	test ecx, 2 ; Right channel ?
		2478	jz .out
		2479	stdcall put_volume_mute, ebx, 1, HDA_OUTPUT, 0, eax
		2480	.out:
		2481	pop edx ecx ebx eax
		2482	ret
		2483	.err_out:
		2484	if DEBUG ;-
		2485	push esi
		2486	mov esi, emsgNoVolCtrl
		2487	invoke SysMsgBoardStr
		2488	pop esi
		2489	end if
		2490	jmp .out
3083	leency	2491
		2492	; in: ecx = channel (1 - Left; 2 - Right)
		2493	; out: eax = volume (-10000 - 0)
		2494	align 4
		2495	get_channel_volume:
5048	Asper	2496	push ebx ecx edx
		2497	cmp ecx, 2
		2498	jg .out
		2499	dec cl
		2500	xor eax, eax
		2501	mov edx, [volume.out_amp_node]
		2502	test edx, edx
		2503	jz .out
		2504	movzx ebx, [edx+HDA_GNODE.nid]
		2505	stdcall get_volume_mute, ebx, ecx, HDA_OUTPUT, 0
		2506	and eax, 0x7F ;get gain
		2507	mov cl, [volume.step_size]
		2508	mul cl
		2509	imul eax, (-100/4)
		2510	.out:
		2511	pop edx ecx ebx
		2512	ret
3083	leency	2513
		2514
		2515	; in: ecx = delay
		2516	udelay:
3496	Asper	2517	push eax ecx edx
		2518	test ecx, ecx
		2519	jnz @f
		2520	inc ecx
5048	Asper	2521	@@:
3496	Asper	2522	mov eax, ecx
		2523	mov cx, 500
		2524	mul cl
		2525	mov ecx, edx
		2526	shl ecx, 16
		2527	or ecx, eax
5048	Asper	2528	@@:
3496	Asper	2529	xor eax, eax
		2530	cpuid
		2531	dec ecx
		2532	jz @b
		2533	pop edx ecx eax
		2534	ret
3083	leency	2535
		2536	align 4
		2537	proc StallExec
3496	Asper	2538	push ecx edx ebx eax
3083	leency	2539
3496	Asper	2540	mov ecx, CPU_FREQ
		2541	mul ecx
		2542	mov ebx, eax ;low
		2543	mov ecx, edx ;high
		2544	rdtsc
		2545	add ebx, eax
		2546	adc ecx,edx
5048	Asper	2547	@@:
3496	Asper	2548	rdtsc
		2549	sub eax, ebx
		2550	sbb edx, ecx
		2551	js @B
3083	leency	2552
3496	Asper	2553	pop eax ebx edx ecx
		2554	ret
3083	leency	2555	endp
		2556
		2557	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		2558	; MEMORY MAPPED IO (os depended) ;
		2559	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		2560
		2561	align 4
		2562	proc azx_readb
3496	Asper	2563	add edx, [ctrl.ctrl_mem_base]
		2564	mov al, [edx]
		2565	ret
3083	leency	2566	endp
		2567
		2568	align 4
		2569	proc azx_readw
3496	Asper	2570	add edx, [ctrl.ctrl_mem_base]
		2571	mov ax, [edx]
		2572	ret
3083	leency	2573	endp
		2574
		2575	align 4
		2576	proc azx_readl
3496	Asper	2577	add edx, [ctrl.ctrl_mem_base]
		2578	mov eax, [edx]
		2579	ret
3083	leency	2580	endp
		2581
		2582	align 4
		2583	proc azx_writeb
3496	Asper	2584	add edx, [ctrl.ctrl_mem_base]
		2585	mov [edx], al
		2586	ret
3083	leency	2587	endp
		2588
		2589	align 4
		2590	proc azx_writew
3496	Asper	2591	add edx, [ctrl.ctrl_mem_base]
		2592	mov [edx], ax
		2593	ret
3083	leency	2594	endp
		2595
		2596	align 4
		2597	proc azx_writel
3496	Asper	2598	add edx, [ctrl.ctrl_mem_base]
		2599	mov [edx], eax
		2600	ret
3083	leency	2601	endp
		2602
		2603	;_______
		2604
		2605
		2606	;Asper remember to add this functions:
		2607	proc snd_hda_queue_unsol_event stdcall, par1:dword, par2:dword
5048	Asper	2608	if DEBUG
3496	Asper	2609	push esi
		2610	mov esi, msgUnsolEvent
5048	Asper	2611	invoke SysMsgBoardStr
3496	Asper	2612	pop esi
5048	Asper	2613	end if
		2614	if USE_UNSOL_EV = 0
		2615	;Test. Do not make queue, process immediately!
		2616	;stdcall here snd_hda_read_pin_sense stdcall, nid:dword, trigger_sense:dword
		2617	;and then mute/unmute pin based on the results
		2618	end if
3496	Asper	2619	ret
3083	leency	2620	endp
		2621	;...
		2622
		2623
		2624	align 4
		2625	proc fdword2str stdcall, flags:dword ; bit 0 - skipLeadZeroes; bit 1 - newLine; other bits undefined
3496	Asper	2626	push eax ebx ecx
		2627	mov esi, hex_buff
		2628	mov ecx, -8
		2629	push eax
5048	Asper	2630	@@:
3496	Asper	2631	rol eax, 4
		2632	mov ebx, eax
		2633	and ebx, 0x0F
		2634	mov bl, [ebx+hexletters]
		2635	mov [8+esi+ecx], bl
		2636	inc ecx
		2637	jnz @b
		2638	pop eax
3083	leency	2639
3496	Asper	2640	mov dword [esi+8], 0
		2641	test [flags], 0x2 ; new line ?
		2642	jz .no_newline
		2643	mov dword [esi+8], 0x00000A0D
5048	Asper	2644	.no_newline:
3083	leency	2645
3496	Asper	2646	push eax
		2647	test [flags], 0x1 ; skip zero bits ?
		2648	jz .no_skipz
		2649	mov ecx, 8
5048	Asper	2650	@@:
3496	Asper	2651	test eax, 0xF0000000
		2652	jnz .skipz_done
		2653	rol eax, 4
		2654	inc esi
		2655	dec ecx
		2656	jnz @b
		2657	dec esi
5048	Asper	2658	.skipz_done:
		2659	.no_skipz:
3496	Asper	2660	pop eax
3083	leency	2661
3496	Asper	2662	pop ecx ebx eax
		2663	ret
3083	leency	2664	endp
		2665
		2666	hexletters db '0123456789ABCDEF'
		2667	hex_buff db 8 dup(0),13,10,0,0
		2668
		2669
3085	leency	2670	include "CODEC.INC"
3083	leency	2671	include "hda_generic.inc"
		2672
		2673	align 4
		2674	devices:
		2675	; Intel
5048	Asper	2676	dd (CTRL_INTEL_SCH2 shl 16)+VID_INTEL,msg_INTEL_SCH2, AZX_DRIVER_SCH
		2677	dd (CTRL_INTEL_HPT shl 16)+VID_INTEL,msg_INTEL_HPT, AZX_DRIVER_SCH
		2678	dd (CTRL_INTEL_CPT shl 16)+VID_INTEL,msg_INTEL_CPT, AZX_DRIVER_PCH
		2679	dd (CTRL_INTEL_PGB shl 16)+VID_INTEL,msg_INTEL_PGB, AZX_DRIVER_PCH
		2680	dd (CTRL_INTEL_PPT1 shl 16)+VID_INTEL,msg_INTEL_PPT1, AZX_DRIVER_PCH
		2681	dd (CTRL_INTEL_82801F shl 16)+VID_INTEL,msg_INTEL_82801F, AZX_DRIVER_ICH
		2682	dd (CTRL_INTEL_63XXESB shl 16)+VID_INTEL,msg_INTEL_63XXESB, AZX_DRIVER_ICH
		2683	dd (CTRL_INTEL_82801G shl 16)+VID_INTEL,msg_INTEL_82801G, AZX_DRIVER_ICH
		2684	dd (CTRL_INTEL_82801H shl 16)+VID_INTEL,msg_INTEL_82801H, AZX_DRIVER_ICH
		2685	dd (CTRL_INTEL_82801_UNK1 shl 16)+VID_INTEL,msg_INTEL_82801_UNK1, AZX_DRIVER_ICH
		2686	dd (CTRL_INTEL_82801I shl 16)+VID_INTEL,msg_INTEL_82801I, AZX_DRIVER_ICH
		2687	dd (CTRL_INTEL_82801_UNK2 shl 16)+VID_INTEL,msg_INTEL_82801_UNK2, AZX_DRIVER_ICH
		2688	dd (CTRL_INTEL_82801JI shl 16)+VID_INTEL,msg_INTEL_82801JI, AZX_DRIVER_ICH
		2689	dd (CTRL_INTEL_82801JD shl 16)+VID_INTEL,msg_INTEL_82801JD, AZX_DRIVER_ICH
		2690	dd (CTRL_INTEL_PCH shl 16)+VID_INTEL,msg_INTEL_PCH, AZX_DRIVER_PCH
		2691	dd (CTRL_INTEL_PCH2 shl 16)+VID_INTEL,msg_INTEL_PCH2, AZX_DRIVER_PCH
		2692	dd (CTRL_INTEL_SCH shl 16)+VID_INTEL,msg_INTEL_SCH, AZX_DRIVER_SCH
		2693	dd (CTRL_INTEL_LPT shl 16)+VID_INTEL,msg_INTEL_LPT, AZX_DRIVER_PCH
3083	leency	2694	; Nvidia
5048	Asper	2695	dd (CTRL_NVIDIA_MCP51 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP51, AZX_DRIVER_NVIDIA
		2696	dd (CTRL_NVIDIA_MCP55 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP55, AZX_DRIVER_NVIDIA
		2697	dd (CTRL_NVIDIA_MCP61_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP61, AZX_DRIVER_NVIDIA
		2698	dd (CTRL_NVIDIA_MCP61_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP61, AZX_DRIVER_NVIDIA
		2699	dd (CTRL_NVIDIA_MCP65_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP65, AZX_DRIVER_NVIDIA
		2700	dd (CTRL_NVIDIA_MCP65_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP65, AZX_DRIVER_NVIDIA
		2701	dd (CTRL_NVIDIA_MCP67_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP67, AZX_DRIVER_NVIDIA
		2702	dd (CTRL_NVIDIA_MCP67_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP67, AZX_DRIVER_NVIDIA
		2703	dd (CTRL_NVIDIA_MCP73_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP73, AZX_DRIVER_NVIDIA
		2704	dd (CTRL_NVIDIA_MCP73_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP73, AZX_DRIVER_NVIDIA
		2705	dd (CTRL_NVIDIA_MCP78_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78, AZX_DRIVER_NVIDIA
		2706	dd (CTRL_NVIDIA_MCP78_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78, AZX_DRIVER_NVIDIA
		2707	dd (CTRL_NVIDIA_MCP78_3 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78, AZX_DRIVER_NVIDIA
		2708	dd (CTRL_NVIDIA_MCP78_4 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78, AZX_DRIVER_NVIDIA
		2709	dd (CTRL_NVIDIA_MCP79_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79, AZX_DRIVER_NVIDIA
		2710	dd (CTRL_NVIDIA_MCP79_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79, AZX_DRIVER_NVIDIA
		2711	dd (CTRL_NVIDIA_MCP79_3 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79, AZX_DRIVER_NVIDIA
		2712	dd (CTRL_NVIDIA_MCP79_4 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79, AZX_DRIVER_NVIDIA
		2713	dd (CTRL_NVIDIA_0BE2 shl 16)+VID_NVIDIA,msg_NVIDIA_0BE2, AZX_DRIVER_NVIDIA
		2714	dd (CTRL_NVIDIA_0BE3 shl 16)+VID_NVIDIA,msg_NVIDIA_0BE3, AZX_DRIVER_NVIDIA
		2715	dd (CTRL_NVIDIA_0BE4 shl 16)+VID_NVIDIA,msg_NVIDIA_0BE4, AZX_DRIVER_NVIDIA
		2716	dd (CTRL_NVIDIA_GT100 shl 16)+VID_NVIDIA,msg_NVIDIA_GT100, AZX_DRIVER_NVIDIA
		2717	dd (CTRL_NVIDIA_GT106 shl 16)+VID_NVIDIA,msg_NVIDIA_GT106, AZX_DRIVER_NVIDIA
		2718	dd (CTRL_NVIDIA_GT108 shl 16)+VID_NVIDIA,msg_NVIDIA_GT108, AZX_DRIVER_NVIDIA
		2719	dd (CTRL_NVIDIA_GT104 shl 16)+VID_NVIDIA,msg_NVIDIA_GT104, AZX_DRIVER_NVIDIA
		2720	dd (CTRL_NVIDIA_GT116 shl 16)+VID_NVIDIA,msg_NVIDIA_GT116, AZX_DRIVER_NVIDIA
		2721	dd (CTRL_NVIDIA_MCP89_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89, AZX_DRIVER_NVIDIA
		2722	dd (CTRL_NVIDIA_MCP89_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89, AZX_DRIVER_NVIDIA
		2723	dd (CTRL_NVIDIA_MCP89_3 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89, AZX_DRIVER_NVIDIA
		2724	dd (CTRL_NVIDIA_MCP89_4 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89, AZX_DRIVER_NVIDIA
		2725	dd (CTRL_NVIDIA_GF119 shl 16)+VID_NVIDIA,msg_NVIDIA_GF119, AZX_DRIVER_NVIDIA
		2726	dd (CTRL_NVIDIA_GF110_1 shl 16)+VID_NVIDIA,msg_NVIDIA_GF110, AZX_DRIVER_NVIDIA
		2727	dd (CTRL_NVIDIA_GF110_2 shl 16)+VID_NVIDIA,msg_NVIDIA_GF110, AZX_DRIVER_NVIDIA
3083	leency	2728	; ATI
5048	Asper	2729	dd (CTRL_ATI_SB450 shl 16)+VID_ATI,msg_ATI_SB450, AZX_DRIVER_ATI
		2730	dd (CTRL_ATI_SB600 shl 16)+VID_ATI,msg_ATI_SB600, AZX_DRIVER_ATI
		2731	dd (CTRL_ATI_RS600 shl 16)+VID_ATI,msg_ATI_RS600, AZX_DRIVER_ATIHDMI
		2732	dd (CTRL_ATI_RS690 shl 16)+VID_ATI,msg_ATI_RS690, AZX_DRIVER_ATIHDMI
		2733	dd (CTRL_ATI_RS780 shl 16)+VID_ATI,msg_ATI_RS780, AZX_DRIVER_ATIHDMI
		2734	dd (CTRL_ATI_RS_UNK1 shl 16)+VID_ATI,msg_ATI_RS_UNK1, AZX_DRIVER_ATIHDMI
		2735	dd (CTRL_ATI_R600 shl 16)+VID_ATI,msg_ATI_R600, AZX_DRIVER_ATIHDMI
		2736	dd (CTRL_ATI_RV610 shl 16)+VID_ATI,msg_ATI_RV610, AZX_DRIVER_ATIHDMI
		2737	dd (CTRL_ATI_RV620 shl 16)+VID_ATI,msg_ATI_RV620, AZX_DRIVER_ATIHDMI
		2738	dd (CTRL_ATI_RV630 shl 16)+VID_ATI,msg_ATI_RV630, AZX_DRIVER_ATIHDMI
		2739	dd (CTRL_ATI_RV635 shl 16)+VID_ATI,msg_ATI_RV635, AZX_DRIVER_ATIHDMI
		2740	dd (CTRL_ATI_RV670 shl 16)+VID_ATI,msg_ATI_RV670, AZX_DRIVER_ATIHDMI
		2741	dd (CTRL_ATI_RV710 shl 16)+VID_ATI,msg_ATI_RV710, AZX_DRIVER_ATIHDMI
		2742	dd (CTRL_ATI_RV730 shl 16)+VID_ATI,msg_ATI_RV730, AZX_DRIVER_ATIHDMI
		2743	dd (CTRL_ATI_RV740 shl 16)+VID_ATI,msg_ATI_RV740, AZX_DRIVER_ATIHDMI
		2744	dd (CTRL_ATI_RV770 shl 16)+VID_ATI,msg_ATI_RV770, AZX_DRIVER_ATIHDMI
3083	leency	2745	; AMD
5048	Asper	2746	dd (CTRL_AMD_HUDSON shl 16)+VID_AMD,msg_AMD_HUDSON, AZX_DRIVER_GENERIC
3083	leency	2747	; VIA
5048	Asper	2748	dd (CTRL_VIA_VT82XX shl 16)+VID_VIA,msg_VIA_VT82XX, AZX_DRIVER_VIA
		2749	dd (CTRL_VIA_VT61XX shl 16)+VID_VIA,msg_VIA_VT61XX, AZX_DRIVER_GENERIC
		2750	dd (CTRL_VIA_VT71XX shl 16)+VID_VIA,msg_VIA_VT71XX, AZX_DRIVER_GENERIC
3083	leency	2751	; SiS
5048	Asper	2752	dd (CTRL_SIS_966 shl 16)+VID_SIS,msg_SIS_966, AZX_DRIVER_SIS
3083	leency	2753	; ULI
5048	Asper	2754	dd (CTRL_ULI_M5461 shl 16)+VID_ULI,msg_ULI_M5461, AZX_DRIVER_ULI
3083	leency	2755	; Teradici
5048	Asper	2756	dd (CTRL_TERA_UNK1 shl 16)+VID_ULI,msg_TERA_UNK1, AZX_DRIVER_TERA
3083	leency	2757	; Creative
5048	Asper	2758	dd (CTRL_CREATIVE_CA0110_IBG shl 16)+VID_CREATIVE,msg_CREATIVE_CA0110_IBG, AZX_DRIVER_CTX
		2759	dd (CTRL_CREATIVE_SOUND_CORE3D_1 shl 16)+VID_CREATIVE,msg_CREATIVE_SOUND_CORE3D, AZX_DRIVER_GENERIC
		2760	dd (CTRL_CREATIVE_SOUND_CORE3D_2 shl 16)+VID_CREATIVE,msg_CREATIVE_SOUND_CORE3D, AZX_DRIVER_GENERIC
3083	leency	2761	; RDC Semiconductor
5048	Asper	2762	dd (CTRL_RDC_R3010 shl 16)+VID_RDC,msg_RDC_R3010, AZX_DRIVER_GENERIC
3083	leency	2763	; VMware
5048	Asper	2764	dd (CTRL_VMWARE_UNK1 shl 16)+VID_VMWARE,msg_VMWARE_UNK1, AZX_DRIVER_GENERIC
3083	leency	2765
5048	Asper	2766	dd 0 ;terminator
3083	leency	2767
		2768
		2769	version dd (5 shl 16) or (API_VERSION and 0xFFFF)
		2770
		2771	msg_Intel db 'Intel ',0
		2772	msg_INTEL_CPT db 'Cougar Point',13,10,0
		2773	msg_INTEL_PGB db 'Patsburg',13,10,0
		2774	msg_INTEL_PPT1 db 'Panther Point',13,10,0
		2775	msg_INTEL_LPT db 'Lynx Point',13,10,0
		2776	msg_INTEL_HPT db 'Haswell',13,10,0
		2777	msg_INTEL_82801F db '82801F',13,10,0
		2778	msg_INTEL_63XXESB db '631x/632xESB',13,10,0
		2779	msg_INTEL_82801G db '82801G', 13,10,0
		2780	msg_INTEL_82801H db '82801H', 13,10,0
		2781	msg_INTEL_82801I db '82801I', 13,10,0
		2782	msg_INTEL_82801JI db '82801JI',13,10,0
		2783	msg_INTEL_82801JD db '82801JD',13,10,0
		2784	msg_INTEL_PCH db 'PCH',13,10,0
		2785	msg_INTEL_PCH2 db 'PCH2',13,10,0
		2786	msg_INTEL_SCH db 'Poulsbo',13,10,0
		2787	msg_INTEL_SCH2 db 'Oaktrail',13,10,0
		2788	msg_INTEL_82801_UNK1 db '82801_UNK1', 13,10,0
		2789	msg_INTEL_82801_UNK2 db '82801_UNK2', 13,10,0
		2790
		2791	msg_NVidia db 'NVidia ',0
		2792	msg_NVIDIA_MCP51 db 'MCP51', 13,10,0
		2793	msg_NVIDIA_MCP55 db 'MCP55', 13,10,0
		2794	msg_NVIDIA_MCP61 db 'MCP61', 13,10,0
		2795	msg_NVIDIA_MCP65 db 'MCP65', 13,10,0
		2796	msg_NVIDIA_MCP67 db 'MCP67', 13,10,0
		2797	msg_NVIDIA_MCP73 db 'MCP73', 13,10,0
		2798	msg_NVIDIA_MCP78 db 'MCP78', 13,10,0
		2799	msg_NVIDIA_MCP79 db 'MCP79', 13,10,0
		2800	msg_NVIDIA_MCP89 db 'MCP89', 13,10,0
		2801	msg_NVIDIA_0BE2 db '(0x0be2)', 13,10,0
		2802	msg_NVIDIA_0BE3 db '(0x0be3)', 13,10,0
		2803	msg_NVIDIA_0BE4 db '(0x0be4)', 13,10,0
		2804	msg_NVIDIA_GT100 db 'GT100', 13,10,0
		2805	msg_NVIDIA_GT104 db 'GT104', 13,10,0
		2806	msg_NVIDIA_GT106 db 'GT106', 13,10,0
		2807	msg_NVIDIA_GT108 db 'GT108', 13,10,0
		2808	msg_NVIDIA_GT116 db 'GT116', 13,10,0
		2809	msg_NVIDIA_GF119 db 'GF119', 13,10,0
		2810	msg_NVIDIA_GF110 db 'GF110', 13,10,0
		2811
		2812	msg_ATI db 'ATI ',0
		2813	msg_ATI_SB450 db 'SB450', 13,10,0
		2814	msg_ATI_SB600 db 'SB600', 13,10,0
		2815
		2816	msg_ATI_HDMI db 'ATI HDMI ',0
		2817	msg_ATI_RS600 db 'RS600', 13,10,0
		2818	msg_ATI_RS690 db 'RS690', 13,10,0
		2819	msg_ATI_RS780 db 'RS780', 13,10,0
		2820	msg_ATI_RS_UNK1 db 'RS_UNK1', 13,10,0
		2821	msg_ATI_R600 db 'R600', 13,10,0
		2822	msg_ATI_RV610 db 'RV610', 13,10,0
		2823	msg_ATI_RV620 db 'RV620', 13,10,0
		2824	msg_ATI_RV630 db 'RV630', 13,10,0
		2825	msg_ATI_RV635 db 'RV635', 13,10,0
		2826	msg_ATI_RV670 db 'RV670', 13,10,0
		2827	msg_ATI_RV710 db 'RV710', 13,10,0
		2828	msg_ATI_RV730 db 'RV730', 13,10,0
		2829	msg_ATI_RV740 db 'RV740', 13,10,0
		2830	msg_ATI_RV770 db 'RV770', 13,10,0
		2831
		2832	msg_AMD db 'AMD ',0
		2833	msg_AMD_HUDSON db 'Hudson', 13,10,0
		2834
		2835	msg_VIA db 'VIA ',0
		2836	msg_VIA_VT82XX db 'VT8251/8237A', 13,10,0
		2837	msg_VIA_VT61XX db 'GFX VT6122/VX11', 13,10,0
		2838	msg_VIA_VT71XX db 'GFX VT7122/VX900', 13,10,0
		2839
		2840	msg_SIS db 'SIS ',0
		2841	msg_SIS_966 db '966', 13,10,0
		2842
		2843	msg_ULI db 'ULI ',0
		2844	msg_ULI_M5461 db 'M5461', 13,10,0
		2845
		2846	msg_TERA db 'Teradici ',0
		2847	msg_TERA_UNK1 db 'UNK1', 13,10,0
		2848
		2849	msg_CREATIVE db 'Creative ',0
		2850	msg_CREATIVE_CA0110_IBG db 'CA0110-IBG',13,10,0 ;SB X-Fi Xtreme Audio
		2851	msg_CREATIVE_SOUND_CORE3D db 'Sound Core3D'
		2852
		2853	msg_RDC db 'RDC ',0
		2854	msg_RDC_R3010 db 'R3010', 13,10,0
		2855
		2856	msg_VMWARE db 'VMware ',0
		2857	msg_VMWARE_UNK1 db 'UNK1', 13,10,0
		2858
		2859	szKernel db 'KERNEL',0
		2860	sz_sound_srv db 'SOUND',0
		2861
		2862	msgInit db 'detect hardware...',13,10,0
		2863	msgFail db 'device not found',13,10,0
		2864	msgAttchIRQ db 'IRQ line not supported', 13,10,0
		2865	msgInvIRQ db 'IRQ line not assigned or invalid', 13,10,0
		2866	msgPlay db 'start play', 13,10,0
		2867	msgStop db 'stop play', 13,10,0
		2868	msgSetChannelVolume db 'Set Channel Volume', 13,10,0
		2869	msgIRQ db 'HDA IRQ', 13,10,0
		2870	msgInitCtrl db 'init controller',13,10,0
		2871	msgPrimBuff db 'create primary buffer ...',0
		2872	msgDone db 'done',13,10,0
		2873	msgRemap db 'Remap IRQ',13,10,0
		2874	msgOk db 'service installed',13,10,0
		2875	msgCold db 'cold reset',13,10,0
		2876	msgHDARFail db 'controller not ready',13,10,0
		2877	msgCFail db 'codec not ready',13,10,0
		2878	msgResetOk db 'reset complete',13,10,0
		2879	msgPciCmd db 'PCI command ',0
		2880	msgPciStat db 'PCI status ',0
		2881	msgHDALowMMIo db 'lower mmio base ',0
		2882	msgHDAUpMMIo db 'upper mmio base ',0
		2883	msgIrqMap db 'HDA irq map as ',0
		2884
		2885	;Asper [
		2886	if DEBUG
		2887	msgCodecMask db 'codec_mask = ',0
		2888	msgNoCodecsFound db 'no codecs found!',13,10,0
		2889	msgHDASnoopDisabled db 'HDA snoop disabled, enabling ... ',0
		2890	msg_OK db 'OK',13,10,0
		2891	msg_Fail db 'Failed',13,10,0
		2892	msgSpuriousResponce db 'spurious responce ',0
		2893	emsgInvalidAFGSubtree db 'Invalid AFG subtree',13,10,0
		2894	emsgConnListNotAvailable db 'connection list not available for ',0
		2895	msgUnmuteOut db 'UNMUTE OUT: NID=',0
		2896	msgUnmuteIn db 'UNMUTE IN: NID=',0
		2897	msgGetResponceTimeout db 'get_response timeout: ',0
		2898	msgVal db ' val=',0
		2899	emsgBusResetFatalComm db 'resetting BUS due to fatal communication error',13,10,0
		2900	msgCodecOK db 'codec probed OK',13,10,0
		2901	msgCodecError db 'codec probe error disabling it...',13,10,0
		2902	emsgNoAFGorMFGFound db 'no AFG or MFG node found',13,10,0
4324	Asper	2903	msgNoAFGFound db 'no AFG node found, trying another codec',13,10,0
3083	leency	2904	emsgNoMem db 'hda_codec: cannot malloc',13,10,0
		2905	msgConnect db 'CONNECT: NID=',0
		2906	msgIdx db ' IDX=',0
		2907	msgSkipDigitalOutNode db 'Skip Digital OUT node ',0
		2908	msgAudOutFound db 'AUD_OUT found ',0
		2909	emsgNoParserAvailable db 'No codec parser is available',13,10,0
		2910	emsgNoProperOutputPathFound db 'hda_generic: no proper output path found',13,10,0
		2911	emsgInvConnList db 'hda_codec: invalid CONNECT_LIST verb ',0
		2912	emsgInvDepRangeVal db 'hda_codec: invalid dep_range_val ',0
		2913	emsgTooManyConns db 'Too many connections',13,10,0
		2914	emsgNoVolCtrl db 'No volume control',13,10,0
		2915	msgHDACodecSetupStream db 'hda_codec_setup_stream: NID=',0
		2916	msgStream db 'stream=',0
		2917	msgChannel db 'channel=',0
		2918	msgFormat db 'format=',0
		2919
		2920	msgPollingCodecOnce db 'polling the codec once',13,10,0 ;Asper~
		2921	msgSwitchToPollMode db 'switching to polling mode',13,10,0 ;Asper~
		2922
		2923	msgUnsolEvent db 'Unsolicited event!',13,10,0
		2924	strSemicolon db ':',0
		2925	msgSETUP_FG_NODES db 'Setup FG nodes = start_nid:total_nodes = ',0
		2926	msgFG_TYPE db 'FG type = ',0
		2927	msgPinCfgs db 'Pin configurations:',13,10,0
		2928	msgWCaps db 'Widget capabilities:',13,10,0
		2929	msgCAd db 'CAd = ',0
		2930	msgTCSEL db 'PCI TCSEL ',0
		2931	msgTV db 'HDA test version ',TEST_VERSION_NUMBER,13,10,0
		2932	msgGCap db 'GCAP = ',0
		2933	end if
		2934
		2935	if USE_SINGLE_MODE
		2936	msgSingleMode db 'Single mode !',13,10,0
		2937	msgIRS db 'IRS=',0
		2938	msgSendCmdTimeout db 'send_cmd timeout: IRS=',0
		2939	else
		2940	msgNormalMode db 'Normal mode !',13,10,0
		2941	end if
		2942
		2943	if DEBUG
		2944	msgYAHOO2 db 'YAHOO2: ',0
5048	Asper	2945	msgMinVolume db 'MinVolume: ',0
3083	leency	2946	msgNewVolume db 'NewVolume: ',0
		2947
		2948	msgVerbQuery db 'Q: ',0
		2949	msgVerbAnswer db 'A: ',0
		2950	msgPin_Nid db 'Pin Nid = ',0
		2951	msgPin_Ctl db 'Pin Control = ',0
		2952	msgPin_Caps db 'Pin Capabilities = ',0
		2953	msgDef_Cfg db 'Pin def_cfg = ',0
		2954	msgAmp_Out_Caps db 'Pin Amp Out caps = ',0
		2955	msgAmpVal db 'Amp val = ',0
		2956	msgEnableEAPD db 'Enable EAPD: NID=',0
		2957	msgBeeperNid db 'Beeper found: NID=',0
		2958	msgBeeperValue db 'Beeper initial value: ',0
		2959	msgBeepNow db 'Beep!',13,10,0
5048	Asper	2960
		2961	msgNodeSeq db 'Sequence of codec nodes:',13,10,0
		2962	msgNID db 'NID: 0x',0
3083	leency	2963	end if
		2964
		2965	;] Asper
		2966
3496	Asper	2967	aspinlock dd SPINLOCK_FREE
3083	leency	2968
		2969	codec CODEC
		2970	ctrl AC_CNTRL
		2971
		2972	;Asper: BDL must be aligned to 128 according to HDA specification.
		2973	pcmout_bdl rd 1
		2974	buff_list rd 32
		2975
		2976	driver_type rd 1

Subversion Repositories Kolibri OS

(root)/drivers/audio/intel_hda/intel_hda.asm – Rev 5048