WebSVN – Kolibri OS – Blame – /drivers/audio/intel_hda/intel_hda.asm

Rev	Author	Line No.	Line
3083	leency	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		2	;; ;;
		3	;; Copyright (C) KolibriOS team 2004-2012. All rights reserved. ;;
		4	;; Distributed under terms of the GNU General Public License ;;
		5	;; ;;
		6	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		7
		8	format MS COFF
		9
		10	DEBUG equ 1
3498	mario79	11	FDEBUG equ 0
3083	leency	12	DEBUG_IRQ equ 0
		13
		14	USE_SINGLE_MODE equ 0 ; 1 = Single mode; 0 = Normal mode.
		15
3496	Asper	16	TEST_VERSION_NUMBER equ '018d'
3083	leency	17
		18	;Asper+ [
		19	SDO_TAG equ 1 ;Asper: Output stream tag id (any number except 0)
		20	SDO_IDX equ 4 ;Asper: Output stream index
		21	;According to "Intel� I/O Controller Hub 6 (ICH6) High Definition Audio / AC �97 Programmer�s Reference Manual (PRM) May 2005 Document"
		22	;and "Intel� I/O Controller Hub 6 (ICH6) Family Datasheet" SDO0=4,
		23	;but according to "High Definition Audio Specification Revision 1.0a June 17, 2010" SDO0 depends on the number of SDIs.
		24
		25	SDO_INT equ 1 shl SDO_IDX ;Asper: Output stream interrupt (must be power of 2)
		26	SDO_OFS equ 0x80+(SDO_IDX*0x20) ;Asper: Output stream offset
		27	;Asper+ ]
		28
3085	leency	29	include 'PROC32.INC'
		30	include 'IMPORTS.INC'
		31	include 'CODEC_H.INC'
3083	leency	32
		33
		34	CURRENT_API equ 0x0100 ;1.00
		35	COMPATIBLE_API equ 0x0101 ;1.01
		36	API_VERSION equ (COMPATIBLE_API shl 16) or CURRENT_API
		37
		38	IRQ_REMAP equ 0
		39	IRQ_LINE equ 0
		40
		41	CPU_FREQ equ 2600d
		42
		43	; Vendors
		44	VID_INTEL equ 0x8086
		45	VID_NVIDIA equ 0x10DE
		46	VID_ATI equ 0x1002
		47	VID_AMD equ 0x1022
3170	hidnplayr	48	VID_VIA equ 0x1106
3083	leency	49	VID_SIS equ 0x1039
		50	VID_ULI equ 0x10B9
		51	VID_CREATIVE equ 0x1102
		52	VID_TERA equ 0x6549
		53	VID_RDC equ 0x17F3
		54	VID_VMWARE equ 0x15AD
		55
		56	; Devices
		57	; Intel
		58	CTRL_INTEL_SCH2 equ 0x080a
		59	CTRL_INTEL_HPT equ 0x0c0c
		60	CTRL_INTEL_CPT equ 0x1c20
		61	CTRL_INTEL_PGB equ 0x1d20
		62	CTRL_INTEL_PPT1 equ 0x1e20
		63	CTRL_INTEL_82801F equ 0x2668
		64	CTRL_INTEL_63XXESB equ 0x269a
		65	CTRL_INTEL_82801G equ 0x27d8
		66	CTRL_INTEL_82801H equ 0x284b
		67	CTRL_INTEL_82801_UNK1 equ 0x2911
		68	CTRL_INTEL_82801I equ 0x293e
		69	CTRL_INTEL_82801_UNK2 equ 0x293f
		70	CTRL_INTEL_82801JI equ 0x3a3e
		71	CTRL_INTEL_82801JD equ 0x3a6e
		72	CTRL_INTEL_PCH equ 0x3b56
		73	CTRL_INTEL_PCH2 equ 0x3b57
		74	CTRL_INTEL_SCH equ 0x811b
		75	CTRL_INTEL_LPT equ 0x8c20
		76	; Nvidia
		77	CTRL_NVIDIA_MCP51 equ 0x026c
		78	CTRL_NVIDIA_MCP55 equ 0x0371
		79	CTRL_NVIDIA_MCP61_1 equ 0x03e4
		80	CTRL_NVIDIA_MCP61_2 equ 0x03f0
		81	CTRL_NVIDIA_MCP65_1 equ 0x044a
		82	CTRL_NVIDIA_MCP65_2 equ 0x044b
		83	CTRL_NVIDIA_MCP67_1 equ 0x055c
		84	CTRL_NVIDIA_MCP67_2 equ 0x055d
		85	CTRL_NVIDIA_MCP78_1 equ 0x0774
		86	CTRL_NVIDIA_MCP78_2 equ 0x0775
		87	CTRL_NVIDIA_MCP78_3 equ 0x0776
		88	CTRL_NVIDIA_MCP78_4 equ 0x0777
		89	CTRL_NVIDIA_MCP73_1 equ 0x07fc
		90	CTRL_NVIDIA_MCP73_2 equ 0x07fd
		91	CTRL_NVIDIA_MCP79_1 equ 0x0ac0
		92	CTRL_NVIDIA_MCP79_2 equ 0x0ac1
		93	CTRL_NVIDIA_MCP79_3 equ 0x0ac2
		94	CTRL_NVIDIA_MCP79_4 equ 0x0ac3
		95	CTRL_NVIDIA_0BE2 equ 0x0be2
		96	CTRL_NVIDIA_0BE3 equ 0x0be3
		97	CTRL_NVIDIA_0BE4 equ 0x0be4
		98	CTRL_NVIDIA_GT100 equ 0x0be5
		99	CTRL_NVIDIA_GT106 equ 0x0be9
		100	CTRL_NVIDIA_GT108 equ 0x0bea
		101	CTRL_NVIDIA_GT104 equ 0x0beb
		102	CTRL_NVIDIA_GT116 equ 0x0bee
		103	CTRL_NVIDIA_MCP89_1 equ 0x0d94
		104	CTRL_NVIDIA_MCP89_2 equ 0x0d95
		105	CTRL_NVIDIA_MCP89_3 equ 0x0d96
		106	CTRL_NVIDIA_MCP89_4 equ 0x0d97
		107	CTRL_NVIDIA_GF119 equ 0x0e08
		108	CTRL_NVIDIA_GF110_1 equ 0x0e09
		109	CTRL_NVIDIA_GF110_2 equ 0x0e0c
		110	; ATI
		111	CTRL_ATI_SB450 equ 0x437b
		112	CTRL_ATI_SB600 equ 0x4383
		113	; ATI HDMI
		114	CTRL_ATI_RS600 equ 0x793b
		115	CTRL_ATI_RS690 equ 0x7919
		116	CTRL_ATI_RS780 equ 0x960f
		117	CTRL_ATI_RS_UNK1 equ 0x970f
		118	CTRL_ATI_R600 equ 0xaa00
		119	CTRL_ATI_RV630 equ 0xaa08
		120	CTRL_ATI_RV610 equ 0xaa10
		121	CTRL_ATI_RV670 equ 0xaa18
		122	CTRL_ATI_RV635 equ 0xaa20
		123	CTRL_ATI_RV620 equ 0xaa28
		124	CTRL_ATI_RV770 equ 0xaa30
		125	CTRL_ATI_RV730 equ 0xaa38
		126	CTRL_ATI_RV710 equ 0xaa40
		127	CTRL_ATI_RV740 equ 0xaa48
		128	; AMD
		129	CTRL_AMD_HUDSON equ 0x780d
		130	; VIA
		131	CTRL_VIA_VT82XX equ 0x3288
		132	CTRL_VIA_VT61XX equ 0x9140
		133	CTRL_VIA_VT71XX equ 0x9170
		134	; SiS
		135	CTRL_SIS_966 equ 0x7502
		136	; ULI
		137	CTRL_ULI_M5461 equ 0x5461
		138	; Creative
		139	CTRL_CREATIVE_CA0110_IBG equ 0x0009
		140	CTRL_CREATIVE_SOUND_CORE3D_1 equ 0x0010
		141	CTRL_CREATIVE_SOUND_CORE3D_2 equ 0x0012
		142	; Teradici
		143	CTRL_TERA_UNK1 equ 0x1200
		144	; RDC Semiconductor
		145	CTRL_RDC_R3010 equ 0x3010
		146	;VMware
		147	CTRL_VMWARE_UNK1 equ 0x1977
		148
		149
		150	; driver types
		151	AZX_DRIVER_ICH equ 0
		152	AZX_DRIVER_PCH equ 1
		153	AZX_DRIVER_SCH equ 2
		154	AZX_DRIVER_ATI equ 3
		155	AZX_DRIVER_ATIHDMI equ 4
		156	AZX_DRIVER_VIA equ 5
		157	AZX_DRIVER_SIS equ 6
		158	AZX_DRIVER_ULI equ 7
		159	AZX_DRIVER_NVIDIA equ 8
		160	AZX_DRIVER_TERA equ 9
		161	AZX_DRIVER_CTX equ 10
		162	AZX_DRIVER_GENERIC equ 11
		163	AZX_NUM_DRIVERS equ 12
		164
		165
		166	; registers
		167
		168	ICH6_REG_GCAP equ 0x00
		169	ICH6_REG_VMIN equ 0x02
		170	ICH6_REG_VMAJ equ 0x03
		171	ICH6_REG_OUTPAY equ 0x04
		172	ICH6_REG_INPAY equ 0x06
		173	ICH6_REG_GCTL equ 0x08
		174	ICH6_GCTL_RESET equ (1 shl 0) ; controller reset
		175	ICH6_GCTL_FCNTRL equ (1 shl 1) ; flush control
		176	ICH6_GCTL_UNSOL equ (1 shl 8) ; accept unsol. response enable
		177	ICH6_REG_WAKEEN equ 0x0c
		178	ICH6_REG_STATESTS equ 0x0e
		179	ICH6_REG_GSTS equ 0x10
		180	ICH6_GSTS_FSTS equ (1 shl 1) ; flush status
		181	ICH6_REG_INTCTL equ 0x20
		182	ICH6_REG_INTSTS equ 0x24
		183	ICH6_REG_WALLCLK equ 0x30 ; 24Mhz source
		184	ICH6_REG_OLD_SSYNC equ 0x34 ; SSYNC for old ICH
		185	ICH6_REG_SSYNC equ 0x38
		186	ICH6_REG_CORBLBASE equ 0x40
		187	ICH6_REG_CORBUBASE equ 0x44
		188	ICH6_REG_CORBWP equ 0x48
		189	ICH6_REG_CORBRP equ 0x4A
		190	ICH6_CORBRP_RST equ (1 shl 15) ; read pointer reset
		191	ICH6_REG_CORBCTL equ 0x4c
		192	ICH6_CORBCTL_RUN equ (1 shl 1) ; enable DMA
		193	ICH6_CORBCTL_CMEIE equ (1 shl 0) ; enable memory error irq
		194	ICH6_REG_CORBSTS equ 0x4d
		195	ICH6_CORBSTS_CMEI equ (1 shl 0) ; memory error indication
		196	ICH6_REG_CORBSIZE equ 0x4e
		197
		198	ICH6_REG_RIRBLBASE equ 0x50
		199	ICH6_REG_RIRBUBASE equ 0x54
		200	ICH6_REG_RIRBWP equ 0x58
		201	ICH6_RIRBWP_RST equ (1 shl 15) ; write pointer reset
		202	ICH6_REG_RINTCNT equ 0x5a
		203	ICH6_REG_RIRBCTL equ 0x5c
		204	ICH6_RBCTL_IRQ_EN equ (1 shl 0) ; enable IRQ
		205	ICH6_RBCTL_DMA_EN equ (1 shl 1) ; enable DMA
		206	ICH6_RBCTL_OVERRUN_EN equ (1 shl 2) ; enable overrun irq
		207	ICH6_REG_RIRBSTS equ 0x5d
		208	ICH6_RBSTS_IRQ equ (1 shl 0) ; response irq
		209	ICH6_RBSTS_OVERRUN equ (1 shl 2) ; overrun irq
		210	ICH6_REG_RIRBSIZE equ 0x5e
		211
		212	ICH6_REG_IC equ 0x60
		213	ICH6_REG_IR equ 0x64
		214	ICH6_REG_IRS equ 0x68
		215	ICH6_IRS_VALID equ 2
		216	ICH6_IRS_BUSY equ 1
		217
		218	ICH6_REG_DPLBASE equ 0x70
		219	ICH6_REG_DPUBASE equ 0x74
		220	ICH6_DPLBASE_ENABLE equ 1 ; Enable position buffer
		221
		222	; SD offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */
		223	SDI0_SD_OFFSET equ 0x80
		224	SDI1_SD_OFFSET equ 0xA0
		225	SDI2_SD_OFFSET equ 0xC0
		226	SDI3_SD_OFFSET equ 0xE0
		227	SDO0_SD_OFFSET equ 0x100
		228	SDO1_SD_OFFSET equ 0x120
		229	SDO2_SD_OFFSET equ 0X140
		230	SDO3_SD_OFFSET equ 0x160
		231
		232	; stream register offsets from stream base
		233	ICH6_REG_SD_CTL equ 0x00
		234	ICH6_REG_SD_STS equ 0x03
		235	ICH6_REG_SD_LPIB equ 0x04
		236	ICH6_REG_SD_CBL equ 0x08
		237	ICH6_REG_SD_LVI equ 0x0c
		238	ICH6_REG_SD_FIFOW equ 0x0e
		239	ICH6_REG_SD_FIFOSIZE equ 0x10
		240	ICH6_REG_SD_FORMAT equ 0x12
		241	ICH6_REG_SD_BDLPL equ 0x18
		242	ICH6_REG_SD_BDLPU equ 0x1c
		243
		244	; PCI space
		245	ICH6_PCIREG_TCSEL equ 0x44
		246
		247	; other constants
		248	ICH6_RIRB_EX_UNSOL_EV equ (1 shl 4)
		249
		250	; max number of SDs
		251	MAX_ICH6_DEV equ 8
		252	; max number of fragments - we may use more if allocating more pages for BDL
		253	AZX_MAX_FRAG equ (4096 / (MAX_ICH6_DEV * 16))
		254	; max buffer size - no h/w limit, you can increase as you like
		255	AZX_MAX_BUF_SIZE equ (102410241024)
		256	; max number of PCM devices per card
		257	AZX_MAX_PCMS equ 8
		258
		259	; RIRB int mask: overrun[2], response[0]
		260	RIRB_INT_RESPONSE equ 0x01
		261	RIRB_INT_OVERRUN equ 0x04
		262	RIRB_INT_MASK equ 0x05
		263
		264	; STATESTS int mask: SD2,SD1,SD0
		265	STATESTS_INT_MASK equ 0x07
		266	AZX_MAX_CODECS equ 4
		267
		268	; SD_CTL bits
		269	SD_CTL_STREAM_RESET equ 0x01 ; stream reset bit
		270	SD_CTL_DMA_START equ 0x02 ; stream DMA start bit
		271	SD_CTL_STREAM_TAG_MASK equ (0xf shl 20)
		272	SD_CTL_STREAM_TAG_SHIFT equ 20
		273
		274	; SD_CTL and SD_STS
		275	SD_INT_DESC_ERR equ 0x10 ; descriptor error interrupt
		276	SD_INT_FIFO_ERR equ 0x08 ; FIFO error interrupt
		277	SD_INT_COMPLETE equ 0x04 ; completion interrupt
		278	SD_INT_MASK equ (SD_INT_DESC_ERR or SD_INT_FIFO_ERR or SD_INT_COMPLETE)
		279
		280	; SD_STS
		281	SD_STS_FIFO_READY equ 0x20 ; FIFO ready
		282
		283	; INTCTL and INTSTS
		284	ICH6_INT_ALL_STREAM equ 0xff ; all stream interrupts
		285	ICH6_INT_CTRL_EN equ 0x40000000 ; controller interrupt enable bit
		286	ICH6_INT_GLOBAL_EN equ 0x80000000 ; global interrupt enable bit
		287
		288	; GCTL reset bit
		289	ICH6_GCTL_RESET equ 1
		290
		291	; CORB/RIRB control, read/write pointer
		292	ICH6_RBCTL_DMA_EN equ 0x02 ; enable DMA
		293	ICH6_RBCTL_IRQ_EN equ 0x01 ; enable IRQ
		294	ICH6_RBRWP_CLR equ 0x8000 ; read/write pointer clear
		295	; below are so far hardcoded - should read registers in future
		296	ICH6_MAX_CORB_ENTRIES equ 256
		297	ICH6_MAX_RIRB_ENTRIES equ 256
		298
		299	; position fix mode
		300	POS_FIX_AUTO equ 0
		301	POS_FIX_LPIB equ 1
		302	POS_FIX_POSBUF equ 2
		303	POS_FIX_VIACOMBO equ 4
		304	POS_FIX_COMBO equ 8
		305
		306	; Defines for ATI HD Audio support in SB450 south bridge
		307	ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR equ 0x42
		308	ATI_SB450_HDAUDIO_ENABLE_SNOOP equ 0x02
		309
		310	; Defines for Nvidia HDA support
		311	NVIDIA_HDA_TRANSREG_ADDR equ 0x4e
		312	NVIDIA_HDA_ENABLE_COHBITS equ 0x0f
		313	NVIDIA_HDA_ISTRM_COH equ 0x4d
		314	NVIDIA_HDA_OSTRM_COH equ 0x4c
		315	NVIDIA_HDA_ENABLE_COHBIT equ 0x01
		316
		317	; Defines for Intel SCH HDA snoop control
		318	INTEL_SCH_HDA_DEVC equ 0x78
		319	INTEL_SCH_HDA_DEVC_NOSNOOP equ (0x1 shl 11)
		320
		321	; Define IN stream 0 FIFO size offset in VIA controller
		322	VIA_IN_STREAM0_FIFO_SIZE_OFFSET equ 0x90
		323	; Define VIA HD Audio Device ID
		324	VIA_HDAC_DEVICE_ID equ 0x3288
		325
		326	; HD Audio class code
		327	PCI_CLASS_MULTIMEDIA_HD_AUDIO equ 0x0403
		328
		329
		330	SRV_GETVERSION equ 0
		331	DEV_PLAY equ 1
		332	DEV_STOP equ 2
		333	DEV_CALLBACK equ 3
		334	DEV_SET_BUFF equ 4
		335	DEV_NOTIFY equ 5
		336	DEV_SET_MASTERVOL equ 6
		337	DEV_GET_MASTERVOL equ 7
		338	DEV_GET_INFO equ 8
		339	DEV_GET_POS equ 9
		340	DEV_SET_CHANNEL_VOLUME equ 10
		341	DEV_GET_CHANNEL_VOLUME equ 11
		342	;Asper: Non standard system service. For the tests only! [
		343	DEV_EXEC_CODEC_CMD equ 100
		344	;Asper: Non standard system service. For the tests only! ]
		345
		346	struc AC_CNTRL ;AC controller base class
		347	{ .bus dd ?
		348	.devfn dd ?
		349
		350	.vendor dw ?
		351	.dev_id dw ?
		352	.pci_cmd dd ?
		353	.pci_stat dd ?
		354
		355	.ctrl_io_base dd ?
		356	.ctrl_mem_base dd ?
		357	.cfg_reg dd ?
		358	.int_line dd ?
		359
		360	.vendor_ids dd ? ;vendor id string
		361	.ctrl_ids dd ? ;hub id string
		362
		363	.buffer dd ?
		364
		365	.notify_pos dd ?
		366	.notify_task dd ?
		367
		368	.lvi_reg dd ?
		369	.civ_val dd 1
		370	.user_callback dd ?
		371
		372	.ctrl_read8 dd ?
		373	.ctrl_read16 dd ?
		374	.ctrl_read32 dd ?
		375
		376	.ctrl_write8 dd ?
		377	.ctrl_write16 dd ?
		378	.ctrl_write32 dd ?
		379
		380	;Asper+ [
		381	.codec_mask dd ?
		382	.rb dd ?
		383	.rirb_rp dw 0
		384	.rirb_wp dw 0
		385	.corb_rp dw 0
		386	.corb_wp dw 0
		387	.rirb_cmd dd 0
		388	.rirb_res dd 0
		389	.rirb_error dd 0
		390	.response_reset dd 0
		391	.polling_mode db 0
		392	.poll_count db 0
		393	.posbuf dd ?
		394	.start_wallclk dd ? ; start + minimum wallclk
		395	.period_wallclk dd ? ; wallclk for period
		396	.position_fix db ?
		397	;Asper+ ]
		398	}
		399
		400	struc CODEC ;Audio Chip base class
		401	{
		402	;Asper+ [
		403	.addr dd ? ; codec slot index (codec address)
		404	.afg dd ? ; AFG node id
		405	.mfg dd ? ; MFG node id
		406
		407	.function_id dd ?
		408	.subsystem_id dd ?
		409	.revision_id dd ?
		410	.chip_id dw ?
		411	.vendor_id dw ?
		412
		413	; widget capabilities cache
		414	.num_nodes dw ?
		415	.start_nid dw ?
		416	.wcaps dd ?
		417
		418	.init_pins dd ? ; initial (BIOS) pin configurations
		419	.num_pins dd ? ;Asper + : word is enough, but for align...
		420	.beeper_nid dw ?
		421	.pad dw ?
		422	;Asper+ ]
		423
		424	.ac_vendor_ids dd ? ;ac vendor id string
		425	.chip_ids dd ? ;chip model string
		426	}
		427
		428	struc CTRL_INFO
		429	{ .pci_cmd dd ?
		430	.irq dd ?
		431	.glob_cntrl dd ?
		432	.glob_sta dd ?
		433	.codec_io_base dd ?
		434	.ctrl_io_base dd ?
		435	.codec_mem_base dd ?
		436	.ctrl_mem_base dd ?
		437	.codec_id dd ?
		438	}
		439
		440	struc IOCTL
		441	{ .handle dd ?
		442	.io_code dd ?
		443	.input dd ?
		444	.inp_size dd ?
		445	.output dd ?
		446	.out_size dd ?
		447	}
		448
		449	virtual at 0
		450	IOCTL IOCTL
		451	end virtual
		452
		453	EVENT_NOTIFY equ 0x00000200
		454
3496	Asper	455	; Macroses by CleverMouse
		456	; The following macro assume that we are on uniprocessor machine.
		457	; Serious work is needed for multiprocessor machines.
		458	macro spin_lock_irqsave spinlock
		459	{
		460	pushf
		461	cli
		462	}
		463	macro spin_unlock_irqrestore spinlock
		464	{
		465	popf
		466	}
		467	macro spin_lock_irq spinlock
		468	{
		469	cli
		470	}
		471	macro spin_unlock_irq spinlock
		472	{
		473	sti
		474	}
		475
		476	SPINLOCK_BUSY = 1
		477	SPINLOCK_FREE = 0
		478
		479	macro spin_lock
		480	{
		481	push eax ebx
		482	mov eax, aspinlock
		483	mov ebx, SPINLOCK_BUSY
		484	@@:
		485	lock xchg [eax], ebx
		486	cmp ebx, SPINLOCK_FREE
		487	jnz @b
		488	pop ebx eax
		489	}
		490
		491	macro spin_unlock
		492	{
		493	push eax ebx
		494	mov eax, aspinlock
		495	mov eax, aspinlock
		496	mov ebx, SPINLOCK_FREE
		497	lock xchg [eax], ebx
		498	pop ebx eax
		499	}
		500
3083	leency	501	public START
		502	public service_proc
		503	public version
		504
		505	section '.flat' code readable align 16
		506
		507	proc START stdcall, state:dword
		508
		509	cmp [state], 1
		510	jne .stop
		511
		512	if DEBUG
		513	mov esi, msgTV
		514	call SysMsgBoardStr
		515
		516	mov esi, msgInit
		517	call SysMsgBoardStr
		518	end if
		519
		520	call detect_controller
		521	test eax, eax
		522	jz .fail
		523
		524	mov esi,[ctrl.vendor_ids]
		525	call SysMsgBoardStr
		526	mov esi, [ctrl.ctrl_ids]
		527	call SysMsgBoardStr
		528
		529	call init_controller
		530	test eax, eax
		531	jz .fail
		532
		533	;Asper This part is from "azx_create" proc. [
		534	;(...)
		535	mov [ctrl.position_fix], POS_FIX_LPIB
		536	cmp [driver_type], AZX_DRIVER_VIA
		537	je .set_via_patch
		538	cmp [driver_type], AZX_DRIVER_ATI
		539	jne .no_via_patch
		540	.set_via_patch:
		541	or [ctrl.position_fix], POS_FIX_VIACOMBO
		542	.no_via_patch:
		543	; codec detection
		544	mov eax, [ctrl.codec_mask]
		545	test eax, eax
		546	jnz @f
		547	if DEBUG
		548	mov esi, msgNoCodecsFound
		549	jmp .fail_msg
		550	else
		551	jmp .fail
		552	end if
		553	@@:
		554	;Asper ]
		555
		556	mov esi, msgPrimBuff
		557	call SysMsgBoardStr
		558	call create_primary_buff
		559	mov esi, msgDone
		560	call SysMsgBoardStr
		561
		562	if IRQ_REMAP
		563	pushf
		564	cli
		565
		566	mov ebx, [ctrl.int_line]
		567	in al, 0xA1
		568	mov ah, al
		569	in al, 0x21
		570	test ebx, ebx
		571	jz .skip
		572	bts ax, bx ;mask old line
		573	.skip
		574	bts ax, IRQ_LINE ;mask new ine
		575	out 0x21, al
		576	mov al, ah
		577	out 0xA1, al
		578	;remap IRQ
		579	stdcall PciWrite8, 0, 0xF8, 0x61, IRQ_LINE
		580
		581	mov dx, 0x4d0 ;8259 ELCR1
		582	in al, dx
		583	bts ax, IRQ_LINE
		584	out dx, al ;set level-triggered mode
		585	mov [ctrl.int_line], IRQ_LINE
		586	popf
		587	mov esi, msgRemap
		588	call SysMsgBoardStr
		589	end if
		590
		591	mov ebx, [ctrl.int_line]
		592	stdcall AttachIntHandler, ebx, hda_irq, dword 0
		593
		594	;Asper This part is from "azx_probe" proc. [
		595	call azx_codec_create
		596	cmp eax, 0
		597	jl .fail
		598
		599	call azx_codec_configure
		600	cmp eax, 0
		601	jl .fail
		602	;] Asper
		603
		604	; create PCM streams
		605	;Asper+ [
		606	mov eax, [spec.dac_node]
		607	if DEBUG
		608	push eax esi
		609	mov esi, msgVal
		610	call SysMsgBoardStr
		611	stdcall fdword2str, 3
		612	call SysMsgBoardStr
		613	pop esi eax
		614	end if
		615
		616	test eax, eax
		617	jz .fail
		618	mov ebx, [spec.dac_node+4]
		619	if DEBUG
		620	push eax esi
		621	mov esi, msgVal
		622	call SysMsgBoardStr
		623	mov eax, [spec.dac_node+4]
		624	stdcall fdword2str, 3
		625	call SysMsgBoardStr
		626	pop esi eax
		627	end if
		628
		629	test ebx, ebx
		630	jz @f
		631	cmp eax, ebx
		632	je @f
		633	stdcall hda_codec_setup_stream, ebx, SDO_TAG, 0, 0x11 ; Left & Right channels (Front panel)
		634	@@:
		635	stdcall hda_codec_setup_stream, eax, SDO_TAG, 0, 0x11 ; Left & Right channels (Back panel)
		636	;Asper+ ]
		637
		638	if USE_SINGLE_MODE
		639	mov esi, msgSingleMode
		640	call SysMsgBoardStr
		641	else
		642	mov esi, msgNormalMode
		643	call SysMsgBoardStr
		644	end if
		645
		646
		647	.reg:
		648	stdcall RegService, sz_sound_srv, service_proc
		649	ret
		650	.fail:
		651	mov esi, msgFail
		652	.fail_msg:
		653	call SysMsgBoardStr
		654	xor eax, eax
		655	ret
		656	.stop:
		657	call stop
		658	xor eax, eax
		659	ret
		660	endp
		661
		662	handle equ IOCTL.handle
		663	io_code equ IOCTL.io_code
		664	input equ IOCTL.input
		665	inp_size equ IOCTL.inp_size
		666	output equ IOCTL.output
		667	out_size equ IOCTL.out_size
		668
		669	align 4
		670	proc service_proc stdcall, ioctl:dword
		671	mov edi, [ioctl]
		672	mov eax, [edi+io_code]
		673
		674	cmp eax, SRV_GETVERSION
		675	jne @F
		676
		677	mov eax, [edi+output]
		678	cmp [edi+out_size], 4
		679	jne .fail
		680
		681	mov [eax], dword API_VERSION
		682	xor eax, eax
		683	ret
		684	@@:
		685	cmp eax, DEV_PLAY
		686	jne @F
		687	if DEBUG
		688	mov esi, msgPlay
		689	call SysMsgBoardStr
		690	end if
3496	Asper	691	call play
		692	xor eax, eax
3083	leency	693	ret
		694	@@:
		695	cmp eax, DEV_STOP
		696	jne @F
		697	if DEBUG
		698	mov esi, msgStop
		699	call SysMsgBoardStr
		700	end if
3496	Asper	701	call stop
		702	xor eax, eax
3083	leency	703	ret
		704	@@:
3496	Asper	705	cmp eax, DEV_CALLBACK
		706	jne @f
		707	mov ebx, [edi+input]
		708	stdcall set_callback, [ebx]
		709	xor eax, eax
3083	leency	710	ret
		711	@@:
3496	Asper	712	cmp eax, DEV_SET_MASTERVOL
		713	jne @f
		714	mov eax, [edi+input]
		715	mov eax, [eax]
		716	call set_master_vol
		717	xor eax, eax
3083	leency	718	ret
		719	@@:
3496	Asper	720	cmp eax, DEV_GET_MASTERVOL
		721	jne @f
		722	mov ebx, [edi+output]
		723	stdcall get_master_vol, ebx
		724	xor eax, eax
3083	leency	725	ret
		726	;@@:
3496	Asper	727	; cmp eax, DEV_GET_INFO
		728	; jne @f
		729	; mov ebx, [edi+output]
		730	; stdcall get_dev_info, ebx
		731	; xor eax, eax
3083	leency	732	; ret
		733	@@:
3496	Asper	734	cmp eax, DEV_GET_POS
		735	jne @f
		736	stdcall azx_get_position
		737	shr eax, 2
		738	mov ebx, [edi+output]
		739	mov [ebx], eax
		740	xor eax, eax
3083	leency	741	ret
		742	@@:
		743	; cmp eax, DEV_SET_CHANNEL_VOLUME
3496	Asper	744	; jne @f
3083	leency	745	; if DEBUG
		746	; mov esi, msgSetChannelVolume
		747	; call SysMsgBoardStr
		748	; end if
		749	; mov ebx, [edi+input]
		750	; mov cl, byte [ebx] ; cl=channel
		751	; mov eax, dword [ebx+1] ; eax=volume in Db
		752	; if DEBUG
3496	Asper	753	; push eax esi
		754	; mov esi, msgYAHOO1
		755	; call SysMsgBoardStr
		756	; stdcall fdword2str, 1
		757	; call SysMsgBoardStr
		758	; mov esi, strSemicolon
		759	; call SysMsgBoardStr
		760	; movzx eax, cl
		761	; stdcall fdword2str, 3
		762	; call SysMsgBoardStr
		763	; pop esi eax
3083	leency	764	; end if
		765	;
3496	Asper	766	; call set_channel_volume
		767	; xor eax, eax
3083	leency	768	; ret
		769	;@@:
3496	Asper	770	; cmp eax, DEV_GET_CHANNEL_VOLUME
		771	; jne @f
		772	; mov cl, byte [edi+input] ; cl=channel
		773	; call get_channel_volume
		774	; mov ebx, [edi+output]
		775	; mov [ebx], eax
		776	; xor eax, eax
3083	leency	777	; ret
		778	;@@:
		779
		780	;Asper: Non standard system service. For the tests only! [
		781	@@:
		782	cmp eax, DEV_EXEC_CODEC_CMD
		783	jne @f
		784
		785	mov eax, [edi+input]
		786	mov eax, [eax]
		787	stdcall codec_exec_verb, eax
		788	xor eax, eax
		789	ret
		790	@@:
		791	;Asper: Non standard system service. For the tests only! ]
		792
		793
		794	.fail:
		795	or eax, -1
		796	ret
		797	endp
		798
		799	restore handle
		800	restore io_code
		801	restore input
		802	restore inp_size
		803	restore output
		804	restore out_size
		805
		806
		807	align 4
		808	proc hda_irq ;+
3594	Asper	809	;spin_lock
3083	leency	810	if DEBUG_IRQ
		811	push eax esi
		812	;mov esi, msgIRQ
		813	;call SysMsgBoardStr
		814	call GetTimerTicks
		815	stdcall fdword2str, 2
		816	call SysMsgBoardStr
		817	pop esi eax
		818	end if
		819	mov edx, ICH6_REG_INTSTS
		820	call azx_readl
		821	test eax, eax
		822	jnz @f
3594	Asper	823	;spin_unlock
3083	leency	824	ret
		825	@@:
		826	mov ebx, eax ; status
		827	mov eax, SDO_INT
		828	test ebx, eax
		829	jz @f
		830
		831	mov edx, ICH6_REG_SD_STS + SDO_OFS
		832	call azx_readb
		833	mov bl, al
		834
		835	mov al, SD_INT_MASK
		836	mov edx, ICH6_REG_SD_STS + SDO_OFS
		837	call azx_writeb
		838
		839	test bl, SD_INT_COMPLETE
		840	jz @f
		841
		842	mov eax, [ctrl.civ_val]
		843	inc eax
		844	and eax, 4-1 ;2-1
		845	mov [ctrl.civ_val], eax
		846
		847	mov ebx, dword [buff_list+eax*4]
		848	cmp [ctrl.user_callback], 0
		849	je @f
		850	stdcall [ctrl.user_callback], ebx
		851
		852	@@:
		853
		854	; clear rirb int
		855	mov edx, ICH6_REG_RIRBSTS
		856	call azx_readb
		857
		858	test al, RIRB_INT_MASK
		859	jz .l1
		860	test al, RIRB_INT_RESPONSE
		861	jz .l2
		862
		863	cmp byte [driver_type], AZX_DRIVER_CTX
		864	jne @f
		865	mov eax, 80 ; wait 80 us
		866	call StallExec
		867	@@:
		868
		869	call azx_update_rirb
		870	.l2:
		871	mov al, RIRB_INT_MASK
		872	mov edx, ICH6_REG_RIRBSTS
		873	call azx_writeb
		874	.l1:
		875
		876	;if 0
		877	; clear state status int
		878	mov edx, ICH6_REG_STATESTS
		879	call azx_readb
		880	test al, 0x04
		881	jz @f
		882
		883	mov al, 0x04
		884	mov edx, ICH6_REG_STATESTS
		885	call azx_writeb
		886	@@:
		887	;end if
		888	or eax, 1
3594	Asper	889	;spin_unlock
3083	leency	890	ret
		891	endp
		892
		893
		894	align 4
		895	proc create_primary_buff
		896
		897	stdcall KernelAlloc, 4096
		898	mov [ctrl.posbuf], eax
		899
		900	stdcall KernelAlloc, 0x10000 ;0x8000
		901	mov [ctrl.buffer], eax
		902
		903	mov edi, eax
		904	mov ecx, 0x10000/4 ;0x8000/4
		905	xor eax, eax
		906	cld
		907	rep stosd
		908
		909
		910	stdcall KernelAlloc, 4096
		911	mov [pcmout_bdl], eax
		912
		913	mov edi, eax
		914	mov ecx, 4096/4
		915	xor eax, eax
		916	cld
		917	rep stosd
		918
		919
		920	; reset BDL address
		921	xor eax, eax
		922	mov edx, ICH6_REG_SD_BDLPL + SDO_OFS
		923	call azx_writel
		924	xor eax, eax
		925	mov edx, ICH6_REG_SD_BDLPU + SDO_OFS
		926	call azx_writel
		927
		928	; program the initial BDL entries
		929	mov eax, [ctrl.buffer]
		930	mov ebx, eax
		931	call GetPgAddr
		932	and ebx, 0xFFF
		933	add eax, ebx
		934
		935
		936	mov ebx, 0x4000 ;buffer size
		937	mov ecx, 8 ;number of periods
		938	mov edi, [pcmout_bdl] ;pcmout_bdl
		939	.next_period:
		940	push eax ecx
		941	mov ecx, 4 ;2 ;number of bdl in a period
		942	.next_bdl:
		943	; program the address field of the BDL entry
		944	mov dword [edi], eax
		945	mov dword [edi+4], 0
		946	; program the size field of the BDL entry
		947	mov dword [edi+8], ebx
		948	; program the IOC to enable interrupt when buffer completes
		949	mov dword [edi+12], 0x01
		950
		951
		952	add eax, ebx
		953	add edi, 16
		954	dec ecx
		955	jnz .next_bdl
		956
		957	pop ecx eax
		958	dec ecx
		959	jnz .next_period
		960
		961
		962	mov edi, buff_list
		963	mov eax, [ctrl.buffer]
		964	mov ecx, 4 ;2
		965	@@:
		966	mov [edi], eax
		967	mov [edi+8], eax
		968	mov [edi+16], eax
		969	mov [edi+24], eax
		970	mov [edi+32], eax
		971	mov [edi+40], eax
		972	mov [edi+48], eax
		973	mov [edi+56], eax
		974
		975	add eax, ebx
		976	add edi, 4
		977	loop @B
		978
		979	; wallclk has 24Mhz clock source
		980	mov [ctrl.period_wallclk], ((0x4000 * 24000) / 48000) * 1000
		981
3496	Asper	982	call azx_stream_reset
3083	leency	983	call azx_setup_controller
		984	ret
		985	endp
		986
		987	align 4
		988	proc detect_controller
		989	locals
		990	last_bus dd ?
		991	bus dd ?
		992	devfn dd ?
		993	endl
		994
		995	xor eax, eax
		996	mov [bus], eax
		997	inc eax
		998	call PciApi
		999	cmp eax, -1
		1000	je .err
		1001
		1002	mov [last_bus], eax
		1003
		1004	.next_bus:
		1005	and [devfn], 0
		1006	.next_dev:
		1007	stdcall PciRead32, [bus], [devfn], dword 0
		1008	test eax, eax
		1009	jz .next
		1010	cmp eax, -1
		1011	je .next
		1012
		1013	mov edi, devices
		1014	@@:
		1015	mov ebx, [edi]
		1016	test ebx, ebx
		1017	jz .next
		1018
		1019	cmp eax, ebx
		1020	je .found
		1021	add edi, 12
		1022	jmp @B
		1023	.next:
		1024	inc [devfn]
		1025	cmp [devfn], 256
		1026	jb .next_dev
		1027	mov eax, [bus]
		1028	inc eax
		1029	mov [bus], eax
		1030	cmp eax, [last_bus]
		1031	jna .next_bus
		1032	xor eax, eax
		1033	ret
		1034	.found:
		1035	mov ebx, [bus]
		1036	mov [ctrl.bus], ebx
		1037
		1038	mov ecx, [devfn]
		1039	mov [ctrl.devfn], ecx
		1040
		1041	mov edx, eax
		1042	and edx, 0xFFFF
		1043	mov [ctrl.vendor], dx
		1044	shr eax, 16
		1045	mov [ctrl.dev_id], ax
		1046
		1047	mov ebx, [edi+4]
		1048	mov [ctrl.ctrl_ids], ebx
		1049
		1050	cmp edx, VID_INTEL
		1051	jne @F
		1052	mov [ctrl.vendor_ids], msg_Intel
		1053	jmp .ok
		1054	@@:
		1055	cmp edx, VID_NVIDIA
		1056	jne @F
		1057	mov [ctrl.vendor_ids], msg_NVidia
		1058	jmp .ok
		1059	@@:
		1060	cmp edx, VID_ATI
		1061	jne @F
		1062	cmp eax, 0x4383
		1063	jg .ati_hdmi
		1064	mov [ctrl.vendor_ids], msg_ATI
		1065	jmp .ok
		1066	.ati_hdmi:
		1067	mov [ctrl.vendor_ids], msg_ATI_HDMI
		1068	jmp .ok
		1069	@@:
		1070	cmp edx, VID_AMD
		1071	jne @F
		1072	mov [ctrl.vendor_ids], msg_AMD
		1073	jmp .ok
		1074	@@:
		1075	cmp edx, VID_VIA
		1076	jne @F
		1077	mov [ctrl.vendor_ids], msg_VIA
		1078	jmp .ok
		1079	@@:
		1080	cmp edx, VID_SIS
		1081	jne @F
		1082	mov [ctrl.vendor_ids], msg_SIS
		1083	jmp .ok
		1084	@@:
		1085	cmp edx, VID_ULI
		1086	jne @F
		1087	mov [ctrl.vendor_ids], msg_ULI
		1088	jmp .ok
		1089	@@:
		1090	cmp edx, VID_TERA
		1091	jne @F
		1092	mov [ctrl.vendor_ids], msg_TERA
		1093	jmp .ok
		1094	@@:
		1095	cmp edx, VID_CREATIVE
		1096	jne @F
		1097	mov [ctrl.vendor_ids], msg_CREATIVE
		1098	jmp .ok
		1099	@@:
		1100	cmp edx, VID_RDC
		1101	jne @F
		1102	mov [ctrl.vendor_ids], msg_RDC
		1103	jmp .ok
		1104	@@:
		1105	cmp edx, VID_VMWARE
		1106	jne @F
		1107	mov [ctrl.vendor_ids], msg_VMWARE
		1108	jmp .ok
		1109	@@:
		1110	.err:
		1111	xor eax, eax
		1112	mov [ctrl.vendor_ids], eax ;something wrong ?
		1113	mov [driver_type], -1
		1114	ret
		1115	.ok:
		1116	mov ebx, [edi+8]
		1117	mov [driver_type], ebx
		1118	ret
		1119	endp
		1120
		1121	align 4
		1122	proc init_controller
		1123
		1124	stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
		1125	test eax, 0x4 ; Test Master bit
		1126	jnz @f
		1127	or eax, 0x4 ; Set Master bit
		1128	stdcall PciWrite32, [ctrl.bus], [ctrl.devfn], dword 4, eax
		1129	stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
		1130	@@:
		1131
		1132	mov ebx, eax
		1133	and eax, 0xFFFF
		1134	mov [ctrl.pci_cmd], eax
		1135	shr ebx, 16
		1136	mov [ctrl.pci_stat], ebx
		1137
		1138	mov esi, msgPciCmd
		1139	call SysMsgBoardStr
		1140	stdcall fdword2str, 2
		1141	call SysMsgBoardStr
		1142
		1143	mov esi, msgPciStat
		1144	call SysMsgBoardStr
		1145	mov eax, [ctrl.pci_stat]
		1146	stdcall fdword2str, 2
		1147	call SysMsgBoardStr
		1148
		1149	mov esi, msgHDALowMMIo
		1150	call SysMsgBoardStr
		1151	stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x10
		1152	stdcall fdword2str, 2
		1153	call SysMsgBoardStr
		1154
		1155	and eax, 0xFFFFC000
		1156	mov [ctrl.ctrl_mem_base], eax
		1157
		1158	mov esi, msgHDAUpMMIo
		1159	call SysMsgBoardStr
		1160	stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x14
		1161	;-mov [ctrl.hda_upper_mem_base], eax
		1162	stdcall fdword2str, 2
		1163	call SysMsgBoardStr
		1164
		1165	.default:
		1166	stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x3C
		1167	and eax, 0xFF
		1168	@@:
		1169	mov [ctrl.int_line], eax
		1170	mov [ctrl.user_callback], 0
		1171
		1172	call set_HDA
		1173	;Asper This is from "azx_create" proc. [
		1174	xor eax, eax
		1175	mov edx, ICH6_REG_GCAP
		1176	call azx_readw
		1177	if DEBUG
		1178	mov esi, msgGCap
		1179	call SysMsgBoardStr
		1180	stdcall fdword2str, 2
		1181	call SysMsgBoardStr
		1182	end if
		1183
		1184	; allocate CORB/RIRB
		1185	call azx_alloc_cmd_io
		1186
		1187	; initialize chip
		1188	call azx_init_pci
		1189
		1190	xor eax, eax
		1191	call azx_init_chip
		1192	;] Asper
		1193
		1194	xor eax, eax
		1195	inc eax
		1196	ret
		1197	endp
		1198
		1199
		1200
		1201
		1202	PG_SW equ 0x003
		1203	PG_NOCACHE equ 0x018
		1204
		1205	align 4
		1206	proc set_HDA
		1207
		1208	stdcall MapIoMem,[ctrl.ctrl_mem_base],0x1000,PG_SW+PG_NOCACHE
		1209	mov [ctrl.ctrl_mem_base], eax
		1210	ret
		1211	endp
		1212
		1213
		1214	; in: eax - fullreset_flag
		1215	;
		1216	; reset codec link
		1217	align 4
		1218	proc reset_controller
		1219	locals
		1220	counter dd ?
		1221	endl
		1222
		1223	test eax, eax
		1224	jz .skip
		1225
		1226	; clear STATESTS
		1227	mov eax, STATESTS_INT_MASK
		1228	mov edx, ICH6_REG_STATESTS
		1229	call azx_writeb
		1230
		1231	; reset controller
		1232	mov edx, ICH6_REG_GCTL
		1233	call azx_readl
		1234	mov ebx, ICH6_GCTL_RESET
		1235	xor ebx, -1
		1236	and eax, ebx
		1237	mov edx, ICH6_REG_GCTL
		1238	call azx_writel
		1239
		1240	mov [counter], 50 ; total 50*100 us = 0.5s
		1241	.wait0:
		1242
		1243	mov edx, ICH6_REG_GCTL
		1244	call azx_readb
		1245	test eax, eax
		1246	jz @f
		1247
		1248	mov eax, 100 ; wait 100 us
		1249	call StallExec
		1250
		1251	dec [counter]
		1252	jnz .wait0
		1253	@@:
		1254	; delay for >= 100us for codec PLL to settle per spec
		1255	; Rev 0.9 section 5.5.1
		1256	mov eax, 100 ; wait 100 us
		1257	call StallExec
		1258
		1259	; Bring controller out of reset
		1260	mov edx, ICH6_REG_GCTL
		1261	call azx_readb
		1262	or eax, ICH6_GCTL_RESET
		1263	mov edx, ICH6_REG_GCTL
		1264	call azx_writeb
		1265
		1266	mov [counter], 50 ; total 50*100 us = 0.5s
		1267	.wait1:
		1268
		1269	mov edx, ICH6_REG_GCTL
		1270	call azx_readb
		1271	test eax, eax
		1272	jnz @f
		1273
		1274	mov eax, 100 ; wait 100 us
		1275	call StallExec
		1276
		1277	dec [counter]
		1278	jnz .wait1
		1279	@@:
		1280
		1281	; Brent Chartrand said to wait >= 540us for codecs to intialize
		1282	mov eax, 540 ; wait 540 us
		1283	call StallExec
		1284
		1285	.skip:
		1286	; check to see if controller is ready
		1287	mov edx, ICH6_REG_GCTL
		1288	call azx_readb
		1289	test eax, eax
		1290	jz .fail
		1291
		1292	; Accept unsolicited responses
		1293	if USE_SINGLE_MODE
		1294	else
		1295	;UNSUPPORTED YET! [
		1296	; mov edx, ICH6_REG_GCTL
		1297	; call azx_readl
		1298	; or eax, ICH6_GCTL_UNSOL
		1299	; mov edx, ICH6_REG_GCTL
		1300	; call azx_writel
		1301	;UNSUPPORTED YET! ]
		1302	end if
		1303
		1304	; detect codecs
		1305	mov eax, [ctrl.codec_mask]
		1306	test ax, ax
		1307	jnz @f
		1308
		1309	mov edx, ICH6_REG_STATESTS
		1310	call azx_readw
		1311	mov [ctrl.codec_mask], eax
		1312
		1313	if DEBUG
		1314	mov esi, msgCodecMask
		1315	call SysMsgBoardStr
		1316	stdcall fdword2str, 2
		1317	call SysMsgBoardStr
		1318	end if
		1319
		1320	@@:
		1321
		1322	.ok:
		1323	clc
		1324	ret
		1325	.fail:
		1326	if DEBUG
		1327	mov esi, msgHDARFail
		1328	call SysMsgBoardStr
		1329	end if
		1330	stc
		1331	ret
		1332	endp
		1333
		1334
		1335	align 4
		1336	play:
3594	Asper	1337	;spin_lock
3083	leency	1338	mov edx, ICH6_REG_WALLCLK
		1339	call azx_readl
		1340	mov [ctrl.start_wallclk], eax
		1341
		1342	call azx_stream_start
		1343	xor eax, eax
3594	Asper	1344	;spin_unlock
3083	leency	1345	ret
		1346
		1347	align 4
		1348	stop:
3594	Asper	1349	;spin_lock
3083	leency	1350	;* call azx_stream_stop ;Asper: Hangs system
		1351	;R push ebx ecx edx
		1352	;R ; stop DMA
		1353	;R mov edx, ICH6_REG_SD_CTL
		1354	;R call azx_sd_readb
		1355	;R mov bl, SD_CTL_DMA_START or SD_INT_MASK
		1356	;R xor bl, -1
		1357	;R and al, bl
		1358	;R mov edx, ICH6_REG_SD_CTL
		1359	;R call azx_sd_writeb
		1360	;R mov edx, ICH6_REG_SD_STS
		1361	;R mov al, SD_INT_MASK
		1362	;R call azx_sd_writeb ; to be sure
		1363	; disable SIE
		1364	;N mov edx, ICH6_REG_INTCTL
		1365	;N call azx_readb
		1366	;N mov bl, SDO_INT ;shl azx_dev->index
		1367	;N xor bl, -1
		1368	;N and al, bl
		1369	;N mov edx, ICH6_REG_INTCTL
		1370	;N call azx_writeb
		1371
		1372	; int timeout = 5000;
		1373	; while (azx_sd_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START && --timeout) ;
		1374	;Asper: Hangs system [
		1375	;* mov ecx, 5000
		1376	;* .l1:
		1377	;* mov edx, ICH6_REG_SD_CTL
		1378	;* call azx_sd_readb
		1379	;* test al, SD_CTL_DMA_START
		1380	;* jz @f
		1381	;* dec ecx
		1382	;* jnz .l1
		1383	;* @@:
		1384	;*
		1385	;* pop edx ecx ebx
		1386	;Asper ]
		1387
		1388	xor eax, eax
3594	Asper	1389	;spin_unlock
3083	leency	1390	ret
		1391
		1392	;align 4
		1393	;proc get_dev_info stdcall, p_info:dword
		1394	; virtual at esi
		1395	; CTRL_INFO CTRL_INFO
		1396	; end virtual
		1397	;
		1398	; mov esi, [p_info]
		1399	; mov eax, [ctrl.int_line]
		1400	; mov bx, [ctrl.dev_id]
		1401	; shl ebx, 16
		1402	; and bx, [ctrl.vendor]
		1403	; mov ecx, [ctrl.pci_cmd]
		1404	; mov edx, [ctrl.codec_mem_base] ;[ctrl.hda_lower_mem_base]
		1405	; mov edi, [ctrl.ctrl_mem_base] ;[ctrl.hda_upper_mem_base]
		1406	;
		1407	; mov [CTRL_INFO.irq], eax
		1408	; mov [CTRL_INFO.codec_id], ebx
		1409	; mov [CTRL_INFO.pci_cmd], ecx
		1410	; mov [CTRL_INFO.codec_mem_base], edx
		1411	; mov [CTRL_INFO.ctrl_mem_base], edi
		1412	;
		1413	; xor eax, eax
		1414	; mov [CTRL_INFO.codec_io_base], eax
		1415	; mov [CTRL_INFO.ctrl_io_base], eax
		1416	; mov [CTRL_INFO.glob_cntrl], eax
		1417	; mov [CTRL_INFO.glob_sta], eax
		1418	; ret
		1419	;endp
		1420
		1421	align 4
		1422	proc set_callback stdcall, handler:dword
		1423	mov eax, [handler]
		1424	mov [ctrl.user_callback], eax
		1425	ret
		1426	endp
		1427
		1428
		1429
		1430	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		1431	;; Interface for HD codec ;;
		1432	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		1433
		1434	;;;;;;;;;;;;;;;;;;;;;;;;;;;
		1435	;; CORB / RIRB interface ;;
		1436	;;;;;;;;;;;;;;;;;;;;;;;;;;;
		1437
		1438	proc azx_alloc_cmd_io
		1439	push eax ecx edx
		1440	; single page (at least 4096 bytes) must suffice for both ringbuffers
		1441	stdcall KernelAlloc, 4096
		1442	mov [ctrl.rb], eax
		1443
		1444	mov edi, eax
		1445	mov ecx, 4096/4
		1446	xor eax, eax
		1447	cld
		1448	rep stosd
		1449
		1450	pop edx ecx eax
		1451	ret
		1452	endp
		1453
		1454	proc azx_init_cmd_io
3496	Asper	1455	spin_lock_irq
3083	leency	1456	pusha
		1457	; CORB set up
		1458	mov eax, [ctrl.rb]
		1459	mov ebx, eax
		1460	call GetPgAddr
		1461	and ebx, 0xFFF
		1462	add eax, ebx
		1463	push eax ; save corb address
		1464	mov edx, ICH6_REG_CORBLBASE
		1465	call azx_writel
		1466	xor eax, eax
		1467	mov edx, ICH6_REG_CORBUBASE
		1468	call azx_writel
		1469
		1470	; set the corb size to 256 entries (ULI requires explicitly)
		1471	mov al, 0x02
		1472	mov edx, ICH6_REG_CORBSIZE
		1473	call azx_writeb
		1474	; set the corb write pointer to 0
		1475	xor ax, ax
		1476	mov edx, ICH6_REG_CORBWP
		1477	call azx_writew
		1478	; reset the corb hw read pointer
		1479	mov ax, ICH6_CORBRP_RST
		1480	mov edx, ICH6_REG_CORBRP
		1481	call azx_writew
		1482	; enable corb dma
		1483	mov al, ICH6_CORBCTL_RUN
		1484	mov edx, ICH6_REG_CORBCTL
		1485	call azx_writeb
		1486
		1487	; RIRB set up
		1488	mov [ctrl.rirb_rp], 0
		1489	mov [ctrl.rirb_wp], 0
		1490	mov [ctrl.rirb_cmd], 0
		1491
		1492	pop eax ; restore corb address
		1493	add eax, 2048
		1494	mov edx, ICH6_REG_RIRBLBASE
		1495	call azx_writel
		1496	xor eax, eax
		1497	mov edx, ICH6_REG_RIRBUBASE
		1498	call azx_writel
		1499
		1500	; set the rirb size to 256 entries (ULI requires explicitly)
		1501	mov al, 0x02
		1502	mov edx, ICH6_REG_RIRBSIZE
		1503	call azx_writeb
		1504	; reset the rirb hw write pointer
		1505	mov ax, ICH6_RIRBWP_RST
		1506	mov edx, ICH6_REG_RIRBWP
		1507	call azx_writew
		1508	; set N=1, get RIRB response interrupt for new entry
		1509	xor ax, ax
		1510	cmp byte [driver_type], AZX_DRIVER_CTX
		1511	jne @f
		1512	mov ax, 0xC0-1
		1513	@@:
		1514	inc ax
		1515	mov edx, ICH6_REG_RINTCNT
		1516	call azx_writew
		1517	; enable rirb dma and response irq
		1518	mov al, ICH6_RBCTL_DMA_EN or ICH6_RBCTL_IRQ_EN
		1519	mov edx, ICH6_REG_RIRBCTL
		1520	call azx_writeb
		1521
		1522	popa
3496	Asper	1523	spin_unlock_irq
3083	leency	1524	ret
		1525	endp
		1526
		1527	proc azx_free_cmd_io
3496	Asper	1528	spin_lock_irq
3083	leency	1529	push eax edx
		1530	; disable ringbuffer DMAs
		1531	xor al, al
		1532	mov edx, ICH6_REG_RIRBCTL
		1533	call azx_writeb
		1534	mov edx, ICH6_REG_CORBCTL
		1535	call azx_writeb
		1536	pop edx eax
3496	Asper	1537	spin_unlock_irq
3083	leency	1538	ret
		1539	endp
		1540
		1541
		1542	; send a command
		1543	proc azx_corb_send_cmd stdcall, val:dword
3496	Asper	1544	spin_lock_irq
3083	leency	1545	push edx edi
		1546	xor eax, eax
		1547	; add command to corb
		1548	mov edx, ICH6_REG_CORBWP
		1549	call azx_readb
		1550	inc al
		1551	inc dword [ctrl.rirb_cmd]
		1552	mov edi, dword [ctrl.rb]
		1553
		1554	push eax
		1555	shl eax, 2 ;wp=wpsizeof(corb entry)=wp4
		1556	add edi, eax
		1557	mov eax, dword [val]
		1558	stosd
		1559	pop eax
		1560	mov edx, ICH6_REG_CORBWP
		1561	call azx_writel
		1562
		1563	pop edi edx
		1564	xor eax, eax ;Asper+
3496	Asper	1565	spin_unlock_irq
3083	leency	1566	ret
		1567	endp
		1568
		1569
		1570	; retrieve RIRB entry - called from interrupt handler
		1571	proc azx_update_rirb
		1572	pusha
		1573	xor eax, eax
		1574	mov edx, ICH6_REG_RIRBWP
		1575	call azx_readb ;call azx_readw
		1576
		1577	cmp ax, [ctrl.rirb_wp]
		1578	je .done
		1579	mov [ctrl.rirb_wp], ax
		1580	mov bx, [ctrl.rirb_rp]
		1581
		1582	.l1:
		1583	cmp bx, [ctrl.rirb_wp]
		1584	je .l3
		1585
		1586	inc bl
		1587	.l2:
		1588	cmp bx, ICH6_MAX_RIRB_ENTRIES
		1589	jl @f
		1590	sub bx, ICH6_MAX_RIRB_ENTRIES
		1591	jmp .l2
		1592	@@:
		1593
		1594	movzx edx, bx
		1595	shl edx, 1 + 2 ; an RIRB entry is 8-bytes
		1596	mov esi, dword [ctrl.rb]
		1597	add esi, 2048
		1598	add esi, edx
		1599	lodsd ; res
		1600	mov edx, eax
		1601	lodsd ; res_ex
		1602
		1603	test eax, ICH6_RIRB_EX_UNSOL_EV
		1604	jz @f
		1605	stdcall snd_hda_queue_unsol_event, edx, eax
		1606	jmp .l1
		1607	@@:
		1608	mov ecx, [ctrl.rirb_cmd]
		1609	test ecx, ecx
		1610	jz @f
		1611	mov [ctrl.rirb_res], edx
		1612	dec dword [ctrl.rirb_cmd]
		1613	jmp .l1
		1614	@@:
		1615	if DEBUG
		1616	push esi
		1617	mov esi, msgSpuriousResponce
		1618	call SysMsgBoardStr
		1619	pop esi
		1620	end if
		1621	jmp .l1
		1622	.l3:
		1623	mov [ctrl.rirb_rp], bx
		1624	.done:
		1625	popa
		1626	ret
		1627	endp
		1628
		1629	; receive a response
		1630	proc azx_rirb_get_response
		1631	locals
		1632	do_poll db 0
		1633	endl
		1634
		1635	push ebx ecx edx
		1636	.again:
		1637	mov ecx, 1000;+1000
		1638	.next_try:
		1639	mov al, [ctrl.polling_mode]
		1640	test al, al
		1641	jnz .poll
		1642	mov ah, [do_poll]
		1643	test ah, ah
		1644	jz @f
		1645	.poll:
3496	Asper	1646	spin_lock_irq
3083	leency	1647	call azx_update_rirb
3496	Asper	1648	spin_unlock_irq
3083	leency	1649	@@:
		1650	mov eax, [ctrl.rirb_cmd]
		1651	test eax, eax
		1652	jnz .l1
		1653	mov [ctrl.rirb_error], 0
		1654	mov al, [do_poll]
		1655	test al, al
		1656	jnz @f
		1657	mov [ctrl.poll_count], 0
		1658	@@:
		1659	mov eax, [ctrl.rirb_res] ; the last value
		1660	jmp .out
		1661	.l1:
		1662	push eax
		1663	mov eax, 2000 ; temporary workaround
		1664	call StallExec
		1665	pop eax
		1666	dec ecx
		1667	jnz .next_try
		1668	.no_next_try:
		1669	mov al, [ctrl.polling_mode]
		1670	test al, al
		1671	jnz .no_poll
		1672
		1673	mov al, [ctrl.poll_count]
		1674	cmp al, 2
		1675	jge .poll_count_overflow
		1676	if DEBUG
		1677	push eax esi
		1678	mov esi, msgGetResponceTimeout
		1679	call SysMsgBoardStr
		1680	mov esi, msgPollingCodecOnce
		1681	call SysMsgBoardStr
		1682	pop esi eax
		1683	end if
		1684	mov [do_poll], 1
		1685	inc [ctrl.poll_count]
		1686	jmp .again
		1687
		1688	.poll_count_overflow:
		1689	if DEBUG
		1690	push eax esi
		1691	mov esi, msgGetResponceTimeout
		1692	call SysMsgBoardStr
		1693	mov esi, msgSwitchToPollMode
		1694	call SysMsgBoardStr
		1695	pop esi eax
		1696	end if
		1697	mov [ctrl.polling_mode], 1
		1698	jmp .again
		1699
		1700	.no_poll:
		1701
		1702	mov al, [ctrl.polling_mode]
		1703	test al, al
		1704	jz @f
		1705	mov eax, -1
		1706	jmp .out
		1707	@@:
		1708
		1709
		1710	; a fatal communication error; need either to reset or to fallback
		1711	; to the single_cmd mode
		1712	mov [ctrl.rirb_error], 1
		1713	;Asper~ -? [
		1714	mov [ctrl.response_reset], 1
		1715	mov eax, -1 ; give a chance to retry
		1716	jmp .out
		1717	;Asper~ -? ]
		1718
		1719	;-? mov [ctrl.single_cmd], 1
		1720	mov [ctrl.response_reset], 0
		1721
		1722	; release CORB/RIRB
		1723	call azx_free_cmd_io
		1724	; disable unsolicited responses
		1725	mov edx, ICH6_REG_GCTL
		1726	call azx_readl
		1727	mov ebx, ICH6_GCTL_UNSOL
		1728	xor ebx, -1
		1729	and eax, ebx
		1730	mov edx, ICH6_REG_GCTL
		1731	call azx_writel
		1732	mov eax, -1
		1733	.out:
		1734	pop edx ecx ebx
		1735	ret
		1736	endp
		1737
		1738	;
		1739	; Use the single immediate command instead of CORB/RIRB for simplicity
		1740	;
		1741	; Note: according to Intel, this is not preferred use. The command was
		1742	; intended for the BIOS only, and may get confused with unsolicited
		1743	; responses. So, we shouldn't use it for normal operation from the
		1744	; driver.
		1745	; I left the codes, however, for debugging/testing purposes.
		1746	;
		1747
		1748	; receive a response
		1749	proc azx_single_wait_for_response
		1750	push ecx edx esi
		1751
		1752	mov ecx, 50
		1753	.l1:
		1754	test ecx, ecx
		1755	jz .timeout
		1756
		1757	; check IRV busy bit
		1758	mov edx, ICH6_REG_IRS
		1759	call azx_readw
		1760	test ax, ICH6_IRS_VALID
		1761	jz @f
		1762	; reuse rirb.res as the response return value
		1763	mov edx, ICH6_REG_IR
		1764	call azx_readl
		1765	mov [ctrl.rirb_res], eax
		1766
		1767	pop esi edx ecx
		1768	xor eax, eax
		1769	ret
		1770	@@:
		1771	xor eax, eax
		1772	inc eax
		1773	call StallExec
		1774
		1775	dec ecx
		1776	jmp .l1
		1777	.timeout:
		1778	if DEBUG
		1779	xor eax, eax
		1780	mov edx, ICH6_REG_IRS
		1781	call azx_readw
		1782	mov esi, msgGetResponceTimeout
		1783	call SysMsgBoardStr
		1784	mov esi, msgIRS
		1785	call SysMsgBoardStr
		1786	stdcall fdword2str, 2
		1787	call SysMsgBoardStr
		1788	end if
		1789
		1790	pop esi edx ecx
		1791	mov eax, -1
		1792	mov [ctrl.rirb_res], eax
		1793	ret
		1794	endp
		1795
		1796	; send a command
		1797	proc azx_single_send_cmd stdcall, val:dword
		1798	push ecx edx esi
		1799
		1800	mov ecx, 50
		1801	.l1:
		1802	test ecx, ecx
		1803	jz .timeout
		1804
		1805	; check ICB busy bit
		1806	mov edx, ICH6_REG_IRS
		1807	call azx_readw
		1808	test ax, ICH6_IRS_BUSY
		1809	jnz @f
		1810	; Clear IRV valid bit
		1811	mov edx, ICH6_REG_IRS
		1812	call azx_readw
		1813	or ax, ICH6_IRS_VALID
		1814	mov edx, ICH6_REG_IRS
		1815	call azx_writew
		1816
		1817	mov eax, dword [val]
		1818	mov edx, ICH6_REG_IC
		1819	call azx_writel
		1820
		1821	mov edx, ICH6_REG_IRS
		1822	call azx_readw
		1823	or ax, ICH6_IRS_BUSY
		1824	mov edx, ICH6_REG_IRS
		1825	call azx_writew
		1826
		1827	stdcall azx_single_wait_for_response
		1828	pop esi edx ecx
		1829	ret
		1830	@@:
		1831	dec ecx
		1832	jmp .l1
		1833	.timeout:
		1834	if DEBUG
		1835	xor eax, eax
		1836	mov edx, ICH6_REG_IRS
		1837	call azx_readw
		1838	mov esi, msgSendCmdTimeout
		1839	call SysMsgBoardStr
		1840	stdcall fdword2str, 2
		1841	call SysMsgBoardStr
		1842	mov esi, msgVal
		1843	call SysMsgBoardStr
		1844	mov eax, dword [val]
		1845	stdcall fdword2str, 2
		1846	call SysMsgBoardStr
		1847	end if
		1848
		1849	pop esi edx ecx
		1850	mov eax, -1
		1851	ret
		1852	endp
		1853
		1854	; receive a response
		1855	proc azx_single_get_response
		1856	mov eax, [ctrl.rirb_res]
		1857	ret
		1858	endp
		1859
		1860	;
		1861	; The below are the main callbacks from hda_codec.
		1862	;
		1863	; They are just the skeleton to call sub-callbacks according to the
		1864	; current setting of chip->single_cmd.
		1865	;
		1866
		1867	; send a command
		1868	proc azx_send_cmd stdcall, val:dword
		1869	if USE_SINGLE_MODE
		1870	stdcall azx_single_send_cmd, [val]
		1871	else
		1872	stdcall azx_corb_send_cmd, [val]
		1873	end if
		1874	ret
		1875	endp
		1876
		1877	; get a response
		1878	proc azx_get_response
		1879	if USE_SINGLE_MODE
		1880	call azx_single_get_response
		1881	else
		1882	call azx_rirb_get_response
		1883	end if
		1884	ret
		1885	endp
		1886
		1887
		1888	;;;;;;;;;;;;;;;;;;;;;;;;
		1889	;; Lowlevel interface ;;
		1890	;;;;;;;;;;;;;;;;;;;;;;;;
		1891
		1892	; enable interrupts
		1893	proc azx_int_enable
		1894	push eax edx
		1895	; enable controller CIE and GIE
		1896	mov edx, ICH6_REG_INTCTL
		1897	call azx_readl
		1898	or eax, ICH6_INT_CTRL_EN or ICH6_INT_GLOBAL_EN
		1899	mov edx, ICH6_REG_INTCTL
		1900	call azx_writel
		1901	pop edx eax
		1902	ret
		1903	endp
		1904
		1905	; disable interrupts
		1906	proc azx_int_disable
		1907	push eax ebx edx
		1908
		1909	; disable interrupts in stream descriptor
		1910	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1911	call azx_readb
		1912	mov bl, SD_INT_MASK
		1913	xor bl, -1
		1914	and al, bl
		1915	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1916	call azx_writeb
		1917
		1918	; disable SIE for all streams
		1919	xor al, al
		1920	mov edx, ICH6_REG_INTCTL
		1921	call azx_writeb
		1922
		1923	; disable controller CIE and GIE
		1924	mov edx, ICH6_REG_INTCTL
		1925	call azx_readl
		1926	mov ebx, ICH6_INT_CTRL_EN or ICH6_INT_GLOBAL_EN
		1927	xor ebx, -1
		1928	and eax, ebx
		1929	call azx_writel
		1930	pop edx ebx eax
		1931	ret
		1932	endp
		1933
		1934	; clear interrupts
		1935	proc azx_int_clear
		1936	push eax edx
		1937
		1938	; clear stream status
		1939	mov al, SD_INT_MASK
		1940	mov edx, ICH6_REG_SD_STS + SDO_OFS
		1941	call azx_writeb
		1942
		1943	; clear STATESTS
		1944	mov al, STATESTS_INT_MASK
		1945	mov edx, ICH6_REG_STATESTS
		1946	call azx_writeb
		1947
		1948	; clear rirb status
		1949	mov al, RIRB_INT_MASK
		1950	mov edx, ICH6_REG_RIRBSTS
		1951	call azx_writeb
		1952
		1953	; clear int status
		1954	mov eax, ICH6_INT_CTRL_EN or ICH6_INT_ALL_STREAM
		1955	mov edx, ICH6_REG_INTSTS
		1956	call azx_writel
		1957	pop edx eax
		1958	ret
		1959	endp
		1960
		1961
		1962	; start a stream
		1963	proc azx_stream_start
		1964	push eax edx
		1965
		1966	; enable SIE
		1967	mov edx, ICH6_REG_INTCTL
		1968	call azx_readl
		1969
		1970	or eax, 0xC0000000 ;Asper+
		1971	or eax, SDO_INT ; Asper: output stream interrupt index
		1972	mov edx, ICH6_REG_INTCTL
		1973	call azx_writel
		1974	; set DMA start and interrupt mask
		1975	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1976	call azx_readb
		1977
		1978	or al, SD_CTL_DMA_START or SD_INT_MASK
		1979
		1980	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1981	call azx_writeb
		1982
		1983	pop edx eax
		1984	ret
		1985	endp
		1986
		1987	; stop DMA
		1988	proc azx_stream_clear
		1989	push eax ebx edx
		1990	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1991	call azx_readb
		1992	mov bl, SD_CTL_DMA_START or SD_INT_MASK
		1993	xor bl, -1
		1994	and al, bl
		1995	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		1996	call azx_writeb
		1997	mov al, SD_INT_MASK
		1998	mov edx, ICH6_REG_SD_STS + SDO_OFS
		1999	call azx_writeb
		2000	pop edx ebx eax
		2001	ret
		2002	endp
		2003
		2004	; stop a stream
		2005	proc azx_stream_stop
		2006	push eax ebx edx
		2007	call azx_stream_clear
		2008	; disable SIE
		2009	mov edx, ICH6_REG_INTCTL
		2010	call azx_readl
		2011	mov ebx, (SDO_INT)
		2012	xor ebx, -1
		2013	and eax, ebx
		2014	mov edx, ICH6_REG_INTCTL
		2015	call azx_writel
		2016	pop edx ebx eax
		2017	ret
		2018	endp
		2019
		2020	;
		2021	;in: eax = full_reset
		2022	;
		2023	; initialize the chip
		2024	proc azx_init_chip
		2025	push eax
		2026
		2027	; reset controller
		2028	mov eax, 1 ;full reset
		2029	call reset_controller
		2030
		2031	; initialize interrupts
		2032	call azx_int_clear
		2033	call azx_int_enable
		2034
		2035	; initialize the codec command I/O
		2036	if USE_SINGLE_MODE
		2037	else
		2038	call azx_init_cmd_io
		2039	end if
		2040
		2041	; program the position buffer
		2042	mov eax, dword [ctrl.posbuf]
		2043	mov ebx, eax
		2044	call GetPgAddr
		2045	and ebx, 0xFFF
		2046	add eax, ebx
		2047	mov edx, ICH6_REG_DPLBASE
		2048	call azx_writel
		2049	xor eax, eax
		2050	mov edx, ICH6_REG_DPUBASE
		2051	call azx_writel
		2052
		2053	pop eax
		2054	ret
		2055	endp
		2056
		2057
		2058	; initialize the PCI registers
		2059
		2060	; update bits in a PCI register byte
		2061	proc update_pci_byte stdcall, reg:dword, mask:dword, val:dword
		2062	push ax bx
		2063	stdcall PciRead8, [ctrl.bus], [ctrl.devfn], [reg]
		2064	mov bl, byte [mask]
		2065	mov bh, bl
		2066	xor bl, -1
		2067	and al, bl
		2068	shr bx, 8
		2069	and bl, byte [val]
		2070	or al, bl
		2071	stdcall PciWrite8, [ctrl.bus], [ctrl.devfn], [reg], eax
		2072	pop bx ax
		2073	ret
		2074	endp
		2075
		2076
		2077	proc azx_init_pci
		2078	; Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
		2079	; TCSEL == Traffic Class Select Register, which sets PCI express QOS
		2080	; Ensuring these bits are 0 clears playback static on some HD Audio
		2081	; codecs
		2082	push eax
		2083	stdcall update_pci_byte, ICH6_PCIREG_TCSEL, 0x07, 0
		2084
		2085	mov eax, [driver_type]
		2086	cmp eax, AZX_DRIVER_ATI
		2087	jne @f
		2088	; For ATI SB450 azalia HD audio, we need to enable snoop
		2089	stdcall update_pci_byte, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07, ATI_SB450_HDAUDIO_ENABLE_SNOOP
		2090	jmp .done
		2091	@@:
		2092	cmp eax, AZX_DRIVER_NVIDIA
		2093	jne @f
		2094	; For NVIDIA HDA, enable snoop
		2095	stdcall update_pci_byte, NVIDIA_HDA_TRANSREG_ADDR, 0x0f, NVIDIA_HDA_ENABLE_COHBITS
		2096	stdcall update_pci_byte, NVIDIA_HDA_ISTRM_COH, 0x01, NVIDIA_HDA_ENABLE_COHBIT
		2097	stdcall update_pci_byte, NVIDIA_HDA_OSTRM_COH, 0x01, NVIDIA_HDA_ENABLE_COHBIT
		2098	jmp .done
		2099	@@:
		2100	cmp eax, AZX_DRIVER_SCH
		2101	je .l1
		2102	cmp eax, AZX_DRIVER_PCH
		2103	jne @f
		2104	.l1:
		2105	stdcall PciRead16, [ctrl.bus], [ctrl.devfn], dword INTEL_SCH_HDA_DEVC
		2106	test ax, INTEL_SCH_HDA_DEVC_NOSNOOP
		2107	jz @f
		2108	push ebx
		2109	mov ebx, INTEL_SCH_HDA_DEVC_NOSNOOP
		2110	xor ebx, -1
		2111	and eax, ebx
		2112	pop ebx
		2113	stdcall PciWrite16, [ctrl.bus], [ctrl.devfn], dword INTEL_SCH_HDA_DEVC, eax
		2114	stdcall PciRead16, [ctrl.bus], [ctrl.devfn], dword INTEL_SCH_HDA_DEVC
		2115
		2116	if DEBUG
		2117	push esi
		2118	mov esi, msgHDASnoopDisabled
		2119	call SysMsgBoardStr
		2120	mov esi, msg_OK
		2121	test ax, INTEL_SCH_HDA_DEVC_NOSNOOP
		2122	jz .snoop_ok
		2123	mov esi, msg_Fail
		2124	.snoop_ok:
		2125	call SysMsgBoardStr
		2126	pop esi
		2127	end if
		2128	@@:
		2129	.done:
		2130	pop eax
		2131	ret
		2132	endp
		2133
		2134
		2135	; reset stream
		2136	proc azx_stream_reset
		2137	push eax ebx ecx edx
		2138
		2139	call azx_stream_clear
		2140
		2141	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2142	call azx_readb
		2143	or al, SD_CTL_STREAM_RESET
		2144	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2145	call azx_writeb
		2146
		2147	mov eax, 3
		2148	call StallExec
		2149
		2150	mov ecx, 300
		2151	.l1:
		2152	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2153	call azx_readb
		2154	test al, SD_CTL_STREAM_RESET
		2155	jnz @f
		2156	dec ecx
		2157	jnz .l1
		2158	@@:
		2159	mov bl, SD_CTL_STREAM_RESET
		2160	xor bl, -1
		2161	and al, bl
		2162	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2163	call azx_writeb
		2164
		2165	mov eax, 3
		2166	call StallExec
		2167
		2168	mov ecx, 300
		2169	; waiting for hardware to report that the stream is out of reset
		2170	.l2:
		2171	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2172	call azx_readb
		2173	test al, SD_CTL_STREAM_RESET
		2174	jnz @f
		2175	dec ecx
		2176	jnz .l2
		2177	@@:
		2178	; reset first position - may not be synced with hw at this time
		2179	mov edx, [ctrl.posbuf]
		2180	mov dword [edx], 0
		2181	pop edx ecx ebx eax
		2182	ret
		2183	endp
		2184
		2185
		2186	; set up the SD for streaming
		2187	proc azx_setup_controller
		2188	push eax ebx ecx edx
		2189	; make sure the run bit is zero for SD
		2190	call azx_stream_clear
		2191
		2192	; program the stream_tag
		2193	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2194	call azx_readl
		2195	mov ecx, SD_CTL_STREAM_TAG_MASK
		2196	xor ecx, -1
		2197	and eax, ecx
		2198	mov ecx, SDO_TAG
		2199	shl ecx, SD_CTL_STREAM_TAG_SHIFT
		2200	or eax, ecx
		2201	; Asper stream_tag = SDO_TAG
		2202	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2203	call azx_writel
		2204
		2205	; program the length of samples in cyclic buffer
		2206	mov eax, 0x4000*32
		2207	mov edx, ICH6_REG_SD_CBL + SDO_OFS
		2208	call azx_writel
		2209
		2210	; program the stream format
		2211	; this value needs to be the same as the one programmed
		2212	mov ax, 0x11
		2213	mov edx, ICH6_REG_SD_FORMAT + SDO_OFS
		2214	call azx_writew
		2215
		2216	; program the stream LVI (last valid index) of the BDL
		2217	mov eax, 32-1 ;4-1 ;2-1
		2218	mov [ctrl.lvi_reg], eax
		2219	mov edx, ICH6_REG_SD_LVI + SDO_OFS
		2220	call azx_writew
		2221
		2222	; program the BDL address
		2223	; lower BDL address
		2224	mov eax, [pcmout_bdl]
		2225	mov ebx, eax
		2226	call GetPgAddr
		2227	and ebx, 0xFFF
		2228	add eax, ebx
		2229	mov edx, ICH6_REG_SD_BDLPL + SDO_OFS
		2230	call azx_writel
		2231	; upper BDL address
		2232	xor eax, eax ;upper_32bit(azx_dev->bdl_addr)
		2233	mov edx, ICH6_REG_SD_BDLPU + SDO_OFS
		2234	call azx_writel
		2235
		2236	; enable the position buffer
		2237	cmp [ctrl.position_fix], POS_FIX_LPIB
		2238	jz @f
		2239	mov edx, ICH6_REG_DPLBASE
		2240	call azx_readl
		2241	and eax, ICH6_DPLBASE_ENABLE
		2242	jnz @f
		2243	mov eax, dword [ctrl.posbuf]
		2244	mov ebx, eax
		2245	call GetPgAddr
		2246	and ebx, 0xFFF
		2247	add eax, ebx
		2248	or eax, ICH6_DPLBASE_ENABLE
		2249	mov edx, ICH6_REG_DPLBASE
		2250	call azx_writel
		2251	@@:
		2252
		2253	; set the interrupt enable bits in the descriptor control register
		2254	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2255	call azx_readl
		2256	or eax, SD_INT_MASK
		2257	mov edx, ICH6_REG_SD_CTL + SDO_OFS
		2258	call azx_writel
		2259
		2260	pop edx ecx ebx eax
		2261	ret
		2262	endp
		2263
		2264
		2265	;(...)
		2266
		2267	; Probe the given codec address
		2268	proc probe_codec, addr:dword
		2269	push edx
		2270	mov eax, [addr]
		2271	shl eax, 28
		2272	mov edx, (AC_NODE_ROOT shl 20) or (AC_VERB_PARAMETERS shl 8) or AC_PAR_VENDOR_ID
		2273	or eax, edx
		2274	stdcall azx_send_cmd, eax
		2275	stdcall azx_get_response
		2276
		2277	cmp eax, -1
		2278	je .out
		2279	mov eax, [addr]
		2280	mov [codec.addr], eax ;Asper+
		2281	if DEBUG
		2282	push esi
		2283	mov esi, msgCodecOK
		2284	call SysMsgBoardStr
		2285	mov esi, msgCAd
		2286	call SysMsgBoardStr
		2287	stdcall fdword2str, 3
		2288	call SysMsgBoardStr
		2289	pop esi
		2290	end if
		2291	xor eax, eax
		2292	.out:
		2293	pop edx
		2294	ret
		2295	endp
		2296
		2297
		2298	proc azx_bus_reset
		2299	call azx_stop_chip
		2300	call azx_init_chip
		2301	endp
		2302
		2303
		2304	; Codec initialization
		2305	proc azx_codec_create
		2306	push ebx ecx edx
		2307	;(...)
		2308	; First try to probe all given codec slots
		2309	; Asper: We asume for now that max slots for codecs = 4
		2310	xor ecx, ecx
		2311	xor edx, edx
		2312	inc edx
		2313	.next_slot:
		2314	test edx, [ctrl.codec_mask]
		2315	jz @f
		2316	stdcall probe_codec, ecx
		2317	test eax, eax
		2318	jz .init ;@f
		2319	; Some BIOSen give you wrong codec addresses that don't exist
		2320	if DEBUG
		2321	mov esi, msgCodecError
		2322	call SysMsgBoardStr
		2323	end if
		2324	mov ebx, edx
		2325	xor ebx, -1
		2326	and [ctrl.codec_mask], ebx
		2327
		2328	; More badly, accessing to a non-existing
		2329	; codec often screws up the controller chip,
		2330	; and disturbs the further communications.
		2331	; Thus if an error occurs during probing,
		2332	; better to reset the controller chip to
		2333	; get back to the sanity state.
		2334	;call azx_bus_reset
		2335	@@:
		2336	shl edx, 1
		2337	inc ecx
		2338	; if USE_FIRST_CODEC
		2339	; cmp ecx, 1
		2340	; else
		2341	cmp ecx, 3
		2342	; end if
		2343	jl .next_slot
		2344	mov eax, -1
		2345	jmp .out
		2346	.init:
		2347	stdcall snd_hda_codec_init
		2348	xor eax, eax
		2349	.out:
		2350	pop edx ecx ebx
		2351	ret
		2352	endp
		2353
		2354
		2355	proc azx_codec_configure
		2356	;(...)
		2357	call snd_hda_codec_configure
		2358	ret
		2359	endp
		2360
		2361
		2362	proc azx_get_position
		2363	test [ctrl.position_fix], POS_FIX_LPIB
		2364	jz @f
		2365	; read LPIB
		2366	mov edx, ICH6_REG_SD_LPIB + SDO_OFS
		2367	call azx_readl
		2368	jmp .out
		2369	@@:
		2370	test [ctrl.position_fix], POS_FIX_VIACOMBO
		2371	jz @f
		2372	; call azx_get_via_position
		2373	; jmp .out
		2374	@@:
		2375	; use the position buffer
		2376	push edx
		2377	mov edx, dword [ctrl.posbuf]
		2378	mov eax, dword [edx]
		2379	pop edx
		2380	.out:
		2381	cmp eax, 0x4000 ; bufsize
		2382	jl @f
		2383	xor eax, eax
		2384	@@:
		2385	ret
		2386	endp
		2387
		2388
		2389	proc azx_stop_chip
		2390	push eax edx
		2391
		2392	; disable interrupts
		2393	call azx_int_disable
		2394	call azx_int_clear
		2395	; disable CORB/RIRB
		2396	call azx_free_cmd_io
		2397	; disable position buffer
		2398	xor eax, eax
		2399	mov edx, ICH6_REG_DPLBASE
		2400	call azx_writel
		2401	mov edx, ICH6_REG_DPUBASE
		2402	call azx_writel
		2403
		2404	pop edx eax
		2405	ret
		2406	endp
		2407
		2408
		2409	; in: eax = volume (-10000 - 0)
		2410	align 4
		2411	set_master_vol:
		2412	mov ecx, 3
		2413	call set_channel_volume
		2414	ret
		2415
		2416
		2417	; out: [pvol] = volume (-10000 - 0)
		2418	align 4
		2419	proc get_master_vol stdcall, pvol:dword
		2420	xor ecx, ecx
		2421	call get_channel_volume
		2422	mov ebx, [pvol]
		2423	mov [ebx], eax
		2424	xor eax, eax
		2425	ret
		2426	endp
		2427
		2428
		2429	; in: ecx = channel mask (1 - Left; 2 - Right; 3-Both)
		2430	; eax = volume (-10000 - 0)
		2431	align 4
		2432	set_channel_volume:
		2433	push eax ebx ecx edx
		2434	mov ebx, [volume.maxDb]
		2435	neg eax
		2436	if 0;DEBUG ;YAHOO
		2437	push eax esi
		2438	mov esi, msgNewVolume
		2439	call SysMsgBoardStr
		2440	stdcall fdword2str, 2
		2441	call SysMsgBoardStr
		2442
		2443	mov esi, msgMaxVolume
		2444	call SysMsgBoardStr
		2445	mov eax, ebx
		2446	stdcall fdword2str, 2
		2447	call SysMsgBoardStr
		2448	pop esi eax
		2449	end if
		2450	test ebx, ebx
		2451	jz .err_out
		2452
		2453	cmp eax, 0
		2454	jg @f
		2455	xor eax, eax
		2456	jmp .set
		2457	@@:
		2458	cmp eax, ebx
		2459	jl .set
		2460	mov eax, ebx
		2461	.set:
		2462	;cdq
		2463	xor edx, edx
		2464	shl eax, 2
		2465	mov ebx, 100
		2466	div bx
		2467	mov bl, [volume.step_size]
		2468	div bl
		2469
		2470	mov edx, [volume.out_amp_node]
		2471	test edx, edx
		2472	jz .out
		2473	movzx ebx, [edx+HDA_GNODE.nid]
		2474
		2475	test ecx, 1 ; Left channel ?
		2476	jz @f
		2477	stdcall put_volume_mute, ebx, 0, HDA_OUTPUT, 0, eax
		2478	@@:
		2479	test ecx, 2 ; Right channel ?
		2480	jz .out
		2481	stdcall put_volume_mute, ebx, 1, HDA_OUTPUT, 0, eax
		2482	.out:
		2483	pop edx ecx ebx eax
		2484	ret
		2485	.err_out:
		2486	if 0;DEBUG ;YAHOO
		2487	push esi
		2488	mov esi, emsgNoVolCtrl
		2489	call SysMsgBoardStr
		2490	pop esi
		2491	end if
		2492	jmp .out
		2493
		2494	; in: ecx = channel (1 - Left; 2 - Right)
		2495	; out: eax = volume (-10000 - 0)
		2496	align 4
		2497	get_channel_volume:
		2498	push ebx ecx edx
		2499	cmp ecx, 2
		2500	jg .out
		2501	dec cl
		2502	xor eax, eax
		2503	mov edx, [volume.out_amp_node]
		2504	test edx, edx
		2505	jz .out
		2506	movzx ebx, [edx+HDA_GNODE.nid]
		2507	stdcall get_volume_mute, ebx, ecx, HDA_OUTPUT, 0
		2508	mov cl, [volume.step_size]
		2509	mul cl
		2510
		2511	mov cx, 100
		2512	mul cx
		2513	shr eax, 2 ; *0.25
		2514	neg eax
		2515	.out:
3496	Asper	2516	pop edx ecx ebx
		2517	ret
3083	leency	2518
		2519
		2520	; in: ecx = delay
		2521	udelay:
3496	Asper	2522	push eax ecx edx
		2523	test ecx, ecx
		2524	jnz @f
		2525	inc ecx
3083	leency	2526	@@:
3496	Asper	2527	mov eax, ecx
		2528	mov cx, 500
		2529	mul cl
		2530	mov ecx, edx
		2531	shl ecx, 16
		2532	or ecx, eax
3083	leency	2533	@@:
3496	Asper	2534	xor eax, eax
		2535	cpuid
		2536	dec ecx
		2537	jz @b
		2538	pop edx ecx eax
		2539	ret
3083	leency	2540
		2541	align 4
		2542	proc StallExec
3496	Asper	2543	push ecx edx ebx eax
3083	leency	2544
3496	Asper	2545	mov ecx, CPU_FREQ
		2546	mul ecx
		2547	mov ebx, eax ;low
		2548	mov ecx, edx ;high
		2549	rdtsc
		2550	add ebx, eax
		2551	adc ecx,edx
		2552	@@:
		2553	rdtsc
		2554	sub eax, ebx
		2555	sbb edx, ecx
		2556	js @B
3083	leency	2557
3496	Asper	2558	pop eax ebx edx ecx
		2559	ret
3083	leency	2560	endp
		2561
		2562	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		2563	; MEMORY MAPPED IO (os depended) ;
		2564	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		2565
		2566	align 4
		2567	proc azx_readb
3496	Asper	2568	add edx, [ctrl.ctrl_mem_base]
		2569	mov al, [edx]
		2570	ret
3083	leency	2571	endp
		2572
		2573	align 4
		2574	proc azx_readw
3496	Asper	2575	add edx, [ctrl.ctrl_mem_base]
		2576	mov ax, [edx]
		2577	ret
3083	leency	2578	endp
		2579
		2580	align 4
		2581	proc azx_readl
3496	Asper	2582	add edx, [ctrl.ctrl_mem_base]
		2583	mov eax, [edx]
		2584	ret
3083	leency	2585	endp
		2586
		2587	align 4
		2588	proc azx_writeb
3496	Asper	2589	add edx, [ctrl.ctrl_mem_base]
		2590	mov [edx], al
		2591	ret
3083	leency	2592	endp
		2593
		2594	align 4
		2595	proc azx_writew
3496	Asper	2596	add edx, [ctrl.ctrl_mem_base]
		2597	mov [edx], ax
		2598	ret
3083	leency	2599	endp
		2600
		2601	align 4
		2602	proc azx_writel
3496	Asper	2603	add edx, [ctrl.ctrl_mem_base]
		2604	mov [edx], eax
		2605	ret
3083	leency	2606	endp
		2607
		2608	;_______
		2609
		2610
		2611	;Asper remember to add this functions:
		2612	proc snd_hda_queue_unsol_event stdcall, par1:dword, par2:dword
		2613	if DEBUG
3496	Asper	2614	push esi
		2615	mov esi, msgUnsolEvent
		2616	call SysMsgBoardStr
		2617	pop esi
3083	leency	2618	end if
3496	Asper	2619	ret
3083	leency	2620	endp
		2621	;...
		2622
		2623
		2624	align 4
		2625	proc fdword2str stdcall, flags:dword ; bit 0 - skipLeadZeroes; bit 1 - newLine; other bits undefined
3496	Asper	2626	push eax ebx ecx
		2627	mov esi, hex_buff
		2628	mov ecx, -8
		2629	push eax
3083	leency	2630	@@:
3496	Asper	2631	rol eax, 4
		2632	mov ebx, eax
		2633	and ebx, 0x0F
		2634	mov bl, [ebx+hexletters]
		2635	mov [8+esi+ecx], bl
		2636	inc ecx
		2637	jnz @b
		2638	pop eax
3083	leency	2639
3496	Asper	2640	mov dword [esi+8], 0
		2641	test [flags], 0x2 ; new line ?
		2642	jz .no_newline
		2643	mov dword [esi+8], 0x00000A0D
3083	leency	2644	.no_newline:
		2645
3496	Asper	2646	push eax
		2647	test [flags], 0x1 ; skip zero bits ?
		2648	jz .no_skipz
		2649	mov ecx, 8
3083	leency	2650	@@:
3496	Asper	2651	test eax, 0xF0000000
		2652	jnz .skipz_done
		2653	rol eax, 4
		2654	inc esi
		2655	dec ecx
		2656	jnz @b
		2657	dec esi
3083	leency	2658	.skipz_done:
		2659	.no_skipz:
3496	Asper	2660	pop eax
3083	leency	2661
3496	Asper	2662	pop ecx ebx eax
		2663	ret
3083	leency	2664	endp
		2665
		2666	hexletters db '0123456789ABCDEF'
		2667	hex_buff db 8 dup(0),13,10,0,0
		2668
		2669
3085	leency	2670	include "CODEC.INC"
3083	leency	2671	include "hda_generic.inc"
		2672
		2673	align 4
		2674	devices:
		2675	; Intel
		2676	dd (CTRL_INTEL_SCH2 shl 16)+VID_INTEL,msg_INTEL_SCH2, AZX_DRIVER_SCH
		2677	dd (CTRL_INTEL_HPT shl 16)+VID_INTEL,msg_INTEL_HPT, AZX_DRIVER_SCH
		2678	dd (CTRL_INTEL_CPT shl 16)+VID_INTEL,msg_INTEL_CPT, AZX_DRIVER_PCH
		2679	dd (CTRL_INTEL_PGB shl 16)+VID_INTEL,msg_INTEL_PGB, AZX_DRIVER_PCH
		2680	dd (CTRL_INTEL_PPT1 shl 16)+VID_INTEL,msg_INTEL_PPT1, AZX_DRIVER_PCH
		2681	dd (CTRL_INTEL_82801F shl 16)+VID_INTEL,msg_INTEL_82801F, AZX_DRIVER_ICH
		2682	dd (CTRL_INTEL_63XXESB shl 16)+VID_INTEL,msg_INTEL_63XXESB, AZX_DRIVER_ICH
		2683	dd (CTRL_INTEL_82801G shl 16)+VID_INTEL,msg_INTEL_82801G, AZX_DRIVER_ICH
		2684	dd (CTRL_INTEL_82801H shl 16)+VID_INTEL,msg_INTEL_82801H, AZX_DRIVER_ICH
		2685	dd (CTRL_INTEL_82801_UNK1 shl 16)+VID_INTEL,msg_INTEL_82801_UNK1, AZX_DRIVER_ICH
		2686	dd (CTRL_INTEL_82801I shl 16)+VID_INTEL,msg_INTEL_82801I, AZX_DRIVER_ICH
		2687	dd (CTRL_INTEL_82801_UNK2 shl 16)+VID_INTEL,msg_INTEL_82801_UNK2, AZX_DRIVER_ICH
		2688	dd (CTRL_INTEL_82801JI shl 16)+VID_INTEL,msg_INTEL_82801JI, AZX_DRIVER_ICH
		2689	dd (CTRL_INTEL_82801JD shl 16)+VID_INTEL,msg_INTEL_82801JD, AZX_DRIVER_ICH
		2690	dd (CTRL_INTEL_PCH shl 16)+VID_INTEL,msg_INTEL_PCH, AZX_DRIVER_PCH
		2691	dd (CTRL_INTEL_PCH2 shl 16)+VID_INTEL,msg_INTEL_PCH2, AZX_DRIVER_PCH
		2692	dd (CTRL_INTEL_SCH shl 16)+VID_INTEL,msg_INTEL_SCH, AZX_DRIVER_SCH
		2693	dd (CTRL_INTEL_LPT shl 16)+VID_INTEL,msg_INTEL_LPT, AZX_DRIVER_PCH
		2694	; Nvidia
		2695	dd (CTRL_NVIDIA_MCP51 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP51, AZX_DRIVER_NVIDIA
		2696	dd (CTRL_NVIDIA_MCP55 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP55, AZX_DRIVER_NVIDIA
		2697	dd (CTRL_NVIDIA_MCP61_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP61, AZX_DRIVER_NVIDIA
		2698	dd (CTRL_NVIDIA_MCP61_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP61, AZX_DRIVER_NVIDIA
		2699	dd (CTRL_NVIDIA_MCP65_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP65, AZX_DRIVER_NVIDIA
		2700	dd (CTRL_NVIDIA_MCP65_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP65, AZX_DRIVER_NVIDIA
		2701	dd (CTRL_NVIDIA_MCP67_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP67, AZX_DRIVER_NVIDIA
		2702	dd (CTRL_NVIDIA_MCP67_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP67, AZX_DRIVER_NVIDIA
		2703	dd (CTRL_NVIDIA_MCP73_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP73, AZX_DRIVER_NVIDIA
		2704	dd (CTRL_NVIDIA_MCP73_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP73, AZX_DRIVER_NVIDIA
		2705	dd (CTRL_NVIDIA_MCP78_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78, AZX_DRIVER_NVIDIA
		2706	dd (CTRL_NVIDIA_MCP78_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78, AZX_DRIVER_NVIDIA
		2707	dd (CTRL_NVIDIA_MCP78_3 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78, AZX_DRIVER_NVIDIA
		2708	dd (CTRL_NVIDIA_MCP78_4 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78, AZX_DRIVER_NVIDIA
		2709	dd (CTRL_NVIDIA_MCP79_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79, AZX_DRIVER_NVIDIA
		2710	dd (CTRL_NVIDIA_MCP79_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79, AZX_DRIVER_NVIDIA
		2711	dd (CTRL_NVIDIA_MCP79_3 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79, AZX_DRIVER_NVIDIA
		2712	dd (CTRL_NVIDIA_MCP79_4 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79, AZX_DRIVER_NVIDIA
		2713	dd (CTRL_NVIDIA_0BE2 shl 16)+VID_NVIDIA,msg_NVIDIA_0BE2, AZX_DRIVER_NVIDIA
		2714	dd (CTRL_NVIDIA_0BE3 shl 16)+VID_NVIDIA,msg_NVIDIA_0BE3, AZX_DRIVER_NVIDIA
		2715	dd (CTRL_NVIDIA_0BE4 shl 16)+VID_NVIDIA,msg_NVIDIA_0BE4, AZX_DRIVER_NVIDIA
		2716	dd (CTRL_NVIDIA_GT100 shl 16)+VID_NVIDIA,msg_NVIDIA_GT100, AZX_DRIVER_NVIDIA
		2717	dd (CTRL_NVIDIA_GT106 shl 16)+VID_NVIDIA,msg_NVIDIA_GT106, AZX_DRIVER_NVIDIA
		2718	dd (CTRL_NVIDIA_GT108 shl 16)+VID_NVIDIA,msg_NVIDIA_GT108, AZX_DRIVER_NVIDIA
		2719	dd (CTRL_NVIDIA_GT104 shl 16)+VID_NVIDIA,msg_NVIDIA_GT104, AZX_DRIVER_NVIDIA
		2720	dd (CTRL_NVIDIA_GT116 shl 16)+VID_NVIDIA,msg_NVIDIA_GT116, AZX_DRIVER_NVIDIA
		2721	dd (CTRL_NVIDIA_MCP89_1 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89, AZX_DRIVER_NVIDIA
		2722	dd (CTRL_NVIDIA_MCP89_2 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89, AZX_DRIVER_NVIDIA
		2723	dd (CTRL_NVIDIA_MCP89_3 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89, AZX_DRIVER_NVIDIA
		2724	dd (CTRL_NVIDIA_MCP89_4 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89, AZX_DRIVER_NVIDIA
		2725	dd (CTRL_NVIDIA_GF119 shl 16)+VID_NVIDIA,msg_NVIDIA_GF119, AZX_DRIVER_NVIDIA
		2726	dd (CTRL_NVIDIA_GF110_1 shl 16)+VID_NVIDIA,msg_NVIDIA_GF110, AZX_DRIVER_NVIDIA
		2727	dd (CTRL_NVIDIA_GF110_2 shl 16)+VID_NVIDIA,msg_NVIDIA_GF110, AZX_DRIVER_NVIDIA
		2728	; ATI
		2729	dd (CTRL_ATI_SB450 shl 16)+VID_ATI,msg_ATI_SB450, AZX_DRIVER_ATI
		2730	dd (CTRL_ATI_SB600 shl 16)+VID_ATI,msg_ATI_SB600, AZX_DRIVER_ATI
		2731	dd (CTRL_ATI_RS600 shl 16)+VID_ATI,msg_ATI_RS600, AZX_DRIVER_ATIHDMI
		2732	dd (CTRL_ATI_RS690 shl 16)+VID_ATI,msg_ATI_RS690, AZX_DRIVER_ATIHDMI
		2733	dd (CTRL_ATI_RS780 shl 16)+VID_ATI,msg_ATI_RS780, AZX_DRIVER_ATIHDMI
		2734	dd (CTRL_ATI_RS_UNK1 shl 16)+VID_ATI,msg_ATI_RS_UNK1, AZX_DRIVER_ATIHDMI
		2735	dd (CTRL_ATI_R600 shl 16)+VID_ATI,msg_ATI_R600, AZX_DRIVER_ATIHDMI
		2736	dd (CTRL_ATI_RV610 shl 16)+VID_ATI,msg_ATI_RV610, AZX_DRIVER_ATIHDMI
		2737	dd (CTRL_ATI_RV620 shl 16)+VID_ATI,msg_ATI_RV620, AZX_DRIVER_ATIHDMI
		2738	dd (CTRL_ATI_RV630 shl 16)+VID_ATI,msg_ATI_RV630, AZX_DRIVER_ATIHDMI
		2739	dd (CTRL_ATI_RV635 shl 16)+VID_ATI,msg_ATI_RV635, AZX_DRIVER_ATIHDMI
		2740	dd (CTRL_ATI_RV670 shl 16)+VID_ATI,msg_ATI_RV670, AZX_DRIVER_ATIHDMI
		2741	dd (CTRL_ATI_RV710 shl 16)+VID_ATI,msg_ATI_RV710, AZX_DRIVER_ATIHDMI
		2742	dd (CTRL_ATI_RV730 shl 16)+VID_ATI,msg_ATI_RV730, AZX_DRIVER_ATIHDMI
		2743	dd (CTRL_ATI_RV740 shl 16)+VID_ATI,msg_ATI_RV740, AZX_DRIVER_ATIHDMI
		2744	dd (CTRL_ATI_RV770 shl 16)+VID_ATI,msg_ATI_RV770, AZX_DRIVER_ATIHDMI
		2745	; AMD
		2746	dd (CTRL_AMD_HUDSON shl 16)+VID_AMD,msg_AMD_HUDSON, AZX_DRIVER_GENERIC
		2747	; VIA
		2748	dd (CTRL_VIA_VT82XX shl 16)+VID_VIA,msg_VIA_VT82XX, AZX_DRIVER_VIA
		2749	dd (CTRL_VIA_VT61XX shl 16)+VID_VIA,msg_VIA_VT61XX, AZX_DRIVER_GENERIC
		2750	dd (CTRL_VIA_VT71XX shl 16)+VID_VIA,msg_VIA_VT71XX, AZX_DRIVER_GENERIC
		2751	; SiS
		2752	dd (CTRL_SIS_966 shl 16)+VID_SIS,msg_SIS_966, AZX_DRIVER_SIS
		2753	; ULI
		2754	dd (CTRL_ULI_M5461 shl 16)+VID_ULI,msg_ULI_M5461, AZX_DRIVER_ULI
		2755	; Teradici
		2756	dd (CTRL_TERA_UNK1 shl 16)+VID_ULI,msg_TERA_UNK1, AZX_DRIVER_TERA
		2757	; Creative
		2758	dd (CTRL_CREATIVE_CA0110_IBG shl 16)+VID_CREATIVE,msg_CREATIVE_CA0110_IBG, AZX_DRIVER_CTX
		2759	dd (CTRL_CREATIVE_SOUND_CORE3D_1 shl 16)+VID_CREATIVE,msg_CREATIVE_SOUND_CORE3D, AZX_DRIVER_GENERIC
		2760	dd (CTRL_CREATIVE_SOUND_CORE3D_2 shl 16)+VID_CREATIVE,msg_CREATIVE_SOUND_CORE3D, AZX_DRIVER_GENERIC
		2761	; RDC Semiconductor
		2762	dd (CTRL_RDC_R3010 shl 16)+VID_RDC,msg_RDC_R3010, AZX_DRIVER_GENERIC
		2763	; VMware
		2764	dd (CTRL_VMWARE_UNK1 shl 16)+VID_VMWARE,msg_VMWARE_UNK1, AZX_DRIVER_GENERIC
		2765
		2766	dd 0 ;terminator
		2767
		2768
		2769	version dd (5 shl 16) or (API_VERSION and 0xFFFF)
		2770
		2771	msg_Intel db 'Intel ',0
		2772	msg_INTEL_CPT db 'Cougar Point',13,10,0
		2773	msg_INTEL_PGB db 'Patsburg',13,10,0
		2774	msg_INTEL_PPT1 db 'Panther Point',13,10,0
		2775	msg_INTEL_LPT db 'Lynx Point',13,10,0
		2776	msg_INTEL_HPT db 'Haswell',13,10,0
		2777	msg_INTEL_82801F db '82801F',13,10,0
		2778	msg_INTEL_63XXESB db '631x/632xESB',13,10,0
		2779	msg_INTEL_82801G db '82801G', 13,10,0
		2780	msg_INTEL_82801H db '82801H', 13,10,0
		2781	msg_INTEL_82801I db '82801I', 13,10,0
		2782	msg_INTEL_82801JI db '82801JI',13,10,0
		2783	msg_INTEL_82801JD db '82801JD',13,10,0
		2784	msg_INTEL_PCH db 'PCH',13,10,0
		2785	msg_INTEL_PCH2 db 'PCH2',13,10,0
		2786	msg_INTEL_SCH db 'Poulsbo',13,10,0
		2787	msg_INTEL_SCH2 db 'Oaktrail',13,10,0
		2788	msg_INTEL_82801_UNK1 db '82801_UNK1', 13,10,0
		2789	msg_INTEL_82801_UNK2 db '82801_UNK2', 13,10,0
		2790
		2791	msg_NVidia db 'NVidia ',0
		2792	msg_NVIDIA_MCP51 db 'MCP51', 13,10,0
		2793	msg_NVIDIA_MCP55 db 'MCP55', 13,10,0
		2794	msg_NVIDIA_MCP61 db 'MCP61', 13,10,0
		2795	msg_NVIDIA_MCP65 db 'MCP65', 13,10,0
		2796	msg_NVIDIA_MCP67 db 'MCP67', 13,10,0
		2797	msg_NVIDIA_MCP73 db 'MCP73', 13,10,0
		2798	msg_NVIDIA_MCP78 db 'MCP78', 13,10,0
		2799	msg_NVIDIA_MCP79 db 'MCP79', 13,10,0
		2800	msg_NVIDIA_MCP89 db 'MCP89', 13,10,0
		2801	msg_NVIDIA_0BE2 db '(0x0be2)', 13,10,0
		2802	msg_NVIDIA_0BE3 db '(0x0be3)', 13,10,0
		2803	msg_NVIDIA_0BE4 db '(0x0be4)', 13,10,0
		2804	msg_NVIDIA_GT100 db 'GT100', 13,10,0
		2805	msg_NVIDIA_GT104 db 'GT104', 13,10,0
		2806	msg_NVIDIA_GT106 db 'GT106', 13,10,0
		2807	msg_NVIDIA_GT108 db 'GT108', 13,10,0
		2808	msg_NVIDIA_GT116 db 'GT116', 13,10,0
		2809	msg_NVIDIA_GF119 db 'GF119', 13,10,0
		2810	msg_NVIDIA_GF110 db 'GF110', 13,10,0
		2811
		2812	msg_ATI db 'ATI ',0
		2813	msg_ATI_SB450 db 'SB450', 13,10,0
		2814	msg_ATI_SB600 db 'SB600', 13,10,0
		2815
		2816	msg_ATI_HDMI db 'ATI HDMI ',0
		2817	msg_ATI_RS600 db 'RS600', 13,10,0
		2818	msg_ATI_RS690 db 'RS690', 13,10,0
		2819	msg_ATI_RS780 db 'RS780', 13,10,0
		2820	msg_ATI_RS_UNK1 db 'RS_UNK1', 13,10,0
		2821	msg_ATI_R600 db 'R600', 13,10,0
		2822	msg_ATI_RV610 db 'RV610', 13,10,0
		2823	msg_ATI_RV620 db 'RV620', 13,10,0
		2824	msg_ATI_RV630 db 'RV630', 13,10,0
		2825	msg_ATI_RV635 db 'RV635', 13,10,0
		2826	msg_ATI_RV670 db 'RV670', 13,10,0
		2827	msg_ATI_RV710 db 'RV710', 13,10,0
		2828	msg_ATI_RV730 db 'RV730', 13,10,0
		2829	msg_ATI_RV740 db 'RV740', 13,10,0
		2830	msg_ATI_RV770 db 'RV770', 13,10,0
		2831
		2832	msg_AMD db 'AMD ',0
		2833	msg_AMD_HUDSON db 'Hudson', 13,10,0
		2834
		2835	msg_VIA db 'VIA ',0
		2836	msg_VIA_VT82XX db 'VT8251/8237A', 13,10,0
		2837	msg_VIA_VT61XX db 'GFX VT6122/VX11', 13,10,0
		2838	msg_VIA_VT71XX db 'GFX VT7122/VX900', 13,10,0
		2839
		2840	msg_SIS db 'SIS ',0
		2841	msg_SIS_966 db '966', 13,10,0
		2842
		2843	msg_ULI db 'ULI ',0
		2844	msg_ULI_M5461 db 'M5461', 13,10,0
		2845
		2846	msg_TERA db 'Teradici ',0
		2847	msg_TERA_UNK1 db 'UNK1', 13,10,0
		2848
		2849	msg_CREATIVE db 'Creative ',0
		2850	msg_CREATIVE_CA0110_IBG db 'CA0110-IBG',13,10,0 ;SB X-Fi Xtreme Audio
		2851	msg_CREATIVE_SOUND_CORE3D db 'Sound Core3D'
		2852
		2853	msg_RDC db 'RDC ',0
		2854	msg_RDC_R3010 db 'R3010', 13,10,0
		2855
		2856	msg_VMWARE db 'VMware ',0
		2857	msg_VMWARE_UNK1 db 'UNK1', 13,10,0
		2858
		2859	szKernel db 'KERNEL',0
		2860	sz_sound_srv db 'SOUND',0
		2861
		2862	msgInit db 'detect hardware...',13,10,0
		2863	msgFail db 'device not found',13,10,0
		2864	msgAttchIRQ db 'IRQ line not supported', 13,10,0
		2865	msgInvIRQ db 'IRQ line not assigned or invalid', 13,10,0
		2866	msgPlay db 'start play', 13,10,0
		2867	msgStop db 'stop play', 13,10,0
		2868	msgSetChannelVolume db 'Set Channel Volume', 13,10,0
		2869	msgIRQ db 'HDA IRQ', 13,10,0
		2870	msgInitCtrl db 'init controller',13,10,0
		2871	msgPrimBuff db 'create primary buffer ...',0
		2872	msgDone db 'done',13,10,0
		2873	msgRemap db 'Remap IRQ',13,10,0
		2874	msgOk db 'service installed',13,10,0
		2875	msgCold db 'cold reset',13,10,0
		2876	msgHDARFail db 'controller not ready',13,10,0
		2877	msgCFail db 'codec not ready',13,10,0
		2878	msgResetOk db 'reset complete',13,10,0
		2879	msgPciCmd db 'PCI command ',0
		2880	msgPciStat db 'PCI status ',0
		2881	msgHDALowMMIo db 'lower mmio base ',0
		2882	msgHDAUpMMIo db 'upper mmio base ',0
		2883	msgIrqMap db 'HDA irq map as ',0
		2884
		2885	;Asper [
		2886	if DEBUG
		2887	msgCodecMask db 'codec_mask = ',0
		2888	msgNoCodecsFound db 'no codecs found!',13,10,0
		2889	msgHDASnoopDisabled db 'HDA snoop disabled, enabling ... ',0
		2890	msg_OK db 'OK',13,10,0
		2891	msg_Fail db 'Failed',13,10,0
		2892	msgSpuriousResponce db 'spurious responce ',0
		2893	emsgInvalidAFGSubtree db 'Invalid AFG subtree',13,10,0
		2894	emsgConnListNotAvailable db 'connection list not available for ',0
		2895	msgUnmuteOut db 'UNMUTE OUT: NID=',0
		2896	msgUnmuteIn db 'UNMUTE IN: NID=',0
		2897	msgGetResponceTimeout db 'get_response timeout: ',0
		2898	msgVal db ' val=',0
		2899	emsgBusResetFatalComm db 'resetting BUS due to fatal communication error',13,10,0
		2900	msgCodecOK db 'codec probed OK',13,10,0
		2901	msgCodecError db 'codec probe error disabling it...',13,10,0
		2902	emsgNoAFGorMFGFound db 'no AFG or MFG node found',13,10,0
		2903	emsgNoMem db 'hda_codec: cannot malloc',13,10,0
		2904	msgConnect db 'CONNECT: NID=',0
		2905	msgIdx db ' IDX=',0
		2906	msgSkipDigitalOutNode db 'Skip Digital OUT node ',0
		2907	msgAudOutFound db 'AUD_OUT found ',0
		2908	emsgNoParserAvailable db 'No codec parser is available',13,10,0
		2909	emsgNoProperOutputPathFound db 'hda_generic: no proper output path found',13,10,0
		2910	emsgInvConnList db 'hda_codec: invalid CONNECT_LIST verb ',0
		2911	emsgInvDepRangeVal db 'hda_codec: invalid dep_range_val ',0
		2912	emsgTooManyConns db 'Too many connections',13,10,0
		2913	emsgNoVolCtrl db 'No volume control',13,10,0
		2914	msgHDACodecSetupStream db 'hda_codec_setup_stream: NID=',0
		2915	msgStream db 'stream=',0
		2916	msgChannel db 'channel=',0
		2917	msgFormat db 'format=',0
		2918
		2919	msgPollingCodecOnce db 'polling the codec once',13,10,0 ;Asper~
		2920	msgSwitchToPollMode db 'switching to polling mode',13,10,0 ;Asper~
		2921
		2922	msgUnsolEvent db 'Unsolicited event!',13,10,0
		2923	strSemicolon db ':',0
		2924	msgSETUP_FG_NODES db 'Setup FG nodes = start_nid:total_nodes = ',0
		2925	msgFG_TYPE db 'FG type = ',0
		2926	msgPinCfgs db 'Pin configurations:',13,10,0
		2927	msgWCaps db 'Widget capabilities:',13,10,0
		2928	msgCAd db 'CAd = ',0
		2929	msgTCSEL db 'PCI TCSEL ',0
		2930	msgTV db 'HDA test version ',TEST_VERSION_NUMBER,13,10,0
		2931	msgGCap db 'GCAP = ',0
		2932	end if
		2933
		2934	if USE_SINGLE_MODE
		2935	msgSingleMode db 'Single mode !',13,10,0
		2936	msgIRS db 'IRS=',0
		2937	msgSendCmdTimeout db 'send_cmd timeout: IRS=',0
		2938	else
		2939	msgNormalMode db 'Normal mode !',13,10,0
		2940	end if
		2941
		2942	if DEBUG
		2943	msgYAHOO2 db 'YAHOO2: ',0
		2944	msgMaxVolume db 'MaxVolume: ',0
		2945	msgNewVolume db 'NewVolume: ',0
		2946
		2947	msgVerbQuery db 'Q: ',0
		2948	msgVerbAnswer db 'A: ',0
		2949	msgPin_Nid db 'Pin Nid = ',0
		2950	msgPin_Ctl db 'Pin Control = ',0
		2951	msgPin_Caps db 'Pin Capabilities = ',0
		2952	msgDef_Cfg db 'Pin def_cfg = ',0
		2953	msgAmp_Out_Caps db 'Pin Amp Out caps = ',0
		2954	msgAmpVal db 'Amp val = ',0
		2955	msgEnableEAPD db 'Enable EAPD: NID=',0
		2956	msgBeeperNid db 'Beeper found: NID=',0
		2957	msgBeeperValue db 'Beeper initial value: ',0
		2958	msgBeepNow db 'Beep!',13,10,0
		2959	end if
		2960
		2961	;] Asper
		2962
		2963
		2964	section '.data' data readable writable align 16
		2965
3496	Asper	2966	aspinlock dd SPINLOCK_FREE
3083	leency	2967
		2968	codec CODEC
		2969	ctrl AC_CNTRL
		2970
		2971	;Asper: BDL must be aligned to 128 according to HDA specification.
		2972	pcmout_bdl rd 1
		2973	buff_list rd 32
		2974
		2975	driver_type rd 1

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(root)/drivers/audio/intel_hda/intel_hda.asm – Rev 3594