Subversion Repositories Kolibri OS

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;; Copyright (C) KolibriOS team 2004-2012. All rights reserved. ;;

;; Distributed under terms of the GNU General Public License    ;;

;;                                                              ;;

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format MS COFF

DEBUG		equ 1

FDEBUG		equ 1

DEBUG_IRQ	equ 0

USE_SINGLE_MODE   equ  0   ; 1 = Single mode; 0 = Normal mode.

TEST_VERSION_NUMBER  equ '018b'

;Asper+ [

SDO_TAG  equ 1	      ;Asper: Output stream tag id (any number except 0)

SDO_IDX  equ 4	      ;Asper: Output stream index

;According to "Intel® I/O Controller Hub 6 (ICH6) High Definition Audio / AC ’97 Programmer’s Reference Manual (PRM) May 2005 Document"

;and "Intel® I/O Controller Hub 6 (ICH6) Family Datasheet" SDO0=4,

;but according to "High Definition Audio Specification Revision 1.0a June 17, 2010" SDO0 depends on the number of SDIs.

SDO_INT  equ 1 shl SDO_IDX  ;Asper: Output stream interrupt (must be power of 2)

SDO_OFS  equ 0x80+(SDO_IDX*0x20) ;Asper: Output stream offset

;Asper+ ]

include 'proc32.inc'

include 'imports.inc'

include 'codec_h.inc'

CURRENT_API	equ   0x0100	  ;1.00

COMPATIBLE_API	equ   0x0101	  ;1.01

API_VERSION	equ   (COMPATIBLE_API shl 16) or CURRENT_API

IRQ_REMAP	equ 0

IRQ_LINE	equ 0

CPU_FREQ	equ  2600d

; Vendors

VID_INTEL	  equ 0x8086

VID_NVIDIA	  equ 0x10DE

VID_ATI 	  equ 0x1002

VID_AMD 	  equ 0x1022

VID_VIA 	  equ 0x1006

VID_SIS 	  equ 0x1039

VID_ULI 	  equ 0x10B9

VID_CREATIVE	  equ 0x1102

VID_TERA	  equ 0x6549

VID_RDC 	  equ 0x17F3

VID_VMWARE	  equ 0x15AD

; Devices

; Intel

CTRL_INTEL_SCH2 	 equ  0x080a

CTRL_INTEL_HPT		 equ  0x0c0c

CTRL_INTEL_CPT		 equ  0x1c20

CTRL_INTEL_PGB		 equ  0x1d20

CTRL_INTEL_PPT1 	 equ  0x1e20

CTRL_INTEL_82801F	 equ  0x2668

CTRL_INTEL_63XXESB	 equ  0x269a

CTRL_INTEL_82801G	 equ  0x27d8

CTRL_INTEL_82801H	 equ  0x284b

CTRL_INTEL_82801_UNK1	 equ  0x2911

CTRL_INTEL_82801I	 equ  0x293e

CTRL_INTEL_82801_UNK2	 equ  0x293f

CTRL_INTEL_82801JI	 equ  0x3a3e

CTRL_INTEL_82801JD	 equ  0x3a6e

CTRL_INTEL_PCH		 equ  0x3b56

CTRL_INTEL_PCH2 	 equ  0x3b57

CTRL_INTEL_SCH		 equ  0x811b

CTRL_INTEL_LPT		 equ  0x8c20

; Nvidia

CTRL_NVIDIA_MCP51	 equ  0x026c

CTRL_NVIDIA_MCP55	 equ  0x0371

CTRL_NVIDIA_MCP61_1	 equ  0x03e4

CTRL_NVIDIA_MCP61_2	 equ  0x03f0

CTRL_NVIDIA_MCP65_1	 equ  0x044a

CTRL_NVIDIA_MCP65_2	 equ  0x044b

CTRL_NVIDIA_MCP67_1	 equ  0x055c

CTRL_NVIDIA_MCP67_2	 equ  0x055d

CTRL_NVIDIA_MCP78_1	 equ  0x0774

CTRL_NVIDIA_MCP78_2	 equ  0x0775

CTRL_NVIDIA_MCP78_3	 equ  0x0776

CTRL_NVIDIA_MCP78_4	 equ  0x0777

CTRL_NVIDIA_MCP73_1	 equ  0x07fc

CTRL_NVIDIA_MCP73_2	 equ  0x07fd

CTRL_NVIDIA_MCP79_1	 equ  0x0ac0

CTRL_NVIDIA_MCP79_2	 equ  0x0ac1

CTRL_NVIDIA_MCP79_3	 equ  0x0ac2

CTRL_NVIDIA_MCP79_4	 equ  0x0ac3

CTRL_NVIDIA_0BE2	 equ  0x0be2

CTRL_NVIDIA_0BE3	 equ  0x0be3

CTRL_NVIDIA_0BE4	 equ  0x0be4

CTRL_NVIDIA_GT100	 equ  0x0be5

CTRL_NVIDIA_GT106	 equ  0x0be9

CTRL_NVIDIA_GT108	 equ  0x0bea

CTRL_NVIDIA_GT104	 equ  0x0beb

CTRL_NVIDIA_GT116	 equ  0x0bee

CTRL_NVIDIA_MCP89_1	 equ  0x0d94

CTRL_NVIDIA_MCP89_2	 equ  0x0d95

CTRL_NVIDIA_MCP89_3	 equ  0x0d96

CTRL_NVIDIA_MCP89_4	 equ  0x0d97

CTRL_NVIDIA_GF119	 equ  0x0e08

CTRL_NVIDIA_GF110_1	 equ  0x0e09

CTRL_NVIDIA_GF110_2	 equ  0x0e0c

; ATI

CTRL_ATI_SB450		 equ  0x437b

CTRL_ATI_SB600		 equ  0x4383

; ATI HDMI

CTRL_ATI_RS600		 equ  0x793b

CTRL_ATI_RS690		 equ  0x7919

CTRL_ATI_RS780		 equ  0x960f

CTRL_ATI_RS_UNK1	 equ  0x970f

CTRL_ATI_R600		 equ  0xaa00

CTRL_ATI_RV630		 equ  0xaa08

CTRL_ATI_RV610		 equ  0xaa10

CTRL_ATI_RV670		 equ  0xaa18

CTRL_ATI_RV635		 equ  0xaa20

CTRL_ATI_RV620		 equ  0xaa28

CTRL_ATI_RV770		 equ  0xaa30

CTRL_ATI_RV730		 equ  0xaa38

CTRL_ATI_RV710		 equ  0xaa40

CTRL_ATI_RV740		 equ  0xaa48

; AMD

CTRL_AMD_HUDSON 	 equ  0x780d

; VIA

CTRL_VIA_VT82XX 	 equ  0x3288

CTRL_VIA_VT61XX 	 equ  0x9140

CTRL_VIA_VT71XX 	 equ  0x9170

; SiS

CTRL_SIS_966		 equ  0x7502

; ULI

CTRL_ULI_M5461		 equ  0x5461

; Creative

CTRL_CREATIVE_CA0110_IBG     equ  0x0009

CTRL_CREATIVE_SOUND_CORE3D_1 equ  0x0010

CTRL_CREATIVE_SOUND_CORE3D_2 equ  0x0012

; Teradici

CTRL_TERA_UNK1		 equ  0x1200

; RDC Semiconductor

CTRL_RDC_R3010		 equ  0x3010

;VMware

CTRL_VMWARE_UNK1	 equ  0x1977

; driver types

AZX_DRIVER_ICH		 equ  0

AZX_DRIVER_PCH		 equ  1

AZX_DRIVER_SCH		 equ  2

AZX_DRIVER_ATI		 equ  3

AZX_DRIVER_ATIHDMI	 equ  4

AZX_DRIVER_VIA		 equ  5

AZX_DRIVER_SIS		 equ  6

AZX_DRIVER_ULI		 equ  7

AZX_DRIVER_NVIDIA	 equ  8

AZX_DRIVER_TERA 	 equ  9

AZX_DRIVER_CTX		 equ  10

AZX_DRIVER_GENERIC	 equ  11

AZX_NUM_DRIVERS 	 equ  12

; registers

ICH6_REG_GCAP		 equ  0x00

ICH6_REG_VMIN		 equ  0x02

ICH6_REG_VMAJ		 equ  0x03

ICH6_REG_OUTPAY 	 equ  0x04

ICH6_REG_INPAY		 equ  0x06

ICH6_REG_GCTL		 equ  0x08

  ICH6_GCTL_RESET	   equ	(1 shl 0)  ; controller reset

  ICH6_GCTL_FCNTRL	   equ	(1 shl 1)  ; flush control

  ICH6_GCTL_UNSOL	   equ	(1 shl 8)  ; accept unsol. response enable

ICH6_REG_WAKEEN 	 equ  0x0c

ICH6_REG_STATESTS	 equ  0x0e

ICH6_REG_GSTS		 equ  0x10

  ICH6_GSTS_FSTS	   equ	(1 shl 1)  ; flush status

ICH6_REG_INTCTL 	 equ  0x20

ICH6_REG_INTSTS 	 equ  0x24

ICH6_REG_WALLCLK	 equ  0x30  ; 24Mhz source

ICH6_REG_OLD_SSYNC	 equ  0x34  ; SSYNC for old ICH

ICH6_REG_SSYNC		 equ  0x38

ICH6_REG_CORBLBASE	 equ  0x40

ICH6_REG_CORBUBASE	 equ  0x44

ICH6_REG_CORBWP 	 equ  0x48

ICH6_REG_CORBRP 	 equ  0x4A

  ICH6_CORBRP_RST	   equ	(1 shl 15)  ; read pointer reset

ICH6_REG_CORBCTL	 equ  0x4c

  ICH6_CORBCTL_RUN	   equ	(1 shl 1)   ; enable DMA

  ICH6_CORBCTL_CMEIE	   equ	(1 shl 0)   ; enable memory error irq

ICH6_REG_CORBSTS	 equ  0x4d

  ICH6_CORBSTS_CMEI	   equ	(1 shl 0)   ; memory error indication

ICH6_REG_CORBSIZE	 equ  0x4e

ICH6_REG_RIRBLBASE	 equ  0x50

ICH6_REG_RIRBUBASE	 equ  0x54

ICH6_REG_RIRBWP 	 equ  0x58

  ICH6_RIRBWP_RST	   equ	(1 shl 15)  ; write pointer reset

ICH6_REG_RINTCNT	 equ  0x5a

ICH6_REG_RIRBCTL	 equ  0x5c

  ICH6_RBCTL_IRQ_EN	   equ	(1 shl 0)   ; enable IRQ

  ICH6_RBCTL_DMA_EN	   equ	(1 shl 1)   ; enable DMA

  ICH6_RBCTL_OVERRUN_EN    equ	(1 shl 2)   ; enable overrun irq

ICH6_REG_RIRBSTS	 equ  0x5d

  ICH6_RBSTS_IRQ	   equ	(1 shl 0)   ; response irq

  ICH6_RBSTS_OVERRUN	   equ	(1 shl 2)   ; overrun irq

ICH6_REG_RIRBSIZE	 equ  0x5e

ICH6_REG_IC		 equ  0x60

ICH6_REG_IR		 equ  0x64

ICH6_REG_IRS		 equ  0x68

  ICH6_IRS_VALID	   equ	2

  ICH6_IRS_BUSY 	   equ	1

ICH6_REG_DPLBASE	 equ  0x70

ICH6_REG_DPUBASE	 equ  0x74

  ICH6_DPLBASE_ENABLE	   equ	1     ; Enable position buffer

; SD offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */

SDI0_SD_OFFSET	  equ  0x80

SDI1_SD_OFFSET	  equ  0xA0

SDI2_SD_OFFSET	  equ  0xC0

SDI3_SD_OFFSET	  equ  0xE0

SDO0_SD_OFFSET	  equ  0x100

SDO1_SD_OFFSET	  equ  0x120

SDO2_SD_OFFSET	  equ  0X140

SDO3_SD_OFFSET	  equ  0x160

; stream register offsets from stream base

ICH6_REG_SD_CTL 	 equ  0x00

ICH6_REG_SD_STS 	 equ  0x03

ICH6_REG_SD_LPIB	 equ  0x04

ICH6_REG_SD_CBL 	 equ  0x08

ICH6_REG_SD_LVI 	 equ  0x0c

ICH6_REG_SD_FIFOW	 equ  0x0e

ICH6_REG_SD_FIFOSIZE	 equ  0x10

ICH6_REG_SD_FORMAT	 equ  0x12

ICH6_REG_SD_BDLPL	 equ  0x18

ICH6_REG_SD_BDLPU	 equ  0x1c

; PCI space

ICH6_PCIREG_TCSEL	 equ  0x44

; other constants

ICH6_RIRB_EX_UNSOL_EV	 equ   (1 shl 4)

; max number of SDs

MAX_ICH6_DEV		 equ  8

; max number of fragments - we may use more if allocating more pages for BDL

AZX_MAX_FRAG		 equ  (4096 / (MAX_ICH6_DEV * 16))

; max buffer size - no h/w limit, you can increase as you like

AZX_MAX_BUF_SIZE	 equ  (1024*1024*1024)

; max number of PCM devices per card

AZX_MAX_PCMS		 equ  8

; RIRB int mask: overrun[2], response[0]

RIRB_INT_RESPONSE	 equ  0x01

RIRB_INT_OVERRUN	 equ  0x04

RIRB_INT_MASK		 equ  0x05

; STATESTS int mask: SD2,SD1,SD0

STATESTS_INT_MASK	 equ  0x07

AZX_MAX_CODECS		 equ  4

; SD_CTL bits

SD_CTL_STREAM_RESET	 equ  0x01    ; stream reset bit

SD_CTL_DMA_START	 equ  0x02    ; stream DMA start bit

SD_CTL_STREAM_TAG_MASK	 equ  (0xf shl 20)

SD_CTL_STREAM_TAG_SHIFT  equ  20