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Rev | Author | Line No. | Line |
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981 | serge | 1 | |
2 | |||
3 | // |
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4 | #define CYRIX_VENDOR_ID 0x1078 |
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5 | #define NATIONAL_VENDOR_ID 0x100B |
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6 | |||
7 | // |
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8 | |||
9 | // |
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10 | #define CX5530_DEV_ID 0x0103 |
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11 | #define SC1200_DEV_ID 0x0503 |
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12 | #define CS5535_DEV_ID 0x002E |
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13 | |||
14 | // |
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15 | |||
16 | // |
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17 | #define PCI_FUNC3_AUDIO 0x300 |
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18 | #define PCI_AUDIO_CMD_REG 0x04 |
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19 | |||
20 | typedef unsigned char AUDIO_STATE; |
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21 | |||
22 | #define AUDIO_STATE_IGNORE 0 |
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23 | |||
24 | #define AUDIO_STATE_IN_OVERFLOW 0x02 |
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25 | #define AUDIO_STATE_IN_STOPPED 0x03 |
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26 | #define AUDIO_STATE_IN_MASK 0x0F |
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27 | #define AUDIO_STATE_OUT_PLAYING 0x10 |
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28 | #define AUDIO_STATE_OUT_UNDERFLOW 0x20 |
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29 | #define AUDIO_STATE_OUT_STOPPED 0x30 |
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30 | #define AUDIO_STATE_OUT_MASK 0xF0 |
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31 | |||
32 | #define RECORD_RUNNING 0x01 |
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33 | |||
34 | #define RECORD_STOPPED 0x03 |
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35 | |||
36 | #define PLAYBACK_RUNNING 0x10 |
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37 | |||
38 | #define PLAYBACK_STOPPED 0x30 |
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39 | |||
40 | // |
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41 | |||
42 | // the codec "target" register, identified by a byte. The 5530 Codec |
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43 | // controller writes a command unsigned short of 32-bits, that includes the codec |
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44 | // command unsigned short. |
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45 | // |
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46 | #define CODEC_COMMAND_MASK 0xFF00FFFF |
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47 | |||
48 | // |
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49 | |||
50 | // because of the serial interface. |
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51 | // |
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52 | #define CODEC_STATUS_REG 0x08 // In Audio mem-map. |
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53 | #define CODEC_CMD_REG 0x0c // In audio mem-map. |
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54 | #define CODEC_CMD_VALID 0x00010000 |
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55 | #define CODEC_STATUS_VALID 0x00020000 |
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56 | #define CODEC_STATUS_NEW 0x00010000 |
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57 | #define BIT_CODEC_READY 0x00800000 |
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58 | |||
59 | // |
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60 | |||
61 | // |
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62 | #define CODEC_STATUS_REG_5535 0x08 |
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63 | #define CODEC_CONTROL_REG_5535 0x0c |
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64 | |||
65 | // |
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66 | |||
67 | // |
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68 | #define BIT_5535_CODEC_COMMAND_NEW 0x00010000 |
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69 | #define BIT_5535_CODEC_STATUS_NEW 0x00020000 |
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70 | #define BIT_5535_ACLINK_SHUTDOWN 0x00040000 |
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71 | #define BIT_5535_ACLINK_WARM_RESET 0x00020000 |
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72 | #define BIT_5535_CODEC_READY_PRIM 0x00800000 |
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73 | |||
74 | // |
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75 | |||
76 | // |
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77 | #define RESET 0x00 |
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78 | #define MASTER_VOLUME 0x02 |
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79 | #define LINE_LEV_OUT_VOL 0x04 |
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80 | #define MASTER_VOLUME_MONO 0x06 |
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81 | #define MASTER_TONE_RL 0x08 |
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82 | #define PC_BEEP_VOLUME 0x0a |
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83 | #define PHONE_VOLUME 0x0c |
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84 | #define MIC_VOLUME 0x0e |
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85 | #define LINE_IN_VOLUME 0x10 |
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86 | #define CD_VOLUME 0x12 |
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87 | #define VIDEO_VOLUME 0x14 |
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88 | #define TV_VOLUME 0x16 |
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89 | #define PCM_OUT_VOL 0x18 |
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90 | #define RECORD_SELECT 0x1a |
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91 | #define RECORD_GAIN 0x1c |
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92 | #define RECORD_MIC_GAIN 0x1e |
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93 | #define GENERAL_PURPOSE 0x20 |
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94 | #define CONTROL_3D 0x22 |
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95 | #define MODEM_RATE 0x24 |
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96 | #define POWERDOWN_CTRL_STAT 0x26 |
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97 | #define EXTENDED_AUDIO_ID 0x28 |
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98 | #define EXT_AUDIO_CTRL_STAT 0x2A |
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99 | #define PCM_FRONT_DAC_RATE 0x2C |
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100 | #define PCM_LR_ADC_RATE 0x32 |
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101 | #define VENDOR_ID1 0x7c |
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102 | #define VENDOR_ID2 0x7e |
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103 | |||
104 | #define MUTE_MASK 0x8000 |
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105 | |||
106 | #define LINE_LEV_RESET_VOL 0x0000 // the reset without the mask |
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107 | |||
108 | #ifdef AC97_2DOT1_6BIT_COMPLIANT |
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109 | |||
110 | #else |
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111 | # define MASTER_ATTEN_CTL_BITS 5 |
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112 | #endif |
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113 | |||
114 | #define MASTER_VOLUME_MAX ( ( 1 << MASTER_ATTEN_CTL_BITS ) - 1 ) |
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115 | |||
116 | |||
117 | // |
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118 | |||
119 | // |
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120 | #define AD1819A_SER_CONF 0x74 |
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121 | #define AD1819A_SER_CONF_DRQEN 0x08 |
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122 | #define AD1819A_MISC 0x76 |
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123 | #define AD1819A_PCM_SR0 0x78 |
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124 | #define AD1819A_PCM_SR1 0x7A |
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125 | #define AD1819A_VENDORID1 0x7C |
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126 | #define AD1819A_VENDORID2 0x7E |
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127 | |||
128 | // |
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129 | |||
130 | // |
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131 | #define GEODEAUDIO_PWR_PR0 0x0100 // PCM in ADC's & input Mux Powerdown |
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132 | #define GEODEAUDIO_PWR_PR1 0x0200 // PCM out DACs Powerdown |
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133 | #define GEODEAUDIO_PWR_PR2 0x0400 // Analog Mixer powerdown (Vref still on) |
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134 | #define GEODEAUDIO_PWR_PR3 0x0800 // Analog Mxer powerdown (Vref off) |
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135 | #define GEODEAUDIO_PWR_PR4 0x1000 // Digital interface (AC-link) powerdown (external clk off) |
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136 | #define GEODEAUDIO_PWR_PR5 0x2000 // Internal Clk disable |
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137 | #define GEODEAUDIO_PWR_PR6 0x4000 // HP amp powerdown |
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138 | #define GEODEAUDIO_PWR_PR7 0x8000 // External Amplifier Power Down |
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139 | |||
140 | #define GEODEAUDIO_PWR_D0 0x0000 |
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141 | |||
142 | #define GEODEAUDIO_PWR_D2 GEODEAUDIO_PWR_PR0|GEODEAUDIO_PWR_PR1|GEODEAUDIO_PWR_PR2|GEODEAUDIO_PWR_PR6|GEODEAUDIO_PWR_PR7 |
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143 | #define GEODEAUDIO_PWR_D3 GEODEAUDIO_PWR_PR0|GEODEAUDIO_PWR_PR1|GEODEAUDIO_PWR_PR2|GEODEAUDIO_PWR_PR6|GEODEAUDIO_PWR_PR7 |
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144 | #define GEODEAUDIO_PWR_D4 GEODEAUDIO_PWR_PR0|GEODEAUDIO_PWR_PR1|GEODEAUDIO_PWR_PR2|GEODEAUDIO_PWR_PR3|GEODEAUDIO_PWR_PR4|GEODEAUDIO_PWR_PR5|GEODEAUDIO_PWR_PR6|GEODEAUDIO_PWR_PR7 |
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145 | #define GEODEAUDIO_PWR_ANLOFF GEODEAUDIO_PWR_PR2|GEODEAUDIO_PWR_PR3 // Analog section OFF |
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146 | #define GEODEAUDIO_PWR_EXTOFF GEODEAUDIO_PWR_PR6|GEODEAUDIO_PWR_PR7 // HP amp and External Amplifier OFF |
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147 | #define GEODEAUDIO_PWR_D1_HAWK GEODEAUDIO_PWR_PR0|GEODEAUDIO_PWR_PR1|GEODEAUDIO_PWR_PR2|GEODEAUDIO_PWR_PR3|GEODEAUDIO_PWR_PR4 |
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148 | #define GEODEAUDIO_PWR_DIGOFF GEODEAUDIO_PWR_PR0|GEODEAUDIO_PWR_PR1 // Digital section OFF |
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149 | |||
150 | #define GEODEAUDIO_PWRUP_STEP1 0x0F00 // Clear EAPD,PR6 and AC-link to power up external and HP amp and Digital interface |
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151 | |||
152 | #define GEODEAUDIO_PWRUP_STEP3 0x0300 // Clear PR2 to power up Analog (Vref on) |
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153 | #define GEODEAUDIO_PWRUP_STEP4 0x0100 // Clear PR1 to power up DAC |
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154 | #define GEODEAUDIO_PWRUP_STEP5 0x0000 // Clear PR0 to power up ADC |
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155 | |||
156 | #define GEODEAUDIO_CODEC_POWER_ADC 0x0001 |
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157 | |||
158 | #define GEODEAUDIO_CODEC_POWER_ANL 0x0004 |
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159 | #define GEODEAUDIO_CODEC_POWER_REF 0x0008 |
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160 | |||
161 | // |
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162 | |||
163 | // |
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164 | typedef enum _GEODEAUDIO_POWER_STATE |
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165 | { |
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166 | GEODEAUDIO_D0 = 0, // Full On: full power, full functionality |
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167 | GEODEAUDIO_D1, // Low Power On: fully functional at low power/performance |
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168 | GEODEAUDIO_D2, // Standby: partially powered with automatic wake |
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169 | GEODEAUDIO_D3, // Sleep: partially powered with device initiated wake |
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170 | GEODEAUDIO_D4, // Off: unpowered |
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171 | } GEODEAUDIO_POWER_STATE, *PGEODEAUDIO_POWER_STATE; |
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172 | |||
173 | // PRD table flags |
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174 | |||
175 | #define PRD_EOP_BIT 0x40000000 |
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176 | #define PRD_EOT_BIT 0x80000000 |
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177 | |||
178 | typedef struct tagPRDEntry |
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179 | |||
180 | unsigned long ulPhysAddr; |
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181 | unsigned long SizeFlags; |
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182 | } PRD_ENTRY, *PPRD_ENTRY; |
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183 | |||
184 | |||
185 | |||
186 | |||
187 | // |
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188 | #define PCI_READS 0x00 |
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189 | #define PCI_WRITES 0x08 |
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190 | |||
191 | #define ENABLE_BUSMASTER 0x01 |
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192 | |||
193 | #define STOP_BUSMASTER 0x00 |
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194 | |||
195 | #define CHANNEL0_PLAYBACK 0 |
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196 | |||
197 | #define MAX_CHANNELS 2><>><> |
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198 |