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6595 | serge | 1 | /******************************************************************************* |
2 | * |
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3 | * Module Name: rsirq - IRQ resource descriptors |
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4 | * |
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5 | ******************************************************************************/ |
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6 | |||
7 | /* |
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8 | * Copyright (C) 2000 - 2015, Intel Corp. |
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9 | * All rights reserved. |
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10 | * |
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11 | * Redistribution and use in source and binary forms, with or without |
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12 | * modification, are permitted provided that the following conditions |
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13 | * are met: |
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14 | * 1. Redistributions of source code must retain the above copyright |
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15 | * notice, this list of conditions, and the following disclaimer, |
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16 | * without modification. |
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17 | * 2. Redistributions in binary form must reproduce at minimum a disclaimer |
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18 | * substantially similar to the "NO WARRANTY" disclaimer below |
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19 | * ("Disclaimer") and any redistribution must be conditioned upon |
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20 | * including a substantially similar Disclaimer requirement for further |
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21 | * binary redistribution. |
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22 | * 3. Neither the names of the above-listed copyright holders nor the names |
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23 | * of any contributors may be used to endorse or promote products derived |
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24 | * from this software without specific prior written permission. |
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25 | * |
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26 | * Alternatively, this software may be distributed under the terms of the |
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27 | * GNU General Public License ("GPL") version 2 as published by the Free |
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28 | * Software Foundation. |
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29 | * |
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30 | * NO WARRANTY |
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31 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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32 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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33 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR |
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34 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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35 | * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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36 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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37 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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38 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
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39 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING |
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40 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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41 | * POSSIBILITY OF SUCH DAMAGES. |
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42 | */ |
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43 | |||
44 | #include |
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45 | #include "accommon.h" |
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46 | #include "acresrc.h" |
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47 | |||
48 | #define _COMPONENT ACPI_RESOURCES |
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49 | ACPI_MODULE_NAME("rsirq") |
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50 | |||
51 | /******************************************************************************* |
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52 | * |
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53 | * acpi_rs_get_irq |
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54 | * |
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55 | ******************************************************************************/ |
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56 | struct acpi_rsconvert_info acpi_rs_get_irq[9] = { |
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57 | {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_IRQ, |
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58 | ACPI_RS_SIZE(struct acpi_resource_irq), |
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59 | ACPI_RSC_TABLE_SIZE(acpi_rs_get_irq)}, |
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60 | |||
61 | /* Get the IRQ mask (bytes 1:2) */ |
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62 | |||
63 | {ACPI_RSC_BITMASK16, ACPI_RS_OFFSET(data.irq.interrupts[0]), |
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64 | AML_OFFSET(irq.irq_mask), |
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65 | ACPI_RS_OFFSET(data.irq.interrupt_count)}, |
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66 | |||
67 | /* Set default flags (others are zero) */ |
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68 | |||
69 | {ACPI_RSC_SET8, ACPI_RS_OFFSET(data.irq.triggering), |
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70 | ACPI_EDGE_SENSITIVE, |
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71 | 1}, |
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72 | |||
73 | /* Get the descriptor length (2 or 3 for IRQ descriptor) */ |
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74 | |||
75 | {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.irq.descriptor_length), |
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76 | AML_OFFSET(irq.descriptor_type), |
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77 | 0}, |
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78 | |||
79 | /* All done if no flag byte present in descriptor */ |
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80 | |||
81 | {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_AML_LENGTH, 0, 3}, |
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82 | |||
83 | /* Get flags: Triggering[0], Polarity[3], Sharing[4], Wake[5] */ |
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84 | |||
85 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering), |
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86 | AML_OFFSET(irq.flags), |
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87 | 0}, |
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88 | |||
89 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.polarity), |
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90 | AML_OFFSET(irq.flags), |
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91 | 3}, |
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92 | |||
93 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.sharable), |
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94 | AML_OFFSET(irq.flags), |
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95 | 4}, |
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96 | |||
97 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.wake_capable), |
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98 | AML_OFFSET(irq.flags), |
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99 | 5} |
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100 | }; |
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101 | |||
102 | /******************************************************************************* |
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103 | * |
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104 | * acpi_rs_set_irq |
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105 | * |
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106 | ******************************************************************************/ |
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107 | |||
108 | struct acpi_rsconvert_info acpi_rs_set_irq[14] = { |
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109 | /* Start with a default descriptor of length 3 */ |
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110 | |||
111 | {ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_IRQ, |
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112 | sizeof(struct aml_resource_irq), |
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113 | ACPI_RSC_TABLE_SIZE(acpi_rs_set_irq)}, |
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114 | |||
115 | /* Convert interrupt list to 16-bit IRQ bitmask */ |
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116 | |||
117 | {ACPI_RSC_BITMASK16, ACPI_RS_OFFSET(data.irq.interrupts[0]), |
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118 | AML_OFFSET(irq.irq_mask), |
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119 | ACPI_RS_OFFSET(data.irq.interrupt_count)}, |
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120 | |||
121 | /* Set flags: Triggering[0], Polarity[3], Sharing[4], Wake[5] */ |
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122 | |||
123 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering), |
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124 | AML_OFFSET(irq.flags), |
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125 | 0}, |
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126 | |||
127 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.polarity), |
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128 | AML_OFFSET(irq.flags), |
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129 | 3}, |
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130 | |||
131 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.sharable), |
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132 | AML_OFFSET(irq.flags), |
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133 | 4}, |
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134 | |||
135 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.wake_capable), |
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136 | AML_OFFSET(irq.flags), |
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137 | 5}, |
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138 | |||
139 | /* |
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140 | * All done if the output descriptor length is required to be 3 |
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141 | * (i.e., optimization to 2 bytes cannot be attempted) |
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142 | */ |
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143 | {ACPI_RSC_EXIT_EQ, ACPI_RSC_COMPARE_VALUE, |
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144 | ACPI_RS_OFFSET(data.irq.descriptor_length), |
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145 | 3}, |
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146 | |||
147 | /* Set length to 2 bytes (no flags byte) */ |
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148 | |||
149 | {ACPI_RSC_LENGTH, 0, 0, sizeof(struct aml_resource_irq_noflags)}, |
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150 | |||
151 | /* |
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152 | * All done if the output descriptor length is required to be 2. |
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153 | * |
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154 | * TBD: Perhaps we should check for error if input flags are not |
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155 | * compatible with a 2-byte descriptor. |
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156 | */ |
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157 | {ACPI_RSC_EXIT_EQ, ACPI_RSC_COMPARE_VALUE, |
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158 | ACPI_RS_OFFSET(data.irq.descriptor_length), |
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159 | 2}, |
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160 | |||
161 | /* Reset length to 3 bytes (descriptor with flags byte) */ |
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162 | |||
163 | {ACPI_RSC_LENGTH, 0, 0, sizeof(struct aml_resource_irq)}, |
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164 | |||
165 | /* |
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166 | * Check if the flags byte is necessary. Not needed if the flags are: |
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167 | * ACPI_EDGE_SENSITIVE, ACPI_ACTIVE_HIGH, ACPI_EXCLUSIVE |
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168 | */ |
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169 | {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE, |
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170 | ACPI_RS_OFFSET(data.irq.triggering), |
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171 | ACPI_EDGE_SENSITIVE}, |
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172 | |||
173 | {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE, |
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174 | ACPI_RS_OFFSET(data.irq.polarity), |
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175 | ACPI_ACTIVE_HIGH}, |
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176 | |||
177 | {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE, |
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178 | ACPI_RS_OFFSET(data.irq.sharable), |
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179 | ACPI_EXCLUSIVE}, |
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180 | |||
181 | /* We can optimize to a 2-byte irq_no_flags() descriptor */ |
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182 | |||
183 | {ACPI_RSC_LENGTH, 0, 0, sizeof(struct aml_resource_irq_noflags)} |
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184 | }; |
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185 | |||
186 | /******************************************************************************* |
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187 | * |
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188 | * acpi_rs_convert_ext_irq |
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189 | * |
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190 | ******************************************************************************/ |
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191 | |||
192 | struct acpi_rsconvert_info acpi_rs_convert_ext_irq[10] = { |
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193 | {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_EXTENDED_IRQ, |
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194 | ACPI_RS_SIZE(struct acpi_resource_extended_irq), |
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195 | ACPI_RSC_TABLE_SIZE(acpi_rs_convert_ext_irq)}, |
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196 | |||
197 | {ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_EXTENDED_IRQ, |
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198 | sizeof(struct aml_resource_extended_irq), |
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199 | 0}, |
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200 | |||
201 | /* |
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202 | * Flags: Producer/Consumer[0], Triggering[1], Polarity[2], |
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203 | * Sharing[3], Wake[4] |
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204 | */ |
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205 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.producer_consumer), |
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206 | AML_OFFSET(extended_irq.flags), |
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207 | 0}, |
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208 | |||
209 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.triggering), |
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210 | AML_OFFSET(extended_irq.flags), |
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211 | 1}, |
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212 | |||
213 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.polarity), |
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214 | AML_OFFSET(extended_irq.flags), |
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215 | 2}, |
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216 | |||
217 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.sharable), |
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218 | AML_OFFSET(extended_irq.flags), |
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219 | 3}, |
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220 | |||
221 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.wake_capable), |
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222 | AML_OFFSET(extended_irq.flags), |
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223 | 4}, |
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224 | |||
225 | /* IRQ Table length (Byte4) */ |
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226 | |||
227 | {ACPI_RSC_COUNT, ACPI_RS_OFFSET(data.extended_irq.interrupt_count), |
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228 | AML_OFFSET(extended_irq.interrupt_count), |
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229 | sizeof(u32)}, |
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230 | |||
231 | /* Copy every IRQ in the table, each is 32 bits */ |
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232 | |||
233 | {ACPI_RSC_MOVE32, ACPI_RS_OFFSET(data.extended_irq.interrupts[0]), |
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234 | AML_OFFSET(extended_irq.interrupts[0]), |
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235 | 0}, |
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236 | |||
237 | /* Optional resource_source (Index and String) */ |
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238 | |||
239 | {ACPI_RSC_SOURCEX, ACPI_RS_OFFSET(data.extended_irq.resource_source), |
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240 | ACPI_RS_OFFSET(data.extended_irq.interrupts[0]), |
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241 | sizeof(struct aml_resource_extended_irq)} |
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242 | }; |
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243 | |||
244 | /******************************************************************************* |
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245 | * |
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246 | * acpi_rs_convert_dma |
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247 | * |
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248 | ******************************************************************************/ |
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249 | |||
250 | struct acpi_rsconvert_info acpi_rs_convert_dma[6] = { |
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251 | {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_DMA, |
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252 | ACPI_RS_SIZE(struct acpi_resource_dma), |
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253 | ACPI_RSC_TABLE_SIZE(acpi_rs_convert_dma)}, |
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254 | |||
255 | {ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_DMA, |
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256 | sizeof(struct aml_resource_dma), |
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257 | 0}, |
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258 | |||
259 | /* Flags: transfer preference, bus mastering, channel speed */ |
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260 | |||
261 | {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.dma.transfer), |
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262 | AML_OFFSET(dma.flags), |
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263 | 0}, |
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264 | |||
265 | {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.dma.bus_master), |
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266 | AML_OFFSET(dma.flags), |
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267 | 2}, |
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268 | |||
269 | {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.dma.type), |
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270 | AML_OFFSET(dma.flags), |
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271 | 5}, |
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272 | |||
273 | /* DMA channel mask bits */ |
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274 | |||
275 | {ACPI_RSC_BITMASK, ACPI_RS_OFFSET(data.dma.channels[0]), |
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276 | AML_OFFSET(dma.dma_channel_mask), |
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277 | ACPI_RS_OFFSET(data.dma.channel_count)} |
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278 | }; |
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279 | |||
280 | /******************************************************************************* |
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281 | * |
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282 | * acpi_rs_convert_fixed_dma |
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283 | * |
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284 | ******************************************************************************/ |
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285 | |||
286 | struct acpi_rsconvert_info acpi_rs_convert_fixed_dma[4] = { |
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287 | {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_FIXED_DMA, |
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288 | ACPI_RS_SIZE(struct acpi_resource_fixed_dma), |
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289 | ACPI_RSC_TABLE_SIZE(acpi_rs_convert_fixed_dma)}, |
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290 | |||
291 | {ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_FIXED_DMA, |
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292 | sizeof(struct aml_resource_fixed_dma), |
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293 | 0}, |
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294 | |||
295 | /* |
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296 | * These fields are contiguous in both the source and destination: |
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297 | * request_lines |
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298 | * Channels |
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299 | */ |
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300 | {ACPI_RSC_MOVE16, ACPI_RS_OFFSET(data.fixed_dma.request_lines), |
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301 | AML_OFFSET(fixed_dma.request_lines), |
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302 | 2}, |
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303 | |||
304 | {ACPI_RSC_MOVE8, ACPI_RS_OFFSET(data.fixed_dma.width), |
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305 | AML_OFFSET(fixed_dma.width), |
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306 | 1}, |
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307 | }; |