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/* DWARF2 EH unwinding support for AMD x86-64 and x86. |
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Copyright (C) 2009-2015 Free Software Foundation, Inc. |
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This file is part of GCC. |
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GCC is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 3, or (at your option) |
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any later version. |
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GCC is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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Under Section 7 of GPL version 3, you are granted additional |
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permissions described in the GCC Runtime Library Exception, version |
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3.1, as published by the Free Software Foundation. |
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You should have received a copy of the GNU General Public License and |
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a copy of the GCC Runtime Library Exception along with this program; |
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see |
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. */ |
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/* Do code reading to identify a signal frame, and set the frame |
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state data appropriately. See unwind-dw2.c for the structs. */ |
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#include |
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#include |
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#ifdef __x86_64__ |
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#define MD_FALLBACK_FRAME_STATE_FOR x86_64_fallback_frame_state |
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static _Unwind_Reason_Code |
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x86_64_fallback_frame_state (struct _Unwind_Context *context, |
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_Unwind_FrameState *fs) |
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{ |
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unsigned char *pc = context->ra; |
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mcontext_t *mctx; |
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long new_cfa; |
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if (/* Solaris 10+ |
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------------ |
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<__sighndlr+0>: push %rbp |
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<__sighndlr+1>: mov %rsp,%rbp |
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<__sighndlr+4>: callq *%rcx |
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<__sighndlr+6>: leaveq <--- PC |
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<__sighndlr+7>: retq */ |
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*(unsigned long *)(pc - 6) == 0xc3c9d1ffe5894855) |
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/* We need to move up three frames: |
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<-- context->cfa |
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__sighndlr |
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call_user_handler |
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sigacthandler |
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context->cfa points into the frame after the saved frame pointer and |
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saved pc (struct frame). |
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The ucontext_t structure is in the kernel frame after the signal |
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number and a siginfo_t *. Since the frame sizes vary even within |
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Solaris 10 updates, we need to walk the stack to get there. */ |
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{ |
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struct frame *fp = (struct frame *) context->cfa - 1; |
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struct handler_args { |
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int signo; |
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siginfo_t *sip; |
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ucontext_t ucontext; |
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} *handler_args; |
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ucontext_t *ucp; |
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/* Next frame: __sighndlr frame pointer. */ |
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fp = (struct frame *) fp->fr_savfp; |
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/* call_user_handler frame pointer. */ |
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fp = (struct frame *) fp->fr_savfp; |
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/* sigacthandler frame pointer. */ |
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fp = (struct frame *) fp->fr_savfp; |
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/* The argument area precedes the struct frame. */ |
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handler_args = (struct handler_args *) (fp + 1); |
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ucp = &handler_args->ucontext; |
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mctx = &ucp->uc_mcontext; |
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} |
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else |
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return _URC_END_OF_STACK; |
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new_cfa = mctx->gregs[REG_RSP]; |
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fs->regs.cfa_how = CFA_REG_OFFSET; |
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fs->regs.cfa_reg = 7; |
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fs->regs.cfa_offset = new_cfa - (long) context->cfa; |
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/* The SVR4 register numbering macros aren't usable in libgcc. */ |
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fs->regs.reg[0].how = REG_SAVED_OFFSET; |
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fs->regs.reg[0].loc.offset = (long)&mctx->gregs[REG_RAX] - new_cfa; |
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fs->regs.reg[1].how = REG_SAVED_OFFSET; |
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fs->regs.reg[1].loc.offset = (long)&mctx->gregs[REG_RDX] - new_cfa; |
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fs->regs.reg[2].how = REG_SAVED_OFFSET; |
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fs->regs.reg[2].loc.offset = (long)&mctx->gregs[REG_RCX] - new_cfa; |
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fs->regs.reg[3].how = REG_SAVED_OFFSET; |
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fs->regs.reg[3].loc.offset = (long)&mctx->gregs[REG_RBX] - new_cfa; |
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fs->regs.reg[4].how = REG_SAVED_OFFSET; |
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fs->regs.reg[4].loc.offset = (long)&mctx->gregs[REG_RSI] - new_cfa; |
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fs->regs.reg[5].how = REG_SAVED_OFFSET; |
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fs->regs.reg[5].loc.offset = (long)&mctx->gregs[REG_RDI] - new_cfa; |
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fs->regs.reg[6].how = REG_SAVED_OFFSET; |
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fs->regs.reg[6].loc.offset = (long)&mctx->gregs[REG_RBP] - new_cfa; |
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fs->regs.reg[8].how = REG_SAVED_OFFSET; |
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fs->regs.reg[8].loc.offset = (long)&mctx->gregs[REG_R8] - new_cfa; |
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fs->regs.reg[9].how = REG_SAVED_OFFSET; |
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fs->regs.reg[9].loc.offset = (long)&mctx->gregs[REG_R9] - new_cfa; |
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fs->regs.reg[10].how = REG_SAVED_OFFSET; |
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fs->regs.reg[10].loc.offset = (long)&mctx->gregs[REG_R10] - new_cfa; |
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fs->regs.reg[11].how = REG_SAVED_OFFSET; |
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fs->regs.reg[11].loc.offset = (long)&mctx->gregs[REG_R11] - new_cfa; |
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fs->regs.reg[12].how = REG_SAVED_OFFSET; |
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fs->regs.reg[12].loc.offset = (long)&mctx->gregs[REG_R12] - new_cfa; |
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fs->regs.reg[13].how = REG_SAVED_OFFSET; |
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fs->regs.reg[13].loc.offset = (long)&mctx->gregs[REG_R13] - new_cfa; |
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fs->regs.reg[14].how = REG_SAVED_OFFSET; |
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fs->regs.reg[14].loc.offset = (long)&mctx->gregs[REG_R14] - new_cfa; |
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fs->regs.reg[15].how = REG_SAVED_OFFSET; |
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fs->regs.reg[15].loc.offset = (long)&mctx->gregs[REG_R15] - new_cfa; |
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fs->regs.reg[16].how = REG_SAVED_OFFSET; |
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fs->regs.reg[16].loc.offset = (long)&mctx->gregs[REG_RIP] - new_cfa; |
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fs->retaddr_column = 16; |
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fs->signal_frame = 1; |
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return _URC_NO_REASON; |
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} |
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#else |
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#define MD_FALLBACK_FRAME_STATE_FOR x86_fallback_frame_state |
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static _Unwind_Reason_Code |
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x86_fallback_frame_state (struct _Unwind_Context *context, |
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_Unwind_FrameState *fs) |
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{ |
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unsigned char *pc = context->ra; |
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mcontext_t *mctx; |
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long new_cfa; |
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if (/* Solaris 10 |
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----------- |
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<__sighndlr+0>: push %ebp |
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<__sighndlr+1>: mov %esp,%ebp |
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<__sighndlr+3>: pushl 0x10(%ebp) |
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<__sighndlr+6>: pushl 0xc(%ebp) |
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<__sighndlr+9>: pushl 0x8(%ebp) |
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<__sighndlr+12>: call *0x14(%ebp) |
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<__sighndlr+15>: add $0xc,%esp <--- PC |
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<__sighndlr+18>: leave |
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<__sighndlr+19>: ret */ |
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(*(unsigned long *)(pc - 15) == 0xffec8b55 |
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&& *(unsigned long *)(pc - 11) == 0x75ff1075 |
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&& *(unsigned long *)(pc - 7) == 0x0875ff0c |
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&& *(unsigned long *)(pc - 3) == 0x831455ff |
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&& *(unsigned long *)(pc + 1) == 0xc3c90cc4) |
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|| /* Solaris 11 before snv_125 |
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-------------------------- |
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<__sighndlr+0> push %ebp |
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<__sighndlr+1> mov %esp,%ebp |
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<__sighndlr+4> pushl 0x10(%ebp) |
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<__sighndlr+6> pushl 0xc(%ebp) |
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<__sighndlr+9> pushl 0x8(%ebp) |
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<__sighndlr+12> call *0x14(%ebp) |
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<__sighndlr+15> add $0xc,%esp |
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<__sighndlr+18> leave <--- PC |
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<__sighndlr+19> ret */ |
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(*(unsigned long *)(pc - 18) == 0xffec8b55 |
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&& *(unsigned long *)(pc - 14) == 0x7fff107f |
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&& *(unsigned long *)(pc - 10) == 0x0875ff0c |
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&& *(unsigned long *)(pc - 6) == 0x83145fff |
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&& *(unsigned long *)(pc - 1) == 0xc3c90cc4) |
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|| /* Solaris 11 since snv_125 |
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------------------------- |
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<__sighndlr+0> push %ebp |
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<__sighndlr+1> mov %esp,%ebp |
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<__sighndlr+3> and $0xfffffff0,%esp |
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<__sighndlr+6> sub $0x4,%esp |
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<__sighndlr+9> pushl 0x10(%ebp) |
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<__sighndlr+12> pushl 0xc(%ebp) |
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<__sighndlr+15> pushl 0x8(%ebp) |
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<__sighndlr+18> call *0x14(%ebp) |
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<__sighndlr+21> leave <--- PC |
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<__sighndlr+22> ret */ |
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(*(unsigned long *)(pc - 21) == 0x83ec8b55 |
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&& *(unsigned long *)(pc - 17) == 0xec83f0e4 |
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&& *(unsigned long *)(pc - 13) == 0x1075ff04 |
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&& *(unsigned long *)(pc - 9) == 0xff0c75ff |
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&& *(unsigned long *)(pc - 5) == 0x55ff0875 |
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&& (*(unsigned long *)(pc - 1) & 0x00ffffff) == 0x00c3c914)) |
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{ |
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struct handler_args { |
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int signo; |
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siginfo_t *sip; |
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ucontext_t *ucontext; |
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} *handler_args = context->cfa; |
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mctx = &handler_args->ucontext->uc_mcontext; |
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} |
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else |
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return _URC_END_OF_STACK; |
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new_cfa = mctx->gregs[UESP]; |
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fs->regs.cfa_how = CFA_REG_OFFSET; |
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fs->regs.cfa_reg = 4; |
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fs->regs.cfa_offset = new_cfa - (long) context->cfa; |
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/* The SVR4 register numbering macros aren't usable in libgcc. */ |
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fs->regs.reg[0].how = REG_SAVED_OFFSET; |
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fs->regs.reg[0].loc.offset = (long)&mctx->gregs[EAX] - new_cfa; |
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fs->regs.reg[3].how = REG_SAVED_OFFSET; |
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fs->regs.reg[3].loc.offset = (long)&mctx->gregs[EBX] - new_cfa; |
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fs->regs.reg[1].how = REG_SAVED_OFFSET; |
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fs->regs.reg[1].loc.offset = (long)&mctx->gregs[ECX] - new_cfa; |
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fs->regs.reg[2].how = REG_SAVED_OFFSET; |
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fs->regs.reg[2].loc.offset = (long)&mctx->gregs[EDX] - new_cfa; |
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fs->regs.reg[6].how = REG_SAVED_OFFSET; |
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fs->regs.reg[6].loc.offset = (long)&mctx->gregs[ESI] - new_cfa; |
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fs->regs.reg[7].how = REG_SAVED_OFFSET; |
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fs->regs.reg[7].loc.offset = (long)&mctx->gregs[EDI] - new_cfa; |
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fs->regs.reg[5].how = REG_SAVED_OFFSET; |
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fs->regs.reg[5].loc.offset = (long)&mctx->gregs[EBP] - new_cfa; |
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fs->regs.reg[8].how = REG_SAVED_OFFSET; |
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fs->regs.reg[8].loc.offset = (long)&mctx->gregs[EIP] - new_cfa; |
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fs->retaddr_column = 8; |
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/* SIGFPE for IEEE-754 exceptions is delivered after the faulting insn |
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rather than before it, so don't set fs->signal_frame in that case. |
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We test whether the ES field of the Status Register is zero. */ |
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if ((mctx->fpregs.fp_reg_set.fpchip_state.status & 0x80) == 0) |
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fs->signal_frame = 1; |
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return _URC_NO_REASON; |
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} |
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#endif |