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/* Generated automatically by the program `genconstants'

   from the machine description file `md'.  */

#ifndef GCC_INSN_CONSTANTS_H

#define GCC_INSN_CONSTANTS_H

#define XMM27_REG 64

#define XMM9_REG 46

#define ST6_REG 14

#define MASK5_REG 74

#define R13_REG 42

#define XMM14_REG 51

#define ROUND_CEIL 0x2

#define PCOM_TRUE 1

#define XMM7_REG 28

#define PPERM_SRC 0x00

#define PPERM_ZERO 0x80

#define MM7_REG 36

#define XMM6_REG 27

#define ST3_REG 11

#define MASK2_REG 71

#define R10_REG 39

#define XMM11_REG 48

#define XMM19_REG 56

#define ST1_REG 9

#define MASK3_REG 72

#define MM4_REG 33

#define ST7_REG 15

#define COM_FALSE_P 3

#define XMM3_REG 24

#define XMM24_REG 61

#define ST0_REG 8

#define MASK7_REG 76

#define BND1_REG 78

#define COM_FALSE_S 2

#define SP_REG 7

#define AX_REG 0

#define BND0_REG 77

#define ROUND_NO_EXC 0x8

#define MM1_REG 30

#define MM3_REG 32

#define XMM1_REG 22

#define ROUND_ZERO 3

#define XMM16_REG 53

#define FPCR_REG 19

#define XMM8_REG 45

#define XMM4_REG 25

#define ST5_REG 13

#define XMM23_REG 60

#define R12_REG 41

#define R9_REG 38

#define XMM26_REG 63

#define ROUND_MXCSR 0x4

#define PCOM_FALSE 0

#define MASK4_REG 73

#define XMM12_REG 49

#define FLAGS_REG 17

#define PPERM_INVERT 0x20

#define MM6_REG 35

#define PPERM_SRC1 0x00

#define PPERM_SRC2 0x10

#define ST2_REG 10

#define MASK1_REG 70

#define XMM10_REG 47

#define XMM20_REG 57

#define ROUND_TRUNC 0x3

#define XMM18_REG 55

#define DI_REG 5

#define ROUND_SAE 8

#define XMM25_REG 62

#define DX_REG 1

#define XMM29_REG 66

#define NO_ROUND 4

#define BP_REG 6

#define XMM5_REG 26

#define COM_TRUE_P 5

#define COM_TRUE_S 4

#define ROUND_FLOOR 0x1

#define FPSR_REG 18

#define MASK6_REG 75

#define R14_REG 43

#define XMM28_REG 65

#define R15_REG 44

#define XMM13_REG 50

#define ROUND_NEAREST_INT 0

#define PPERM_SIGN 0xc0

#define MM0_REG 29

#define XMM31_REG 68

#define BX_REG 3

#define XMM30_REG 67

#define ST4_REG 12

#define PPERM_INV_SIGN 0xe0

#define R11_REG 40

#define MM5_REG 34

#define PPERM_REVERSE 0x40

#define CX_REG 2

#define MASK0_REG 69

#define R8_REG 37

#define SI_REG 4

#define XMM22_REG 59

#define XMM15_REG 52

#define XMM0_REG 21

#define XMM17_REG 54

#define ROUND_NEG_INF 1

#define ROUND_POS_INF 2

#define XMM2_REG 23

#define PPERM_ONES 0xa0

#define XMM21_REG 58

#define MM2_REG 31

#define PPERM_REV_INV 0x60

enum unspec {

  UNSPEC_GOT = 0,

  UNSPEC_GOTOFF = 1,

  UNSPEC_GOTPCREL = 2,

  UNSPEC_GOTTPOFF = 3,

  UNSPEC_TPOFF = 4,

  UNSPEC_NTPOFF = 5,

  UNSPEC_DTPOFF = 6,

  UNSPEC_GOTNTPOFF = 7,

  UNSPEC_INDNTPOFF = 8,

  UNSPEC_PLTOFF = 9,

  UNSPEC_MACHOPIC_OFFSET = 10,

  UNSPEC_PCREL = 11,

  UNSPEC_SIZEOF = 12,

  UNSPEC_STACK_ALLOC = 13,

  UNSPEC_SET_GOT = 14,

  UNSPEC_SET_RIP = 15,

  UNSPEC_SET_GOT_OFFSET = 16,

  UNSPEC_MEMORY_BLOCKAGE = 17,

  UNSPEC_STACK_CHECK = 18,

  UNSPEC_TP = 19,

  UNSPEC_TLS_GD = 20,

  UNSPEC_TLS_LD_BASE = 21,

  UNSPEC_TLSDESC = 22,

  UNSPEC_TLS_IE_SUN = 23,

  UNSPEC_SCAS = 24,

  UNSPEC_FNSTSW = 25,

  UNSPEC_SAHF = 26,

  UNSPEC_PARITY = 27,

  UNSPEC_FSTCW = 28,

  UNSPEC_FLDCW = 29,

  UNSPEC_REP = 30,

  UNSPEC_LD_MPIC = 31,

  UNSPEC_TRUNC_NOOP = 32,

  UNSPEC_DIV_ALREADY_SPLIT = 33,

  UNSPEC_PAUSE = 34,

  UNSPEC_LEA_ADDR = 35,

  UNSPEC_XBEGIN_ABORT = 36,

  UNSPEC_STOS = 37,

  UNSPEC_PEEPSIB = 38,

  UNSPEC_INSN_FALSE_DEP = 39,

  UNSPEC_FIX_NOTRUNC = 40,

  UNSPEC_MASKMOV = 41,

  UNSPEC_MOVMSK = 42,

  UNSPEC_RCP = 43,

  UNSPEC_RSQRT = 44,

  UNSPEC_PSADBW = 45,

  UNSPEC_COPYSIGN = 46,

  UNSPEC_IEEE_MIN = 47,

  UNSPEC_IEEE_MAX = 48,

  UNSPEC_SIN = 49,

  UNSPEC_COS = 50,

  UNSPEC_FPATAN = 51,

  UNSPEC_FYL2X = 52,

  UNSPEC_FYL2XP1 = 53,

  UNSPEC_FRNDINT = 54,

  UNSPEC_FIST = 55,

  UNSPEC_F2XM1 = 56,

  UNSPEC_TAN = 57,

  UNSPEC_FXAM = 58,

  UNSPEC_FRNDINT_FLOOR = 59,

  UNSPEC_FRNDINT_CEIL = 60,

  UNSPEC_FRNDINT_TRUNC = 61,

  UNSPEC_FRNDINT_MASK_PM = 62,

  UNSPEC_FIST_FLOOR = 63,

  UNSPEC_FIST_CEIL = 64,

  UNSPEC_SINCOS_COS = 65,

  UNSPEC_SINCOS_SIN = 66,

  UNSPEC_XTRACT_FRACT = 67,

  UNSPEC_XTRACT_EXP = 68,

  UNSPEC_FSCALE_FRACT = 69,

  UNSPEC_FSCALE_EXP = 70,

  UNSPEC_FPREM_F = 71,

  UNSPEC_FPREM_U = 72,

  UNSPEC_FPREM1_F = 73,

  UNSPEC_FPREM1_U = 74,

  UNSPEC_C2_FLAG = 75,

  UNSPEC_FXAM_MEM = 76,

  UNSPEC_SP_SET = 77,

  UNSPEC_SP_TEST = 78,

  UNSPEC_SP_TLS_SET = 79,

  UNSPEC_SP_TLS_TEST = 80,

  UNSPEC_ROUND = 81,

  UNSPEC_CRC32 = 82,

  UNSPEC_BEXTR = 83,

  UNSPEC_PDEP = 84,

  UNSPEC_PEXT = 85,

  UNSPEC_KMOV = 86,

  UNSPEC_BNDMK = 87,

  UNSPEC_BNDMK_ADDR = 88,

  UNSPEC_BNDSTX = 89,

  UNSPEC_BNDLDX = 90,

  UNSPEC_BNDLDX_ADDR = 91,

  UNSPEC_BNDCL = 92,

  UNSPEC_BNDCU = 93,

  UNSPEC_BNDCN = 94,

  UNSPEC_MPX_FENCE = 95,

  UNSPEC_MOVNTQ = 96,

  UNSPEC_PFRCP = 97,

  UNSPEC_PFRCPIT1 = 98,

  UNSPEC_PFRCPIT2 = 99,

  UNSPEC_PFRSQRT = 100,

  UNSPEC_PFRSQIT1 = 101,

  UNSPEC_MOVNT = 102,

  UNSPEC_LOADU = 103,

  UNSPEC_STOREU = 104,

  UNSPEC_LDDQU = 105,

  UNSPEC_PSHUFB = 106,

  UNSPEC_PSIGN = 107,

  UNSPEC_PALIGNR = 108,

  UNSPEC_EXTRQI = 109,

  UNSPEC_EXTRQ = 110,

  UNSPEC_INSERTQI = 111,

  UNSPEC_INSERTQ = 112,

  UNSPEC_BLENDV = 113,

  UNSPEC_INSERTPS = 114,

  UNSPEC_DP = 115,

  UNSPEC_MOVNTDQA = 116,

  UNSPEC_MPSADBW = 117,

  UNSPEC_PHMINPOSUW = 118,

  UNSPEC_PTEST = 119,

  UNSPEC_PCMPESTR = 120,

  UNSPEC_PCMPISTR = 121,

  UNSPEC_FMADDSUB = 122,

  UNSPEC_XOP_UNSIGNED_CMP = 123,

  UNSPEC_XOP_TRUEFALSE = 124,

  UNSPEC_XOP_PERMUTE = 125,

  UNSPEC_FRCZ = 126,

  UNSPEC_AESENC = 127,

  UNSPEC_AESENCLAST = 128,

  UNSPEC_AESDEC = 129,

  UNSPEC_AESDECLAST = 130,

  UNSPEC_AESIMC = 131,

  UNSPEC_AESKEYGENASSIST = 132,

  UNSPEC_PCLMUL = 133,

  UNSPEC_PCMP = 134,

  UNSPEC_VPERMIL = 135,

  UNSPEC_VPERMIL2 = 136,

  UNSPEC_VPERMIL2F128 = 137,

  UNSPEC_CAST = 138,

  UNSPEC_VTESTP = 139,

  UNSPEC_VCVTPH2PS = 140,

  UNSPEC_VCVTPS2PH = 141,

  UNSPEC_VPERMVAR = 142,

  UNSPEC_VPERMTI = 143,

  UNSPEC_GATHER = 144,

  UNSPEC_VSIBADDR = 145,

  UNSPEC_VPERMI2 = 146,

  UNSPEC_VPERMT2 = 147,

  UNSPEC_VPERMI2_MASK = 148,

  UNSPEC_UNSIGNED_FIX_NOTRUNC = 149,

  UNSPEC_UNSIGNED_PCMP = 150,

  UNSPEC_TESTM = 151,

  UNSPEC_TESTNM = 152,

  UNSPEC_SCATTER = 153,

  UNSPEC_RCP14 = 154,

  UNSPEC_RSQRT14 = 155,

  UNSPEC_FIXUPIMM = 156,

  UNSPEC_SCALEF = 157,

  UNSPEC_VTERNLOG = 158,

  UNSPEC_GETEXP = 159,

  UNSPEC_GETMANT = 160,

  UNSPEC_ALIGN = 161,

  UNSPEC_CONFLICT = 162,

  UNSPEC_COMPRESS = 163,

  UNSPEC_COMPRESS_STORE = 164,

  UNSPEC_EXPAND = 165,

  UNSPEC_MASKED_EQ = 166,

  UNSPEC_MASKED_GT = 167,

  UNSPEC_EMBEDDED_ROUNDING = 168,

  UNSPEC_GATHER_PREFETCH = 169,

  UNSPEC_SCATTER_PREFETCH = 170,

  UNSPEC_EXP2 = 171,

  UNSPEC_RCP28 = 172,

  UNSPEC_RSQRT28 = 173,

  UNSPEC_SHA1MSG1 = 174,

  UNSPEC_SHA1MSG2 = 175,

  UNSPEC_SHA1NEXTE = 176,

  UNSPEC_SHA1RNDS4 = 177,

  UNSPEC_SHA256MSG1 = 178,

  UNSPEC_SHA256MSG2 = 179,

  UNSPEC_SHA256RNDS2 = 180,

  UNSPEC_DBPSADBW = 181,

  UNSPEC_PMADDUBSW512 = 182,

  UNSPEC_PMADDWD512 = 183,

  UNSPEC_PSHUFHW = 184,

  UNSPEC_PSHUFLW = 185,

  UNSPEC_CVTINT2MASK = 186,

  UNSPEC_REDUCE = 187,

  UNSPEC_FPCLASS = 188,

  UNSPEC_RANGE = 189,

  UNSPEC_VPMADD52LUQ = 190,

  UNSPEC_VPMADD52HUQ = 191,

  UNSPEC_VPMULTISHIFT = 192,

  UNSPEC_LFENCE = 193,

  UNSPEC_SFENCE = 194,

  UNSPEC_MFENCE = 195,

  UNSPEC_FILD_ATOMIC = 196,

  UNSPEC_FIST_ATOMIC = 197,

  UNSPEC_LDA = 198,

  UNSPEC_STA = 199

};

#define NUM_UNSPEC_VALUES 200

extern const char *const unspec_strings[];

enum unspecv {

  UNSPECV_BLOCKAGE = 0,

  UNSPECV_STACK_PROBE = 1,

  UNSPECV_PROBE_STACK_RANGE = 2,

  UNSPECV_ALIGN = 3,

  UNSPECV_PROLOGUE_USE = 4,

  UNSPECV_SPLIT_STACK_RETURN = 5,

  UNSPECV_CLD = 6,

  UNSPECV_NOPS = 7,

  UNSPECV_RDTSC = 8,

  UNSPECV_RDTSCP = 9,

  UNSPECV_RDPMC = 10,

  UNSPECV_LLWP_INTRINSIC = 11,

  UNSPECV_SLWP_INTRINSIC = 12,

  UNSPECV_LWPVAL_INTRINSIC = 13,

  UNSPECV_LWPINS_INTRINSIC = 14,

  UNSPECV_RDFSBASE = 15,

  UNSPECV_RDGSBASE = 16,

  UNSPECV_WRFSBASE = 17,

  UNSPECV_WRGSBASE = 18,

  UNSPECV_FXSAVE = 19,

  UNSPECV_FXRSTOR = 20,

  UNSPECV_FXSAVE64 = 21,

  UNSPECV_FXRSTOR64 = 22,

  UNSPECV_XSAVE = 23,

  UNSPECV_XRSTOR = 24,

  UNSPECV_XSAVE64 = 25,

  UNSPECV_XRSTOR64 = 26,

  UNSPECV_XSAVEOPT = 27,

  UNSPECV_XSAVEOPT64 = 28,

  UNSPECV_XSAVES = 29,

  UNSPECV_XRSTORS = 30,

  UNSPECV_XSAVES64 = 31,

  UNSPECV_XRSTORS64 = 32,

  UNSPECV_XSAVEC = 33,

  UNSPECV_XSAVEC64 = 34,

  UNSPECV_FNSTENV = 35,

  UNSPECV_FLDENV = 36,

  UNSPECV_FNSTSW = 37,

  UNSPECV_FNCLEX = 38,

  UNSPECV_RDRAND = 39,

  UNSPECV_RDSEED = 40,

  UNSPECV_XBEGIN = 41,

  UNSPECV_XEND = 42,

  UNSPECV_XABORT = 43,

  UNSPECV_XTEST = 44,

  UNSPECV_NLGR = 45,

  UNSPECV_CLWB = 46,

  UNSPECV_PCOMMIT = 47,

  UNSPECV_CLFLUSHOPT = 48,

  UNSPECV_MONITORX = 49,

  UNSPECV_MWAITX = 50,

  UNSPECV_EMMS = 51,

  UNSPECV_FEMMS = 52,

  UNSPECV_LDMXCSR = 53,

  UNSPECV_STMXCSR = 54,

  UNSPECV_CLFLUSH = 55,

  UNSPECV_MONITOR = 56,

  UNSPECV_MWAIT = 57,

  UNSPECV_VZEROALL = 58,

  UNSPECV_VZEROUPPER = 59,

  UNSPECV_CMPXCHG = 60,

  UNSPECV_XCHG = 61,

  UNSPECV_LOCK = 62

};

#define NUM_UNSPECV_VALUES 63

extern const char *const unspecv_strings[];

#endif /* GCC_INSN_CONSTANTS_H */