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Rev | Author | Line No. | Line |
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5191 | serge | 1 | /* TILE-Gx opcode information. |
2 | * |
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6324 | serge | 3 | * Copyright (C) 2011-2015 Free Software Foundation, Inc. |
5191 | serge | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify |
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6 | * it under the terms of the GNU General Public License as published by |
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7 | * the Free Software Foundation; either version 3 of the License, or |
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8 | * (at your option) any later version. |
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9 | * |
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10 | * This program is distributed in the hope that it will be useful, |
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11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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13 | * GNU General Public License for more details. |
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14 | * |
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15 | * You should have received a copy of the GNU General Public License |
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16 | * along with this program; if not, write to the Free Software |
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17 | * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
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18 | * MA 02110-1301, USA. |
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19 | */ |
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20 | |||
21 | #ifndef opcode_tile_h |
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22 | #define opcode_tile_h |
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23 | |||
6324 | serge | 24 | #ifdef __cplusplus |
25 | extern "C" { |
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26 | #endif |
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27 | |||
5191 | serge | 28 | typedef unsigned long long tilegx_bundle_bits; |
29 | |||
30 | |||
31 | enum |
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32 | { |
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33 | TILEGX_MAX_OPERANDS = 4 /* bfexts */ |
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34 | }; |
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35 | |||
36 | typedef enum |
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37 | { |
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38 | TILEGX_OPC_BPT, |
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39 | TILEGX_OPC_INFO, |
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40 | TILEGX_OPC_INFOL, |
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41 | TILEGX_OPC_LD4S_TLS, |
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42 | TILEGX_OPC_LD_TLS, |
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43 | TILEGX_OPC_MOVE, |
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44 | TILEGX_OPC_MOVEI, |
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45 | TILEGX_OPC_MOVELI, |
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46 | TILEGX_OPC_PREFETCH, |
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47 | TILEGX_OPC_PREFETCH_ADD_L1, |
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48 | TILEGX_OPC_PREFETCH_ADD_L1_FAULT, |
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49 | TILEGX_OPC_PREFETCH_ADD_L2, |
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50 | TILEGX_OPC_PREFETCH_ADD_L2_FAULT, |
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51 | TILEGX_OPC_PREFETCH_ADD_L3, |
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52 | TILEGX_OPC_PREFETCH_ADD_L3_FAULT, |
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53 | TILEGX_OPC_PREFETCH_L1, |
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54 | TILEGX_OPC_PREFETCH_L1_FAULT, |
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55 | TILEGX_OPC_PREFETCH_L2, |
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56 | TILEGX_OPC_PREFETCH_L2_FAULT, |
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57 | TILEGX_OPC_PREFETCH_L3, |
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58 | TILEGX_OPC_PREFETCH_L3_FAULT, |
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59 | TILEGX_OPC_RAISE, |
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60 | TILEGX_OPC_ADD, |
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61 | TILEGX_OPC_ADDI, |
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62 | TILEGX_OPC_ADDLI, |
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63 | TILEGX_OPC_ADDX, |
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64 | TILEGX_OPC_ADDXI, |
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65 | TILEGX_OPC_ADDXLI, |
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66 | TILEGX_OPC_ADDXSC, |
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67 | TILEGX_OPC_AND, |
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68 | TILEGX_OPC_ANDI, |
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69 | TILEGX_OPC_BEQZ, |
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70 | TILEGX_OPC_BEQZT, |
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71 | TILEGX_OPC_BFEXTS, |
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72 | TILEGX_OPC_BFEXTU, |
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73 | TILEGX_OPC_BFINS, |
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74 | TILEGX_OPC_BGEZ, |
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75 | TILEGX_OPC_BGEZT, |
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76 | TILEGX_OPC_BGTZ, |
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77 | TILEGX_OPC_BGTZT, |
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78 | TILEGX_OPC_BLBC, |
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79 | TILEGX_OPC_BLBCT, |
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80 | TILEGX_OPC_BLBS, |
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81 | TILEGX_OPC_BLBST, |
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82 | TILEGX_OPC_BLEZ, |
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83 | TILEGX_OPC_BLEZT, |
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84 | TILEGX_OPC_BLTZ, |
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85 | TILEGX_OPC_BLTZT, |
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86 | TILEGX_OPC_BNEZ, |
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87 | TILEGX_OPC_BNEZT, |
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88 | TILEGX_OPC_CLZ, |
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89 | TILEGX_OPC_CMOVEQZ, |
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90 | TILEGX_OPC_CMOVNEZ, |
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91 | TILEGX_OPC_CMPEQ, |
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92 | TILEGX_OPC_CMPEQI, |
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93 | TILEGX_OPC_CMPEXCH, |
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94 | TILEGX_OPC_CMPEXCH4, |
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95 | TILEGX_OPC_CMPLES, |
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96 | TILEGX_OPC_CMPLEU, |
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97 | TILEGX_OPC_CMPLTS, |
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98 | TILEGX_OPC_CMPLTSI, |
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99 | TILEGX_OPC_CMPLTU, |
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100 | TILEGX_OPC_CMPLTUI, |
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101 | TILEGX_OPC_CMPNE, |
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102 | TILEGX_OPC_CMUL, |
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103 | TILEGX_OPC_CMULA, |
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104 | TILEGX_OPC_CMULAF, |
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105 | TILEGX_OPC_CMULF, |
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106 | TILEGX_OPC_CMULFR, |
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107 | TILEGX_OPC_CMULH, |
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108 | TILEGX_OPC_CMULHR, |
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109 | TILEGX_OPC_CRC32_32, |
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110 | TILEGX_OPC_CRC32_8, |
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111 | TILEGX_OPC_CTZ, |
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112 | TILEGX_OPC_DBLALIGN, |
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113 | TILEGX_OPC_DBLALIGN2, |
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114 | TILEGX_OPC_DBLALIGN4, |
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115 | TILEGX_OPC_DBLALIGN6, |
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116 | TILEGX_OPC_DRAIN, |
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117 | TILEGX_OPC_DTLBPR, |
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118 | TILEGX_OPC_EXCH, |
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119 | TILEGX_OPC_EXCH4, |
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120 | TILEGX_OPC_FDOUBLE_ADD_FLAGS, |
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121 | TILEGX_OPC_FDOUBLE_ADDSUB, |
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122 | TILEGX_OPC_FDOUBLE_MUL_FLAGS, |
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123 | TILEGX_OPC_FDOUBLE_PACK1, |
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124 | TILEGX_OPC_FDOUBLE_PACK2, |
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125 | TILEGX_OPC_FDOUBLE_SUB_FLAGS, |
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126 | TILEGX_OPC_FDOUBLE_UNPACK_MAX, |
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127 | TILEGX_OPC_FDOUBLE_UNPACK_MIN, |
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128 | TILEGX_OPC_FETCHADD, |
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129 | TILEGX_OPC_FETCHADD4, |
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130 | TILEGX_OPC_FETCHADDGEZ, |
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131 | TILEGX_OPC_FETCHADDGEZ4, |
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132 | TILEGX_OPC_FETCHAND, |
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133 | TILEGX_OPC_FETCHAND4, |
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134 | TILEGX_OPC_FETCHOR, |
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135 | TILEGX_OPC_FETCHOR4, |
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136 | TILEGX_OPC_FINV, |
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137 | TILEGX_OPC_FLUSH, |
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138 | TILEGX_OPC_FLUSHWB, |
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139 | TILEGX_OPC_FNOP, |
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140 | TILEGX_OPC_FSINGLE_ADD1, |
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141 | TILEGX_OPC_FSINGLE_ADDSUB2, |
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142 | TILEGX_OPC_FSINGLE_MUL1, |
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143 | TILEGX_OPC_FSINGLE_MUL2, |
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144 | TILEGX_OPC_FSINGLE_PACK1, |
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145 | TILEGX_OPC_FSINGLE_PACK2, |
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146 | TILEGX_OPC_FSINGLE_SUB1, |
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147 | TILEGX_OPC_ICOH, |
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148 | TILEGX_OPC_ILL, |
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149 | TILEGX_OPC_INV, |
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150 | TILEGX_OPC_IRET, |
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151 | TILEGX_OPC_J, |
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152 | TILEGX_OPC_JAL, |
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153 | TILEGX_OPC_JALR, |
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154 | TILEGX_OPC_JALRP, |
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155 | TILEGX_OPC_JR, |
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156 | TILEGX_OPC_JRP, |
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157 | TILEGX_OPC_LD, |
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158 | TILEGX_OPC_LD1S, |
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159 | TILEGX_OPC_LD1S_ADD, |
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160 | TILEGX_OPC_LD1U, |
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161 | TILEGX_OPC_LD1U_ADD, |
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162 | TILEGX_OPC_LD2S, |
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163 | TILEGX_OPC_LD2S_ADD, |
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164 | TILEGX_OPC_LD2U, |
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165 | TILEGX_OPC_LD2U_ADD, |
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166 | TILEGX_OPC_LD4S, |
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167 | TILEGX_OPC_LD4S_ADD, |
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168 | TILEGX_OPC_LD4U, |
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169 | TILEGX_OPC_LD4U_ADD, |
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170 | TILEGX_OPC_LD_ADD, |
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171 | TILEGX_OPC_LDNA, |
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172 | TILEGX_OPC_LDNA_ADD, |
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173 | TILEGX_OPC_LDNT, |
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174 | TILEGX_OPC_LDNT1S, |
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175 | TILEGX_OPC_LDNT1S_ADD, |
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176 | TILEGX_OPC_LDNT1U, |
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177 | TILEGX_OPC_LDNT1U_ADD, |
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178 | TILEGX_OPC_LDNT2S, |
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179 | TILEGX_OPC_LDNT2S_ADD, |
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180 | TILEGX_OPC_LDNT2U, |
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181 | TILEGX_OPC_LDNT2U_ADD, |
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182 | TILEGX_OPC_LDNT4S, |
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183 | TILEGX_OPC_LDNT4S_ADD, |
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184 | TILEGX_OPC_LDNT4U, |
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185 | TILEGX_OPC_LDNT4U_ADD, |
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186 | TILEGX_OPC_LDNT_ADD, |
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187 | TILEGX_OPC_LNK, |
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188 | TILEGX_OPC_MF, |
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189 | TILEGX_OPC_MFSPR, |
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190 | TILEGX_OPC_MM, |
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191 | TILEGX_OPC_MNZ, |
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192 | TILEGX_OPC_MTSPR, |
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193 | TILEGX_OPC_MUL_HS_HS, |
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194 | TILEGX_OPC_MUL_HS_HU, |
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195 | TILEGX_OPC_MUL_HS_LS, |
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196 | TILEGX_OPC_MUL_HS_LU, |
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197 | TILEGX_OPC_MUL_HU_HU, |
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198 | TILEGX_OPC_MUL_HU_LS, |
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199 | TILEGX_OPC_MUL_HU_LU, |
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200 | TILEGX_OPC_MUL_LS_LS, |
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201 | TILEGX_OPC_MUL_LS_LU, |
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202 | TILEGX_OPC_MUL_LU_LU, |
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203 | TILEGX_OPC_MULA_HS_HS, |
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204 | TILEGX_OPC_MULA_HS_HU, |
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205 | TILEGX_OPC_MULA_HS_LS, |
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206 | TILEGX_OPC_MULA_HS_LU, |
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207 | TILEGX_OPC_MULA_HU_HU, |
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208 | TILEGX_OPC_MULA_HU_LS, |
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209 | TILEGX_OPC_MULA_HU_LU, |
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210 | TILEGX_OPC_MULA_LS_LS, |
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211 | TILEGX_OPC_MULA_LS_LU, |
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212 | TILEGX_OPC_MULA_LU_LU, |
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213 | TILEGX_OPC_MULAX, |
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214 | TILEGX_OPC_MULX, |
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215 | TILEGX_OPC_MZ, |
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216 | TILEGX_OPC_NAP, |
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217 | TILEGX_OPC_NOP, |
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218 | TILEGX_OPC_NOR, |
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219 | TILEGX_OPC_OR, |
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220 | TILEGX_OPC_ORI, |
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221 | TILEGX_OPC_PCNT, |
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222 | TILEGX_OPC_REVBITS, |
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223 | TILEGX_OPC_REVBYTES, |
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224 | TILEGX_OPC_ROTL, |
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225 | TILEGX_OPC_ROTLI, |
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226 | TILEGX_OPC_SHL, |
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227 | TILEGX_OPC_SHL16INSLI, |
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228 | TILEGX_OPC_SHL1ADD, |
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229 | TILEGX_OPC_SHL1ADDX, |
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230 | TILEGX_OPC_SHL2ADD, |
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231 | TILEGX_OPC_SHL2ADDX, |
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232 | TILEGX_OPC_SHL3ADD, |
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233 | TILEGX_OPC_SHL3ADDX, |
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234 | TILEGX_OPC_SHLI, |
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235 | TILEGX_OPC_SHLX, |
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236 | TILEGX_OPC_SHLXI, |
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237 | TILEGX_OPC_SHRS, |
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238 | TILEGX_OPC_SHRSI, |
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239 | TILEGX_OPC_SHRU, |
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240 | TILEGX_OPC_SHRUI, |
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241 | TILEGX_OPC_SHRUX, |
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242 | TILEGX_OPC_SHRUXI, |
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243 | TILEGX_OPC_SHUFFLEBYTES, |
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244 | TILEGX_OPC_ST, |
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245 | TILEGX_OPC_ST1, |
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246 | TILEGX_OPC_ST1_ADD, |
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247 | TILEGX_OPC_ST2, |
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248 | TILEGX_OPC_ST2_ADD, |
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249 | TILEGX_OPC_ST4, |
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250 | TILEGX_OPC_ST4_ADD, |
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251 | TILEGX_OPC_ST_ADD, |
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252 | TILEGX_OPC_STNT, |
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253 | TILEGX_OPC_STNT1, |
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254 | TILEGX_OPC_STNT1_ADD, |
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255 | TILEGX_OPC_STNT2, |
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256 | TILEGX_OPC_STNT2_ADD, |
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257 | TILEGX_OPC_STNT4, |
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258 | TILEGX_OPC_STNT4_ADD, |
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259 | TILEGX_OPC_STNT_ADD, |
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260 | TILEGX_OPC_SUB, |
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261 | TILEGX_OPC_SUBX, |
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262 | TILEGX_OPC_SUBXSC, |
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263 | TILEGX_OPC_SWINT0, |
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264 | TILEGX_OPC_SWINT1, |
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265 | TILEGX_OPC_SWINT2, |
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266 | TILEGX_OPC_SWINT3, |
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267 | TILEGX_OPC_TBLIDXB0, |
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268 | TILEGX_OPC_TBLIDXB1, |
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269 | TILEGX_OPC_TBLIDXB2, |
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270 | TILEGX_OPC_TBLIDXB3, |
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271 | TILEGX_OPC_V1ADD, |
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272 | TILEGX_OPC_V1ADDI, |
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273 | TILEGX_OPC_V1ADDUC, |
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274 | TILEGX_OPC_V1ADIFFU, |
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275 | TILEGX_OPC_V1AVGU, |
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276 | TILEGX_OPC_V1CMPEQ, |
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277 | TILEGX_OPC_V1CMPEQI, |
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278 | TILEGX_OPC_V1CMPLES, |
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279 | TILEGX_OPC_V1CMPLEU, |
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280 | TILEGX_OPC_V1CMPLTS, |
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281 | TILEGX_OPC_V1CMPLTSI, |
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282 | TILEGX_OPC_V1CMPLTU, |
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283 | TILEGX_OPC_V1CMPLTUI, |
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284 | TILEGX_OPC_V1CMPNE, |
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285 | TILEGX_OPC_V1DDOTPU, |
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286 | TILEGX_OPC_V1DDOTPUA, |
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287 | TILEGX_OPC_V1DDOTPUS, |
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288 | TILEGX_OPC_V1DDOTPUSA, |
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289 | TILEGX_OPC_V1DOTP, |
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290 | TILEGX_OPC_V1DOTPA, |
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291 | TILEGX_OPC_V1DOTPU, |
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292 | TILEGX_OPC_V1DOTPUA, |
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293 | TILEGX_OPC_V1DOTPUS, |
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294 | TILEGX_OPC_V1DOTPUSA, |
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295 | TILEGX_OPC_V1INT_H, |
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296 | TILEGX_OPC_V1INT_L, |
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297 | TILEGX_OPC_V1MAXU, |
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298 | TILEGX_OPC_V1MAXUI, |
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299 | TILEGX_OPC_V1MINU, |
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300 | TILEGX_OPC_V1MINUI, |
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301 | TILEGX_OPC_V1MNZ, |
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302 | TILEGX_OPC_V1MULTU, |
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303 | TILEGX_OPC_V1MULU, |
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304 | TILEGX_OPC_V1MULUS, |
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305 | TILEGX_OPC_V1MZ, |
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306 | TILEGX_OPC_V1SADAU, |
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307 | TILEGX_OPC_V1SADU, |
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308 | TILEGX_OPC_V1SHL, |
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309 | TILEGX_OPC_V1SHLI, |
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310 | TILEGX_OPC_V1SHRS, |
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311 | TILEGX_OPC_V1SHRSI, |
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312 | TILEGX_OPC_V1SHRU, |
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313 | TILEGX_OPC_V1SHRUI, |
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314 | TILEGX_OPC_V1SUB, |
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315 | TILEGX_OPC_V1SUBUC, |
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316 | TILEGX_OPC_V2ADD, |
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317 | TILEGX_OPC_V2ADDI, |
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318 | TILEGX_OPC_V2ADDSC, |
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319 | TILEGX_OPC_V2ADIFFS, |
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320 | TILEGX_OPC_V2AVGS, |
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321 | TILEGX_OPC_V2CMPEQ, |
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322 | TILEGX_OPC_V2CMPEQI, |
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323 | TILEGX_OPC_V2CMPLES, |
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324 | TILEGX_OPC_V2CMPLEU, |
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325 | TILEGX_OPC_V2CMPLTS, |
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326 | TILEGX_OPC_V2CMPLTSI, |
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327 | TILEGX_OPC_V2CMPLTU, |
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328 | TILEGX_OPC_V2CMPLTUI, |
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329 | TILEGX_OPC_V2CMPNE, |
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330 | TILEGX_OPC_V2DOTP, |
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331 | TILEGX_OPC_V2DOTPA, |
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332 | TILEGX_OPC_V2INT_H, |
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333 | TILEGX_OPC_V2INT_L, |
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334 | TILEGX_OPC_V2MAXS, |
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335 | TILEGX_OPC_V2MAXSI, |
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336 | TILEGX_OPC_V2MINS, |
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337 | TILEGX_OPC_V2MINSI, |
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338 | TILEGX_OPC_V2MNZ, |
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339 | TILEGX_OPC_V2MULFSC, |
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340 | TILEGX_OPC_V2MULS, |
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341 | TILEGX_OPC_V2MULTS, |
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342 | TILEGX_OPC_V2MZ, |
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343 | TILEGX_OPC_V2PACKH, |
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344 | TILEGX_OPC_V2PACKL, |
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345 | TILEGX_OPC_V2PACKUC, |
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346 | TILEGX_OPC_V2SADAS, |
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347 | TILEGX_OPC_V2SADAU, |
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348 | TILEGX_OPC_V2SADS, |
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349 | TILEGX_OPC_V2SADU, |
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350 | TILEGX_OPC_V2SHL, |
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351 | TILEGX_OPC_V2SHLI, |
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352 | TILEGX_OPC_V2SHLSC, |
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353 | TILEGX_OPC_V2SHRS, |
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354 | TILEGX_OPC_V2SHRSI, |
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355 | TILEGX_OPC_V2SHRU, |
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356 | TILEGX_OPC_V2SHRUI, |
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357 | TILEGX_OPC_V2SUB, |
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358 | TILEGX_OPC_V2SUBSC, |
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359 | TILEGX_OPC_V4ADD, |
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360 | TILEGX_OPC_V4ADDSC, |
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361 | TILEGX_OPC_V4INT_H, |
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362 | TILEGX_OPC_V4INT_L, |
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363 | TILEGX_OPC_V4PACKSC, |
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364 | TILEGX_OPC_V4SHL, |
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365 | TILEGX_OPC_V4SHLSC, |
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366 | TILEGX_OPC_V4SHRS, |
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367 | TILEGX_OPC_V4SHRU, |
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368 | TILEGX_OPC_V4SUB, |
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369 | TILEGX_OPC_V4SUBSC, |
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370 | TILEGX_OPC_WH64, |
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371 | TILEGX_OPC_XOR, |
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372 | TILEGX_OPC_XORI, |
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373 | TILEGX_OPC_NONE |
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374 | } tilegx_mnemonic; |
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375 | |||
376 | /* 64-bit pattern for a { bpt ; nop } bundle. */ |
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377 | #define TILEGX_BPT_BUNDLE 0x286a44ae51485000ULL |
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378 | |||
379 | |||
380 | |||
381 | static __inline unsigned int |
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382 | get_BFEnd_X0(tilegx_bundle_bits num) |
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383 | { |
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384 | const unsigned int n = (unsigned int)num; |
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385 | return (((n >> 12)) & 0x3f); |
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386 | } |
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387 | |||
388 | static __inline unsigned int |
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389 | get_BFOpcodeExtension_X0(tilegx_bundle_bits num) |
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390 | { |
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391 | const unsigned int n = (unsigned int)num; |
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392 | return (((n >> 24)) & 0xf); |
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393 | } |
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394 | |||
395 | static __inline unsigned int |
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396 | get_BFStart_X0(tilegx_bundle_bits num) |
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397 | { |
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398 | const unsigned int n = (unsigned int)num; |
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399 | return (((n >> 18)) & 0x3f); |
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400 | } |
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401 | |||
402 | static __inline unsigned int |
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403 | get_BrOff_X1(tilegx_bundle_bits n) |
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404 | { |
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405 | return (((unsigned int)(n >> 31)) & 0x0000003f) | |
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406 | (((unsigned int)(n >> 37)) & 0x0001ffc0); |
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407 | } |
||
408 | |||
409 | static __inline unsigned int |
||
410 | get_BrType_X1(tilegx_bundle_bits n) |
||
411 | { |
||
412 | return (((unsigned int)(n >> 54)) & 0x1f); |
||
413 | } |
||
414 | |||
415 | static __inline unsigned int |
||
416 | get_Dest_Imm8_X1(tilegx_bundle_bits n) |
||
417 | { |
||
418 | return (((unsigned int)(n >> 31)) & 0x0000003f) | |
||
419 | (((unsigned int)(n >> 43)) & 0x000000c0); |
||
420 | } |
||
421 | |||
422 | static __inline unsigned int |
||
423 | get_Dest_X0(tilegx_bundle_bits num) |
||
424 | { |
||
425 | const unsigned int n = (unsigned int)num; |
||
426 | return (((n >> 0)) & 0x3f); |
||
427 | } |
||
428 | |||
429 | static __inline unsigned int |
||
430 | get_Dest_X1(tilegx_bundle_bits n) |
||
431 | { |
||
432 | return (((unsigned int)(n >> 31)) & 0x3f); |
||
433 | } |
||
434 | |||
435 | static __inline unsigned int |
||
436 | get_Dest_Y0(tilegx_bundle_bits num) |
||
437 | { |
||
438 | const unsigned int n = (unsigned int)num; |
||
439 | return (((n >> 0)) & 0x3f); |
||
440 | } |
||
441 | |||
442 | static __inline unsigned int |
||
443 | get_Dest_Y1(tilegx_bundle_bits n) |
||
444 | { |
||
445 | return (((unsigned int)(n >> 31)) & 0x3f); |
||
446 | } |
||
447 | |||
448 | static __inline unsigned int |
||
449 | get_Imm16_X0(tilegx_bundle_bits num) |
||
450 | { |
||
451 | const unsigned int n = (unsigned int)num; |
||
452 | return (((n >> 12)) & 0xffff); |
||
453 | } |
||
454 | |||
455 | static __inline unsigned int |
||
456 | get_Imm16_X1(tilegx_bundle_bits n) |
||
457 | { |
||
458 | return (((unsigned int)(n >> 43)) & 0xffff); |
||
459 | } |
||
460 | |||
461 | static __inline unsigned int |
||
462 | get_Imm8OpcodeExtension_X0(tilegx_bundle_bits num) |
||
463 | { |
||
464 | const unsigned int n = (unsigned int)num; |
||
465 | return (((n >> 20)) & 0xff); |
||
466 | } |
||
467 | |||
468 | static __inline unsigned int |
||
469 | get_Imm8OpcodeExtension_X1(tilegx_bundle_bits n) |
||
470 | { |
||
471 | return (((unsigned int)(n >> 51)) & 0xff); |
||
472 | } |
||
473 | |||
474 | static __inline unsigned int |
||
475 | get_Imm8_X0(tilegx_bundle_bits num) |
||
476 | { |
||
477 | const unsigned int n = (unsigned int)num; |
||
478 | return (((n >> 12)) & 0xff); |
||
479 | } |
||
480 | |||
481 | static __inline unsigned int |
||
482 | get_Imm8_X1(tilegx_bundle_bits n) |
||
483 | { |
||
484 | return (((unsigned int)(n >> 43)) & 0xff); |
||
485 | } |
||
486 | |||
487 | static __inline unsigned int |
||
488 | get_Imm8_Y0(tilegx_bundle_bits num) |
||
489 | { |
||
490 | const unsigned int n = (unsigned int)num; |
||
491 | return (((n >> 12)) & 0xff); |
||
492 | } |
||
493 | |||
494 | static __inline unsigned int |
||
495 | get_Imm8_Y1(tilegx_bundle_bits n) |
||
496 | { |
||
497 | return (((unsigned int)(n >> 43)) & 0xff); |
||
498 | } |
||
499 | |||
500 | static __inline unsigned int |
||
501 | get_JumpOff_X1(tilegx_bundle_bits n) |
||
502 | { |
||
503 | return (((unsigned int)(n >> 31)) & 0x7ffffff); |
||
504 | } |
||
505 | |||
506 | static __inline unsigned int |
||
507 | get_JumpOpcodeExtension_X1(tilegx_bundle_bits n) |
||
508 | { |
||
509 | return (((unsigned int)(n >> 58)) & 0x1); |
||
510 | } |
||
511 | |||
512 | static __inline unsigned int |
||
513 | get_MF_Imm14_X1(tilegx_bundle_bits n) |
||
514 | { |
||
515 | return (((unsigned int)(n >> 37)) & 0x3fff); |
||
516 | } |
||
517 | |||
518 | static __inline unsigned int |
||
519 | get_MT_Imm14_X1(tilegx_bundle_bits n) |
||
520 | { |
||
521 | return (((unsigned int)(n >> 31)) & 0x0000003f) | |
||
522 | (((unsigned int)(n >> 37)) & 0x00003fc0); |
||
523 | } |
||
524 | |||
525 | static __inline unsigned int |
||
526 | get_Mode(tilegx_bundle_bits n) |
||
527 | { |
||
528 | return (((unsigned int)(n >> 62)) & 0x3); |
||
529 | } |
||
530 | |||
531 | static __inline unsigned int |
||
532 | get_Opcode_X0(tilegx_bundle_bits num) |
||
533 | { |
||
534 | const unsigned int n = (unsigned int)num; |
||
535 | return (((n >> 28)) & 0x7); |
||
536 | } |
||
537 | |||
538 | static __inline unsigned int |
||
539 | get_Opcode_X1(tilegx_bundle_bits n) |
||
540 | { |
||
541 | return (((unsigned int)(n >> 59)) & 0x7); |
||
542 | } |
||
543 | |||
544 | static __inline unsigned int |
||
545 | get_Opcode_Y0(tilegx_bundle_bits num) |
||
546 | { |
||
547 | const unsigned int n = (unsigned int)num; |
||
548 | return (((n >> 27)) & 0xf); |
||
549 | } |
||
550 | |||
551 | static __inline unsigned int |
||
552 | get_Opcode_Y1(tilegx_bundle_bits n) |
||
553 | { |
||
554 | return (((unsigned int)(n >> 58)) & 0xf); |
||
555 | } |
||
556 | |||
557 | static __inline unsigned int |
||
558 | get_Opcode_Y2(tilegx_bundle_bits n) |
||
559 | { |
||
560 | return (((n >> 26)) & 0x00000001) | |
||
561 | (((unsigned int)(n >> 56)) & 0x00000002); |
||
562 | } |
||
563 | |||
564 | static __inline unsigned int |
||
565 | get_RRROpcodeExtension_X0(tilegx_bundle_bits num) |
||
566 | { |
||
567 | const unsigned int n = (unsigned int)num; |
||
568 | return (((n >> 18)) & 0x3ff); |
||
569 | } |
||
570 | |||
571 | static __inline unsigned int |
||
572 | get_RRROpcodeExtension_X1(tilegx_bundle_bits n) |
||
573 | { |
||
574 | return (((unsigned int)(n >> 49)) & 0x3ff); |
||
575 | } |
||
576 | |||
577 | static __inline unsigned int |
||
578 | get_RRROpcodeExtension_Y0(tilegx_bundle_bits num) |
||
579 | { |
||
580 | const unsigned int n = (unsigned int)num; |
||
581 | return (((n >> 18)) & 0x3); |
||
582 | } |
||
583 | |||
584 | static __inline unsigned int |
||
585 | get_RRROpcodeExtension_Y1(tilegx_bundle_bits n) |
||
586 | { |
||
587 | return (((unsigned int)(n >> 49)) & 0x3); |
||
588 | } |
||
589 | |||
590 | static __inline unsigned int |
||
591 | get_ShAmt_X0(tilegx_bundle_bits num) |
||
592 | { |
||
593 | const unsigned int n = (unsigned int)num; |
||
594 | return (((n >> 12)) & 0x3f); |
||
595 | } |
||
596 | |||
597 | static __inline unsigned int |
||
598 | get_ShAmt_X1(tilegx_bundle_bits n) |
||
599 | { |
||
600 | return (((unsigned int)(n >> 43)) & 0x3f); |
||
601 | } |
||
602 | |||
603 | static __inline unsigned int |
||
604 | get_ShAmt_Y0(tilegx_bundle_bits num) |
||
605 | { |
||
606 | const unsigned int n = (unsigned int)num; |
||
607 | return (((n >> 12)) & 0x3f); |
||
608 | } |
||
609 | |||
610 | static __inline unsigned int |
||
611 | get_ShAmt_Y1(tilegx_bundle_bits n) |
||
612 | { |
||
613 | return (((unsigned int)(n >> 43)) & 0x3f); |
||
614 | } |
||
615 | |||
616 | static __inline unsigned int |
||
617 | get_ShiftOpcodeExtension_X0(tilegx_bundle_bits num) |
||
618 | { |
||
619 | const unsigned int n = (unsigned int)num; |
||
620 | return (((n >> 18)) & 0x3ff); |
||
621 | } |
||
622 | |||
623 | static __inline unsigned int |
||
624 | get_ShiftOpcodeExtension_X1(tilegx_bundle_bits n) |
||
625 | { |
||
626 | return (((unsigned int)(n >> 49)) & 0x3ff); |
||
627 | } |
||
628 | |||
629 | static __inline unsigned int |
||
630 | get_ShiftOpcodeExtension_Y0(tilegx_bundle_bits num) |
||
631 | { |
||
632 | const unsigned int n = (unsigned int)num; |
||
633 | return (((n >> 18)) & 0x3); |
||
634 | } |
||
635 | |||
636 | static __inline unsigned int |
||
637 | get_ShiftOpcodeExtension_Y1(tilegx_bundle_bits n) |
||
638 | { |
||
639 | return (((unsigned int)(n >> 49)) & 0x3); |
||
640 | } |
||
641 | |||
642 | static __inline unsigned int |
||
643 | get_SrcA_X0(tilegx_bundle_bits num) |
||
644 | { |
||
645 | const unsigned int n = (unsigned int)num; |
||
646 | return (((n >> 6)) & 0x3f); |
||
647 | } |
||
648 | |||
649 | static __inline unsigned int |
||
650 | get_SrcA_X1(tilegx_bundle_bits n) |
||
651 | { |
||
652 | return (((unsigned int)(n >> 37)) & 0x3f); |
||
653 | } |
||
654 | |||
655 | static __inline unsigned int |
||
656 | get_SrcA_Y0(tilegx_bundle_bits num) |
||
657 | { |
||
658 | const unsigned int n = (unsigned int)num; |
||
659 | return (((n >> 6)) & 0x3f); |
||
660 | } |
||
661 | |||
662 | static __inline unsigned int |
||
663 | get_SrcA_Y1(tilegx_bundle_bits n) |
||
664 | { |
||
665 | return (((unsigned int)(n >> 37)) & 0x3f); |
||
666 | } |
||
667 | |||
668 | static __inline unsigned int |
||
669 | get_SrcA_Y2(tilegx_bundle_bits num) |
||
670 | { |
||
671 | const unsigned int n = (unsigned int)num; |
||
672 | return (((n >> 20)) & 0x3f); |
||
673 | } |
||
674 | |||
675 | static __inline unsigned int |
||
676 | get_SrcBDest_Y2(tilegx_bundle_bits n) |
||
677 | { |
||
678 | return (((unsigned int)(n >> 51)) & 0x3f); |
||
679 | } |
||
680 | |||
681 | static __inline unsigned int |
||
682 | get_SrcB_X0(tilegx_bundle_bits num) |
||
683 | { |
||
684 | const unsigned int n = (unsigned int)num; |
||
685 | return (((n >> 12)) & 0x3f); |
||
686 | } |
||
687 | |||
688 | static __inline unsigned int |
||
689 | get_SrcB_X1(tilegx_bundle_bits n) |
||
690 | { |
||
691 | return (((unsigned int)(n >> 43)) & 0x3f); |
||
692 | } |
||
693 | |||
694 | static __inline unsigned int |
||
695 | get_SrcB_Y0(tilegx_bundle_bits num) |
||
696 | { |
||
697 | const unsigned int n = (unsigned int)num; |
||
698 | return (((n >> 12)) & 0x3f); |
||
699 | } |
||
700 | |||
701 | static __inline unsigned int |
||
702 | get_SrcB_Y1(tilegx_bundle_bits n) |
||
703 | { |
||
704 | return (((unsigned int)(n >> 43)) & 0x3f); |
||
705 | } |
||
706 | |||
707 | static __inline unsigned int |
||
708 | get_UnaryOpcodeExtension_X0(tilegx_bundle_bits num) |
||
709 | { |
||
710 | const unsigned int n = (unsigned int)num; |
||
711 | return (((n >> 12)) & 0x3f); |
||
712 | } |
||
713 | |||
714 | static __inline unsigned int |
||
715 | get_UnaryOpcodeExtension_X1(tilegx_bundle_bits n) |
||
716 | { |
||
717 | return (((unsigned int)(n >> 43)) & 0x3f); |
||
718 | } |
||
719 | |||
720 | static __inline unsigned int |
||
721 | get_UnaryOpcodeExtension_Y0(tilegx_bundle_bits num) |
||
722 | { |
||
723 | const unsigned int n = (unsigned int)num; |
||
724 | return (((n >> 12)) & 0x3f); |
||
725 | } |
||
726 | |||
727 | static __inline unsigned int |
||
728 | get_UnaryOpcodeExtension_Y1(tilegx_bundle_bits n) |
||
729 | { |
||
730 | return (((unsigned int)(n >> 43)) & 0x3f); |
||
731 | } |
||
732 | |||
733 | |||
734 | static __inline int |
||
735 | sign_extend(int n, int num_bits) |
||
736 | { |
||
737 | int shift = (int)(sizeof(int) * 8 - num_bits); |
||
738 | return (n << shift) >> shift; |
||
739 | } |
||
740 | |||
741 | |||
742 | |||
743 | static __inline tilegx_bundle_bits |
||
744 | create_BFEnd_X0(int num) |
||
745 | { |
||
746 | const unsigned int n = (unsigned int)num; |
||
747 | return ((n & 0x3f) << 12); |
||
748 | } |
||
749 | |||
750 | static __inline tilegx_bundle_bits |
||
751 | create_BFOpcodeExtension_X0(int num) |
||
752 | { |
||
753 | const unsigned int n = (unsigned int)num; |
||
754 | return ((n & 0xf) << 24); |
||
755 | } |
||
756 | |||
757 | static __inline tilegx_bundle_bits |
||
758 | create_BFStart_X0(int num) |
||
759 | { |
||
760 | const unsigned int n = (unsigned int)num; |
||
761 | return ((n & 0x3f) << 18); |
||
762 | } |
||
763 | |||
764 | static __inline tilegx_bundle_bits |
||
765 | create_BrOff_X1(int num) |
||
766 | { |
||
767 | const unsigned int n = (unsigned int)num; |
||
768 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | |
||
769 | (((tilegx_bundle_bits)(n & 0x0001ffc0)) << 37); |
||
770 | } |
||
771 | |||
772 | static __inline tilegx_bundle_bits |
||
773 | create_BrType_X1(int num) |
||
774 | { |
||
775 | const unsigned int n = (unsigned int)num; |
||
776 | return (((tilegx_bundle_bits)(n & 0x1f)) << 54); |
||
777 | } |
||
778 | |||
779 | static __inline tilegx_bundle_bits |
||
780 | create_Dest_Imm8_X1(int num) |
||
781 | { |
||
782 | const unsigned int n = (unsigned int)num; |
||
783 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | |
||
784 | (((tilegx_bundle_bits)(n & 0x000000c0)) << 43); |
||
785 | } |
||
786 | |||
787 | static __inline tilegx_bundle_bits |
||
788 | create_Dest_X0(int num) |
||
789 | { |
||
790 | const unsigned int n = (unsigned int)num; |
||
791 | return ((n & 0x3f) << 0); |
||
792 | } |
||
793 | |||
794 | static __inline tilegx_bundle_bits |
||
795 | create_Dest_X1(int num) |
||
796 | { |
||
797 | const unsigned int n = (unsigned int)num; |
||
798 | return (((tilegx_bundle_bits)(n & 0x3f)) << 31); |
||
799 | } |
||
800 | |||
801 | static __inline tilegx_bundle_bits |
||
802 | create_Dest_Y0(int num) |
||
803 | { |
||
804 | const unsigned int n = (unsigned int)num; |
||
805 | return ((n & 0x3f) << 0); |
||
806 | } |
||
807 | |||
808 | static __inline tilegx_bundle_bits |
||
809 | create_Dest_Y1(int num) |
||
810 | { |
||
811 | const unsigned int n = (unsigned int)num; |
||
812 | return (((tilegx_bundle_bits)(n & 0x3f)) << 31); |
||
813 | } |
||
814 | |||
815 | static __inline tilegx_bundle_bits |
||
816 | create_Imm16_X0(int num) |
||
817 | { |
||
818 | const unsigned int n = (unsigned int)num; |
||
819 | return ((n & 0xffff) << 12); |
||
820 | } |
||
821 | |||
822 | static __inline tilegx_bundle_bits |
||
823 | create_Imm16_X1(int num) |
||
824 | { |
||
825 | const unsigned int n = (unsigned int)num; |
||
826 | return (((tilegx_bundle_bits)(n & 0xffff)) << 43); |
||
827 | } |
||
828 | |||
829 | static __inline tilegx_bundle_bits |
||
830 | create_Imm8OpcodeExtension_X0(int num) |
||
831 | { |
||
832 | const unsigned int n = (unsigned int)num; |
||
833 | return ((n & 0xff) << 20); |
||
834 | } |
||
835 | |||
836 | static __inline tilegx_bundle_bits |
||
837 | create_Imm8OpcodeExtension_X1(int num) |
||
838 | { |
||
839 | const unsigned int n = (unsigned int)num; |
||
840 | return (((tilegx_bundle_bits)(n & 0xff)) << 51); |
||
841 | } |
||
842 | |||
843 | static __inline tilegx_bundle_bits |
||
844 | create_Imm8_X0(int num) |
||
845 | { |
||
846 | const unsigned int n = (unsigned int)num; |
||
847 | return ((n & 0xff) << 12); |
||
848 | } |
||
849 | |||
850 | static __inline tilegx_bundle_bits |
||
851 | create_Imm8_X1(int num) |
||
852 | { |
||
853 | const unsigned int n = (unsigned int)num; |
||
854 | return (((tilegx_bundle_bits)(n & 0xff)) << 43); |
||
855 | } |
||
856 | |||
857 | static __inline tilegx_bundle_bits |
||
858 | create_Imm8_Y0(int num) |
||
859 | { |
||
860 | const unsigned int n = (unsigned int)num; |
||
861 | return ((n & 0xff) << 12); |
||
862 | } |
||
863 | |||
864 | static __inline tilegx_bundle_bits |
||
865 | create_Imm8_Y1(int num) |
||
866 | { |
||
867 | const unsigned int n = (unsigned int)num; |
||
868 | return (((tilegx_bundle_bits)(n & 0xff)) << 43); |
||
869 | } |
||
870 | |||
871 | static __inline tilegx_bundle_bits |
||
872 | create_JumpOff_X1(int num) |
||
873 | { |
||
874 | const unsigned int n = (unsigned int)num; |
||
875 | return (((tilegx_bundle_bits)(n & 0x7ffffff)) << 31); |
||
876 | } |
||
877 | |||
878 | static __inline tilegx_bundle_bits |
||
879 | create_JumpOpcodeExtension_X1(int num) |
||
880 | { |
||
881 | const unsigned int n = (unsigned int)num; |
||
882 | return (((tilegx_bundle_bits)(n & 0x1)) << 58); |
||
883 | } |
||
884 | |||
885 | static __inline tilegx_bundle_bits |
||
886 | create_MF_Imm14_X1(int num) |
||
887 | { |
||
888 | const unsigned int n = (unsigned int)num; |
||
889 | return (((tilegx_bundle_bits)(n & 0x3fff)) << 37); |
||
890 | } |
||
891 | |||
892 | static __inline tilegx_bundle_bits |
||
893 | create_MT_Imm14_X1(int num) |
||
894 | { |
||
895 | const unsigned int n = (unsigned int)num; |
||
896 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | |
||
897 | (((tilegx_bundle_bits)(n & 0x00003fc0)) << 37); |
||
898 | } |
||
899 | |||
900 | static __inline tilegx_bundle_bits |
||
901 | create_Mode(int num) |
||
902 | { |
||
903 | const unsigned int n = (unsigned int)num; |
||
904 | return (((tilegx_bundle_bits)(n & 0x3)) << 62); |
||
905 | } |
||
906 | |||
907 | static __inline tilegx_bundle_bits |
||
908 | create_Opcode_X0(int num) |
||
909 | { |
||
910 | const unsigned int n = (unsigned int)num; |
||
911 | return ((n & 0x7) << 28); |
||
912 | } |
||
913 | |||
914 | static __inline tilegx_bundle_bits |
||
915 | create_Opcode_X1(int num) |
||
916 | { |
||
917 | const unsigned int n = (unsigned int)num; |
||
918 | return (((tilegx_bundle_bits)(n & 0x7)) << 59); |
||
919 | } |
||
920 | |||
921 | static __inline tilegx_bundle_bits |
||
922 | create_Opcode_Y0(int num) |
||
923 | { |
||
924 | const unsigned int n = (unsigned int)num; |
||
925 | return ((n & 0xf) << 27); |
||
926 | } |
||
927 | |||
928 | static __inline tilegx_bundle_bits |
||
929 | create_Opcode_Y1(int num) |
||
930 | { |
||
931 | const unsigned int n = (unsigned int)num; |
||
932 | return (((tilegx_bundle_bits)(n & 0xf)) << 58); |
||
933 | } |
||
934 | |||
935 | static __inline tilegx_bundle_bits |
||
936 | create_Opcode_Y2(int num) |
||
937 | { |
||
938 | const unsigned int n = (unsigned int)num; |
||
939 | return ((n & 0x00000001) << 26) | |
||
940 | (((tilegx_bundle_bits)(n & 0x00000002)) << 56); |
||
941 | } |
||
942 | |||
943 | static __inline tilegx_bundle_bits |
||
944 | create_RRROpcodeExtension_X0(int num) |
||
945 | { |
||
946 | const unsigned int n = (unsigned int)num; |
||
947 | return ((n & 0x3ff) << 18); |
||
948 | } |
||
949 | |||
950 | static __inline tilegx_bundle_bits |
||
951 | create_RRROpcodeExtension_X1(int num) |
||
952 | { |
||
953 | const unsigned int n = (unsigned int)num; |
||
954 | return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); |
||
955 | } |
||
956 | |||
957 | static __inline tilegx_bundle_bits |
||
958 | create_RRROpcodeExtension_Y0(int num) |
||
959 | { |
||
960 | const unsigned int n = (unsigned int)num; |
||
961 | return ((n & 0x3) << 18); |
||
962 | } |
||
963 | |||
964 | static __inline tilegx_bundle_bits |
||
965 | create_RRROpcodeExtension_Y1(int num) |
||
966 | { |
||
967 | const unsigned int n = (unsigned int)num; |
||
968 | return (((tilegx_bundle_bits)(n & 0x3)) << 49); |
||
969 | } |
||
970 | |||
971 | static __inline tilegx_bundle_bits |
||
972 | create_ShAmt_X0(int num) |
||
973 | { |
||
974 | const unsigned int n = (unsigned int)num; |
||
975 | return ((n & 0x3f) << 12); |
||
976 | } |
||
977 | |||
978 | static __inline tilegx_bundle_bits |
||
979 | create_ShAmt_X1(int num) |
||
980 | { |
||
981 | const unsigned int n = (unsigned int)num; |
||
982 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
||
983 | } |
||
984 | |||
985 | static __inline tilegx_bundle_bits |
||
986 | create_ShAmt_Y0(int num) |
||
987 | { |
||
988 | const unsigned int n = (unsigned int)num; |
||
989 | return ((n & 0x3f) << 12); |
||
990 | } |
||
991 | |||
992 | static __inline tilegx_bundle_bits |
||
993 | create_ShAmt_Y1(int num) |
||
994 | { |
||
995 | const unsigned int n = (unsigned int)num; |
||
996 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
||
997 | } |
||
998 | |||
999 | static __inline tilegx_bundle_bits |
||
1000 | create_ShiftOpcodeExtension_X0(int num) |
||
1001 | { |
||
1002 | const unsigned int n = (unsigned int)num; |
||
1003 | return ((n & 0x3ff) << 18); |
||
1004 | } |
||
1005 | |||
1006 | static __inline tilegx_bundle_bits |
||
1007 | create_ShiftOpcodeExtension_X1(int num) |
||
1008 | { |
||
1009 | const unsigned int n = (unsigned int)num; |
||
1010 | return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); |
||
1011 | } |
||
1012 | |||
1013 | static __inline tilegx_bundle_bits |
||
1014 | create_ShiftOpcodeExtension_Y0(int num) |
||
1015 | { |
||
1016 | const unsigned int n = (unsigned int)num; |
||
1017 | return ((n & 0x3) << 18); |
||
1018 | } |
||
1019 | |||
1020 | static __inline tilegx_bundle_bits |
||
1021 | create_ShiftOpcodeExtension_Y1(int num) |
||
1022 | { |
||
1023 | const unsigned int n = (unsigned int)num; |
||
1024 | return (((tilegx_bundle_bits)(n & 0x3)) << 49); |
||
1025 | } |
||
1026 | |||
1027 | static __inline tilegx_bundle_bits |
||
1028 | create_SrcA_X0(int num) |
||
1029 | { |
||
1030 | const unsigned int n = (unsigned int)num; |
||
1031 | return ((n & 0x3f) << 6); |
||
1032 | } |
||
1033 | |||
1034 | static __inline tilegx_bundle_bits |
||
1035 | create_SrcA_X1(int num) |
||
1036 | { |
||
1037 | const unsigned int n = (unsigned int)num; |
||
1038 | return (((tilegx_bundle_bits)(n & 0x3f)) << 37); |
||
1039 | } |
||
1040 | |||
1041 | static __inline tilegx_bundle_bits |
||
1042 | create_SrcA_Y0(int num) |
||
1043 | { |
||
1044 | const unsigned int n = (unsigned int)num; |
||
1045 | return ((n & 0x3f) << 6); |
||
1046 | } |
||
1047 | |||
1048 | static __inline tilegx_bundle_bits |
||
1049 | create_SrcA_Y1(int num) |
||
1050 | { |
||
1051 | const unsigned int n = (unsigned int)num; |
||
1052 | return (((tilegx_bundle_bits)(n & 0x3f)) << 37); |
||
1053 | } |
||
1054 | |||
1055 | static __inline tilegx_bundle_bits |
||
1056 | create_SrcA_Y2(int num) |
||
1057 | { |
||
1058 | const unsigned int n = (unsigned int)num; |
||
1059 | return ((n & 0x3f) << 20); |
||
1060 | } |
||
1061 | |||
1062 | static __inline tilegx_bundle_bits |
||
1063 | create_SrcBDest_Y2(int num) |
||
1064 | { |
||
1065 | const unsigned int n = (unsigned int)num; |
||
1066 | return (((tilegx_bundle_bits)(n & 0x3f)) << 51); |
||
1067 | } |
||
1068 | |||
1069 | static __inline tilegx_bundle_bits |
||
1070 | create_SrcB_X0(int num) |
||
1071 | { |
||
1072 | const unsigned int n = (unsigned int)num; |
||
1073 | return ((n & 0x3f) << 12); |
||
1074 | } |
||
1075 | |||
1076 | static __inline tilegx_bundle_bits |
||
1077 | create_SrcB_X1(int num) |
||
1078 | { |
||
1079 | const unsigned int n = (unsigned int)num; |
||
1080 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
||
1081 | } |
||
1082 | |||
1083 | static __inline tilegx_bundle_bits |
||
1084 | create_SrcB_Y0(int num) |
||
1085 | { |
||
1086 | const unsigned int n = (unsigned int)num; |
||
1087 | return ((n & 0x3f) << 12); |
||
1088 | } |
||
1089 | |||
1090 | static __inline tilegx_bundle_bits |
||
1091 | create_SrcB_Y1(int num) |
||
1092 | { |
||
1093 | const unsigned int n = (unsigned int)num; |
||
1094 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
||
1095 | } |
||
1096 | |||
1097 | static __inline tilegx_bundle_bits |
||
1098 | create_UnaryOpcodeExtension_X0(int num) |
||
1099 | { |
||
1100 | const unsigned int n = (unsigned int)num; |
||
1101 | return ((n & 0x3f) << 12); |
||
1102 | } |
||
1103 | |||
1104 | static __inline tilegx_bundle_bits |
||
1105 | create_UnaryOpcodeExtension_X1(int num) |
||
1106 | { |
||
1107 | const unsigned int n = (unsigned int)num; |
||
1108 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
||
1109 | } |
||
1110 | |||
1111 | static __inline tilegx_bundle_bits |
||
1112 | create_UnaryOpcodeExtension_Y0(int num) |
||
1113 | { |
||
1114 | const unsigned int n = (unsigned int)num; |
||
1115 | return ((n & 0x3f) << 12); |
||
1116 | } |
||
1117 | |||
1118 | static __inline tilegx_bundle_bits |
||
1119 | create_UnaryOpcodeExtension_Y1(int num) |
||
1120 | { |
||
1121 | const unsigned int n = (unsigned int)num; |
||
1122 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
||
1123 | } |
||
1124 | |||
1125 | |||
1126 | typedef enum |
||
1127 | { |
||
1128 | TILEGX_PIPELINE_X0, |
||
1129 | TILEGX_PIPELINE_X1, |
||
1130 | TILEGX_PIPELINE_Y0, |
||
1131 | TILEGX_PIPELINE_Y1, |
||
1132 | TILEGX_PIPELINE_Y2, |
||
1133 | } tilegx_pipeline; |
||
1134 | |||
1135 | #define tilegx_is_x_pipeline(p) ((int)(p) <= (int)TILEGX_PIPELINE_X1) |
||
1136 | |||
1137 | typedef enum |
||
1138 | { |
||
1139 | TILEGX_OP_TYPE_REGISTER, |
||
1140 | TILEGX_OP_TYPE_IMMEDIATE, |
||
1141 | TILEGX_OP_TYPE_ADDRESS, |
||
1142 | TILEGX_OP_TYPE_SPR |
||
1143 | } tilegx_operand_type; |
||
1144 | |||
1145 | /* These are the bits that determine if a bundle is in the X encoding. */ |
||
1146 | #define TILEGX_BUNDLE_MODE_MASK ((tilegx_bundle_bits)3 << 62) |
||
1147 | |||
1148 | enum |
||
1149 | { |
||
1150 | /* Maximum number of instructions in a bundle (2 for X, 3 for Y). */ |
||
1151 | TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE = 3, |
||
1152 | |||
1153 | /* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */ |
||
1154 | TILEGX_NUM_PIPELINE_ENCODINGS = 5, |
||
1155 | |||
1156 | /* Log base 2 of TILEGX_BUNDLE_SIZE_IN_BYTES. */ |
||
1157 | TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES = 3, |
||
1158 | |||
1159 | /* Instructions take this many bytes. */ |
||
1160 | TILEGX_BUNDLE_SIZE_IN_BYTES = 1 << TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES, |
||
1161 | |||
1162 | /* Log base 2 of TILEGX_BUNDLE_ALIGNMENT_IN_BYTES. */ |
||
1163 | TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3, |
||
1164 | |||
1165 | /* Bundles should be aligned modulo this number of bytes. */ |
||
1166 | TILEGX_BUNDLE_ALIGNMENT_IN_BYTES = |
||
1167 | (1 << TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES), |
||
1168 | |||
1169 | /* Number of registers (some are magic, such as network I/O). */ |
||
1170 | TILEGX_NUM_REGISTERS = 64, |
||
1171 | }; |
||
1172 | |||
1173 | |||
1174 | struct tilegx_operand |
||
1175 | { |
||
1176 | /* Is this operand a register, immediate or address? */ |
||
1177 | tilegx_operand_type type; |
||
1178 | |||
1179 | /* The default relocation type for this operand. */ |
||
1180 | signed int default_reloc : 16; |
||
1181 | |||
1182 | /* How many bits is this value? (used for range checking) */ |
||
1183 | unsigned int num_bits : 5; |
||
1184 | |||
1185 | /* Is the value signed? (used for range checking) */ |
||
1186 | unsigned int is_signed : 1; |
||
1187 | |||
1188 | /* Is this operand a source register? */ |
||
1189 | unsigned int is_src_reg : 1; |
||
1190 | |||
1191 | /* Is this operand written? (i.e. is it a destination register) */ |
||
1192 | unsigned int is_dest_reg : 1; |
||
1193 | |||
1194 | /* Is this operand PC-relative? */ |
||
1195 | unsigned int is_pc_relative : 1; |
||
1196 | |||
1197 | /* By how many bits do we right shift the value before inserting? */ |
||
1198 | unsigned int rightshift : 2; |
||
1199 | |||
1200 | /* Return the bits for this operand to be ORed into an existing bundle. */ |
||
1201 | tilegx_bundle_bits (*insert) (int op); |
||
1202 | |||
1203 | /* Extract this operand and return it. */ |
||
1204 | unsigned int (*extract) (tilegx_bundle_bits bundle); |
||
1205 | }; |
||
1206 | |||
1207 | |||
1208 | extern const struct tilegx_operand tilegx_operands[]; |
||
1209 | |||
1210 | /* One finite-state machine per pipe for rapid instruction decoding. */ |
||
1211 | extern const unsigned short * const |
||
1212 | tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS]; |
||
1213 | |||
1214 | |||
1215 | struct tilegx_opcode |
||
1216 | { |
||
1217 | /* The opcode mnemonic, e.g. "add" */ |
||
1218 | const char *name; |
||
1219 | |||
1220 | /* The enum value for this mnemonic. */ |
||
1221 | tilegx_mnemonic mnemonic; |
||
1222 | |||
1223 | /* A bit mask of which of the five pipes this instruction |
||
1224 | is compatible with: |
||
1225 | X0 0x01 |
||
1226 | X1 0x02 |
||
1227 | Y0 0x04 |
||
1228 | Y1 0x08 |
||
1229 | Y2 0x10 */ |
||
1230 | unsigned char pipes; |
||
1231 | |||
1232 | /* How many operands are there? */ |
||
1233 | unsigned char num_operands; |
||
1234 | |||
1235 | /* Which register does this write implicitly, or TREG_ZERO if none? */ |
||
1236 | unsigned char implicitly_written_register; |
||
1237 | |||
1238 | /* Can this be bundled with other instructions (almost always true). */ |
||
1239 | unsigned char can_bundle; |
||
1240 | |||
1241 | /* The description of the operands. Each of these is an |
||
1242 | * index into the tilegx_operands[] table. */ |
||
1243 | unsigned char operands[TILEGX_NUM_PIPELINE_ENCODINGS][TILEGX_MAX_OPERANDS]; |
||
1244 | |||
1245 | #if !defined(__KERNEL__) && !defined(_LIBC) |
||
1246 | /* A mask of which bits have predefined values for each pipeline. |
||
1247 | * This is useful for disassembly. */ |
||
1248 | tilegx_bundle_bits fixed_bit_masks[TILEGX_NUM_PIPELINE_ENCODINGS]; |
||
1249 | |||
1250 | /* For each bit set in fixed_bit_masks, what the value is for this |
||
1251 | * instruction. */ |
||
1252 | tilegx_bundle_bits fixed_bit_values[TILEGX_NUM_PIPELINE_ENCODINGS]; |
||
1253 | #endif |
||
1254 | }; |
||
1255 | |||
1256 | extern const struct tilegx_opcode tilegx_opcodes[]; |
||
1257 | |||
1258 | /* Used for non-textual disassembly into structs. */ |
||
1259 | struct tilegx_decoded_instruction |
||
1260 | { |
||
1261 | const struct tilegx_opcode *opcode; |
||
1262 | const struct tilegx_operand *operands[TILEGX_MAX_OPERANDS]; |
||
1263 | long long operand_values[TILEGX_MAX_OPERANDS]; |
||
1264 | }; |
||
1265 | |||
1266 | |||
1267 | /* Disassemble a bundle into a struct for machine processing. */ |
||
1268 | extern int parse_insn_tilegx(tilegx_bundle_bits bits, |
||
1269 | unsigned long long pc, |
||
1270 | struct tilegx_decoded_instruction |
||
1271 | decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]); |
||
1272 | |||
1273 | |||
1274 | #if !defined(__KERNEL__) && !defined(_LIBC) |
||
1275 | /* Canonical names of all the registers. */ |
||
1276 | /* ISSUE: This table lives in "tile-dis.c" */ |
||
1277 | extern const char * const tilegx_register_names[]; |
||
1278 | |||
1279 | /* Descriptor for a special-purpose register. */ |
||
1280 | struct tilegx_spr |
||
1281 | { |
||
1282 | /* The number */ |
||
1283 | int number; |
||
1284 | |||
1285 | /* The name */ |
||
1286 | const char *name; |
||
1287 | }; |
||
1288 | |||
1289 | /* List of all the SPRs; ordered by increasing number. */ |
||
1290 | extern const struct tilegx_spr tilegx_sprs[]; |
||
1291 | |||
1292 | /* Number of special-purpose registers. */ |
||
1293 | extern const int tilegx_num_sprs; |
||
1294 | |||
1295 | extern const char * |
||
1296 | get_tilegx_spr_name (int num); |
||
1297 | #endif /* !__KERNEL__ && !_LIBC */ |
||
1298 | |||
1299 | /* Make a few "tile_" variables to simply common code between |
||
1300 | architectures. */ |
||
1301 | |||
1302 | typedef tilegx_bundle_bits tile_bundle_bits; |
||
1303 | #define TILE_BUNDLE_SIZE_IN_BYTES TILEGX_BUNDLE_SIZE_IN_BYTES |
||
1304 | #define TILE_BUNDLE_ALIGNMENT_IN_BYTES TILEGX_BUNDLE_ALIGNMENT_IN_BYTES |
||
1305 | #define TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES \ |
||
1306 | TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES |
||
1307 | |||
6324 | serge | 1308 | #ifdef __cplusplus |
1309 | } |
||
1310 | #endif |
||
1311 | |||
5191 | serge | 1312 | #endif /* opcode_tilegx_h */><>><>><>=>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><> |