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5191 | serge | 1 | /* Opcode decoder for the Renesas RX |
2 | Copyright 2008, 2009, 2010 |
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3 | Free Software Foundation, Inc. |
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4 | Written by DJ Delorie |
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5 | |||
6 | This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler. |
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7 | |||
8 | This program is free software; you can redistribute it and/or modify |
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9 | it under the terms of the GNU General Public License as published by |
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10 | the Free Software Foundation; either version 3 of the License, or |
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11 | (at your option) any later version. |
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12 | |||
13 | This program is distributed in the hope that it will be useful, |
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14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 | GNU General Public License for more details. |
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17 | |||
18 | You should have received a copy of the GNU General Public License |
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19 | along with this program; if not, write to the Free Software |
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20 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA |
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21 | 02110-1301, USA. */ |
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22 | |||
23 | /* The RX decoder in libopcodes is used by the simulator, gdb's |
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24 | analyzer, and the disassembler. Given an opcode data source, |
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25 | it decodes the next opcode into the following structures. */ |
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26 | |||
27 | typedef enum |
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28 | { |
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29 | RX_AnySize = 0, |
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30 | RX_Byte, /* undefined extension */ |
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31 | RX_UByte, |
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32 | RX_SByte, |
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33 | RX_Word, /* undefined extension */ |
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34 | RX_UWord, |
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35 | RX_SWord, |
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36 | RX_3Byte, |
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37 | RX_Long, |
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38 | } RX_Size; |
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39 | |||
40 | typedef enum |
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41 | { |
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42 | RX_Operand_None, |
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43 | RX_Operand_Immediate, /* #addend */ |
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44 | RX_Operand_Register, /* Rn */ |
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45 | RX_Operand_Indirect, /* [Rn + addend] */ |
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46 | RX_Operand_Postinc, /* [Rn+] */ |
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47 | RX_Operand_Predec, /* [-Rn] */ |
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48 | RX_Operand_Condition, /* eq, gtu, etc */ |
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49 | RX_Operand_Flag, /* [UIOSZC] */ |
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50 | RX_Operand_TwoReg, /* [Rn + scale*R2] */ |
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51 | } RX_Operand_Type; |
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52 | |||
53 | typedef enum |
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54 | { |
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55 | RXO_unknown, |
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56 | RXO_mov, /* d = s (signed) */ |
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57 | RXO_movbi, /* d = [s,s2] (signed) */ |
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58 | RXO_movbir, /* [s,s2] = d (signed) */ |
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59 | RXO_pushm, /* s..s2 */ |
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60 | RXO_popm, /* s..s2 */ |
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61 | RXO_xchg, /* s <-> d */ |
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62 | RXO_stcc, /* d = s if cond(s2) */ |
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63 | RXO_rtsd, /* rtsd, 1=imm, 2-0 = reg if reg type */ |
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64 | |||
65 | /* These are all either d OP= s or, if s2 is set, d = s OP s2. Note |
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66 | that d may be "None". */ |
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67 | RXO_and, |
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68 | RXO_or, |
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69 | RXO_xor, |
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70 | RXO_add, |
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71 | RXO_sub, |
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72 | RXO_mul, |
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73 | RXO_div, |
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74 | RXO_divu, |
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75 | RXO_shll, |
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76 | RXO_shar, |
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77 | RXO_shlr, |
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78 | |||
79 | RXO_adc, /* d = d + s + carry */ |
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80 | RXO_sbb, /* d = d - s - ~carry */ |
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81 | RXO_abs, /* d = |s| */ |
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82 | RXO_max, /* d = max(d,s) */ |
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83 | RXO_min, /* d = min(d,s) */ |
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84 | RXO_emul, /* d:64 = d:32 * s */ |
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85 | RXO_emulu, /* d:64 = d:32 * s (unsigned) */ |
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86 | |||
87 | RXO_rolc, /* d <<= 1 through carry */ |
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88 | RXO_rorc, /* d >>= 1 through carry*/ |
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89 | RXO_rotl, /* d <<= #s without carry */ |
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90 | RXO_rotr, /* d >>= #s without carry*/ |
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91 | RXO_revw, /* d = revw(s) */ |
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92 | RXO_revl, /* d = revl(s) */ |
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93 | RXO_branch, /* pc = d if cond(s) */ |
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94 | RXO_branchrel,/* pc += d if cond(s) */ |
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95 | RXO_jsr, /* pc = d */ |
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96 | RXO_jsrrel, /* pc += d */ |
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97 | RXO_rts, |
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98 | RXO_nop, |
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99 | RXO_nop2, |
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100 | RXO_nop3, |
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101 | |||
102 | RXO_scmpu, |
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103 | RXO_smovu, |
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104 | RXO_smovb, |
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105 | RXO_suntil, |
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106 | RXO_swhile, |
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107 | RXO_smovf, |
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108 | RXO_sstr, |
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109 | |||
110 | RXO_rmpa, |
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111 | RXO_mulhi, |
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112 | RXO_mullo, |
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113 | RXO_machi, |
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114 | RXO_maclo, |
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115 | RXO_mvtachi, |
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116 | RXO_mvtaclo, |
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117 | RXO_mvfachi, |
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118 | RXO_mvfacmi, |
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119 | RXO_mvfaclo, |
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120 | RXO_racw, |
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121 | |||
122 | RXO_sat, /* sat(d) */ |
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123 | RXO_satr, |
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124 | |||
125 | RXO_fadd, /* d op= s */ |
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126 | RXO_fcmp, |
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127 | RXO_fsub, |
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128 | RXO_ftoi, |
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129 | RXO_fmul, |
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130 | RXO_fdiv, |
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131 | RXO_round, |
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132 | RXO_itof, |
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133 | |||
134 | RXO_bset, /* d |= (1< |
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135 | RXO_bclr, /* d &= ~(1< |
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136 | RXO_btst, /* s & (1< |
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137 | RXO_bnot, /* d ^= (1< |
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138 | RXO_bmcc, /* d |
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139 | |||
140 | RXO_clrpsw, /* flag index in d */ |
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141 | RXO_setpsw, /* flag index in d */ |
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142 | RXO_mvtipl, /* new IPL in s */ |
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143 | |||
144 | RXO_rtfi, |
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145 | RXO_rte, |
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146 | RXO_rtd, /* undocumented */ |
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147 | RXO_brk, |
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148 | RXO_dbt, /* undocumented */ |
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149 | RXO_int, /* vector id in s */ |
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150 | RXO_stop, |
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151 | RXO_wait, |
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152 | |||
153 | RXO_sccnd, /* d = cond(s) ? 1 : 0 */ |
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154 | } RX_Opcode_ID; |
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155 | |||
156 | /* Condition bitpatterns, as registers. */ |
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157 | #define RXC_eq 0 |
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158 | #define RXC_z 0 |
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159 | #define RXC_ne 1 |
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160 | #define RXC_nz 1 |
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161 | #define RXC_c 2 |
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162 | #define RXC_nc 3 |
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163 | #define RXC_gtu 4 |
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164 | #define RXC_leu 5 |
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165 | #define RXC_pz 6 |
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166 | #define RXC_n 7 |
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167 | #define RXC_ge 8 |
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168 | #define RXC_lt 9 |
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169 | #define RXC_gt 10 |
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170 | #define RXC_le 11 |
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171 | #define RXC_o 12 |
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172 | #define RXC_no 13 |
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173 | #define RXC_always 14 |
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174 | #define RXC_never 15 |
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175 | |||
176 | typedef struct |
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177 | { |
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178 | RX_Operand_Type type; |
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179 | int reg; |
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180 | int addend; |
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181 | RX_Size size; |
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182 | } RX_Opcode_Operand; |
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183 | |||
184 | typedef struct |
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185 | { |
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186 | RX_Opcode_ID id; |
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187 | int n_bytes; |
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188 | int prefix; |
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189 | char * syntax; |
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190 | RX_Size size; |
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191 | /* By convention, these are destination, source1, source2. */ |
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192 | RX_Opcode_Operand op[3]; |
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193 | |||
194 | /* The logic here is: |
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195 | newflags = (oldflags & ~(int)flags_0) | flags_1 | (op_flags & flags_s) |
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196 | Only the O, S, Z, and C flags are affected. */ |
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197 | char flags_0; /* This also clears out flags-to-be-set. */ |
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198 | char flags_1; |
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199 | char flags_s; |
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200 | } RX_Opcode_Decoded; |
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201 | |||
202 | /* Within the syntax, %c-style format specifiers are as follows: |
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203 | |||
204 | %% = '%' character |
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205 | %0 = operand[0] (destination) |
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206 | %1 = operand[1] (source) |
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207 | %2 = operand[2] (2nd source) |
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208 | %s = operation size (b/w/l) |
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209 | %SN = operand size [N] (N=0,1,2) |
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210 | %aN = op[N] as an address (N=0,1,2) |
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211 | |||
212 | Register numbers 0..15 are general registers. 16..31 are control |
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213 | registers. 32..47 are condition codes. */ |
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214 | |||
215 | int rx_decode_opcode (unsigned long, RX_Opcode_Decoded *, int (*)(void *), void *); |