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5191 | serge | 1 | /* Print GOULD PN (PowerNode) instructions for GDB, the GNU debugger. |
6324 | serge | 2 | Copyright (C) 1986-2015 Free Software Foundation, Inc. |
5191 | serge | 3 | |
4 | This file is part of GDB. |
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5 | |||
6 | GDB is free software; you can redistribute it and/or modify |
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7 | it under the terms of the GNU General Public License as published by |
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8 | the Free Software Foundation; either version 3, or (at your option) |
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9 | any later version. |
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10 | |||
11 | GDB is distributed in the hope that it will be useful, |
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12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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14 | GNU General Public License for more details. |
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15 | |||
16 | You should have received a copy of the GNU General Public License |
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17 | along with GDB; see the file COPYING3. If not, write to |
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18 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
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19 | Boston, MA 02110-1301, USA. */ |
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20 | |||
21 | struct gld_opcode |
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22 | { |
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23 | char *name; |
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24 | unsigned long opcode; |
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25 | unsigned long mask; |
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26 | char *args; |
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27 | int length; |
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28 | }; |
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29 | |||
30 | /* We store four bytes of opcode for all opcodes because that |
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31 | is the most any of them need. The actual length of an instruction |
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32 | is always at least 2 bytes, and at most four. The length of the |
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33 | instruction is based on the opcode. |
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34 | |||
35 | The mask component is a mask saying which bits must match |
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36 | particular opcode in order for an instruction to be an instance |
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37 | of that opcode. |
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38 | |||
39 | The args component is a string containing characters |
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40 | that are used to format the arguments to the instruction. */ |
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41 | |||
42 | /* Kinds of operands: |
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43 | r Register in first field |
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44 | R Register in second field |
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45 | b Base register in first field |
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46 | B Base register in second field |
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47 | v Vector register in first field |
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48 | V Vector register in first field |
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49 | A Optional address register (base register) |
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50 | X Optional index register |
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51 | I Immediate data (16bits signed) |
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52 | O Offset field (16bits signed) |
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53 | h Offset field (15bits signed) |
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54 | d Offset field (14bits signed) |
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55 | S Shift count field |
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56 | |||
57 | any other characters are printed as is... |
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58 | */ |
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59 | |||
60 | /* The assembler requires that this array be sorted as follows: |
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61 | all instances of the same mnemonic must be consecutive. |
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62 | All instances of the same mnemonic with the same number of operands |
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63 | must be consecutive. |
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64 | */ |
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65 | struct gld_opcode gld_opcodes[] = |
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66 | { |
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67 | { "abm", 0xa0080000, 0xfc080000, "f,xOA,X", 4 }, |
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68 | { "abr", 0x18080000, 0xfc0c0000, "r,f", 2 }, |
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69 | { "aci", 0xfc770000, 0xfc7f8000, "r,I", 4 }, |
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70 | { "adfd", 0xe0080002, 0xfc080002, "r,xOA,X", 4 }, |
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71 | { "adfw", 0xe0080000, 0xfc080000, "r,xOA,X", 4 }, |
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72 | { "adi", 0xc8010000, 0xfc7f0000, "r,I", 4 }, |
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73 | { "admb", 0xb8080000, 0xfc080000, "r,xOA,X", 4 }, |
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74 | { "admd", 0xb8000002, 0xfc080002, "r,xOA,X", 4 }, |
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75 | { "admh", 0xb8000001, 0xfc080001, "r,xOA,X", 4 }, |
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76 | { "admw", 0xb8000000, 0xfc080000, "r,xOA,X", 4 }, |
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77 | { "adr", 0x38000000, 0xfc0f0000, "r,R", 2 }, |
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78 | { "adrfd", 0x38090000, 0xfc0f0000, "r,R", 2 }, |
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79 | { "adrfw", 0x38010000, 0xfc0f0000, "r,R", 2 }, |
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80 | { "adrm", 0x38080000, 0xfc0f0000, "r,R", 2 }, |
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81 | { "ai", 0xfc030000, 0xfc07ffff, "I", 4 }, |
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82 | { "anmb", 0x84080000, 0xfc080000, "r,xOA,X", 4 }, |
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83 | { "anmd", 0x84000002, 0xfc080002, "r,xOA,X", 4 }, |
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84 | { "anmh", 0x84000001, 0xfc080001, "r,xOA,X", 4 }, |
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85 | { "anmw", 0x84000000, 0xfc080000, "r,xOA,X", 4 }, |
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86 | { "anr", 0x04000000, 0xfc0f0000, "r,R", 2 }, |
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87 | { "armb", 0xe8080000, 0xfc080000, "r,xOA,X", 4 }, |
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88 | { "armd", 0xe8000002, 0xfc080002, "r,xOA,X", 4 }, |
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89 | { "armh", 0xe8000001, 0xfc080001, "r,xOA,X", 4 }, |
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90 | { "armw", 0xe8000000, 0xfc080000, "r,xOA,X", 4 }, |
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91 | { "bcf", 0xf0000000, 0xfc080000, "I,xOA,X", 4 }, |
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92 | { "bct", 0xec000000, 0xfc080000, "I,xOA,X", 4 }, |
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93 | { "bei", 0x00060000, 0xffff0000, "", 2 }, |
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94 | { "bft", 0xf0000000, 0xff880000, "xOA,X", 4 }, |
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95 | { "bib", 0xf4000000, 0xfc780000, "r,xOA", 4 }, |
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96 | { "bid", 0xf4600000, 0xfc780000, "r,xOA", 4 }, |
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97 | { "bih", 0xf4200000, 0xfc780000, "r,xOA", 4 }, |
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98 | { "biw", 0xf4400000, 0xfc780000, "r,xOA", 4 }, |
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99 | { "bl", 0xf8800000, 0xff880000, "xOA,X", 4 }, |
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100 | { "bsub", 0x5c080000, 0xff8f0000, "", 2 }, |
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101 | { "bsubm", 0x28080000, 0xfc080000, "", 4 }, |
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102 | { "bu", 0xec000000, 0xff880000, "xOA,X", 4 }, |
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103 | { "call", 0x28080000, 0xfc0f0000, "", 2 }, |
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104 | { "callm", 0x5c080000, 0xff880000, "", 4 }, |
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105 | { "camb", 0x90080000, 0xfc080000, "r,xOA,X", 4 }, |
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106 | { "camd", 0x90000002, 0xfc080002, "r,xOA,X", 4 }, |
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107 | { "camh", 0x90000001, 0xfc080001, "r,xOA,X", 4 }, |
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108 | { "camw", 0x90000000, 0xfc080000, "r.xOA,X", 4 }, |
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109 | { "car", 0x10000000, 0xfc0f0000, "r,R", 2 }, |
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110 | { "cd", 0xfc060000, 0xfc070000, "r,f", 4 }, |
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111 | { "cea", 0x000f0000, 0xffff0000, "", 2 }, |
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112 | { "ci", 0xc8050000, 0xfc7f0000, "r,I", 4 }, |
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113 | { "cmc", 0x040a0000, 0xfc7f0000, "r", 2 }, |
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114 | { "cmmb", 0x94080000, 0xfc080000, "r,xOA,X", 4 }, |
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115 | { "cmmd", 0x94000002, 0xfc080002, "r,xOA,X", 4 }, |
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116 | { "cmmh", 0x94000001, 0xfc080001, "r,xOA,X", 4 }, |
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117 | { "cmmw", 0x94000000, 0xfc080000, "r,xOA,X", 4 }, |
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118 | { "cmr", 0x14000000, 0xfc0f0000, "r,R", 2 }, |
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119 | { "daci", 0xfc7f0000, 0xfc7f8000, "r,I", 4 }, |
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120 | { "dae", 0x000e0000, 0xffff0000, "", 2 }, |
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121 | { "dai", 0xfc040000, 0xfc07ffff, "I", 4 }, |
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122 | { "dci", 0xfc6f0000, 0xfc7f8000, "r,I", 4 }, |
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123 | { "di", 0xfc010000, 0xfc07ffff, "I", 4 }, |
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124 | { "dvfd", 0xe4000002, 0xfc080002, "r,xOA,X", 4 }, |
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125 | { "dvfw", 0xe4000000, 0xfc080000, "r,xOA,X", 4 }, |
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126 | { "dvi", 0xc8040000, 0xfc7f0000, "r,I", 4 }, |
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127 | { "dvmb", 0xc4080000, 0xfc080000, "r,xOA,X", 4 }, |
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128 | { "dvmh", 0xc4000001, 0xfc080001, "r,xOA,X", 4 }, |
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129 | { "dvmw", 0xc4000000, 0xfc080000, "r,xOA,X", 4 }, |
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130 | { "dvr", 0x380a0000, 0xfc0f0000, "r,R", 2 }, |
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131 | { "dvrfd", 0x380c0000, 0xfc0f0000, "r,R", 4 }, |
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132 | { "dvrfw", 0x38040000, 0xfc0f0000, "r,xOA,X", 4 }, |
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133 | { "eae", 0x00080000, 0xffff0000, "", 2 }, |
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134 | { "eci", 0xfc670000, 0xfc7f8080, "r,I", 4 }, |
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135 | { "ecwcs", 0xfc4f0000, 0xfc7f8000, "", 4 }, |
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136 | { "ei", 0xfc000000, 0xfc07ffff, "I", 4 }, |
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137 | { "eomb", 0x8c080000, 0xfc080000, "r,xOA,X", 4 }, |
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138 | { "eomd", 0x8c000002, 0xfc080002, "r,xOA,X", 4 }, |
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139 | { "eomh", 0x8c000001, 0xfc080001, "r,xOA,X", 4 }, |
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140 | { "eomw", 0x8c000000, 0xfc080000, "r,xOA,X", 4 }, |
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141 | { "eor", 0x0c000000, 0xfc0f0000, "r,R", 2 }, |
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142 | { "eorm", 0x0c080000, 0xfc0f0000, "r,R", 2 }, |
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143 | { "es", 0x00040000, 0xfc7f0000, "r", 2 }, |
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144 | { "exm", 0xa8000000, 0xff880000, "xOA,X", 4 }, |
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145 | { "exr", 0xc8070000, 0xfc7f0000, "r", 2 }, |
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146 | { "exrr", 0xc8070002, 0xfc7f0002, "r", 2 }, |
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147 | { "fixd", 0x380d0000, 0xfc0f0000, "r,R", 2 }, |
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148 | { "fixw", 0x38050000, 0xfc0f0000, "r,R", 2 }, |
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149 | { "fltd", 0x380f0000, 0xfc0f0000, "r,R", 2 }, |
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150 | { "fltw", 0x38070000, 0xfc0f0000, "r,R", 2 }, |
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151 | { "grio", 0xfc3f0000, 0xfc7f8000, "r,I", 4 }, |
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152 | { "halt", 0x00000000, 0xffff0000, "", 2 }, |
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153 | { "hio", 0xfc370000, 0xfc7f8000, "r,I", 4 }, |
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154 | { "jwcs", 0xfa080000, 0xff880000, "xOA,X", 4 }, |
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155 | { "la", 0x50000000, 0xfc000000, "r,xOA,X", 4 }, |
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156 | { "labr", 0x58080000, 0xfc080000, "b,xOA,X", 4 }, |
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157 | { "lb", 0xac080000, 0xfc080000, "r,xOA,X", 4 }, |
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158 | { "lcs", 0x00030000, 0xfc7f0000, "r", 2 }, |
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159 | { "ld", 0xac000002, 0xfc080002, "r,xOA,X", 4 }, |
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160 | { "lear", 0x80000000, 0xfc080000, "r,xOA,X", 4 }, |
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161 | { "lf", 0xcc000000, 0xfc080000, "r,xOA,X", 4 }, |
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162 | { "lfbr", 0xcc080000, 0xfc080000, "b,xOA,X", 4 }, |
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163 | { "lh", 0xac000001, 0xfc080001, "r,xOA,X", 4 }, |
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164 | { "li", 0xc8000000, 0xfc7f0000, "r,I", 4 }, |
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165 | { "lmap", 0x2c070000, 0xfc7f0000, "r", 2 }, |
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166 | { "lmb", 0xb0080000, 0xfc080000, "r,xOA,X", 4 }, |
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167 | { "lmd", 0xb0000002, 0xfc080002, "r,xOA,X", 4 }, |
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168 | { "lmh", 0xb0000001, 0xfc080001, "r,xOA,X", 4 }, |
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169 | { "lmw", 0xb0000000, 0xfc080000, "r,xOA,X", 4 }, |
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170 | { "lnb", 0xb4080000, 0xfc080000, "r,xOA,X", 4 }, |
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171 | { "lnd", 0xb4000002, 0xfc080002, "r,xOA,X", 4 }, |
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172 | { "lnh", 0xb4000001, 0xfc080001, "r,xOA,X", 4 }, |
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173 | { "lnw", 0xb4000000, 0xfc080000, "r,xOA,X", 4 }, |
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174 | { "lpsd", 0xf9800000, 0xff880000, "r,xOA,X", 4 }, |
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175 | { "lpsdcm", 0xfa800000, 0xff880000, "r,xOA,X", 4 }, |
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176 | { "lw", 0xac000000, 0xfc080000, "r,xOA,X", 4 }, |
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177 | { "lwbr", 0x5c000000, 0xfc080000, "b,xOA,X", 4 }, |
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178 | { "mpfd", 0xe4080002, 0xfc080002, "r,xOA,X", 4 }, |
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179 | { "mpfw", 0xe4080000, 0xfc080000, "r,xOA,X", 4 }, |
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180 | { "mpi", 0xc8030000, 0xfc7f0000, "r,I", 4 }, |
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181 | { "mpmb", 0xc0080000, 0xfc080000, "r,xOA,X", 4 }, |
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182 | { "mpmh", 0xc0000001, 0xfc080001, "r,xOA,X", 4 }, |
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183 | { "mpmw", 0xc0000000, 0xfc080000, "r,xOA,X", 4 }, |
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184 | { "mpr", 0x38020000, 0xfc0f0000, "r,R", 2 }, |
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185 | { "mprfd", 0x380e0000, 0xfc0f0000, "r,R", 2 }, |
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186 | { "mprfw", 0x38060000, 0xfc0f0000, "r,R", 2 }, |
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187 | { "nop", 0x00020000, 0xffff0000, "", 2 }, |
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188 | { "ormb", 0x88080000, 0xfc080000, "r,xOA,X", 4 }, |
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189 | { "ormd", 0x88000002, 0xfc080002, "r,xOA,X", 4 }, |
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190 | { "ormh", 0x88000001, 0xfc080001, "r,xOA,X", 4 }, |
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191 | { "ormw", 0x88000000, 0xfc080000, "r,xOA,X", 4 }, |
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192 | { "orr", 0x08000000, 0xfc0f0000, "r,R", 2 }, |
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193 | { "orrm", 0x08080000, 0xfc0f0000, "r,R", 2 }, |
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194 | { "rdsts", 0x00090000, 0xfc7f0000, "r", 2 }, |
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195 | { "return", 0x280e0000, 0xfc7f0000, "", 2 }, |
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196 | { "ri", 0xfc020000, 0xfc07ffff, "I", 4 }, |
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197 | { "rnd", 0x00050000, 0xfc7f0000, "r", 2 }, |
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198 | { "rpswt", 0x040b0000, 0xfc7f0000, "r", 2 }, |
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199 | { "rschnl", 0xfc2f0000, 0xfc7f8000, "r,I", 4 }, |
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200 | { "rsctl", 0xfc470000, 0xfc7f8000, "r,I", 4 }, |
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201 | { "rwcs", 0x000b0000, 0xfc0f0000, "r,R", 2 }, |
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202 | { "sacz", 0x10080000, 0xfc0f0000, "r,R", 2 }, |
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203 | { "sbm", 0x98080000, 0xfc080000, "f,xOA,X", 4 }, |
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204 | { "sbr", 0x18000000, 0xfc0c0000, "r,f", 4 }, |
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205 | { "sea", 0x000d0000, 0xffff0000, "", 2 }, |
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206 | { "setcpu", 0x2c090000, 0xfc7f0000, "r", 2 }, |
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207 | { "sio", 0xfc170000, 0xfc7f8000, "r,I", 4 }, |
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208 | { "sipu", 0x000a0000, 0xffff0000, "", 2 }, |
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209 | { "sla", 0x1c400000, 0xfc600000, "r,S", 2 }, |
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210 | { "slad", 0x20400000, 0xfc600000, "r,S", 2 }, |
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211 | { "slc", 0x24400000, 0xfc600000, "r,S", 2 }, |
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212 | { "sll", 0x1c600000, 0xfc600000, "r,S", 2 }, |
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213 | { "slld", 0x20600000, 0xfc600000, "r,S", 2 }, |
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214 | { "smc", 0x04070000, 0xfc070000, "", 2 }, |
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215 | { "sra", 0x1c000000, 0xfc600000, "r,S", 2 }, |
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216 | { "srad", 0x20000000, 0xfc600000, "r,S", 2 }, |
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217 | { "src", 0x24000000, 0xfc600000, "r,S", 2 }, |
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218 | { "srl", 0x1c200000, 0xfc600000, "r,S", 2 }, |
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219 | { "srld", 0x20200000, 0xfc600000, "r,S", 2 }, |
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220 | { "stb", 0xd4080000, 0xfc080000, "r,xOA,X", 4 }, |
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221 | { "std", 0xd4000002, 0xfc080002, "r,xOA,X", 4 }, |
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222 | { "stf", 0xdc000000, 0xfc080000, "r,xOA,X", 4 }, |
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223 | { "stfbr", 0x54000000, 0xfc080000, "b,xOA,X", 4 }, |
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224 | { "sth", 0xd4000001, 0xfc080001, "r,xOA,X", 4 }, |
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225 | { "stmb", 0xd8080000, 0xfc080000, "r,xOA,X", 4 }, |
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226 | { "stmd", 0xd8000002, 0xfc080002, "r,xOA,X", 4 }, |
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227 | { "stmh", 0xd8000001, 0xfc080001, "r,xOA,X", 4 }, |
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228 | { "stmw", 0xd8000000, 0xfc080000, "r,xOA,X", 4 }, |
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229 | { "stpio", 0xfc270000, 0xfc7f8000, "r,I", 4 }, |
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230 | { "stw", 0xd4000000, 0xfc080000, "r,xOA,X", 4 }, |
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231 | { "stwbr", 0x54000000, 0xfc080000, "b,xOA,X", 4 }, |
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232 | { "suabr", 0x58000000, 0xfc080000, "b,xOA,X", 4 }, |
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233 | { "sufd", 0xe0000002, 0xfc080002, "r,xOA,X", 4 }, |
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234 | { "sufw", 0xe0000000, 0xfc080000, "r,xOA,X", 4 }, |
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235 | { "sui", 0xc8020000, 0xfc7f0000, "r,I", 4 }, |
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236 | { "sumb", 0xbc080000, 0xfc080000, "r,xOA,X", 4 }, |
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237 | { "sumd", 0xbc000002, 0xfc080002, "r,xOA,X", 4 }, |
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238 | { "sumh", 0xbc000001, 0xfc080001, "r,xOA,X", 4 }, |
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239 | { "sumw", 0xbc000000, 0xfc080000, "r,xOA,X", 4 }, |
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240 | { "sur", 0x3c000000, 0xfc0f0000, "r,R", 2 }, |
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241 | { "surfd", 0x380b0000, 0xfc0f0000, "r,xOA,X", 4 }, |
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242 | { "surfw", 0x38030000, 0xfc0f0000, "r,R", 2 }, |
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243 | { "surm", 0x3c080000, 0xfc0f0000, "r,R", 2 }, |
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244 | { "svc", 0xc8060000, 0xffff0000, "", 4 }, |
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245 | { "tbm", 0xa4080000, 0xfc080000, "f,xOA,X", 4 }, |
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246 | { "tbr", 0x180c0000, 0xfc0c0000, "r,f", 2 }, |
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247 | { "tbrr", 0x2c020000, 0xfc0f0000, "r,B", 2 }, |
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248 | { "tccr", 0x28040000, 0xfc7f0000, "", 2 }, |
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249 | { "td", 0xfc050000, 0xfc070000, "r,f", 4 }, |
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250 | { "tio", 0xfc1f0000, 0xfc7f8000, "r,I", 4 }, |
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251 | { "tmapr", 0x2c0a0000, 0xfc0f0000, "r,R", 2 }, |
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252 | { "tpcbr", 0x280c0000, 0xfc7f0000, "r", 2 }, |
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253 | { "trbr", 0x2c010000, 0xfc0f0000, "b,R", 2 }, |
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254 | { "trc", 0x2c030000, 0xfc0f0000, "r,R", 2 }, |
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255 | { "trcc", 0x28050000, 0xfc7f0000, "", 2 }, |
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256 | { "trcm", 0x2c0b0000, 0xfc0f0000, "r,R", 2 }, |
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257 | { "trn", 0x2c040000, 0xfc0f0000, "r,R", 2 }, |
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258 | { "trnm", 0x2c0c0000, 0xfc0f0000, "r,R", 2 }, |
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259 | { "trr", 0x2c000000, 0xfc0f0000, "r,R", 2 }, |
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260 | { "trrm", 0x2c080000, 0xfc0f0000, "r,R", 2 }, |
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261 | { "trsc", 0x2c0e0000, 0xfc0f0000, "r,R", 2 }, |
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262 | { "trsw", 0x28000000, 0xfc7f0000, "r", 2 }, |
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263 | { "tscr", 0x2c0f0000, 0xfc0f0000, "r,R", 2 }, |
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264 | { "uei", 0x00070000, 0xffff0000, "", 2 }, |
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265 | { "wait", 0x00010000, 0xffff0000, "", 2 }, |
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266 | { "wcwcs", 0xfc5f0000, 0xfc7f8000, "", 4 }, |
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267 | { "wwcs", 0x000c0000, 0xfc0f0000, "r,R", 2 }, |
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268 | { "xcbr", 0x28020000, 0xfc0f0000, "b,B", 2 }, |
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269 | { "xcr", 0x2c050000, 0xfc0f0000, "r,R", 2 }, |
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270 | { "xcrm", 0x2c0d0000, 0xfc0f0000, "r,R", 2 }, |
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271 | { "zbm", 0x9c080000, 0xfc080000, "f,xOA,X", 4 }, |
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272 | { "zbr", 0x18040000, 0xfc0c0000, "r,f", 2 }, |
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273 | { "zmb", 0xf8080000, 0xfc080000, "r,xOA,X", 4 }, |
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274 | { "zmd", 0xf8000002, 0xfc080002, "r,xOA,X", 4 }, |
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275 | { "zmh", 0xf8000001, 0xfc080001, "r,xOA,X", 4 }, |
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276 | { "zmw", 0xf8000000, 0xfc080000, "r,xOA,X", 4 }, |
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277 | { "zr", 0x0c000000, 0xfc0f0000, "r", 2 }, |
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278 | }; |
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279 | |||
280 | int numopcodes = sizeof(gld_opcodes) / sizeof(gld_opcodes[0]); |
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281 | |||
282 | struct gld_opcode *endop = gld_opcodes + sizeof(gld_opcodes) / |
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283 | sizeof(gld_opcodes[0]); |