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| Rev | Author | Line No. | Line |
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| 5191 | serge | 1 | /* PDP-11 opcde list. |
| 6324 | serge | 2 | Copyright (C) 2001-2015 Free Software Foundation, Inc. |
| 5191 | serge | 3 | |
| 4 | This file is part of GDB and GAS. |
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| 5 | |||
| 6 | GDB and GAS are free software; you can redistribute it and/or modify |
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| 7 | it under the terms of the GNU General Public License as published by |
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| 8 | the Free Software Foundation; either version 3, or (at your option) |
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| 9 | any later version. |
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| 10 | |||
| 11 | GDB and GAS are distributed in the hope that it will be useful, |
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| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 14 | GNU General Public License for more details. |
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| 15 | |||
| 16 | You should have received a copy of the GNU General Public License |
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| 17 | along with GDB or GAS; see the file COPYING3. If not, write to |
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| 18 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
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| 19 | Boston, MA 02110-1301, USA. */ |
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| 20 | |||
| 21 | /* PDP-11 opcode types. */ |
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| 22 | |||
| 23 | #define PDP11_OPCODE_NO_OPS 0 |
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| 24 | #define PDP11_OPCODE_REG 1 /* register */ |
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| 25 | #define PDP11_OPCODE_OP 2 /* generic operand */ |
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| 26 | #define PDP11_OPCODE_REG_OP 3 /* register and generic operand */ |
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| 27 | #define PDP11_OPCODE_REG_OP_REV 4 /* register and generic operand, |
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| 28 | reversed syntax */ |
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| 29 | #define PDP11_OPCODE_AC_FOP 5 /* fpu accumulator and generic float |
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| 30 | operand */ |
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| 31 | #define PDP11_OPCODE_OP_OP 6 /* two generic operands */ |
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| 32 | #define PDP11_OPCODE_DISPL 7 /* pc-relative displacement */ |
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| 33 | #define PDP11_OPCODE_REG_DISPL 8 /* redister and pc-relative |
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| 34 | displacement */ |
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| 35 | #define PDP11_OPCODE_IMM8 9 /* 8-bit immediate */ |
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| 36 | #define PDP11_OPCODE_IMM6 10 /* 6-bit immediate */ |
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| 37 | #define PDP11_OPCODE_IMM3 11 /* 3-bit immediate */ |
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| 38 | #define PDP11_OPCODE_ILLEGAL 12 /* illegal instruction */ |
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| 39 | #define PDP11_OPCODE_FOP_AC 13 /* generic float argument, then fpu |
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| 40 | accumulator */ |
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| 41 | #define PDP11_OPCODE_FOP 14 /* generic float operand */ |
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| 42 | #define PDP11_OPCODE_AC_OP 15 /* fpu accumulator and generic int |
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| 43 | operand */ |
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| 44 | #define PDP11_OPCODE_OP_AC 16 /* generic int argument, then fpu |
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| 45 | accumulator */ |
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| 46 | |||
| 47 | /* |
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| 48 | * PDP-11 instruction set extensions. |
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| 49 | * |
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| 50 | * Please keep the numbers low, as they are used as indices into |
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| 51 | * an array. |
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| 52 | */ |
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| 53 | |||
| 54 | #define PDP11_NONE 0 /* not in instruction set */ |
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| 55 | #define PDP11_BASIC 1 /* basic instruction set (11/20 etc) */ |
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| 56 | #define PDP11_CSM 2 /* commercial instruction set */ |
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| 57 | #define PDP11_CIS 3 /* commercial instruction set */ |
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| 58 | #define PDP11_EIS 4 /* extended instruction set (11/45 etc) */ |
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| 59 | #define PDP11_FIS 5 /* KEV11 floating-point instructions */ |
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| 60 | #define PDP11_FPP 6 /* FP-11 floating-point instructions */ |
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| 61 | #define PDP11_LEIS 7 /* limited extended instruction set |
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| 62 | (11/40 etc) */ |
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| 63 | #define PDP11_MFPT 8 /* move from processor type */ |
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| 64 | #define PDP11_MPROC 9 /* multiprocessor instructions: tstset, |
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| 65 | wrtlck */ |
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| 66 | #define PDP11_MXPS 10 /* move from/to processor status */ |
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| 67 | #define PDP11_SPL 11 /* set priority level */ |
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| 68 | #define PDP11_UCODE 12 /* microcode instructions: ldub, med, xfc */ |
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| 69 | #define PDP11_EXT_NUM 13 /* total number of extension types */ |
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| 70 | |||
| 71 | struct pdp11_opcode |
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| 72 | { |
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| 73 | const char *name; |
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| 74 | int opcode; |
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| 75 | int mask; |
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| 76 | int type; |
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| 77 | int extension; |
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| 78 | }; |
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| 79 | |||
| 80 | extern const struct pdp11_opcode pdp11_opcodes[]; |
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| 81 | extern const struct pdp11_opcode pdp11_aliases[]; |
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| 82 | extern const int pdp11_num_opcodes, pdp11_num_aliases; |
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| 83 | |||
| 84 | /* end of pdp11.h */ |