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| 5191 | serge | 1 | /* Opcode decoder for the TI MSP430 |
| 6324 | serge | 2 | Copyright (C) 2012-2015 Free Software Foundation, Inc. |
| 5191 | serge | 3 | Written by DJ Delorie |
| 4 | |||
| 5 | This file is part of GDB, the GNU Debugger. |
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| 6 | |||
| 7 | This program is free software; you can redistribute it and/or modify |
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| 8 | it under the terms of the GNU General Public License as published by |
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| 9 | the Free Software Foundation; either version 3 of the License, or |
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| 10 | (at your option) any later version. |
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| 11 | |||
| 12 | This program is distributed in the hope that it will be useful, |
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| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 15 | GNU General Public License for more details. |
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| 16 | |||
| 17 | You should have received a copy of the GNU General Public License |
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| 18 | along with this program; if not, write to the Free Software |
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| 19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA |
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| 20 | 02110-1301, USA. */ |
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| 21 | |||
| 6324 | serge | 22 | #ifdef __cplusplus |
| 23 | extern "C" { |
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| 24 | #endif |
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| 25 | |||
| 5191 | serge | 26 | typedef enum |
| 27 | { |
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| 28 | MSO_unknown, |
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| 29 | /* Double-operand instructions - all repeat .REPEATS times. */ |
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| 30 | MSO_mov, /* dest = src */ |
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| 31 | MSO_add, /* dest += src */ |
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| 32 | MSO_addc, /* dest += src + carry */ |
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| 33 | MSO_subc, /* dest -= (src-1) + carry */ |
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| 34 | MSO_sub, /* dest -= src */ |
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| 35 | MSO_cmp, /* dest - src -> status */ |
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| 36 | MSO_dadd, /* dest += src (as BCD) */ |
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| 37 | MSO_bit, /* dest & src -> status */ |
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| 38 | MSO_bic, /* dest &= ~src (bit clear) */ |
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| 39 | MSO_bis, /* dest |= src (bit set, OR) */ |
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| 40 | MSO_xor, /* dest ^= src */ |
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| 41 | MSO_and, /* dest &= src */ |
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| 42 | |||
| 43 | /* Single-operand instructions. */ |
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| 44 | MSO_rrc, /* Rotate through carry, dest >>= .REPEATS. */ |
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| 45 | MSO_swpb, /* Swap lower bytes of operand. */ |
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| 46 | MSO_rra, /* Signed shift dest >>= .REPEATS. */ |
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| 47 | MSO_sxt, /* Sign extend lower byte. */ |
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| 48 | MSO_push, /* Push .REPEATS registers (or other op) starting at SRC going towards R0. */ |
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| 49 | MSO_pop, /* Pop .REPEATS registers starting at DEST going towards R15. */ |
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| 50 | MSO_call, |
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| 51 | MSO_reti, |
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| 52 | |||
| 53 | /* Jumps. */ |
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| 54 | MSO_jmp, /* PC = SRC if .COND true. */ |
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| 55 | |||
| 56 | /* Extended single-operand instructions. */ |
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| 57 | MSO_rru, /* Unsigned shift right, dest >>= .REPEATS. */ |
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| 58 | |||
| 59 | } MSP430_Opcode_ID; |
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| 60 | |||
| 61 | typedef enum |
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| 62 | { |
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| 63 | MSP430_Operand_None, |
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| 64 | MSP430_Operand_Immediate, |
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| 65 | MSP430_Operand_Register, |
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| 66 | MSP430_Operand_Indirect, |
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| 67 | MSP430_Operand_Indirect_Postinc |
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| 68 | } MSP430_Operand_Type; |
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| 69 | |||
| 70 | typedef enum |
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| 71 | { |
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| 72 | MSR_0 = 0, |
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| 73 | MSR_PC = 0, |
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| 74 | MSR_SP = 1, |
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| 75 | MSR_SR = 2, |
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| 76 | MSR_CG = 3, |
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| 77 | MSR_None = 16, |
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| 78 | } MSP430_Register; |
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| 79 | |||
| 80 | typedef struct |
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| 81 | { |
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| 82 | MSP430_Operand_Type type; |
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| 83 | int addend; |
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| 84 | MSP430_Register reg : 8; |
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| 85 | MSP430_Register reg2 : 8; |
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| 86 | unsigned char bit_number : 4; |
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| 87 | unsigned char condition : 3; |
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| 88 | } MSP430_Opcode_Operand; |
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| 89 | |||
| 90 | typedef enum |
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| 91 | { |
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| 92 | MSP430_Byte = 0, |
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| 93 | MSP430_Word, |
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| 94 | MSP430_Addr |
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| 95 | } MSP430_Size; |
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| 96 | |||
| 97 | /* These numerically match the bit encoding. */ |
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| 98 | typedef enum |
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| 99 | { |
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| 100 | MSC_nz = 0, |
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| 101 | MSC_z, |
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| 102 | MSC_nc, |
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| 103 | MSC_c, |
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| 104 | MSC_n, |
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| 105 | MSC_ge, |
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| 106 | MSC_l, |
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| 107 | MSC_true, |
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| 108 | } MSP430_Condition; |
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| 109 | |||
| 110 | #define MSP430_FLAG_C 0x01 |
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| 111 | #define MSP430_FLAG_Z 0x02 |
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| 112 | #define MSP430_FLAG_N 0x04 |
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| 113 | #define MSP430_FLAG_V 0x80 |
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| 114 | |||
| 115 | typedef struct |
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| 116 | { |
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| 117 | int lineno; |
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| 118 | MSP430_Opcode_ID id; |
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| 119 | unsigned flags_1:8; /* These flags are set to '1' by the insn. */ |
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| 120 | unsigned flags_0:8; /* These flags are set to '0' by the insn. */ |
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| 121 | unsigned flags_set:8; /* These flags are set appropriately by the insn. */ |
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| 122 | unsigned zc:1; /* If set, pretend the carry bit is zero. */ |
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| 123 | unsigned repeat_reg:1; /* If set, count is in REG[repeats]. */ |
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| 124 | unsigned ofs_430x:1; /* If set, the offset in any operand is 430x (else use 430 compatibility mode). */ |
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| 125 | unsigned repeats:5; /* Contains COUNT-1, or register number. */ |
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| 126 | int n_bytes; /* Opcode size in BYTES. */ |
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| 127 | char * syntax; |
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| 128 | MSP430_Size size; /* Operand size in BITS. */ |
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| 129 | MSP430_Condition cond; |
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| 130 | /* By convention, these are [0]destination, [1]source. */ |
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| 131 | MSP430_Opcode_Operand op[2]; |
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| 132 | } MSP430_Opcode_Decoded; |
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| 133 | |||
| 134 | int msp430_decode_opcode (unsigned long, MSP430_Opcode_Decoded *, int (*)(void *), void *); |
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| 6324 | serge | 135 | |
| 136 | #ifdef __cplusplus |
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| 137 | } |
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| 138 | #endif |