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5191 | serge | 1 | /* mn10300.h -- Header file for Matsushita 10300 opcode table |
6324 | serge | 2 | Copyright (C) 1996-2015 Free Software Foundation, Inc. |
5191 | serge | 3 | Written by Jeff Law, Cygnus Support |
4 | |||
5 | This file is part of GDB, GAS, and the GNU binutils. |
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6 | |||
7 | GDB, GAS, and the GNU binutils are free software; you can redistribute |
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8 | them and/or modify them under the terms of the GNU General Public |
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9 | License as published by the Free Software Foundation; either version 3, |
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10 | or (at your option) any later version. |
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11 | |||
12 | GDB, GAS, and the GNU binutils are distributed in the hope that they |
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13 | will be useful, but WITHOUT ANY WARRANTY; without even the implied |
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14 | warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See |
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15 | the GNU General Public License for more details. |
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16 | |||
17 | You should have received a copy of the GNU General Public License |
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18 | along with this file; see the file COPYING3. If not, write to the Free |
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19 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, |
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20 | MA 02110-1301, USA. */ |
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21 | |||
22 | #ifndef MN10300_H |
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23 | #define MN10300_H |
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24 | |||
25 | /* The opcode table is an array of struct mn10300_opcode. */ |
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26 | |||
27 | #define MN10300_MAX_OPERANDS 8 |
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28 | struct mn10300_opcode |
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29 | { |
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30 | /* The opcode name. */ |
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31 | const char *name; |
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32 | |||
33 | /* The opcode itself. Those bits which will be filled in with |
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34 | operands are zeroes. */ |
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35 | unsigned long opcode; |
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36 | |||
37 | /* The opcode mask. This is used by the disassembler. This is a |
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38 | mask containing ones indicating those bits which must match the |
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39 | opcode field, and zeroes indicating those bits which need not |
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40 | match (and are presumably filled in by operands). */ |
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41 | unsigned long mask; |
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42 | |||
43 | /* A bitmask. For each operand, nonzero if it must not have the same |
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44 | register specification as all other operands with a nonzero bit in |
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45 | this flag. ie 0x81 would indicate that operands 7 and 0 must not |
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46 | match. Note that we count operands from left to right as they appear |
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47 | in the operands specification below. */ |
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48 | unsigned int no_match_operands; |
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49 | |||
50 | /* The format of this opcode. */ |
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51 | unsigned char format; |
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52 | |||
53 | /* Bitmask indicating what cpu variants this opcode is available on. |
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54 | We assume mn10300 base opcodes are available everywhere, so we only |
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55 | have to note opcodes which are available on other variants. */ |
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56 | unsigned int machine; |
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57 | |||
58 | /* An array of operand codes. Each code is an index into the |
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59 | operand table. They appear in the order which the operands must |
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60 | appear in assembly code, and are terminated by a zero. */ |
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61 | unsigned char operands[MN10300_MAX_OPERANDS]; |
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62 | }; |
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63 | |||
64 | /* The table itself is sorted by major opcode number, and is otherwise |
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65 | in the order in which the disassembler should consider |
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66 | instructions. */ |
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67 | extern const struct mn10300_opcode mn10300_opcodes[]; |
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68 | extern const int mn10300_num_opcodes; |
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69 | |||
70 | |||
71 | /* The operands table is an array of struct mn10300_operand. */ |
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72 | |||
73 | struct mn10300_operand |
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74 | { |
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75 | /* The number of bits in the operand. */ |
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76 | int bits; |
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77 | |||
78 | /* How far the operand is left shifted in the instruction. */ |
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79 | int shift; |
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80 | |||
81 | /* One bit syntax flags. */ |
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82 | int flags; |
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83 | }; |
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84 | |||
85 | /* Elements in the table are retrieved by indexing with values from |
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86 | the operands field of the mn10300_opcodes table. */ |
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87 | |||
88 | extern const struct mn10300_operand mn10300_operands[]; |
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89 | |||
90 | /* Values defined for the flags field of a struct mn10300_operand. */ |
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91 | #define MN10300_OPERAND_DREG 0x1 |
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92 | |||
93 | #define MN10300_OPERAND_AREG 0x2 |
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94 | |||
95 | #define MN10300_OPERAND_SP 0x4 |
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96 | |||
97 | #define MN10300_OPERAND_PSW 0x8 |
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98 | |||
99 | #define MN10300_OPERAND_MDR 0x10 |
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100 | |||
101 | #define MN10300_OPERAND_SIGNED 0x20 |
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102 | |||
103 | #define MN10300_OPERAND_PROMOTE 0x40 |
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104 | |||
105 | #define MN10300_OPERAND_PAREN 0x80 |
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106 | |||
107 | #define MN10300_OPERAND_REPEATED 0x100 |
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108 | |||
109 | #define MN10300_OPERAND_EXTENDED 0x200 |
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110 | |||
111 | #define MN10300_OPERAND_SPLIT 0x400 |
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112 | |||
113 | #define MN10300_OPERAND_REG_LIST 0x800 |
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114 | |||
115 | #define MN10300_OPERAND_PCREL 0x1000 |
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116 | |||
117 | #define MN10300_OPERAND_MEMADDR 0x2000 |
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118 | |||
119 | #define MN10300_OPERAND_RELAX 0x4000 |
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120 | |||
121 | #define MN10300_OPERAND_USP 0x8000 |
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122 | |||
123 | #define MN10300_OPERAND_SSP 0x10000 |
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124 | |||
125 | #define MN10300_OPERAND_MSP 0x20000 |
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126 | |||
127 | #define MN10300_OPERAND_PC 0x40000 |
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128 | |||
129 | #define MN10300_OPERAND_EPSW 0x80000 |
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130 | |||
131 | #define MN10300_OPERAND_RREG 0x100000 |
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132 | |||
133 | #define MN10300_OPERAND_XRREG 0x200000 |
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134 | |||
135 | #define MN10300_OPERAND_PLUS 0x400000 |
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136 | |||
137 | #define MN10300_OPERAND_24BIT 0x800000 |
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138 | |||
139 | #define MN10300_OPERAND_FSREG 0x1000000 |
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140 | |||
141 | #define MN10300_OPERAND_FDREG 0x2000000 |
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142 | |||
143 | #define MN10300_OPERAND_FPCR 0x4000000 |
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144 | |||
145 | /* Opcode Formats. */ |
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146 | #define FMT_S0 1 |
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147 | #define FMT_S1 2 |
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148 | #define FMT_S2 3 |
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149 | #define FMT_S4 4 |
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150 | #define FMT_S6 5 |
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151 | #define FMT_D0 6 |
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152 | #define FMT_D1 7 |
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153 | #define FMT_D2 8 |
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154 | #define FMT_D4 9 |
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155 | #define FMT_D5 10 |
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156 | #define FMT_D6 11 |
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157 | #define FMT_D7 12 |
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158 | #define FMT_D8 13 |
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159 | #define FMT_D9 14 |
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160 | #define FMT_D10 15 |
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161 | #define FMT_D3 16 |
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162 | |||
163 | /* Variants of the mn10300 which have additional opcodes. */ |
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164 | #define MN103 300 |
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165 | #define AM30 300 |
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166 | |||
167 | #define AM33 330 |
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168 | #define AM33_2 332 |
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169 | |||
170 | #endif /* MN10300_H */ |