WebSVN – Kolibri OS – Blame – /contrib/toolchain/binutils/include/opcode/ChangeLog

Rev	Author	Line No.	Line
6324	serge	1	2015-12-15 Matthew Wahab
		2
		3	* aarch64.h (enum aarch64_opnd_qualifier): Add
		4	AARCH64_OPND_QLF_V_2H.
		5
		6	2015-12-14 Matthew Wahab
		7
		8	* aarch64.h (aarch64_opnd): Add AARCH64_OPND_BARRIER_PSB.
		9	* aarch64-asm-2.c: Regenerate.
		10	* aarch64-dis-2.c: Regenerate.
		11	* aarch64-opc-2.c: Regenerate.
		12	* aarch64-opc.c (aarch64_hint_options): Add "csync".
		13	(aarch64_print_operands): Handle AARCH64_OPND_BARRIER_PSB.
		14	* aarch64-tbl.h (aarch64_feature_stat_profile): New.
		15	(STAT_PROFILE): New.
		16	(aarch64_opcode_table): Add "psb".
		17	(AARCH64_OPERANDS): Add "BARRIER_PSB".
		18
		19	2015-12-14 Matthew Wahab
		20
		21	* aarch64.h (aarch64_hint_options): Declare.
		22	(aarch64_opnd_info): Add field hint_option.
		23
		24	2015-12-14 Matthew Wahab
		25
		26	* aarch64.h (AARCH64_FEATURE_PROFILE): New.
		27
		28	2015-12-14 Matthew Wahab
		29
		30	* aarch64.h (aarch64_sys_ins_reg_supported_p): Declare.
		31
		32	2015-12-14 Matthew Wahab
		33
		34	* aarch64.h (aarch64_sys_ins_reg): Replace has_xt with flags.
		35	(aarch64_sys_ins_reg_has_xt): Declare.
		36
		37	2015-12-14 Matthew Wahab
		38
		39	* aarch64.h (AARCH64_FEATURE_RAS): New.
		40	(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_RAS.
		41
		42	2015-12-14 Matthew Wahab
		43
		44	* aarch64.h (AARCH64_FEATURE_F16): Fix clash with
		45	AARCH64_FEATURE_V8_1.
		46	(AARCH64_ARCH_V8_1): Add AARCH64_FEATURE_CRC.
		47	(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_CRC and
		48	AARCH64_FEATURE_V8_1.
		49
		50	2015-12-14 Matthew Wahab
		51
		52	* aarch64.h (AARCH64_FEATURE_F16): New.
		53	(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_F16 to ARMv8.2
		54	features.
		55
		56	2015-12-14 Matthew Wahab
		57
		58	* aarch64.h (aarch64_op): Add OP_BFC.
		59
		60	2015-12-09 Matthew Wahab
		61
		62	* aarch64.h (AARCH64_FEATURE_V8_2): New.
		63	(AARCH64_ARCH_V8_2): New.
		64
		65	2015-12-08 Matthew Wahab
		66
		67	* aarch64.h (AARCH64_FEATURE_V8_1): New.
		68	(AARCH64_ARCH_v8_1): Add AARCH64_FEATURE_V8_1.
		69
		70	2015-11-11 Alan Modra
		71	Peter Bergner
		72
		73	* ppc.h (PPC_OPCODE_POWER9): New define.
		74	(PPC_OPCODE_VSX3): Likewise.
		75
		76	2015-11-02 Nick Clifton
		77
		78	* rx.h (enum RX_Opcode_ID): Add more NOP opcodes.
		79
		80	2015-11-02 Nick Clifton
		81
		82	* rx.h (enum RX_Operand_Type): Add RX_Operand_Zero_Indirect.
		83
		84	2015-10-28 Yao Qi
		85
		86	* aarch64.h (aarch64_decode_insn): Update declaration.
		87
		88	2015-10-07 Yao Qi
		89
		90	* aarch64.h (aarch64_sys_ins_reg)
		91	: New field.
		92
		93	2015-10-07 Yao Qi
		94
		95	* aarch64.h [__cplusplus]: Wrap in extern "C".
		96
		97	2015-10-07 Claudiu Zissulescu
		98	Cupertino Miranda
		99
		100	* arc-func.h: New file.
		101	* arc.h: Likewise.
		102
		103	2015-10-02 Yao Qi
		104
		105	* aarch64.h (aarch64_zero_register_p): Move the declaration
		106	to column one.
		107
		108	2015-10-02 Yao Qi
		109
		110	* aarch64.h (aarch64_decode_insn): Declare it.
		111
		112	2015-09-29 Dominik Vogt
		113
		114	* s390.h (S390_INSTR_FLAG_HTM): New flag.
		115	(S390_INSTR_FLAG_VX): New flag.
		116	(S390_INSTR_FLAG_FACILITY_MASK): New flag mask.
		117
		118	2015-09-23 Nick Clifton
		119
		120	* ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left
		121	shifting.
		122
		123	2015-09-22 Nick Clifton
		124
		125	* rx.h (enum RX_Size): Add RX_Bad_Size entry.
		126
		127	2015-09-09 Daniel Santos
		128
		129	* visium.h (gen_reg_table): Make static.
		130	(fp_reg_table): Likewise.
		131	(cc_table): Likewise.
		132
		133	2015-07-20 Matthew Wahab
		134
		135	* arm.h (ARM_AEXT_V6ZK): Rename to ARM_AEXT_V6KZ.
		136	(ARM_AEXT_V6ZKT2): Rename to ARM_AEXT_V6KZT2.
		137	(ARM_ARCH_V6ZK): Rename to ARM_ARCH_V6KZ.
		138	(ARM_ARCH_V6ZKT2): Rename to ARM_ARCH_V6KZT2.
		139
		140	2015-07-03 Alan Modra
		141
		142	* ppc.h (PPC_OPCODE_750, PPC_OPCODE_7450, PPC_OPCODE_860): Define.
		143
		144	2015-07-01 Sandra Loosemore
		145	Cesar Philippidis
		146
		147	* nios2.h (enum iw_format_type): Add R2 formats.
		148	(enum overflow_type): Add signed_immed12_overflow and
		149	enumeration_overflow for R2.
		150	(struct nios2_opcode): Document new argument letters for R2.
		151	(REG_3BIT, REG_LDWM, REG_POP): Define.
		152	(includes): Include nios2r2.h.
		153	(nios2_r2_opcodes, nios2_num_r2_opcodes): Declare.
		154	(nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): Declare.
		155	(nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): Declare.
		156	(nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): Declare.
		157	(nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): Declare.
		158	(nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings):
		159	Declare.
		160	* nios2r2.h: New file.
		161
		162	2015-06-19 Peter Bergner
		163
		164	* ppc.h (PPC_OPERAND_OPTIONAL_VALUE): New.
		165	(ppc_optional_operand_value): New inline function.
		166
		167	2015-06-04 Matthew Wahab
		168
		169	* aarch64.h (AARCH64_V8_1): New.
		170
		171	2015-06-03 Matthew Wahab
		172
		173	* arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): New.
		174	(ARM_ARCH_V8_1A): New.
		175	(ARM_ARCH_V8_1A_FP): New.
		176	(ARM_ARCH_V8_1A_SIMD): New.
		177	(ARM_ARCH_V8_1A_CRYPTOV1): New.
		178	(ARM_FEATURE_CORE): New.
		179
		180	2015-06-02 Matthew Wahab
		181
		182	* arm.h (ARM_EXT2_PAN): New.
		183	(ARM_FEATURE_CORE_HIGH): New.
		184
		185	2015-06-02 Matthew Wahab
		186
		187	* arm.h (ARM_FEATURE_ALL): New.
		188
		189	2015-06-02 Matthew Wahab
		190
		191	* aarch64.h (AARCH64_FEATURE_RDMA): New.
		192
		193	2015-06-02 Matthew Wahab
		194
		195	* aarch64.h (AARCH64_FEATURE_LOR): New.
		196
		197	2015-06-01 Matthew Wahab
		198
		199	* aarch64.h (AARCH64_FEATURE_PAN): New.
		200	(aarch64_sys_reg_supported_p): Declare.
		201	(aarch64_pstatefield_supported_p): Declare.
		202
		203	2015-04-30 DJ Delorie
		204
		205	* rl78.h (RL78_Dis_Isa): New.
		206	(rl78_decode_opcode): Add ISA parameter.
		207
		208	2015-03-24 Terry Guo
		209
		210	* arm.h (arm_feature_set): Extended to provide more available bits.
		211	(ARM_ANY): Updated to follow above new definition.
		212	(ARM_CPU_HAS_FEATURE): Likewise.
		213	(ARM_CPU_IS_ANY): Likewise.
		214	(ARM_MERGE_FEATURE_SETS): Likewise.
		215	(ARM_CLEAR_FEATURE): Likewise.
		216	(ARM_FEATURE): Likewise.
		217	(ARM_FEATURE_COPY): New macro.
		218	(ARM_FEATURE_EQUAL): Likewise.
		219	(ARM_FEATURE_ZERO): Likewise.
		220	(ARM_FEATURE_CORE_EQUAL): Likewise.
		221	(ARM_FEATURE_LOW): Likewise.
		222	(ARM_FEATURE_CORE_LOW): Likewise.
		223	(ARM_FEATURE_CORE_COPROC): Likewise.
		224
		225	2015-02-19 Pedro Alves
		226
		227	* cgen.h [__cplusplus]: Wrap in extern "C".
		228	* msp430-decode.h [__cplusplus]: Likewise.
		229	* nios2.h [__cplusplus]: Likewise.
		230	* rl78.h [__cplusplus]: Likewise.
		231	* rx.h [__cplusplus]: Likewise.
		232	* tilegx.h [__cplusplus]: Likewise.
		233
		234	2015-01-28 James Bowman
		235
		236	* ft32.h: New file.
		237
		238	2015-01-16 Andreas Krebbel
		239
		240	* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13.
		241
		242	2015-01-01 Alan Modra
		243
		244	Update year range in copyright notice of all files.
		245
		246	2014-12-27 Anthony Green
		247
		248	* moxie.h (MOXIE_F1_AiB2, MOXIE_F1_ABi2): Renamed from
		249	MOXIE_F1_AiB4 and MOXIE_F1_ABi2.
		250
		251	2014-12-06 Eric Botcazou
		252
		253	* visium.h: New file.
		254
		255	2014-11-28 Sandra Loosemore
		256
		257	* nios2.h (NIOS2_INSN_ADDI, NIOS2_INSN_ANDI): Delete.
		258	(NIOS2_INSN_ORI, NIOS2_INSN_XORI): Delete.
		259	(NIOS2_INSN_OPTARG): Renumber.
		260
		261	2014-11-06 Sandra Loosemore
		262
		263	* nios2.h (nios2_find_opcode_hash): Add mach parameter to
		264	declaration. Fix obsolete comment.
		265
		266	2014-10-23 Sandra Loosemore
		267
		268	* nios2.h (enum iw_format_type): New.
		269	(struct nios2_opcode): Update comments. Add size and format fields.
		270	(NIOS2_INSN_OPTARG): New.
		271	(REG_NORMAL, REG_CONTROL, REG_COPROCESSOR): New.
		272	(struct nios2_reg): Add regtype field.
		273	(GET_INSN_FIELD, SET_INSN_FIELD): Delete.
		274	(IW_A_LSB, IW_A_MSB, IW_A_SZ, IW_A_MASK): Delete.
		275	(IW_B_LSB, IW_B_MSB, IW_B_SZ, IW_B_MASK): Delete.
		276	(IW_C_LSB, IW_C_MSB, IW_C_SZ, IW_C_MASK): Delete.
		277	(IW_IMM16_LSB, IW_IMM16_MSB, IW_IMM16_SZ, IW_IMM16_MASK): Delete.
		278	(IW_IMM26_LSB, IW_IMM26_MSB, IW_IMM26_SZ, IW_IMM26_MASK): Delete.
		279	(IW_OP_LSB, IW_OP_MSB, IW_OP_SZ, IW_OP_MASK): Delete.
		280	(IW_OPX_LSB, IW_OPX_MSB, IW_OPX_SZ, IW_OPX_MASK): Delete.
		281	(IW_SHIFT_IMM5_LSB, IW_SHIFT_IMM5_MSB): Delete.
		282	(IW_SHIFT_IMM5_SZ, IW_SHIFT_IMM5_MASK): Delete.
		283	(IW_CONTROL_REGNUM_LSB, IW_CONTROL_REGNUM_MSB): Delete.
		284	(IW_CONTROL_REGNUM_SZ, IW_CONTROL_REGNUM_MASK): Delete.
		285	(OP_MASK_OP, OP_SH_OP): Delete.
		286	(OP_MASK_IOP, OP_SH_IOP): Delete.
		287	(OP_MASK_IRD, OP_SH_IRD): Delete.
		288	(OP_MASK_IRT, OP_SH_IRT): Delete.
		289	(OP_MASK_IRS, OP_SH_IRS): Delete.
		290	(OP_MASK_ROP, OP_SH_ROP): Delete.
		291	(OP_MASK_RRD, OP_SH_RRD): Delete.
		292	(OP_MASK_RRT, OP_SH_RRT): Delete.
		293	(OP_MASK_RRS, OP_SH_RRS): Delete.
		294	(OP_MASK_JOP, OP_SH_JOP): Delete.
		295	(OP_MASK_IMM26, OP_SH_IMM26): Delete.
		296	(OP_MASK_RCTL, OP_SH_RCTL): Delete.
		297	(OP_MASK_IMM5, OP_SH_IMM5): Delete.
		298	(OP_MASK_CACHE_OPX, OP_SH_CACHE_OPX): Delete.
		299	(OP_MASK_CACHE_RRS, OP_SH_CACHE_RRS): Delete.
		300	(OP_MASK_CUSTOM_A, OP_SH_CUSTOM_A): Delete.
		301	(OP_MASK_CUSTOM_B, OP_SH_CUSTOM_B): Delete.
		302	(OP_MASK_CUSTOM_C, OP_SH_CUSTOM_C): Delete.
		303	(OP_MASK_CUSTOM_N, OP_SH_CUSTOM_N): Delete.
		304	(OP_, OPX_, OP_MATCH_, OPX_MATCH_): Delete.
		305	(OP_MASK_, OP_MASK): Delete.
		306	(GET_IW_A, GET_IW_B, GET_IW_C, GET_IW_CONTROL_REGNUM): Delete.
		307	(GET_IW_IMM16, GET_IW_IMM26, GET_IW_OP, GET_IW_OPX): Delete.
		308	Include nios2r1.h to define new instruction opcode constants
		309	and accessors.
		310	(nios2_builtin_opcodes): Rename to nios2_r1_opcodes.
		311	(bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
		312	(bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
		313	(NUMOPCODES, NUMREGISTERS): Delete.
		314	* nios2r1.h: New file.
		315
		316	2014-10-17 Jose E. Marchesi
		317
		318	* sparc.h (HWCAP2_VIS3B): Documentation improved.
		319
		320	2014-10-09 Jose E. Marchesi
		321
		322	* sparc.h (sparc_opcode): new field `hwcaps2'.
		323	(HWCAP2_FJATHPLUS): New define.
		324	(HWCAP2_VIS3B): Likewise.
		325	(HWCAP2_ADP): Likewise.
		326	(HWCAP2_SPARC5): Likewise.
		327	(HWCAP2_MWAIT): Likewise.
		328	(HWCAP2_XMPMUL): Likewise.
		329	(HWCAP2_XMONT): Likewise.
		330	(HWCAP2_NSEC): Likewise.
		331	(HWCAP2_FJATHHPC): Likewise.
		332	(HWCAP2_FJDES): Likewise.
		333	(HWCAP2_FJAES): Likewise.
		334	Document the new operand kind `{', corresponding to the mcdper
		335	ancillary state register.
		336	Document the new operand kind }, which represents frsd floating
		337	point registers (double precision) which must be the same than
		338	frs1 in its containing instruction.
		339
		340	2014-09-16 Kuan-Lin Chen
		341
		342	* nds32.h: Add new opcode declaration.
		343
		344	2014-09-15 Andrew Bennett
		345	Matthew Fortune
		346
		347	* mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT,
		348	OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6
		349	instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B,
		350	+I, +O, +R, +:, +\, +", +;
		351	(mips_check_prev_operand): New struct.
		352	(INSN2_FORBIDDEN_SLOT): New define.
		353	(INSN_ISA32R6): New define.
		354	(INSN_ISA64R6): New define.
		355	(INSN_UPTO32R6): New define.
		356	(INSN_UPTO64R6): New define.
		357	(mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6.
		358	(ISA_MIPS32R6): New define.
		359	(ISA_MIPS64R6): New define.
		360	(CPU_MIPS32R6): New define.
		361	(CPU_MIPS64R6): New define.
		362	(cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6.
		363
		364	2014-09-03 Jiong Wang
		365
		366	* aarch64.h (AARCH64_FEATURE_LSE): New feature added.
		367	(aarch64_opnd): Add AARCH64_OPND_PAIRREG.
		368	(aarch64_insn_class): Add lse_atomic.
		369	(F_LSE_SZ): New field added.
		370	(opcode_has_special_coder): Recognize F_LSE_SZ.
		371
		372	2014-08-26 Maciej W. Rozycki
		373
		374	* mips.h: Document the move of `MICROMIPSOP_*_CODE10' from `B'
		375	over to `+J'.
		376
		377	2014-07-29 Matthew Fortune
		378
		379	* mips.h (INSN_LOAD_COPROC_DELAY): Rename to...
		380	(INSN_LOAD_COPROC): New define.
		381	(INSN_COPROC_MOVE_DELAY): Rename to...
		382	(INSN_COPROC_MOVE): New define.
		383
		384	2014-07-01 Barney Stratford
		385	Senthil Kumar Selvaraj
		386	Pitchumani Sivanupandi
		387	Soundararajan
		388
		389	* avr.h (AVR_ISA_TINY): Define avrtiny specific ISA.
		390	(AVR_ISA_2xxxa): Define ISA without LPM.
		391	(AVR_ISA_AVRTINY): Define avrtiny arch ISA.
		392	Add doc for contraint used in 16 bit lds/sts.
		393	Adjust ISA group for icall, ijmp, pop and push.
		394	Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints.
		395
		396	2014-05-19 Nick Clifton
		397
		398	* msp430.h (struct msp430_operand_s): Add vshift field.
		399
		400	2014-05-07 Andrew Bennett
		401
		402	* mips.h (INSN_ISA_MASK): Updated.
		403	(INSN_ISA32R3): New define.
		404	(INSN_ISA32R5): New define.
		405	(INSN_ISA64R3): New define.
		406	(INSN_ISA64R5): New define.
		407	(INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32
		408	INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered.
		409	(mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and
		410	mips64r5.
		411	(INSN_UPTO32R3): New define.
		412	(INSN_UPTO32R5): New define.
		413	(INSN_UPTO64R3): New define.
		414	(INSN_UPTO64R5): New define.
		415	(ISA_MIPS32R3): New define.
		416	(ISA_MIPS32R5): New define.
		417	(ISA_MIPS64R3): New define.
		418	(ISA_MIPS64R5): New define.
		419	(CPU_MIPS32R3): New define.
		420	(CPU_MIPS32R5): New define.
		421	(CPU_MIPS64R3): New define.
		422	(CPU_MIPS64R5): New define.
		423
		424	2014-05-01 Richard Sandiford
		425
		426	* mips.h (mips_isa_table): Avoid hard-coding INSN_ISA* values.
		427
		428	2014-04-22 Christian Svensson
		429
		430	* or32.h: Delete.
		431
		432	2014-03-05 Alan Modra
		433
		434	Update copyright years.
		435
		436	2013-12-16 Andrew Bennett
		437
		438	* mips.h: Updated description of +o, +u, +v and +w for MIPS and
		439	microMIPS.
		440
		441	2013-12-13 Kuan-Lin Chen
		442	Wei-Cheng Wang
		443
		444	* nds32.h: New file for Andes NDS32.
		445
		446	2013-12-07 Mike Frysinger
		447
		448	* bfin.h: Remove +x file mode.
		449
5191	serge	450	2013-11-20 Yufeng Zhang
		451
		452	* aarch64.h (aarch64_pstatefields): Change element type to
		453	aarch64_sys_reg.
		454
		455	2013-11-18 Renlin Li
		456
		457	* arm.h (ARM_AEXT_V7VE): New define.
		458	(ARM_ARCH_V7VE): New define.
		459	(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): Removed.
		460
		461	2013-11-18 Yufeng Zhang
		462
		463	Revert
		464
		465	2013-11-15 Yufeng Zhang
		466
		467	* aarch64.h (aarch64_sys_reg_readonly_p): New declaration.
		468	(aarch64_sys_reg_writeonly_p): Ditto.
		469
		470	2013-11-15 Yufeng Zhang
		471
		472	* aarch64.h (aarch64_sys_reg_readonly_p): New declaration.
		473	(aarch64_sys_reg_writeonly_p): Ditto.
		474
		475	2013-11-05 Yufeng Zhang
		476
		477	* aarch64.h (aarch64_sys_reg): New typedef.
		478	(aarch64_sys_regs): Change to define with the new type.
		479	(aarch64_sys_reg_deprecated_p): Declare.
		480
		481	2013-11-05 Yufeng Zhang
		482
		483	* aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND.
		484	(enum aarch64_opnd): Add AARCH64_OPND_COND1.
		485
6324	serge	486	2013-10-14 Chao-ying Fu
		487
		488	* mips.h (mips_operand_type): Add OP_IMM_INDEX and OP_REG_INDEX.
		489	(mips_reg_operand_type): Add OP_REG_MSA and OP_REG_MSA_CTRL.
		490	For MIPS, add comments for +d, +e, +h, +k, +l, +n, +o, +u, +v, +w,
		491	+T, +U, +V, +W, +~, +!, +@, +#, +$, +%, +^, +&, +*, +\|.
		492	For MIPS, update extension character sequences after +.
		493	(ASE_MSA): New define.
		494	(ASE_MSA64): New define.
		495	For microMIPS, add comments for +d, +e, +h, +k, +l, +n, +o, +u, +v, +w,
		496	+x, +T, +U, +V, +W, +~, +!, +@, +#, +$, +%, +^, +&, +*, +\|.
		497	For microMIPS, update extension character sequences after +.
		498
5191	serge	499	2013-08-23 Yuri Chornoivan
		500
		501	PR binutils/15834
		502	* i960.h: Fix typos.
		503
		504	2013-08-19 Richard Sandiford
		505
		506	* mips.h: Remove references to "+I" and imm2_expr.
		507
		508	2013-08-19 Richard Sandiford
		509
		510	* mips.h (M_DEXT, M_DINS): Delete.
		511
		512	2013-08-19 Richard Sandiford
		513
		514	* mips.h (OP_OPTIONAL_REG): New mips_operand_type.
		515	(mips_optional_operand_p): New function.
		516
		517	2013-08-04 Jürgen Urban
		518	Richard Sandiford
		519
		520	* mips.h: Document new VU0 operand characters.
		521	(OP_VU0_SUFFIX, OP_VU0_MATCH_SUFFIX): New mips_operand_types.
		522	(OP_REG_VF, OP_REG_VI, OP_REG_R5900_I, OP_REG_R5900_Q, OP_REG_R5900_R)
		523	(OP_REG_R5900_ACC): New mips_reg_operand_types.
		524	(INSN2_VU0_CHANNEL_SUFFIX): New macro.
		525	(mips_vu0_channel_mask): Declare.
		526
		527	2013-08-03 Richard Sandiford
		528
		529	* mips.h (mips_pcrel_operand): Inherit from mips_int_operand.
		530	(mips_int_operand_min, mips_int_operand_max): New functions.
		531	(mips_decode_pcrel_operand): Use mips_decode_int_operand.
		532
		533	2013-08-01 Richard Sandiford
		534
		535	* mips.h (mips_decode_reg_operand): New function.
		536	(INSN_WRITE_SHIFT, INSN_WRITE_1, INSN_WRITE_2, INSN_WRITE_ALL)
		537	(INSN_READ_SHIFT, INSN_READ_1, INSN_READ_2, INSN_READ_3, INSN_READ_4)
		538	(INSN_READ_ALL, INSN_READ_GPR_24, INSN_WRITE_GPR_24, INSN_UDI):
		539	New macros.
		540	(INSN_WRITE_GPR_D, INSN_WRITE_GPR_T, INSN_WRITE_FPR_D)
		541	(INSN_WRITE_FPR_S, INSN_WRITE_FPR_T, INSN_READ_GPR_S, INSN_READ_GPR_T)
		542	(INSN_READ_FPR_S, INSN_READ_FPR_T, INSN_READ_FPR_R, INSN_WRITE_GPR_S)
		543	(INSN2_WRITE_GPR_Z, INSN2_WRITE_FPR_Z, INSN2_READ_GPR_Z)
		544	(INSN2_READ_FPR_Z, INSN2_READ_GPR_D, INSN2_READ_FPR_D)
		545	(INSN2_WRITE_GPR_MB, INSN2_READ_GPR_MC, INSN2_MOD_GPR_MD)
		546	(INSN2_READ_GPR_ME, INSN2_MOD_GPR_MF, INSN2_READ_GPR_MG)
		547	(INSN2_READ_GPR_MJ, INSN2_WRITE_GPR_MJ, INSN2_READ_GPR_MP)
		548	(INSN2_WRITE_GPR_MP, INSN2_READ_GPR_MQ, INSN2_READ_GP)
		549	(INSN2_WRITE_GPR_MH, INSN2_READ_GPR_MMN): Delete. Renumber other
		550	macros to cover the gaps.
		551	(INSN2_MOD_SP): Replace with...
		552	(INSN2_WRITE_SP, INSN2_READ_SP): ...these new macros.
		553	(MIPS16_INSN_WRITE_X, MIPS16_INSN_WRITE_Y, MIPS16_INSN_WRITE_Z)
		554	(MIPS16_INSN_WRITE_T, MIPS16_INSN_WRITE_31, MIPS16_INSN_WRITE_GPR_Y)
		555	(MIPS16_INSN_READ_X, MIPS16_INSN_READ_Y, MIPS16_INSN_READ_Z)
		556	(MIPS16_INSN_READ_T, MIPS16_INSN_READ_SP, MIPS16_INSN_READ_GPR_X):
		557	Delete.
		558
		559	2013-08-01 Richard Sandiford
		560
		561	* mips.h (MIPS16_INSN_WRITE_SP, MIPS16_INSN_READ_31)
		562	(MIPS16_INSN_READ_PC, MIPS16_INSN_UNCOND_BRANCH)
		563	(MIPS16_INSN_COND_BRANCH): Delete.
		564
		565	2013-07-24 Anna Tikhonova
		566	Kirill Yukhin
		567	Michael Zolotukhin
		568
		569	* i386.h (BND_PREFIX_OPCODE): New.
		570
		571	2013-07-14 Richard Sandiford
		572
		573	* mips.h (mips_operand_type): Add OP_ENTRY_EXIT_LIST and
		574	OP_SAVE_RESTORE_LIST.
		575	(decode_mips16_operand): Declare.
		576
		577	2013-07-14 Richard Sandiford
		578
		579	* mips.h (mips_operand_type, mips_reg_operand_type): New enums.
		580	(mips_operand, mips_int_operand, mips_mapped_int_operand)
		581	(mips_msb_operand, mips_reg_operand, mips_reg_pair_operand)
		582	(mips_pcrel_operand): New structures.
		583	(mips_insert_operand, mips_extract_operand, mips_signed_operand)
		584	(mips_decode_int_operand, mips_decode_pcrel_operand): New functions.
		585	(decode_mips_operand, decode_micromips_operand): Declare.
		586
		587	2013-07-14 Richard Sandiford
		588
		589	* mips.h: Document MIPS16 "I" opcode.
		590
		591	2013-07-07 Richard Sandiford
		592
		593	* mips.h (M_ACLR_OB, M_ASET_OB, M_CACHE_OB, M_CACHEE_OB, M_L_DOB)
		594	(M_LB_A, M_LBE_OB, M_LBU_A, M_LBUE_OB, M_LD_A, M_LD_OB, M_LDC2_OB)
		595	(M_LDL_OB, M_LDM_OB, M_LDP_OB, M_LDR_OB, M_LH_A, M_LHE_OB, M_LHU_A)
		596	(M_LHUE_OB, M_LL_OB, M_LLD_OB, M_LLE_OB, M_LS_A, M_LW_A, M_LWE_OB)
		597	(M_LWC0_A, M_LWC1_A, M_LWC2_A, M_LWC2_OB, M_LWC3_A, M_LWL_A, M_LWL_OB)
		598	(M_LWLE_OB, M_LWM_OB, M_LWP_OB, M_LWR_A, M_LWR_OB, M_LWRE_OB, M_LWU_OB)
		599	(M_PREF_OB, M_PREFE_OB, M_S_DOB, M_SAA_OB, M_SAAD_OB, M_SC_OB)
		600	(M_SCD_OB, M_SCE_OB, M_SD_A, M_SD_OB, M_SDC2_OB, M_SDL_OB, M_SDM_OB)
		601	(M_SDP_OB, M_SDR_OB, M_SB_A, M_SBE_OB, M_SH_A, M_SHE_OB, M_SW_A)
		602	(M_SWE_OB, M_SWC0_A, M_SWC1_A, M_SWC2_A, M_SWC2_OB, M_SWC3_A, M_SWL_A)
		603	(M_SWL_OB, M_SWLE_OB, M_SWM_OB, M_SWP_OB, M_SWR_A, M_SWR_OB, M_SWRE_OB)
		604	(M_ULD, M_ULH, M_ULHU, M_ULW, M_USH, M_USW, M_USD): Delete.
		605	(M_ULD_A, M_ULH_A, M_ULHU_A, M_ULW_A, M_USH_A, M_USW_A, M_USD_A):
		606	Rename to...
		607	(M_ULD_AB, M_ULH_AB, M_ULHU_AB, M_ULW_AB, M_USH_AB, M_USW_AB)
		608	(M_USD_AB): ...these.
		609
		610	2013-07-07 Richard Sandiford
		611
		612	* mips.h: Remove documentation of "[" and "]". Update documentation
		613	of "k" and the MDMX formats.
		614
		615	2013-07-07 Richard Sandiford
		616
		617	* mips.h: Update documentation of "+s" and "+S".
		618
		619	2013-07-07 Richard Sandiford
		620
		621	* mips.h: Document "+i".
		622
		623	2013-07-07 Richard Sandiford
		624
		625	* mips.h: Remove "mi" documentation. Update "mh" documentation.
		626	(OP_MASK_MI, OP_SH_MI, MICROMIPSOP_MASK_MI, MICROMIPSOP_MASK_MI):
		627	Delete.
		628	(INSN2_WRITE_GPR_MHI): Rename to...
		629	(INSN2_WRITE_GPR_MH): ...this.
		630
		631	2013-07-07 Richard Sandiford
		632
		633	* mips.h: Remove documentation of "+D" and "+T".
		634
		635	2013-06-26 Richard Sandiford
		636
		637	* mips.h: Fix comment for "1": it is now STYPE rather than SHAMT.
		638	Use "source" rather than "destination" for microMIPS "G".
		639
		640	2013-06-25 Maciej W. Rozycki
		641
		642	* mips.h: Add M_JRADDIUSP, M_JRC and M_MOVEP anonymous enum
		643	values.
		644
		645	2013-06-23 Richard Sandiford
		646
		647	* mips.h: Fix comment typo: "G" is _RS rather than _RD for microMIPS.
		648
		649	2013-06-17 Catherine Moore
		650	Maciej W. Rozycki
		651	Chao-Ying Fu
		652
		653	* mips.h (OP_SH_EVAOFFSET): Define.
		654	(OP_MASK_EVAOFFSET): Define.
		655	(INSN_ASE_MASK): Delete.
		656	(ASE_EVA): Define.
		657	(M_CACHEE_AB, M_CACHEE_OB): New.
		658	(M_LBE_OB, M_LBE_AB): New.
		659	(M_LBUE_OB, M_LBUE_AB): New.
		660	(M_LHE_OB, M_LHE_AB): New.
		661	(M_LHUE_OB, M_LHUE_AB): New.
		662	(M_LLE_AB, M_LLE_OB): New.
		663	(M_LWE_OB, M_LWE_AB): New.
		664	(M_LWLE_AB, M_LWLE_OB): New.
		665	(M_LWRE_AB, M_LWRE_OB): New.
		666	(M_PREFE_AB, M_PREFE_OB): New.
		667	(M_SCE_AB, M_SCE_OB): New.
		668	(M_SBE_OB, M_SBE_AB): New.
		669	(M_SHE_OB, M_SHE_AB): New.
		670	(M_SWE_OB, M_SWE_AB): New.
		671	(M_SWLE_AB, M_SWLE_OB): New.
		672	(M_SWRE_AB, M_SWRE_OB): New.
		673	(MICROMIPSOP_SH_EVAOFFSET): Define.
		674	(MICROMIPSOP_MASK_EVAOFFSET): Define.
		675
		676	2013-06-12 Sandra Loosemore
		677
		678	* nios2.h (OP_MATCH_ERET): Correct eret encoding.
		679
		680	2013-05-22 Jürgen Urban
		681
		682	* mips.h (M_LQC2_AB, M_SQC2_AB): New macros.
		683
		684	2013-05-09 Andrew Pinski
		685
		686	* mips.h (OP_MASK_CODE10): Correct definition.
		687	(OP_SH_CODE10): Likewise.
		688	Add a comment that "+J" is used now for OP_*CODE10.
		689	(INSN_ASE_MASK): Update.
		690	(INSN_VIRT): New macro.
		691	(INSN_VIRT64): New macro
		692
		693	2013-05-02 Nick Clifton
		694
		695	* msp430.h: Add patterns for MSP430X instructions.
		696
		697	2013-04-06 David S. Miller
		698
		699	* sparc.h (F_PREFERRED): Define.
		700	(F_PREF_ALIAS): Define.
		701
		702	2013-04-03 Nick Clifton
		703
		704	* v850.h (V850_INVERSE_PCREL): Define.
		705
		706	2013-03-27 Alexis Deruelle
		707
		708	PR binutils/15068
		709	* tic6x-opcode-table.h: Fix patterns for add, ldnw and xor.
		710
		711	2013-03-27 Alexis Deruelle
		712
		713	PR binutils/15068
		714	* tic6xc-insn-formats.h (FLD): Add use of bitfield array.
		715	Add 16-bit opcodes.
		716	* tic6xc-opcode-table.h: Add 16-bit insns.
		717	* tic6x.h: Add support for 16-bit insns.
		718
		719	2013-03-21 Michael Schewe
		720
		721	* h8300.h: Add MEMRELAX flag for mov.b/w/l @(d:32,ERs),Rd
		722	and mov.b/w/l Rs,@(d:32,ERd).
		723
		724	2013-03-20 Alexis Deruelle
		725
		726	PR gas/15082
		727	* tic6x-opcode-table.h: Rename mpydp's specific operand type macro
		728	from ORREGD1324 to ORXREGD1324 and make it cross-path-able through
		729	tic6x_operand_xregpair operand coding type.
		730	Make mpydp instruction cross-path-able, ie: remove the FIXed 'x'
		731	opcode field, usu ORXREGD1324 for the src2 operand and remove the
		732	TIC6X_FLAG_NO_CROSS.
		733
		734	2013-03-20 Alexis Deruelle
		735
		736	PR gas/15095
		737	* tic6x.h (enum tic6x_coding_method): Add
		738	tic6x_coding_dreg_(msb\|lsb) field coding type in order to encode
		739	separately the msb and lsb of a register pair. This is needed to
		740	encode the opcodes in the same way as TI assembler does.
		741	* tic6x-opcode-table.h: Modify absdp, dpint, dpsp, dptrunc, rcpdp
		742	and rsqrdp opcodes to use the new field coding types.
		743
		744	2013-03-11 Kyrylo Tkachov
		745
		746	* arm.h (CRC_EXT_ARMV8): New constant.
		747	(ARCH_CRC_ARMV8): New macro.
		748
		749	2013-02-28 Yufeng Zhang
		750
		751	* aarch64.h (AARCH64_FEATURE_CRC): New macro.
		752
		753	2013-02-06 Sandra Loosemore
6324	serge	754	Andrew Jenner
5191	serge	755
		756	Based on patches from Altera Corporation.
		757
		758	* nios2.h: New file.
		759
		760	2013-01-30 Yufeng Zhang
		761
		762	* aarch64.h (aarch64_op): Add OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2.
		763
		764	2013-01-28 Alexis Deruelle
		765
		766	PR gas/15069
		767	* tic6x-opcode-table.h: Fix encoding of BNOP instruction.
		768
		769	2013-01-24 Nick Clifton
		770
		771	* v850.h: Add e3v5 support.
		772
		773	2013-01-17 Yufeng Zhang
		774
		775	* aarch64.h (aarch64_op): Remove OP_V_MOVI_B.
		776
		777	2013-01-10 Peter Bergner
		778
		779	* ppc.h (PPC_OPCODE_POWER8): New define.
		780	(PPC_OPCODE_HTM): Likewise.
		781
		782	2013-01-10 Will Newton
		783
		784	* metag.h: New file.
		785
		786	2013-01-07 Kaushik Phatak
		787
		788	* cr16.h (make_instruction): Rename to cr16_make_instruction.
		789	(match_opcode): Rename to cr16_match_opcode.
		790
		791	2013-01-04 Juergen Urban
		792
		793	* mips.h: Add support for r5900 instructions including lq and sq.
		794
		795	2013-01-02 Kaushik Phatak
		796
		797	* cr16.h (dwordU,wordU): Moved typedefs from cr16-dis.c
		798	(make_instruction,match_opcode): Added function prototypes.
		799	(cr16_words,cr16_allWords,cr16_currInsn): Declare as extern.
		800
		801	2012-11-23 Alan Modra
		802
		803	* ppc.h (ppc_parse_cpu): Update prototype.
		804
		805	2012-10-14 John David Anglin
		806
		807	* hppa.h (pa_opcodes): Use "cX" completer instead of "cx" in fstqx
		808	opcodes. Likewise, use "cM" instead of "cm" in fstqs opcodes.
		809
		810	2012-10-04 Andreas Krebbel
		811
		812	* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
		813
		814	2012-09-04 Sergey A. Guriev
		815
		816	* ia64.h (ia64_opnd): Add new operand types.
		817
		818	2012-08-21 David S. Miller
		819
		820	* sparc.h (F3F4): New macro.
		821
		822	2012-08-13 Ian Bolton
		823	Laurent Desnogues
		824	Jim MacArthur
		825	Marcus Shawcroft
		826	Nigel Stephens
		827	Ramana Radhakrishnan
		828	Richard Earnshaw
		829	Sofiane Naci
		830	Tejas Belagod
		831	Yufeng Zhang
		832
		833	* aarch64.h: New file.
		834
		835	2012-08-13 Richard Sandiford
		836	Maciej W. Rozycki
		837
		838	* mips.h (mips_opcode): Add the exclusions field.
		839	(OPCODE_IS_MEMBER): Remove macro.
		840	(cpu_is_member): New inline function.
		841	(opcode_is_member): Likewise.
		842
		843	2012-07-31 Chao-Ying Fu
		844	Catherine Moore
		845	Maciej W. Rozycki
		846
		847	* mips.h: Document microMIPS DSP ASE usage.
		848	(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for
		849	microMIPS DSP ASE support.
		850	(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
		851	(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
		852	(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
		853	(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
		854	(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
		855	(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
		856	(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
		857
		858	2012-07-06 Maciej W. Rozycki
		859
		860	* mips.h: Fix a typo in description.
		861
		862	2012-06-07 Georg-Johann Lay
		863
		864	* avr.h: (AVR_ISA_XCH): New define.
		865	(AVR_ISA_XMEGA): Use it.
		866	(XCH, LAS, LAT, LAC): New XMEGA opcodes.
		867
		868	2012-05-15 James Murray
		869
		870	* m68hc11.h: Add XGate definitions.
		871	(struct m68hc11_opcode): Add xg_mask field.
		872
		873	2012-05-14 Catherine Moore
		874	Maciej W. Rozycki
		875	Rhonda Wittels
		876
		877	* ppc.h (PPC_OPCODE_VLE): New definition.
		878	(PPC_OP_SA): New macro.
		879	(PPC_OP_SE_VLE): New macro.
		880	(PPC_OP): Use a variable shift amount.
		881	(powerpc_operand): Update comments.
		882	(PPC_OPSHIFT_INV): New macro.
		883	(PPC_OPERAND_CR): Replace with...
		884	(PPC_OPERAND_CR_BIT): ...this and
		885	(PPC_OPERAND_CR_REG): ...this.
		886
		887
		888	2012-05-03 Sean Keys
		889
		890	* xgate.h: Header file for XGATE assembler.
		891
		892	2012-04-27 David S. Miller
		893
		894	* sparc.h: Document new arg code' )' for crypto RS3
		895	immediates.
		896
		897	* sparc.h (struct sparc_opcode): New field 'hwcaps'.
		898	F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
		899	F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
		900	F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING, F_HWCAP_MASK): Delete.
		901	(HWCAP_MUL32, HWCAP_DIV32, HWCAP_FSMULD, HWCAP_V8PLUS, HWCAP_POPC,
		902	HWCAP_VIS, HWCAP_VIS2, HWCAP_ASI_BLK_INIT, HWCAP_FMAF,
		903	HWCAP_VIS3, HWCAP_HPC, HWCAP_RANDOM, HWCAP_TRANS, HWCAP_FJFMAU,
		904	HWCAP_IMA, HWCAP_ASI_CACHE_SPARING, HWCAP_AES, HWCAP_DES,
		905	HWCAP_KASUMI, HWCAP_CAMELLIA, HWCAP_MD5, HWCAP_SHA1,
		906	HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE,
		907	HWCAP_CBCOND, HWCAP_CRC32): New defines.
		908
		909	2012-03-10 Edmar Wienskoski
		910
		911	* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
		912
		913	2012-02-27 Alan Modra
		914
		915	* crx.h (cst4_map): Update declaration.
		916
		917	2012-02-25 Walter Lee
		918
		919	* tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS,
		920	TILEGX_OPC_LD_TLS.
		921	* tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS,
		922	TILEPRO_OPC_LW_TLS_SN.
		923
		924	2012-02-08 H.J. Lu
		925
		926	* i386.h (XACQUIRE_PREFIX_OPCODE): New.
		927	(XRELEASE_PREFIX_OPCODE): Likewise.
		928
		929	2011-12-08 Andrew Pinski
		930	Adam Nemet
		931
		932	* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEON2.
		933	(INSN_OCTEON2): New macro.
		934	(CPU_OCTEON2): New macro.
		935	(OPCODE_IS_MEMBER): Add Octeon2.
		936
		937	2011-11-29 Andrew Pinski
		938
		939	* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEONP.
		940	(INSN_OCTEONP): New macro.
		941	(CPU_OCTEONP): New macro.
		942	(OPCODE_IS_MEMBER): Add Octeon+.
		943	(M_SAA_AB, M_SAAD_AB, M_SAA_OB, M_SAAD_OB): New enum values.
		944
		945	2011-11-01 DJ Delorie
		946
		947	* rl78.h: New file.
		948
		949	2011-10-24 Maciej W. Rozycki
		950
		951	* mips.h: Fix a typo in description.
		952
		953	2011-09-21 David S. Miller
		954
		955	* sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int.
		956	(F_MUL32, F_DIV32, F_FSMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
		957	F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
		958	F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits.
		959
		960	2011-08-09 Chao-ying Fu
		961	Maciej W. Rozycki
		962
		963	* mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros.
		964	(OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine.
		965	(INSN_ASE_MASK): Add the MCU bit.
		966	(INSN_MCU): New macro.
		967	(M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values.
		968	(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros.
		969
		970	2011-08-09 Maciej W. Rozycki
		971
		972	* mips.h (INSN_WRITE_GPR_S, INSN2_WRITE_GPR_MB): New macros.
		973	(INSN2_READ_GPR_MC, INSN2_READ_GPR_ME): Likewise.
		974	(INSN2_WRITE_GPR_MF, INSN2_READ_GPR_MG): Likewise.
		975	(INSN2_READ_GPR_MJ, INSN2_WRITE_GPR_MJ): Likewise.
		976	(INSN2_READ_GPR_MP, INSN2_WRITE_GPR_MP): Likewise.
		977	(INSN2_READ_GPR_MQ, INSN2_WRITE_GPR_MHI): Likewise.
		978	(INSN2_READ_GPR_MMN): Likewise.
		979	(INSN2_READ_FPR_D): Change the bit used.
		980	(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_MF): Likewise.
		981	(INSN2_MOD_SP, INSN2_READ_GPR_31, INSN2_READ_GP): Likewise.
		982	(INSN2_READ_PC, INSN2_UNCOND_BRANCH): Likewise.
		983	(INSN2_COND_BRANCH): Likewise.
		984	(INSN2_WRITE_GPR_S, INSN2_MOD_GPR_MB): Remove macros.
		985	(INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG): Likewise.
		986	(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP, INSN2_MOD_GPR_MQ): Likewise.
		987	(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM): Likewise.
		988	(INSN2_MOD_GPR_MN): Likewise.
		989
		990	2011-08-05 David S. Miller
		991
		992	* sparc.h: Document new format codes '4', '5', and '('.
		993	(OPF_LOW4, RS3): New macros.
		994
		995	2011-08-03 Maciej W. Rozycki
		996
		997	* mips.h: Document the use of FP_D in MIPS16 mode. Adjust the
		998	order of flags documented.
		999
		1000	2011-07-29 Maciej W. Rozycki
		1001
		1002	* mips.h: Clarify the description of microMIPS instruction
		1003	manipulation macros.
		1004	(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): Remove macros.
		1005
		1006	2011-07-24 Chao-ying Fu
		1007	Maciej W. Rozycki
		1008
		1009	* mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros.
		1010	(OP_MASK_STYPE, OP_SH_STYPE): Likewise.
		1011	(OP_MASK_CODE10, OP_SH_CODE10): Likewise.
		1012	(OP_MASK_TRAP, OP_SH_TRAP): Likewise.
		1013	(OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise.
		1014	(OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise.
		1015	(OP_MASK_RS3, OP_SH_RS3): Likewise.
		1016	(OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise.
		1017	(OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise.
		1018	(OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise.
		1019	(OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise.
		1020	(OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise.
		1021	(OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise.
		1022	(OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise.
		1023	(OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise.
		1024	(OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise.
		1025	(OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise.
		1026	(OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise.
		1027	(OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise.
		1028	(OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise.
		1029	(OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise.
		1030	(INSN_WRITE_GPR_S): New macro.
		1031	(INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise.
		1032	(INSN2_READ_FPR_D): Likewise.
		1033	(INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise.
		1034	(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise.
		1035	(INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise.
		1036	(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise.
		1037	(INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise.
		1038	(INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise.
		1039	(INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise.
		1040	(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise.
		1041	(CPU_MICROMIPS): New macro.
		1042	(M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values.
		1043	(M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise.
		1044	(M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise.
		1045	(M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise.
		1046	(M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise.
		1047	(M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise.
		1048	(M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise.
		1049	(M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise.
		1050	(M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise.
		1051	(M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise.
		1052	(M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise.
		1053	(M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise.
		1054	(M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise.
		1055	(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros.
		1056	(MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise.
		1057	(MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise.
		1058	(MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise.
		1059	(MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise.
		1060	(MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise.
		1061	(MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise.
		1062	(MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise.
		1063	(MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise.
		1064	(MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise.
		1065	(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
		1066	(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
		1067	(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
		1068	(MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise.
		1069	(MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise.
		1070	(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise.
		1071	(MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise.
		1072	(MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise.
		1073	(MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise.
		1074	(MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise.
		1075	(MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise.
		1076	(MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise.
		1077	(MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise.
		1078	(MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise.
		1079	(MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise.
		1080	(MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise.
		1081	(MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise.
		1082	(MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise.
		1083	(MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise.
		1084	(MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise.
		1085	(MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise.
		1086	(MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise.
		1087	(MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise.
		1088	(MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise.
		1089	(MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise.
		1090	(MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise.
		1091	(MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise.
		1092	(MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise.
		1093	(MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise.
		1094	(MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise.
		1095	(MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise.
		1096	(MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise.
		1097	(MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise.
		1098	(MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise.
		1099	(MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise.
		1100	(MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise.
		1101	(MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise.
		1102	(MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise.
		1103	(MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise.
		1104	(MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise.
		1105	(MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise.
		1106	(MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise.
		1107	(MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise.
		1108	(MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise.
		1109	(MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise.
		1110	(MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise.
		1111	(MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise.
		1112	(MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise.
		1113	(MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise.
		1114	(MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise.
		1115	(MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise.
		1116	(MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise.
		1117	(MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise.
		1118	(MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise.
		1119	(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
		1120	(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
		1121	(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
		1122	(MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise.
		1123	(MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise.
		1124	(MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise.
		1125	(MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise.
		1126	(MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise.
		1127	(MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise.
		1128	(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise.
		1129	(MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise.
		1130	(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
		1131	(MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise.
		1132	(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
		1133	(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
		1134	(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
		1135	(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
		1136	(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
		1137	(MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise.
		1138	(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
		1139	(MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise.
		1140	(MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise.
		1141	(MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise.
		1142	(MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise.
		1143	(MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise.
		1144	(MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise.
		1145	(MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise.
		1146	(MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise.
		1147	(micromips_opcodes): New declaration.
		1148	(bfd_micromips_num_opcodes): Likewise.
		1149
		1150	2011-07-24 Maciej W. Rozycki
		1151
		1152	* mips.h (INSN_TRAP): Rename to...
		1153	(INSN_NO_DELAY_SLOT): ... this.
		1154	(INSN_SYNC): Remove macro.
		1155
		1156	2011-07-01 Eric B. Weddington
		1157
		1158	* avr.h (AVR_ISA_AVR6): Remove AVR_ISA_SPMX as it was actually
		1159	a duplicate of AVR_ISA_SPM.
		1160
		1161	2011-07-01 Nick Clifton
		1162
		1163	* avr.h (AVR_ISA_AVR6): Fix typo, adding AVR_ISA_SPMX.
		1164
		1165	2011-06-18 Robin Getz
		1166
		1167	* bfin.h (is_macmod_signed): New func
		1168
		1169	2011-06-18 Mike Frysinger
		1170
		1171	* bfin.h (is_macmod_pmove): Add missing space before func args.
		1172	(is_macmod_hmove): Likewise.
		1173
		1174	2011-06-13 Walter Lee
		1175
		1176	* tilegx.h: New file.
		1177	* tilepro.h: New file.
		1178
		1179	2011-05-31 Paul Brook
		1180
		1181	* arm.h (ARM_ARCH_V7R_IDIV): Define.
		1182
		1183	2011-05-24 Andreas Krebbel
		1184
		1185	* s390.h: Replace S390_OPERAND_REG_EVEN with
		1186	S390_OPERAND_REG_PAIR.
		1187
		1188	2011-05-24 Andreas Krebbel
		1189
		1190	* s390.h: Add S390_OPCODE_REG_EVEN flag.
		1191
		1192	2011-04-18 Julian Brown
		1193
		1194	* arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from bitmask.
		1195
		1196	2011-04-11 Dan McDonald
		1197
		1198	PR gas/12296
		1199	* arm.h (ARM_AEXT_V7_ARM): Add ARM_EXT_OS.
		1200
		1201	2011-03-22 Eric B. Weddington
		1202
		1203	* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
		1204	New instruction set flags.
		1205	(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
		1206
		1207	2011-02-28 Maciej W. Rozycki
		1208
		1209	* mips.h (M_PREF_AB): New enum value.
		1210
		1211	2011-02-12 Mike Frysinger
		1212
		1213	* bfin.h (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, M_IH,
		1214	M_IU): Define.
		1215	(is_macmod_pmove, is_macmod_hmove): New functions.
		1216
		1217	2011-02-11 Mike Frysinger
		1218
		1219	* bfin.h: Add OPCODE_BFIN_H ifdef multiple include protection.
		1220
		1221	2011-02-04 Bernd Schmidt
		1222
		1223	* tic6x-opcode-table.h (cmtl, ll, sl): Available on C64XP.
		1224	* tic6x.h (TIC6X_INSN_ATOMIC): Remove.
		1225
		1226	2010-12-31 John David Anglin
		1227
		1228	PR gas/11395
		1229	* hppa.h (pa_opcodes): Revert last change. Exchange 32 and 64-bit
		1230	"bb" entries.
		1231
		1232	2010-12-26 John David Anglin
		1233
		1234	PR gas/11395
		1235	* hppa.h: Clear "d" bit in "add" and "sub" patterns.
		1236
		1237	2010-12-18 Richard Sandiford
		1238
		1239	* mips.h: Update commentary after last commit.
		1240
		1241	2010-12-18 Mingjie Xing
		1242
		1243	* mips.h (OP__OFFSET_A, OP__OFFSET_B, OP_*_OFFSET_C)
		1244	(OP__RZ, OP__FZ, INSN2_M_FP_D, INSN2_WRITE_GPR_Z, INSN2_WRITE_FPR_Z)
		1245	(INSN2_READ_GPR_Z, INSN2_READ_FPR_Z, INSN2_READ_GPR_D): Define.
		1246
		1247	2010-11-25 Andreas Krebbel
		1248
		1249	* s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_MAXCPU.
		1250
		1251	2010-11-23 Richard Sandiford
		1252
		1253	* mips.h: Fix previous commit.
		1254
		1255	2010-11-23 Maciej W. Rozycki
		1256
		1257	* mips.h (INSN_CHIP_MASK): Update according to INSN_LOONGSON_3A.
		1258	(INSN_LOONGSON_3A): Clear bit 31.
		1259
		1260	2010-11-15 Matthew Gretton-Dann
		1261
		1262	PR gas/12198
		1263	* arm.h (ARM_AEXT_V6M_ONLY): New define.
		1264	(ARM_AEXT_V6M): Rewrite in terms of ARM_AEXT_V6M_ONLY.
		1265	(ARM_ARCH_V6M_ONLY): New define.
		1266
		1267	2010-11-11 Mingming Sun
		1268
		1269	* mips.h (INSN_LOONGSON_3A): Defined.
		1270	(CPU_LOONGSON_3A): Defined.
		1271	(OPCODE_IS_MEMBER): Add LOONGSON_3A.
		1272
		1273	2010-10-09 Matt Rice
		1274
		1275	* cgen.h (CGEN_ATTR, CGEN_ATTR_TYPE): Rename bool attribute to bool_.
		1276	(CGEN_ATTR_BOOLS, CGEN_ATTR_CGEN_INSN_ALIAS_VALUE): Likewise.
		1277
		1278	2010-09-23 Matthew Gretton-Dann
		1279
		1280	* arm.h (ARM_EXT_VIRT): New define.
		1281	(ARM_ARCH_V7A_IDIV_MP_SEC): Rename...
		1282	(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization
		1283	Extensions.
		1284
		1285	2010-09-23 Matthew Gretton-Dann
		1286
		1287	* arm.h (ARM_AEXT_ADIV): New define.
		1288	(ARM_ARCH_V7A_IDIV_MP_SEC): Likewise.
		1289
		1290	2010-09-23 Matthew Gretton-Dann
		1291
		1292	* arm.h (ARM_EXT_OS): New define.
		1293	(ARM_AEXT_V6SM): Likewise.
		1294	(ARM_ARCH_V6SM): Likewise.
		1295
		1296	2010-09-23 Matthew Gretton-Dann
		1297
		1298	* arm.h (ARM_EXT_MP): Add.
		1299	(ARM_ARCH_V7A_MP): Likewise.
		1300
		1301	2010-09-22 Mike Frysinger
		1302
		1303	* bfin.h: Declare pseudoChr structs/defines.
		1304
		1305	2010-09-21 Mike Frysinger
		1306
		1307	* bfin.h: Strip trailing whitespace.
		1308
		1309	2010-07-29 DJ Delorie
		1310
		1311	* rx.h (RX_Operand_Type): Add TwoReg.
		1312	(RX_Opcode_ID): Remove ediv and ediv2.
		1313
		1314	2010-07-27 DJ Delorie
		1315
		1316	* rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
		1317
		1318	2010-07-23 Naveen.H.S
		1319	Ina Pandit
		1320
		1321	* v850.h: Define PROCESSOR_MASK, PROCESSOR_OPTION_EXTENSION,
		1322	PROCESSOR_OPTION_ALIAS, PROCESSOR_V850E2, PROCESSOR_V850E2V3 and
		1323	PROCESSOR_V850E2_ALL.
		1324	Remove PROCESSOR_V850EA support.
		1325	(v850_operand): Define V850_OPERAND_EP, V850_OPERAND_FLOAT_CC,
		1326	V850_OPERAND_VREG, V850E_IMMEDIATE16, V850E_IMMEDIATE16HI,
		1327	V850E_IMMEDIATE23, V850E_IMMEDIATE32, V850_OPERAND_SIGNED,
		1328	V850_OPERAND_DISP, V850_PCREL, V850_REG_EVEN, V850E_PUSH_POP,
		1329	V850_NOT_IMM0, V850_NOT_SA, V850_OPERAND_BANG and
		1330	V850_OPERAND_PERCENT.
		1331	Update V850_OPERAND_SRG, V850_OPERAND_CC, V850_OPERAND_RELAX and
		1332	V850_NOT_R0.
		1333	Remove V850_OPERAND_SIGNED, V850_OPERAND_EP, V850_OPERAND_DISP
		1334	and V850E_PUSH_POP
		1335
		1336	2010-07-06 Maciej W. Rozycki
		1337
		1338	* mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro.
		1339	(MIPS16_INSN_BRANCH): Rename to...
		1340	(MIPS16_INSN_COND_BRANCH): ... this.
		1341
		1342	2010-07-03 Alan Modra
		1343
		1344	* ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete.
		1345	Renumber other PPC_OPCODE defines.
		1346
		1347	2010-07-03 Alan Modra
		1348
		1349	* ppc.h (PPC_OPCODE_COMMON): Expand comment.
		1350
		1351	2010-06-29 Alan Modra
		1352
		1353	* maxq.h: Delete file.
		1354
		1355	2010-06-14 Sebastian Andrzej Siewior
		1356
		1357	* ppc.h (PPC_OPCODE_E500): Define.
		1358
		1359	2010-05-26 Catherine Moore
		1360
		1361	* opcode/mips.h (INSN_MIPS16): Remove.
		1362
		1363	2010-04-21 Joseph Myers
		1364
		1365	* tic6x-insn-formats.h (s_branch): Correct typo in bitmask.
		1366
		1367	2010-04-15 Nick Clifton
		1368
		1369	* alpha.h: Update copyright notice to use GPLv3.
		1370	* arc.h: Likewise.
		1371	* arm.h: Likewise.
		1372	* avr.h: Likewise.
		1373	* bfin.h: Likewise.
		1374	* cgen.h: Likewise.
		1375	* convex.h: Likewise.
		1376	* cr16.h: Likewise.
		1377	* cris.h: Likewise.
		1378	* crx.h: Likewise.
		1379	* d10v.h: Likewise.
		1380	* d30v.h: Likewise.
		1381	* dlx.h: Likewise.
		1382	* h8300.h: Likewise.
		1383	* hppa.h: Likewise.
		1384	* i370.h: Likewise.
		1385	* i386.h: Likewise.
		1386	* i860.h: Likewise.
		1387	* i960.h: Likewise.
		1388	* ia64.h: Likewise.
		1389	* m68hc11.h: Likewise.
		1390	* m68k.h: Likewise.
		1391	* m88k.h: Likewise.
		1392	* maxq.h: Likewise.
		1393	* mips.h: Likewise.
		1394	* mmix.h: Likewise.
		1395	* mn10200.h: Likewise.
		1396	* mn10300.h: Likewise.
		1397	* msp430.h: Likewise.
		1398	* np1.h: Likewise.
		1399	* ns32k.h: Likewise.
		1400	* or32.h: Likewise.
		1401	* pdp11.h: Likewise.
		1402	* pj.h: Likewise.
		1403	* pn.h: Likewise.
		1404	* ppc.h: Likewise.
		1405	* pyr.h: Likewise.
		1406	* rx.h: Likewise.
		1407	* s390.h: Likewise.
		1408	* score-datadep.h: Likewise.
		1409	* score-inst.h: Likewise.
		1410	* sparc.h: Likewise.
		1411	* spu-insns.h: Likewise.
		1412	* spu.h: Likewise.
		1413	* tic30.h: Likewise.
		1414	* tic4x.h: Likewise.
		1415	* tic54x.h: Likewise.
		1416	* tic80.h: Likewise.
		1417	* v850.h: Likewise.
		1418	* vax.h: Likewise.
		1419
		1420	2010-03-25 Joseph Myers
		1421
		1422	* tic6x-control-registers.h, tic6x-insn-formats.h,
		1423	tic6x-opcode-table.h, tic6x.h: New.
		1424
		1425	2010-02-25 Wu Zhangjin
		1426
		1427	* mips.h: (LOONGSON2F_NOP_INSN): New macro.
		1428
		1429	2010-02-08 Philipp Tomsich
		1430
		1431	* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
		1432
		1433	2010-01-14 H.J. Lu
		1434
		1435	* ia64.h (ia64_find_opcode): Remove argument name.
		1436	(ia64_find_next_opcode): Likewise.
		1437	(ia64_dis_opcode): Likewise.
		1438	(ia64_free_opcode): Likewise.
		1439	(ia64_find_dependency): Likewise.
		1440
		1441	2009-11-22 Doug Evans
		1442
		1443	* cgen.h: Include bfd_stdint.h.
		1444	(CGEN_INSN_LGSINT, CGEN_INSN_LGUINT): New types.
		1445
		1446	2009-11-18 Paul Brook
		1447
		1448	* arm.h (FPU_VFP_V4_SP_D16, FPU_ARCH_VFP_V4_SP_D16): Define.
		1449
		1450	2009-11-17 Paul Brook
		1451	Daniel Jacobowitz
		1452
		1453	* arm.h (ARM_EXT_V6_DSP): Define.
		1454	(ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP.
		1455	(ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define.
		1456
		1457	2009-11-04 DJ Delorie
		1458
		1459	* rx.h (rx_decode_opcode) (mvtipl): Add.
		1460	(mvtcp, mvfcp, opecp): Remove.
		1461
		1462	2009-11-02 Paul Brook
		1463
		1464	* arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
		1465	FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
		1466	(FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
		1467	FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
		1468	FPU_ARCH_NEON_VFP_V4): Define.
		1469
		1470	2009-10-23 Doug Evans
		1471
		1472	* cgen-bitset.h: Delete, moved to ../cgen/bitset.h.
		1473	* cgen.h: Update. Improve multi-inclusion macro name.
		1474
		1475	2009-10-02 Peter Bergner
		1476
		1477	* ppc.h (PPC_OPCODE_476): Define.
		1478
		1479	2009-10-01 Peter Bergner
		1480
		1481	* ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.
		1482
		1483	2009-09-29 DJ Delorie
		1484
		1485	* rx.h: New file.
		1486
		1487	2009-09-22 Peter Bergner
		1488
		1489	* ppc.h (ppc_cpu_t): Typedef to uint64_t.
		1490
		1491	2009-09-21 Ben Elliston
		1492
		1493	* ppc.h (PPC_OPCODE_PPCA2): New.
		1494
		1495	2009-09-05 Martin Thuresson
		1496
		1497	* ia64.h (struct ia64_operand): Renamed member class to op_class.
		1498
		1499	2009-08-29 Martin Thuresson
		1500
		1501	* tic30.h (template): Rename type template to
		1502	insn_template. Updated code to use new name.
		1503	* tic54x.h (template): Rename type template to
		1504	insn_template.
		1505
		1506	2009-08-20 Nick Hudson
		1507
		1508	* hppa.h (pa_opcodes): Add a pa10 bb without FLAG_STRICT.
		1509
		1510	2009-06-11 Anthony Green
		1511
		1512	* moxie.h (MOXIE_F3_PCREL): Define.
		1513	(moxie_form3_opc_info): Grow.
		1514
		1515	2009-06-06 Anthony Green
		1516
		1517	* moxie.h (MOXIE_F1_M): Define.
		1518
		1519	2009-04-15 Anthony Green
		1520
		1521	* moxie.h: Created.
		1522
		1523	2009-04-06 DJ Delorie
		1524
		1525	* h8300.h: Add relaxation attributes to MOVA opcodes.
		1526
		1527	2009-03-10 Alan Modra
		1528
		1529	* ppc.h (ppc_parse_cpu): Declare.
		1530
		1531	2009-03-02 Qinwei
		1532
		1533	* score-inst.h (score_insn_type, score_data_type): Add Ra_I9_I5
		1534	and _IMM11 for mbitclr and mbitset.
		1535	* score-datadep.h: Update dependency information.
		1536
		1537	2009-02-26 Peter Bergner
		1538
		1539	* ppc.h (PPC_OPCODE_POWER7): New.
		1540
		1541	2009-02-06 Doug Evans
		1542
		1543	* i386.h: Add comment regarding sse* insns and prefixes.
		1544
		1545	2009-02-03 Sandip Matte
		1546
		1547	* mips.h (INSN_XLR): Define.
		1548	(INSN_CHIP_MASK): Update.
		1549	(CPU_XLR): Define.
		1550	(OPCODE_IS_MEMBER): Update.
		1551	(M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.
		1552
		1553	2009-01-28 Doug Evans
		1554
		1555	* opcode/i386.h: Add multiple inclusion protection.
		1556	(EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM)
		1557	(EDI_REG_NUM): New macros.
		1558	(MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros.
		1559	(SIB_SCALE_FIELD,SIB_INDEX_FIELD,SIB_BASE_FIELD): New macros.
		1560	(REX_PREFIX_P): New macro.
		1561
		1562	2009-01-09 Peter Bergner
		1563
		1564	* ppc.h (struct powerpc_opcode): New field "deprecated".
		1565	(PPC_OPCODE_NOPOWER4): Delete.
		1566
		1567	2008-11-28 Joshua Kinard
		1568
		1569	* mips.h: Define CPU_R14000, CPU_R16000.
		1570	(OPCODE_IS_MEMBER): Include R14000, R16000 in test.
		1571
		1572	2008-11-18 Catherine Moore
		1573
		1574	* arm.h (FPU_NEON_FP16): New.
		1575	(FPU_ARCH_NEON_FP16): New.
		1576
		1577	2008-11-06 Chao-ying Fu
		1578
		1579	* mips.h: Doucument '1' for 5-bit sync type.
		1580
		1581	2008-08-28 H.J. Lu
		1582
		1583	* ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update
		1584	IA64_RS_CR.
		1585
		1586	2008-08-01 Peter Bergner
		1587
		1588	* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
		1589
		1590	2008-07-30 Michael J. Eager
		1591
		1592	* ppc.h (PPC_OPCODE_405): Define.
		1593	(PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
		1594
		1595	2008-06-13 Peter Bergner
		1596
		1597	* ppc.h (ppc_cpu_t): New typedef.
		1598	(struct powerpc_opcode ): Use it.
		1599	(struct powerpc_operand ): Likewise.
		1600	(struct powerpc_macro ): Likewise.
		1601
		1602	2008-06-12 Adam Nemet
		1603
		1604	* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
		1605	Update comment before MIPS16 field descriptors to mention MIPS16.
		1606	(OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
		1607	BBIT.
		1608	(OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
		1609	New bit masks and shift counts for cins and exts.
		1610
		1611	* mips.h: Document new field descriptors +Q.
		1612	(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.
		1613
		1614	2008-04-28 Adam Nemet
		1615
		1616	* mips.h (INSN_MACRO): Move it up to the pinfo macros.
		1617	(INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros.
		1618
		1619	2008-04-14 Edmar Wienskoski
		1620
		1621	* ppc.h: (PPC_OPCODE_E500MC): New.
		1622
		1623	2008-04-03 H.J. Lu
		1624
		1625	* i386.h (MAX_OPERANDS): Set to 5.
		1626	(MAX_MNEM_SIZE): Changed to 20.
		1627
		1628	2008-03-28 Eric B. Weddington
		1629
		1630	* avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
		1631
		1632	2008-03-09 Paul Brook
		1633
		1634	* arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
		1635
		1636	2008-03-04 Paul Brook
		1637
		1638	* arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
		1639	(ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
		1640	(ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
		1641
		1642	2008-02-27 Denis Vlasenko
		1643	Nick Clifton
		1644
		1645	PR 3134
		1646	* h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
		1647	with a 32-bit displacement but without the top bit of the 4th byte
		1648	set.
		1649
		1650	2008-02-18 M R Swami Reddy
		1651
		1652	* cr16.h (cr16_num_optab): Declared.
		1653
		1654	2008-02-14 Hakan Ardo
		1655
		1656	PR gas/2626
		1657	* avr.h (AVR_ISA_2xxe): Define.
		1658
		1659	2008-02-04 Adam Nemet
		1660
		1661	* mips.h: Update copyright.
		1662	(INSN_CHIP_MASK): New macro.
		1663	(INSN_OCTEON): New macro.
		1664	(CPU_OCTEON): New macro.
		1665	(OPCODE_IS_MEMBER): Handle Octeon instructions.
		1666
		1667	2008-01-23 Eric B. Weddington
		1668
		1669	* avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
		1670
		1671	2008-01-03 Eric B. Weddington
		1672
		1673	* avr.h (AVR_ISA_USB162): Add new opcode set.
		1674	(AVR_ISA_AVR3): Likewise.
		1675
		1676	2007-11-29 Mark Shinwell
		1677
		1678	* mips.h (INSN_LOONGSON_2E): New.
		1679	(INSN_LOONGSON_2F): New.
		1680	(CPU_LOONGSON_2E): New.
		1681	(CPU_LOONGSON_2F): New.
		1682	(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.
		1683
		1684	2007-11-29 Mark Shinwell
		1685
		1686	* mips.h (INSN_ISA*): Redefine certain values as an
		1687	enumeration. Update comments.
		1688	(mips_isa_table): New.
		1689	(ISA_MIPS*): Redefine to match enumeration.
		1690	(OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA*
		1691	values.
		1692
		1693	2007-08-08 Ben Elliston
		1694
		1695	* ppc.h (PPC_OPCODE_PPCPS): New.
		1696
		1697	2007-07-03 Nathan Sidwell
		1698
		1699	* m68k.h: Document j K & E.
		1700
		1701	2007-06-29 M R Swami Reddy
		1702
		1703	* cr16.h: New file for CR16 target.
		1704
		1705	2007-05-02 Alan Modra
		1706
		1707	* ppc.h (PPC_OPERAND_PLUS1): Update comment.
		1708
		1709	2007-04-23 Nathan Sidwell
		1710
		1711	* m68k.h (mcfisa_c): New.
		1712	(mcfusp, mcf_mask): Adjust.
		1713
		1714	2007-04-20 Alan Modra
		1715
		1716	* ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
		1717	(num_powerpc_operands): Declare.
		1718	(PPC_OPERAND_SIGNED et al): Redefine as hex.
		1719	(PPC_OPERAND_PLUS1): Define.
		1720
		1721	2007-03-21 H.J. Lu
		1722
		1723	* i386.h (REX_MODE64): Renamed to ...
		1724	(REX_W): This.
		1725	(REX_EXTX): Renamed to ...
		1726	(REX_R): This.
		1727	(REX_EXTY): Renamed to ...
		1728	(REX_X): This.
		1729	(REX_EXTZ): Renamed to ...
		1730	(REX_B): This.
		1731
		1732	2007-03-15 H.J. Lu
		1733
		1734	* i386.h: Add entries from config/tc-i386.h and move tables
		1735	to opcodes/i386-opc.h.
		1736
		1737	2007-03-13 H.J. Lu
		1738
		1739	* i386.h (FloatDR): Removed.
		1740	(i386_optab): Use FloatD and FloatD\|FloatR instead of FloatDR.
		1741
		1742	2007-03-01 Alan Modra
		1743
		1744	* spu-insns.h: Add soma double-float insns.
		1745
		1746	2007-02-20 Thiemo Seufer
		1747	Chao-Ying Fu
		1748
		1749	* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
		1750	(INSN_DSPR2): Add flag for DSP R2 instructions.
		1751	(M_BALIGN): New macro.
		1752
		1753	2007-02-14 Alan Modra
		1754
		1755	* i386.h (i386_optab): Replace all occurrences of Seg2ShortForm
		1756	and Seg3ShortFrom with Shortform.
		1757
		1758	2007-02-11 H.J. Lu
		1759
		1760	PR gas/4027
		1761	* i386.h (i386_optab): Put the real "test" before the pseudo
		1762	one.
		1763
		1764	2007-01-08 Kazu Hirata
		1765
		1766	* m68k.h (m68010up): OR fido_a.
		1767
		1768	2006-12-25 Kazu Hirata
		1769
		1770	* m68k.h (fido_a): New.
		1771
		1772	2006-12-24 Kazu Hirata
		1773
		1774	* m68k.h (mcfmac, mcfemac, cfloat, mcfhwdiv, mcfisa_a,
		1775	mcfisa_aa, mcfisa_b, mcfusp, mcf_mask): Double the defined
		1776	values.
		1777
		1778	2006-11-08 H.J. Lu
		1779
		1780	* i386.h (i386_optab): Replace CpuPNI with CpuSSE3.
		1781
		1782	2006-10-31 Mei Ligang
		1783
		1784	* score-inst.h (enum score_insn_type): Add Insn_internal.
		1785
		1786	2006-10-25 Trevor Smigiel
		1787	Yukishige Shibata
		1788	Nobuhisa Fujinami
		1789	Takeaki Fukuoka
		1790	Alan Modra
		1791
		1792	* spu-insns.h: New file.
		1793	* spu.h: New file.
		1794
		1795	2006-10-24 Andrew Pinski
		1796
		1797	* ppc.h (PPC_OPCODE_CELL): Define.
		1798
		1799	2006-10-23 Dwarakanath Rajagopal
		1800
		1801	* i386.h : Modify opcode to support for the change in POPCNT opcode
		1802	in amdfam10 architecture.
		1803
		1804	2006-09-28 H.J. Lu
		1805
		1806	* i386.h: Replace CpuMNI with CpuSSSE3.
		1807
		1808	2006-09-26 Mark Shinwell
		1809	Joseph Myers
		1810	Ian Lance Taylor
		1811	Ben Elliston
		1812
		1813	* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
		1814
		1815	2006-09-17 Mei Ligang
		1816
		1817	* score-datadep.h: New file.
		1818	* score-inst.h: New file.
		1819
		1820	2006-07-14 H.J. Lu
		1821
		1822	* i386.h (i386_optab): Remove InvMem from maskmovq, movhlps,
		1823	movlhps, movmskps, pextrw, pmovmskb, movmskpd, maskmovdqu,
		1824	movdq2q and movq2dq.
		1825
		1826	2006-07-10 Dwarakanath Rajagopal
		1827	Michael Meissner
		1828
		1829	* i386.h: Add amdfam10 new instructions (SSE4a and ABM instructions).
		1830
		1831	2006-06-12 H.J. Lu
		1832
		1833	* i386.h (i386_optab): Add "nop" with memory reference.
		1834
		1835	2006-06-12 H.J. Lu
		1836
		1837	* i386.h (i386_optab): Update comment for 64bit NOP.
		1838
		1839	2006-06-06 Ben Elliston
		1840	Anton Blanchard
		1841
		1842	* ppc.h (PPC_OPCODE_POWER6): Define.
		1843	Adjust whitespace.
		1844
		1845	2006-06-05 Thiemo Seufer
		1846
		1847	* mips.h: Improve description of MT flags.
		1848
		1849	2006-05-25 Richard Sandiford
		1850
		1851	* m68k.h (mcf_mask): Define.
		1852
		1853	2006-05-05 Thiemo Seufer
		1854	David Ung
		1855
		1856	* mips.h (enum): Add macro M_CACHE_AB.
		1857
		1858	2006-05-04 Thiemo Seufer
		1859	Nigel Stephens
		1860	David Ung
		1861
		1862	* mips.h: Add INSN_SMARTMIPS define.
		1863
		1864	2006-04-30 Thiemo Seufer
		1865	David Ung
		1866
		1867	* mips.h: Defines udi bits and masks. Add description of
		1868	characters which may appear in the args field of udi
		1869	instructions.
		1870
		1871	2006-04-26 Thiemo Seufer
		1872
		1873	* mips.h: Improve comments describing the bitfield instruction
		1874	fields.
		1875
		1876	2006-04-26 Julian Brown
		1877
		1878	* arm.h (FPU_VFP_EXT_V3): Define constant.
		1879	(FPU_NEON_EXT_V1): Likewise.
		1880	(FPU_VFP_HARD): Update.
		1881	(FPU_VFP_V3): Define macro.
		1882	(FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
		1883
		1884	2006-04-07 Joerg Wunsch
		1885
		1886	* avr.h (AVR_ISA_PWMx): New.
		1887
		1888	2006-03-28 Nathan Sidwell
		1889
		1890	* m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008, cpu_m68010,
		1891	cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060, cpu_m68851,
		1892	cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
		1893	cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
		1894	cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
		1895
		1896	2006-03-10 Paul Brook
		1897
		1898	* arm.h (ARM_AEXT_V7_ARM): Include v6ZK extensions.
		1899
		1900	2006-03-04 John David Anglin
		1901
		1902	* hppa.h (pa_opcodes): Reorder bb opcodes so that pa10 opcodes come
		1903	first. Correct mask of bb "B" opcode.
		1904
		1905	2006-02-27 H.J. Lu
		1906
		1907	* i386.h (i386_optab): Support Intel Merom New Instructions.
		1908
		1909	2006-02-24 Paul Brook
		1910
		1911	* arm.h: Add V7 feature bits.
		1912
		1913	2006-02-23 H.J. Lu
		1914
		1915	* ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.
		1916
		1917	2006-01-31 Paul Brook
		1918	Richard Earnshaw
		1919
		1920	* arm.h: Use ARM_CPU_FEATURE.
		1921	(ARM_AEXT_*, FPU_ENDIAN_PURE, FPU_VFP_HARD): New.
		1922	(arm_feature_set): Change to a structure.
		1923	(ARM_CPU_HAS_FEATURE, ARM_MERGE_FEATURE_SETS, ARM_CLEAR_FEATURE,
		1924	ARM_FEATURE): New macros.
		1925
		1926	2005-12-07 Hans-Peter Nilsson
		1927
		1928	* cris.h (MOVE_M_TO_PREG_OPCODE, MOVE_M_TO_PREG_ZBITS)
		1929	(MOVE_PC_INCR_OPCODE_PREFIX, MOVE_PC_INCR_OPCODE_SUFFIX): New macros.
		1930	(ADD_PC_INCR_OPCODE): Don't define.
		1931
		1932	2005-12-06 H.J. Lu
		1933
		1934	PR gas/1874
		1935	* i386.h (i386_optab): Add 64bit support for monitor and mwait.
		1936
		1937	2005-11-14 David Ung
		1938
		1939	* mips.h: Assign 'm'/'M' codes to MIPS16e save/restore
		1940	instructions. Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
		1941	save/restore encoding of the args field.
		1942
		1943	2005-10-28 Dave Brolley
		1944
		1945	Contribute the following changes:
		1946	2005-02-16 Dave Brolley
		1947
		1948	* cgen-bitset.h: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
		1949	cgen_isa_mask_* to cgen_bitset_*.
		1950	* cgen.h: Likewise.
		1951
		1952	2003-10-21 Richard Sandiford
		1953
		1954	* cgen.h (CGEN_BITSET_ATTR_VALUE): Fix definition.
		1955	(CGEN_ATTR_ENTRY): Change "value" to type "unsigned".
		1956	(CGEN_CPU_TABLE): Make isas a ponter.
		1957
		1958	2003-09-29 Dave Brolley
		1959
		1960	* cgen.h (CGEN_ATTR_VALUE_BITSET_TYPE): New typedef.
		1961	(CGEN_ATTR_VALUE_ENUM_TYPE): Ditto.
		1962	(CGEN_ATTR_VALUE_TYPE): Use these new typedefs.
		1963
		1964	2002-12-13 Dave Brolley
		1965
		1966	* cgen.h (symcat.h): #include it.
		1967	(cgen-bitset.h): #include it.
		1968	(CGEN_ATTR_VALUE_TYPE): Now a union.
		1969	(CGEN_ATTR_VALUE): Reference macros generated in opcodes/-desc.h.
		1970	(CGEN_ATTR_ENTRY): 'value' now unsigned.
		1971	(cgen_cpu_desc): 'isas' now (CGEN_ISA_MASK*).
		1972	* cgen-bitset.h: New file.
		1973
		1974	2005-09-30 Catherine Moore
		1975
		1976	* bfin.h: New file.
		1977
		1978	2005-10-24 Jan Beulich
		1979
		1980	* ia64.h (enum ia64_opnd): Move memory operand out of set of
		1981	indirect operands.
		1982
		1983	2005-10-16 John David Anglin
		1984
		1985	* hppa.h (pa_opcodes): Add two fcmp opcodes. Reorder ftest opcodes.
		1986	Add FLAG_STRICT to pa10 ftest opcode.
		1987
		1988	2005-10-12 John David Anglin
		1989
		1990	* hppa.h (pa_opcodes): Remove lha entries.
		1991
		1992	2005-10-08 John David Anglin
		1993
		1994	* hppa.h (FLAG_STRICT): Revise comment.
		1995	(pa_opcode): Revise ordering rules. Add/move strict pa10 variants
		1996	before corresponding pa11 opcodes. Add strict pa10 register-immediate
		1997	entries for "fdc".
		1998
		1999	2005-09-30 Catherine Moore
		2000
		2001	* bfin.h: New file.
		2002
		2003	2005-09-24 John David Anglin
		2004
		2005	* hppa.h (pa_opcodes): Add new "fdc" and "fic" opcode entries.
		2006
		2007	2005-09-06 Chao-ying Fu
		2008
		2009	* mips.h (OP_SH_MT_U, OP_MASK_MT_U, OP_SH_MT_H, OP_MASK_MT_H,
		2010	OP_SH_MTACC_T, OP_MASK_MTACC_T, OP_SH_MTACC_D, OP_MASK_MTACC_D): New
		2011	define.
		2012	Document !, $, *, &, g, +t, +T operand formats for MT instructions.
		2013	(INSN_ASE_MASK): Update to include INSN_MT.
		2014	(INSN_MT): New define for MT ASE.
		2015
		2016	2005-08-25 Chao-ying Fu
		2017
		2018	* mips.h (OP_SH_DSPACC, OP_MASK_DSPACC, OP_SH_DSPACC_S,
		2019	OP_MASK_DSPACC_S, OP_SH_DSPSFT, OP_MASK_DSPSFT, OP_SH_DSPSFT_7,
		2020	OP_MASK_DSPSFT_7, OP_SH_SA3, OP_MASK_SA3, OP_SH_SA4, OP_MASK_SA4,
		2021	OP_SH_IMM8, OP_MASK_IMM8, OP_SH_IMM10, OP_MASK_IMM10, OP_SH_WRDSP,
		2022	OP_MASK_WRDSP, OP_SH_RDDSP, OP_MASK_RDDSP): New define.
		2023	Document 3, 4, 5, 6, 7, 8, 9, 0, :, ', @ operand formats for DSP
		2024	instructions.
		2025	(INSN_DSP): New define for DSP ASE.
		2026
		2027	2005-08-18 Alan Modra
		2028
		2029	* a29k.h: Delete.
		2030
		2031	2005-08-15 Daniel Jacobowitz
		2032
		2033	* ppc.h (PPC_OPCODE_E300): Define.
		2034
		2035	2005-08-12 Martin Schwidefsky
		2036
		2037	* s390.h (s390_opcode_cpu_val): Add enum for cpu type z9-109.
		2038
		2039	2005-07-28 John David Anglin
		2040
		2041	PR gas/336
		2042	* hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb
		2043	and pitlb.
		2044
		2045	2005-07-27 Jan Beulich
		2046
		2047	* i386.h (i386_optab): Add comment to movd. Use LongMem for all
		2048	movd-s. Add NoRex64 to movq-s dealing only with mmx or xmm registers.
		2049	Add movq-s as 64-bit variants of movd-s.
		2050
		2051	2005-07-18 John David Anglin
		2052
		2053	* hppa.h: Fix punctuation in comment.
		2054
		2055	* hppa.h (pa_opcode): Add rules for opcode ordering. Check first for
		2056	implicit space-register addressing. Set space-register bits on opcodes
		2057	using implicit space-register addressing. Add various missing pa20
		2058	long-immediate opcodes. Remove various opcodes using implicit 3-bit
		2059	space-register addressing. Use "fE" instead of "fe" in various
		2060	fstw opcodes.
		2061
		2062	2005-07-18 Jan Beulich
		2063
		2064	* i386.h (i386_optab): Operands of aam and aad are unsigned.
		2065
		2066	2007-07-15 H.J. Lu
		2067
		2068	* i386.h (i386_optab): Support Intel VMX Instructions.
		2069
		2070	2005-07-10 John David Anglin
		2071
		2072	* hppa.h (pa_opcode): Don't set FLAG_STRICT in pa10 loads and stores.
		2073
		2074	2005-07-05 Jan Beulich
		2075
		2076	* i386.h (i386_optab): Add new insns.
		2077
		2078	2005-07-01 Nick Clifton
		2079
		2080	* sparc.h: Add typedefs to structure declarations.
		2081
		2082	2005-06-20 H.J. Lu
		2083
		2084	PR 1013
		2085	* i386.h (i386_optab): Update comments for 64bit addressing on
		2086	mov. Allow 64bit addressing for mov and movq.
		2087
		2088	2005-06-11 John David Anglin
		2089
		2090	* hppa.h (pa_opcodes): Use cM and cX instead of cm and cx,
		2091	respectively, in various floating-point load and store patterns.
		2092
		2093	2005-05-23 John David Anglin
		2094
		2095	* hppa.h (FLAG_STRICT): Correct comment.
		2096	(pa_opcodes): Update load and store entries to allow both PA 1.X and
		2097	PA 2.0 mneumonics when equivalent. Entries with cache control
		2098	completers now require PA 1.1. Adjust whitespace.
		2099
		2100	2005-05-19 Anton Blanchard
		2101
		2102	* ppc.h (PPC_OPCODE_POWER5): Define.
		2103
		2104	2005-05-10 Nick Clifton
		2105
		2106	* Update the address and phone number of the FSF organization in
		2107	the GPL notices in the following files:
		2108	a29k.h, alpha.h, arc.h, arm.h, avr.h, cgen.h, convex.h, cris.h,
		2109	crx.h, d10v.h, d30v.h, dlx.h, h8300.h, hppa.h, i370.h, i386.h,
		2110	i860.h, i960.h, m68hc11.h, m68k.h, m88k.h, maxq.h, mips.h, mmix.h,
		2111	mn10200.h, mn10300.h, msp430.h, np1.h, ns32k.h, or32.h, pdp11.h,
		2112	pj.h, pn.h, ppc.h, pyr.h, s390.h, sparc.h, tic30.h, tic4x.h,
		2113	tic54x.h, tic80.h, v850.h, vax.h
		2114
		2115	2005-05-09 Jan Beulich
		2116
		2117	* i386.h (i386_optab): Add ht and hnt.
		2118
		2119	2005-04-18 Mark Kettenis
		2120
		2121	* i386.h: Insert hyphens into selected VIA PadLock extensions.
		2122	Add xcrypt-ctr. Provide aliases without hyphens.
		2123
		2124	2005-04-13 H.J. Lu
		2125
		2126	Moved from ../ChangeLog
		2127
		2128	2005-04-12 Paul Brook
		2129	* m88k.h: Rename psr macros to avoid conflicts.
		2130
		2131	2005-03-12 Zack Weinberg
		2132	* arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
		2133	Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
		2134	and ARM_ARCH_V6ZKT2.
		2135
		2136	2004-11-29 Tomer Levi
		2137	* crx.h (enum operand_type): Rename rbase_cst4 to rbase_dispu4.
		2138	Remove redundant instruction types.
		2139	(struct argument): X_op - new field.
		2140	(struct cst4_entry): Remove.
		2141	(no_op_insn): Declare.
		2142
		2143	2004-11-05 Tomer Levi
		2144	* crx.h (enum argtype): Rename types, remove unused types.
		2145
		2146	2004-10-27 Tomer Levi
		2147	* crx.h (enum reg): Rearrange registers, remove 'ccfg' and `'pc'.
		2148	(enum reg_type): Remove CRX_PC_REGTYPE, CRX_MTPR_REGTYPE.
		2149	(enum operand_type): Rearrange operands, edit comments.
		2150	replace us with ui for unsigned immediate.
		2151	replace d with disps/dispu/dispe for signed/unsigned/escaped
		2152	displacements (respectively).
		2153	replace rbase_ridx_scl2_dispu with rindex_disps for register index.
		2154	(instruction type): Add NO_TYPE_INS.
		2155	(instruction flags): Add USER_REG, CST4MAP, NO_SP, NO_RPTR.
		2156	(operand_entry): New field - 'flags'.
		2157	(operand flags): New.
		2158
		2159	2004-10-21 Tomer Levi
		2160	* crx.h (operand_type): Remove redundant types i3, i4,
		2161	i5, i8, i12.
		2162	Add new unsigned immediate types us3, us4, us5, us16.
		2163
		2164	2005-04-12 Mark Kettenis
		2165
		2166	* i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
		2167	adjust them accordingly.
		2168
		2169	2005-04-01 Jan Beulich
		2170
		2171	* i386.h (i386_optab): Add rdtscp.
		2172
		2173	2005-03-29 H.J. Lu
		2174
		2175	* i386.h (i386_optab): Don't allow the `l' suffix for moving
		2176	between memory and segment register. Allow movq for moving between
		2177	general-purpose register and segment register.
		2178
		2179	2005-02-09 Jan Beulich
		2180
		2181	PR gas/707
		2182	* i386.h (i386_optab): Add x_Suf to fbld and fbstp. Add w_Suf and
		2183	FloatMF to fldcw, fstcw, fnstcw, and the memory formas of fstsw and
		2184	fnstsw.
		2185
		2186	2006-02-07 Nathan Sidwell
		2187
		2188	* m68k.h (m68008, m68ec030, m68882): Remove.
		2189	(m68k_mask): New.
		2190	(cpu_m68k, cpu_cf): New.
		2191	(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
		2192	mcf5470, mcf5480): Rename to cpu_. Add m680x0 variants.
		2193
		2194	2005-01-25 Alexandre Oliva
		2195
		2196	2004-11-10 Alexandre Oliva
		2197	* cgen.h (enum cgen_parse_operand_type): Add
		2198	CGEN_PARSE_OPERAND_SYMBOLIC.
		2199
		2200	2005-01-21 Fred Fish
		2201
		2202	* mips.h: Change INSN_ALIAS to INSN2_ALIAS.
		2203	Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
		2204	Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
		2205
		2206	2005-01-19 Fred Fish
		2207
		2208	* mips.h (struct mips_opcode): Add new pinfo2 member.
		2209	(INSN_ALIAS): New define for opcode table entries that are
		2210	specific instances of another entry, such as 'move' for an 'or'
		2211	with a zero operand.
		2212	(INSN_READ_MDMX_ACC): Redefine from 0 to 0x2.
		2213	(INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4.
		2214
		2215	2004-12-09 Ian Lance Taylor
		2216
		2217	* mips.h (CPU_RM9000): Define.
		2218	(OPCODE_IS_MEMBER): Handle CPU_RM9000.
		2219
		2220	2004-11-25 Jan Beulich
		2221
		2222	* i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
		2223	to/from test registers are illegal in 64-bit mode. Add missing
		2224	NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
		2225	(previously one had to explicitly encode a rex64 prefix). Re-enable
		2226	lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
		2227	support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
		2228
		2229	2004-11-23 Jan Beulich
		2230
		2231	* i386.h (i386_optab): paddq and psubq, even in their MMX form, are
		2232	available only with SSE2. Change the MMX additions introduced by SSE
		2233	and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
		2234	instructions by their now designated identifier (since combining i686
		2235	and 3DNow! does not really imply 3DNow!A).
		2236
		2237	2004-11-19 Alan Modra
		2238
		2239	* msp430.h (struct rcodes_s, MSP430_RLC, msp430_rcodes,
		2240	struct hcodes_s, msp430_hcodes): Move to gas/config/tc-msp430.c.
		2241
		2242	2004-11-08 Inderpreet Singh
		2243	Vineet Sharma
		2244
		2245	* maxq.h: New file: Disassembly information for the maxq port.
		2246
		2247	2004-11-05 H.J. Lu
		2248
		2249	* i386.h (i386_optab): Put back "movzb".
		2250
		2251	2004-11-04 Hans-Peter Nilsson
		2252
		2253	* cris.h (enum cris_insn_version_usage): Tweak formatting and
		2254	comments. Remove member cris_ver_sim. Add members
		2255	cris_ver_sim_v0_10, cris_ver_v0_10, cris_ver_v3_10,
		2256	cris_ver_v8_10, cris_ver_v10, cris_ver_v10p.
		2257	(struct cris_support_reg, struct cris_cond15): New types.
		2258	(cris_conds15): Declare.
		2259	(JUMP_PC_INCR_OPCODE_V32, BA_DWORD_OPCODE, NOP_OPCODE_COMMON)
		2260	(NOP_OPCODE_ZBITS_COMMON, LAPC_DWORD_OPCODE, LAPC_DWORD_Z_BITS)
		2261	(NOP_OPCODE_V32, NOP_Z_BITS_V32): New macros.
		2262	(NOP_Z_BITS): Define in terms of NOP_OPCODE.
		2263	(cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and
		2264	SIZE_FIELD_UNSIGNED.
		2265
		2266	2004-11-04 Jan Beulich
		2267
		2268	* i386.h (sldx_Suf): Remove.
		2269	(FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
		2270	(q_FP): Define, implying no REX64.
		2271	(x_FP, sl_FP): Imply FloatMF.
		2272	(i386_optab): Split reg and mem forms of moving from segment registers
		2273	so that the memory forms can ignore the 16-/32-bit operand size
		2274	distinction. Adjust a few others for Intel mode. Remove *FP uses from
		2275	all non-floating-point instructions. Unite 32- and 64-bit forms of
		2276	movsx, movzx, and movd. Adjust floating point operations for the above
		2277	changes to the *FP macros. Add DefaultSize to floating point control
		2278	insns operating on larger memory ranges. Remove left over comments
		2279	hinting at certain insns being Intel-syntax ones where the ones
		2280	actually meant are already gone.
		2281
		2282	2004-10-07 Tomer Levi
		2283
		2284	* crx.h: Add COPS_REG_INS - Coprocessor Special register
		2285	instruction type.
		2286
		2287	2004-09-30 Paul Brook
		2288
		2289	* arm.h (ARM_EXT_V6K, ARM_EXT_V6Z): Define.
		2290	(ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6ZK): Define.
		2291
		2292	2004-09-11 Theodore A. Roth
		2293
		2294	* avr.h: Add support for
		2295	atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
		2296
		2297	2004-09-09 Segher Boessenkool
		2298
		2299	* ppc.h (PPC_OPERAND_OPTIONAL): Fix comment.
		2300
		2301	2004-08-24 Dmitry Diky
		2302
		2303	* msp430.h (msp430_opc): Add new instructions.
		2304	(msp430_rcodes): Declare new instructions.
		2305	(msp430_hcodes): Likewise..
		2306
		2307	2004-08-13 Nick Clifton
		2308
		2309	PR/301
		2310	* h8300.h (O_JSR): Do not allow VECIND addressing for non-SX
		2311	processors.
		2312
		2313	2004-08-30 Michal Ludvig
		2314
		2315	* i386.h (i386_optab): Added montmul/xsha1/xsha256 insns.
		2316
		2317	2004-07-22 H.J. Lu
		2318
		2319	* i386.h (i386_optab): Allow cs/ds in 64bit for branch hints.
		2320
		2321	2004-07-21 Jan Beulich
		2322
		2323	* i386.h: Adjust instruction descriptions to better match the
		2324	specification.
		2325
		2326	2004-07-16 Richard Earnshaw
		2327
		2328	* arm.h: Remove all old content. Replace with architecture defines
		2329	from gas/config/tc-arm.c.
		2330
		2331	2004-07-09 Andreas Schwab
		2332
		2333	* m68k.h: Fix comment.
		2334
		2335	2004-07-07 Tomer Levi
		2336
		2337	* crx.h: New file.
		2338
		2339	2004-06-24 Alan Modra
		2340
		2341	* i386.h (i386_optab): Remove fildd, fistpd and fisttpd.
		2342
		2343	2004-05-24 Peter Barada
		2344
		2345	* m68k.h: Add 'size' to m68k_opcode.
		2346
		2347	2004-05-05 Peter Barada
		2348
		2349	* m68k.h: Switch from ColdFire chip name to core variant.
		2350
		2351	2004-04-22 Peter Barada
		2352
		2353	* m68k.h: Add mcfmac/mcfemac definitions. Update operand
		2354	descriptions for new EMAC cases.
		2355	Remove ColdFire macmw/macml/msacmw/msacmw hacks and properly
		2356	handle Motorola MAC syntax.
		2357	Allow disassembly of ColdFire V4e object files.
		2358
		2359	2004-03-16 Alan Modra
		2360
		2361	* ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines.
		2362
		2363	2004-03-12 Jakub Jelinek
		2364
		2365	* i386.h (i386_optab): Remove CpuNo64 from sysenter and sysexit.
		2366
		2367	2004-03-12 Michal Ludvig
		2368
		2369	* i386.h (i386_optab): Added xstore as an alias for xstorerng.
		2370
		2371	2004-03-12 Michal Ludvig
		2372
		2373	* i386.h (i386_optab): Added xstore/xcrypt insns.
		2374
		2375	2004-02-09 Anil Paranjpe
		2376
		2377	* h8300.h (32bit ldc/stc): Add relaxing support.
		2378
		2379	2004-01-12 Anil Paranjpe
		2380
		2381	* h8300.h (BITOP): Pass MEMRELAX flag.
		2382
		2383	2004-01-09 Anil Paranjpe
		2384
		2385	* h8300.h (BITOP): Dissallow operations on @aa:16 and @aa:32
		2386	except for the H8S.
		2387
		2388	For older changes see ChangeLog-9103
		2389
6324	serge	2390	Copyright (C) 2004-2015 Free Software Foundation, Inc.
5191	serge	2391
		2392	Copying and distribution of this file, with or without modification,
		2393	are permitted in any medium without royalty provided the copyright
		2394	notice and this notice are preserved.
		2395
		2396	Local Variables:
		2397	mode: change-log
		2398	left-margin: 8
		2399	fill-column: 74
		2400	version-control: never
		2401	End:

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(root)/contrib/toolchain/binutils/include/opcode/ChangeLog – Rev 6324